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Tutorial Sheet Part-3 (FET amplifier)

1. Show that for a common source (CS) amplifier, the voltage gain
RD

Av

rd

RD

, input resistance R i

RG

and output resistance R O

rd

2. Show that for a common source amplifier with a resistance R s connected


between
source
terminal
and
ground,
the
voltage
gain
RD

RG

and output resistance

3. Show that for a common drain amplifier (CD),

the voltage gain

Av
RO

Av
RO

rd
rd

RD
(1

R S (1

, the input resistance R i

)RS

RS
rd

R S (1

, the input resistance R i

and the output resistance

RG

rd
1

4. Show that for a common gate amplifier with signal source resistance R sig , the
voltage

gain

(1

Av
rd

Ri

Rs

rd

rd

RD RS

RD

(1

RD

)RS

(1

)RD
)

RS

R sig

Rs

R sig

the

and the output resistance R O

input

resistance

rd

5. An n-channel JFET utilizes a self biased circuit. The pinch-off voltage


Vp
2 . 0V
and I DSS 1 . 65 mA . It is desired to bias the circuit at
ID

0 . 8 mA , using V DD

24 V . Assume rd

RD

. Find (a) V GS , (b) g m , (c) R S

and (d) R D such that the voltage gain is at least 10, with R S bypassed with a
very large capacitance C s as shown in Fig. 1. Ans. (a) -0.62V, (b) 1.14mA/V,
(c) 770 , (d) 8.76 k.

Fig. 1
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Tutorial Sheet Part-3 (FET amplifier)

6. Show that the trans-conductance


current I DS by
2

gm

gm

of a JFET is related to the drain

I DSS I DS

Vp

7. Starting with the definition of g m and rd , show that if two identical FETs are
connected in parallel, g m is doubled and rd is halved and
remains
unchanged.

8. Find the voltage amplification A v

VO

for the circuit shown in Fig. 2. Use

VS

Millers theorem to consider the effect of R f .


and rd

5K

The FET parameters are

30

Ans. -18.7

Fig. 2
9. For the circuit shown in Fig. 3, find the expression of (a) the voltage gain
AV

VO
VS

, (b) the input resistance, (c) the output resistance

Ans. (a) A v
(c) R o

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rd

rd
(1

(1

)RD

RD

(1

)RS

, (b) R i

Rs

rd
(1

RD
)

)RS

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Tutorial Sheet Part-3 (FET amplifier)

Fig.3
10. For a FET amplifier configuration as shown in Fig. 4, find the voltage gains
(a) A v 1
Ans. (a) A v 1

V o1
Vs

, (b) A v 2

Vo2
Vs

RD
rd

RD

(1

)RS

, (b) A v 2

RS
rd

RD

(1

)Rs

Fig. 4
11. In the circuit shown in Fig.5, V 2 0 , R D rd 10 k , R S 1k and
19 .
If the output is taken from D2 terminal to ground, find (a) the voltage gain ,
(b) the output resistance. [ Hints. Use derivation of the problem 10]
Ans. (a) 3.17, (b) 6.67 k
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Tutorial Sheet Part-3 (FET amplifier)

Fig. 5
12. The CS amplifier shown in Fig. 6 has the following parameters: R D 12 k ,
R G 1M , R S
470 , V DD
3 mA ,
30 V , C s is arbitrarily large, I DSS
Vp
2 . 4V , and rd
R D . Determine (a) the gate to source bias voltage V GS ,
(b) the drain current I D , (c) the quiescent voltage V DS , (d) the small signal
voltage gain AV
Ans: (a) -0.7V, (b) 1.5mA, (c) 11.25V, (d) -21.2 [ Hint : See prob.5 ]

Fig. 6

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Tutorial Sheet Part-3 (FET amplifier)

13. The amplifier shown in Fig. 7 uses an n-channel FET having I DSS
Vp
1V . If the quiescent drain-to-ground voltage is 10V, find R 1 .

1mA

Ans. 2kohms

Fig. 7

14. The FET shown in Fig. 8 has the following parameters : I DSS 5 . 6 mA ,
Vp
4V . (a) Find v O when v i =0 , (b) Find v O when v i =10V, (c) Find v i
when v 0 =0V. { Note v i and v o are dc voltages ( not small signal voltages ) }
Ans: (a) 2V, (b) 11.4V, (c) -2.15V

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Tutorial Sheet Part-3 (FET amplifier)

Fig. 8

15. If h ie
that

RD

, h ie

(a) A v1

rd

1,

g m h fe R S

v o1
vi

, h fe

g m h fe R S

and
(b) A v 2

1 for the circuit in Fig. 9, show


vo2
vi

g m h fe ( R S
1

Rc )

. Use the

g m h fe R S

approximate model for the BJT.

Fig. 9

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