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Outline
NMOS inverter with resistor pull-up
The inverter
NMOS inverter with current-source pull-up
Complementary MOS (CMOS) inverter
Static analysis of CMOS inverter
Reading Assignment:
Howe and Sodini; Chapter 5, Section 5.4
Lecture 12
VDD
VDD
VOUT:
LO HI
VOUT:
HI LO
VIN:
LO HI
CL
VIN:
HI LO
pull-up
pull-down
CL
Lecture 12
Lecture 12
vSUP
1
roc
ISUP
iSUP
_
vSUP
vSUP
ISUP
roc
roc
large-signal model
small-signal model
Lecture 12
CL
Inverter characteristics :
iD
V
ISUP + rDD
oc
VIN = VGS
3
2
1
VDD
vOUT = vDS
(a)
VOUT
4
VIN
(b)
Lecture 12
VSD
VG
B
IDp
_
D
5V
+ V
D
ID(VSG ,VSD)
(a)
VSG = 3.5 V
300
250
IDp
(A)
(triode
region)
VSG = 3 V
200
(saturation region)
150
VSG = 25
100
VSG = 0, 0.5, 1 V
(cutoff region)
VSG = 2 V
50
VSG = 1.5 V
1
VSD (V)
(b)
Lecture 12
-IDp=IDn
VDD
VB
VOUT
VIN
VIN
CL
0
0
VDD
VOUT
Inverter characteristics:
NMOS cutoff
PMOS triode
VOUT
NMOS saturation
PMOS triode
VDD
NMOS saturation
PMOS saturation
NMOS triode
PMOS saturation
VTn
VDD
Lecture 12
VIN
7
-IDp=IDn
VDD
VB
VOUT:LO
VIN
VIN:HI
CL
0
0
VDD
VOUT
Lecture 12
VIN
VOUT
CL
Basic Operation:
NMOS OFF
PMOS ON
NMOS ON
PMOS OFF
Lecture 12
VOUT
VDD 1
5
VDD
VIN
IDp = IDn
IDn = IDp
VIN
3
3
4
VDD
n-channel
(a)
2
VOUT
1
VDD
VOUT
p-channel
(b)
Note:
VIN = VGSn = VDD -VSGp VSGp=VDD - VIN
VOUT = VDSn = VDD -VSDp VSDp=VDD - VOUT
IDn = -IDp
Combine into single diagram of ID vs. VOUT with VIN as
parameter
Lecture 12
10
VDD-VIN
VIN
0
0
VOUT
VOUT
NMOS saturation
PMOS triode
VDD
NMOS saturation
PMOS saturation
NMOS triode
PMOS saturation
NMOS triode
PMOS cutoff
VTn
Lecture 12
11
NML
VDD
Av(VM)
VM
VILVM VIH
VDD VIN
NMH
Calculate VM
Calculate Av(VM)
Calculate NML and NMH
I Dn
Wn
2
=
nCox (VM VTn )
2Ln
IDp =
6.012 Spring 2007
Wp
2Lp
Lecture 12
12
Wn
n Cox ;
Ln
kp =
Wp
p Cox
Lp
Since :
I Dn = IDp
Then:
1
1
2
kn (VM VTn ) = kp VDD VM + VTp
2
2
kp
kn
1+
(VDD + VTp )
kp
kn
Lecture 12
13
Wp
pCox
kp
L
= 1 = Wp
kn
n C
n ox
Ln
Lp
Wn
2 p
Ln
Wp
W
2 n
Lp
Ln
kn >> kp , or
Wp
Wn
>>
Ln
Lp
VM VTn
NMOS turns on as soon as VIN goes above VTn.
Asymmetric case:
kn << kp , or
Wp
Wn
<<
Ln
Lp
VM VDD + VTp
PMOS turns on as soon as VIN goes below VDD + VTp.
6.012 Spring 2007
Lecture 12
14
vsg2=-vin
-
vin
-
gmpvsg2
rop
G2
D2
G1
D1
+
vgs1
gmnvgs1
vout
ron
S1
G1=G2
D1=D2
vin
gmnvin
gmpvin
ron//rop
vout
-
S1=S2
)(
Lecture 12
15
NML
VDD
Av(VM)
VM
VILVM VIH
VDD VIN
NMH
VDD VM
Av
VDD VM
Av
= VM 1 +
Av
NM H = VOH VIH
= VDD VM 1+
Av
Lecture 12
16
Calculation of CMOS
VM
Noise Margin
Lecture 12
17