INTRODUCTION

TO QUARTUS II SOFTWARE DESIGN

Objectives
Introduce students to the design of logic systems with the Altera Quartus II software.

Figure 1. Altera UP2 board

On completion of this tutorial, the student will be able to:

Understand the basics of the Altera environment.

Design a simple logic circuit using VHDL.
Compile, simulate, debug, and test their design.
Download and run their design on the Altera UP2 board.

Background
The UP2 Education Board is a stand-alone experiment board based on a FLEX 10K device and
includes a MAX 7000 device. When used with the Quartus II software, the board provides a
superior platform for learning digital logic design using industry standard development tools
and PLDs. This board is designed specifically to meet the needs of instructors and students in a
laboratory environment. The UP2 Education Board supports both look-up table (LUT) -based
and product term-based architectures. The EPF10K70 device can be configured in-system with
the ByteBlaster II download cable.
The EPF10K70 device is based on SRAM technology. It is available in a 240-pin RQFP package
and has 3,744 logic elements (LEs) and nine embedded array blocks (EABs). Each LE consists of
a four-input LUT, a programmable flip-flop, and dedicated signal paths for carry-and-cascade
functions. Each EAB provides 2,048 bits of memory which can be used to create RAM, ROM, or
first-in first-out (FIFO) functions. EABs can also implement logic functions, such as multipliers,
microcontrollers, state machines, and digital signal processing (DSP) functions. With 70,000
typical gates, the EPF10K70 device is ideal for intermediate to advanced digital design courses,
including computer architecture, communications, and DSP applications.

Laboratory
In this tutorial, we will implement a simple circuit as shown below with AND, NAND and NOR
functions to provide an introduction to the Altera Quartus II software.

Figure 2. A simple circuit with AND, NAND and NOR gates

Design Entry Using VHDL

A hardware description language such as VHDL can be used to specify circuits. In large designs,
these languages greatly increase productivity and reduce design cycle time, since logic
minimization and synthesis to netlist (a textual representation of a schematic) are
automatically performed by the compiler and synthesis tools. For example to perform addition
in VHDL, the statement: A<= B + C will automatically generate an addition logic circuit with the
correct number of bits to generate the new value of A.

Note: That is why from now on we will use only VHDL to create all necessary components in all
the experiments of this course. In this part of the experiment, the same circuit shown on figure
2 will be created using VHDL.

Step 1
A. Design Using the Graphic Editor
1. Start Quartus II software. Choose File New Project Wizard. In the new window
select Next, then in the next window set your desired working directory (Create a
new directory called lab1) then choose lab1 (laboratory 1) for your project name
and top-level design entity. Press Next.
2. We have no existing files, so in the new window click Next.
3. In the next window choose FLEX10K as target device family. In the list of available
devices choose EPF10K70RC240-4 and press Next then Finish.
B. Creating the VHDL code
1. Select File New. A window appears that allows you to choose the type of file
that should be created. Choose VHDL File and click OK. An empty VHDL Editor
window will appear.
2. Right click on the blank space inside the Editor then choose Insert Template.
Select VHDL Constructs Design Units Entity in the template section and
press Insert, then Close.
3. Go to the end of this template (after end <entity_name>;) and repeat step 2 but
this time insert Architecture Template.
4. Modify this code so it would look like the code below. Remove all the unnecessary
lines and insert two extra lines at the beginning of the text file to define the
libraries for the STD_LOGIC data type.



Figure 3 - VHDL code for circuit in Figure 2
5. Save this file as lab1.vhd. Notice that <entity_name> should always be set to the
name used for the filename in this case, lab1.
C. Editing Pin Numbers
1. From Quartus II main menu choose Assignments Pins.
2. Double-click on one I/O (input/output) pin in the diagram. I/O pins are
represented by a white circle with black border. In the Node Name field, type A
and press OK. All input signals must be associated to a switch. The table below
contains which pins are attached to the on board DIP-switch.

3. Repeat step 2 for signals B, C, and D each time selecting a different pin.
4. The output signal Y must be attached to an on-board LED. You will need to use a
small wire to connect the selected pin to one of the LEDs (D1 D16 in the center
of the circuit board). Most pins are available on the FLEX_EXPANSION ports. Please
look at the board user manual for more information (pages 15-17).
5. Close the Pin Planner window.
D. Compiling your Project
1. Select Processing Start Compilation.
2. After compilation, you should receive a Full compilation was successful message.
3. The project should compile with 0 errors. If any errors appear, verify if you have
performed the entire steps correctly.
4. Close the compilation report window.

Step 2:
A. Simulating your project
1. Select File New Verification/Debugging Files Vector Waveform File and
click OK.
2. From the main menu, select Edit Insert Insert Node or Bus.
3. Click on Node Finder.

4.
5.
6.
7.
8.
9.

Click on List.
Select (highlight) A, B, C, D and Y from Nodes Found.
Click on the > button to have all A, B, C, D, and Y in the Selected Nodes.
Click OK and OK.
You can drag the Node to have an appropriate order.
Set the simulation to run from 0.0ns and 1600.0ns by selecting Edit End Time
and entering 1600.0 ns.
10. Select View Fit in Window to display entire simulation range.
11. Click on A and from the side bar menu, press the Overwrite clock button
type 200.0 ns for its period.
12. Do the same for B: 400.0 ns, C: 800.0 ns, and D: 1600.0 ns.

and

Figure 5 Waveform Editor Window with inputs

13.
14.
15.
16.
17.
18.
19.
20.

Select Assignments Settings to open the settings window. Under Simulations
Settings choose Mode and change the simulation mode to Functional.
Go to File Save.
Save option would automatically select filename to be the same as the project
name, click OK.
Go to main menu and select Processing Start Generate Functional Simulation
Netlist.
Go to main menu and select Processing Start Simulation.
Once simulation is done, the finish dialog box would appear. Click OK.
Select View Fit in Window to display entire simulation range.
Analyze and explain the simulation result. Compare this result with the truth table
of the circuit.

Step 3
A. Downloading your Project to the UP2 board
1. Connect the input pins selected in Step 1-F to the appropriate DIP switches and
the output pin to one of the LEDs. Double check Figure 4 for the location of the I/O
pins in the female prototyping headers.
2. Make sure the Byteblaster cable is attached to the board and to the parallel port
on the PC.
3. Verify that the board is properly powered using a 9V DC transformer and is
attached to the DC_IN located on the corner on the UP2 board.
4. Verify the jumper setting. You need to select Configure FLEX10K device only, see
figure below

5. Select Tools Programmer.
6. Click on the Hardware Setup button, click on Add Hardware, select
ByteblasterMV or ByteBlaster II on the Hardware Type field. Then click on OK.
Now select ByteBlasterII on the Currently selected hardware drop-down menu.
Press Close.
7. Select JTAG mode.
8. Add lab1.sof using Add File button to the list of files (Do not select it again if it is
already selected).
9. Click on Program/configure square in front of lab1.sof. Small check mark should
appear in that square now.
10. Click on Start button on the side menu bar to start programming the board.
11. If successful, verify your circuit according to the simulation using the Pushbuttons
and first two DIP switches as input and the decimal point LED segment as output.
Remember that the LED illuminate when the input is 0 (See Figure 9).
12. Find the combination of DIP switches that turn the decimal point LED segment
OFF. Compare this to your simulation and truth table.