Nu Horizons Electronics Portal Europe - February 2010

D evelopm ent Tools
Featured Products
Focus on
Spartan-6 FPGA Consumer
Video Kit
DEVELOPMENT TOOLS
Speed up development of video algorithms
and incorporate the latest video interface
standards right out of the box. The
Spartan-6 FPGA Consumer Video Kit is
a comprehensive design environment
for developing and debugging advanced
video algorithms... more on page 8.
In This Issue:
UK Edition
February 2010
2
XI LI NX S PARTAN ®�6 FAM I LY FPGAS
D evelopm
X ilinx FP
entG As
Tools
Spartan-6 Family FPGAs
Spartan-6 LX FPGAs Spartan-6 LXT FPGAs
Optimized for Lowest-Cost Logic, DSP, and Memory Optimized for Lowest-Cost Logic, DSP, and Memory
(1.2 Volt, 1.0 Volt) with High-Speed Serial Connectivity
(1.2 Volt)
Part Number XC6SLX4 XC6SLX9 XC6SLX16 XC6SLX25 XC6SLX45 XC6SLX75 XC6SLX100 XC6SLX150 XC6SLX25T XC6SLX45T XC6SLX75T XC6SLX100T XC6SLX150T
Slices(1) 600 1,430 2,278 3,758 6,822 11,662 15,822 23,038 3,758 6,822 11,662 15,822 23,038
Logic Resources Logic Cells(2) 3,840 9,152 14,579 24,051 43,661 74,637 101,261 147,443 24,051 43,661 74,637 101,261 147,443
CLB Flip-Flops 4,800 11,440 18,224 30,064 54,576 93,296 126,576 184,304 30,064 54,576 93,296 126,576 184,304
Maximum Distributed RAM (Kbits) 75 90 136 229 401 692 976 1,355 229 401 692 976 1,355
Memory Resources Block RAM (18Kbits each) 12 32 32 52 116 172 268 268 52 116 172 268 268
Total Block RAM (Kbits) (3) 216 576 576 936 2,088 3,096 4,824 4,824 936 2,088 3,096 4,824 4,824
Clock Resources Clock Manager Tiles (CMT) (4) 2 2 2 2 4 6 6 6 2 4 6 6 6
Maximum Single-Ended Pins 132 200 232 266 358 400 480 576 250 296 348 498 540
I/O Resources
Maximum Differential Pairs 66 100 116 133 179 200 240 288 125 148 174 249 270
DSP48A1 Slices (5) 8 16 32 38 58 132 180 180 38 58 132 180 180
Embedded Hard PCI Express® Endpoint Block – – – – – – – – 1 1 1 1 1

IP Resources Memory Controller Blocks 0 2 2 2 4 4 4 4 2 2 4 4 4
GTP Low-Power Transceivers – – – – – – – – 2 4 8 8 8
Commercial -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -2, -3, -4 -2, -3, -4 -2, -3, -4 -2, -3, -4 -2, -3, -4
Speed Grades
Industrial -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -L1, -2, -3 -2, -3 -2, -3 -2, -3 -2, -3 -2, -3
Configuration Configuration Memory (Mbits) 2.7 2.7 2.7 4.4 7.7 19.6 17.1 28.0 4.4 7.7 19.6 17.1 28.0
Package Area Maximum User I/O: SelectIO™ Interface Pins (GTP Transceivers)(7)
Chip Scale Packages (CPG): Pb-free wire-bond BGA (0.5 mm ball spacing)
CPG196 8 x 8 mm 106 106 106
TQFP Packages (TQG): Pb-free thin QFP (0.5 mm ball spacing)
TQG144 20 x 20 mm 102 102
Chip Scale Packages (CSG): Pb-free wire-bond chip scale BGA (0.8 mm ball spacing)
CSG225 13 x 13 mm 132 160 160
CSG324 15 x 15 mm 200 232 226 218 190 (2) 190 (4)
CSG484 19 x 19 mm 320 328 338 338 290 (4) 292 (4) 296 (4) 296 (4)
FGA Packages (FTG): Pb and Pb-free wire-bond fine-pitch thin BGA (1.0 mm ball spacing)
FT(G)256 17 x 17 mm 186 186 186
FGA Packages (FGG): Pb and Pb-free wire-bond fine-pitch thin BGA (1.0 mm ball spacing)
FG(G)484 23 x 23 mm 266 316 280 326 338 250 (2) 296 (4) 268 (4) 296 (4) 296 (4)
FG(G)676 27 x 27 mm 358 408 480 498 348 (8) 376 (8) 396 (8)
FG(G)900 31 x 31 mm 576 498 (8) 540 (8)
Notes: 1. Each Spartan-6 FPGA CLB contains four LUTs and eight flip-flops.
2. Spartan-6 FPGA logic cell ratings reflect the increased logic capacity offered by the new 6-input LUT architecture.
3. Block RAMS are fundamentally 18Kb in size. Each block can also be used as two independent 9Kb blocks.
4. Each CMT contains two DCMs and one PLL.
5. Each DSP48A1 slice contains an 18x18 multiplier, an adder and an accumulator.
6. Preliminary product information, subject to change. Please contact your Xilinx representative for the latest information.
7. Due to the transceivers in the LXT devices, the LX pmouts are not compatible with the LX device pinouts.
Important: Verify all data in this document with the device data sheets found at www.xilinx.com
Virtex-6 Family FPGAs
Virtex-6 LXT FPGAs Virtex-6 SXT FPGAs Virtex-6 HXT FPGAs

Optimized for High-performance Logic and DSP Optimized for Ultra Optimized for Communications Systems Requiring
with Low-power Serial Connectivity High-performance DSP with Highest-bandwidth Serial Connectivity
(1.0 Volt, 0.9 Volt) Low-power Serial Connectivity (1.0 Volt)
(1.0 Volt, 0.9 Volt)
Part Number XC6VLX75T XC6VLX130T XC6VLX195T XC6VLX240T XC6VLX365T XC6VLX550T XC6VLX760 XC6VSX315T XC6VSX475T XC6VHX250T XC6VHX255T XC6VHX380T XC6VHX565T
EasyPath™ FPGA Cost Reduction Solutions (1) XCE6VLX75T XCE6VLX130T XCE6VLX195T XCE6VLX240T XCE6VLX365T XCE6VLX550T XCE6VLX760 XCE6VSX315T XCE6VSX475T XC6VHX250T XC6VHX255T XC6VHX380T XC6VHX565T
Slices (2) 11,640 20,000 31,200 37,680 56,880 85,920 118,560 49,200 74,400 39,360 39,600 59,760 88,560
Logic Resources Logic Cells (3) 74,496 128,000 199,680 241,152 364,032 549,888 758,784 314,880 476,160 251,904 253,440 382,464 566,784
CLB Flip-Flops 93,120 160,000 249,600 301,440 455,040 687,360 948,480 393,600 595,200 314,880 316,800 478,080 708,480
Maximum Distributed RAM (Kbits) 1,045 1,740 3,040 3,650 4,130 6,200 8,280 5,090 7,640 3,040 3,050 4,570 6,370
Memory Resources Block RAM/FIFO w/ ECC (36Kbits each) 156 264 344 416 416 632 720 704 1,064 504 516 768 912
Total Block RAM (Kbits) 5,616 9,504 12,384 14,976 14,976 22,752 25,920 25,344 38,304 18,144 18,567 27,648 32,832
Clock Resources Mixed Mode Clock Managers (MMCM) 6 10 10 12 12 18 18 12 18 12 12 18 18
Maximum Single-Ended I/O 360 600 600 720 720 1,200 1,200 720 840 320 480 720 720
I/O Resources (4, 5)
Maximum Differential I/O Pairs 180 300 300 360 360 600 600 360 420 160 240 360 360
DSP48E1 Slices 288 480 640 768 576 864 864 1,344 2,016 576 576 864 864
PCI Express® Interface Blocks 1 2 2 2 2 2 – 2 2 4 2 4 4

Embedded
Hard IP 10/100/1000 Ethernet MAC Blocks 4 4 4 4 4 4 – 4 4 4 2 4 4
Resources (6) GTX Low-Power Transceivers 12 20 20 24 24 36 – 24 36 48 24 48 48
GTH High-Speed Transceivers – – – – – – – – – – 24 24 24

Commercial -L1, -1, -2, -3 -L1, -1, -2, -3 -L1, -1, -2, -3 -L1, -1, -2, -3 -L1, -1, -2, -3 -L1, -1, -2 -L1, -1, -2 -L1, -1, -2, -3 -L1, -1, -2 -1, -2, -3 -1, -2, -3 -1, -2, -3 -1, -2
Speed Grades
Industrial -L1, -1, -2 -L1, -1, -2 -L1, -1, -2 -L1, -1, -2 -L1, -1, -2 -L1, -1 -L1, -1 -L1, -1, -2 -L1, -1 -1, -2 -1, -2 -1, -2 -1
Configuration Configuration Memory (Mbits) 25.0 41.7 58.7 70.4 91.6 137.4 176.3 99.6 149.4 76.2 76.2 114.2 153.2
Package (7) Area Available User I/O: SelectIO Pins (4, 5) (GTX Low-power Transceivers, GTH High-speed Transceivers)
FFA Packages (FF): flip-chip fine-pitch BGA (1.0 mm ball spacing)
FF484 23 x 23 mm 240 (8, 0) 240 (8, 0)
FF784 29 x 29 mm 360 (12, 0) 400 (12, 0) 400 (12, 0) 400 (12, 0)

FF1156 35 x 35 mm 600 (20, 0) 600 (20, 0) 600 (20, 0) 600 (20, 0) 600 (20, 0) 600 (20, 0)
FF1759 42.5 x 42.5 mm 720 (24, 0) 720 (24, 0) 840 (36, 0) 720 (24, 0) 840 (36, 0)
FF1760 42.5 x 42.5 mm 1,200 (0, 0) 1,200 (0, 0)
FF1154 35 x 35 mm 320 (48, 0) 320 (48, 0)
FF1155 35 x 35 mm 440 (24, 12) 440 (24, 12)
FF1923 45 x 45 mm 480 (24, 24) 720 (40, 24) 720 (40, 24)
FF1924 45 x 45 mm 640 (48, 24) 640 (48, 24)
Notes: 1. EasyPath™ solutions provide a conversion-free, low-risk path for volume production.
2. A single Virtex-6 FPGA CLB comprises two slices, with each containing four 6-input LUTs and eight Flip-Flops (twice the number found in a Virtex-4 FPGA slice), for a total of eight 6-LUTs and 16 Flip-Flops per CLB.
3. Virtex-6 FPGA logic cell ratings reflect the increased logic capacity offered by the 6-input LUT architecture.
4. Digitally Controlled Impedance (DCI) is available on I/Os of all devices.
5. I/O standards supported: HT, LVCMOS (2.5V, 1.8V, 1.5V, 1.2V), HSTL I (1.2V,1.5V,1.8V), HSTL II (1.5V,1.8V), HSTL III (1.5V,1.8V), LVDS, Extended LVDS, RSDS, Bus LVDS, LVPECL, SSTL I (1.8V, 2.5V),
SSTL II (1.8V, 2.5V), SSTL (1.5V).
6. One system monitor block included in all devices.
7. All products available Pb-free and RoHS-Compliant (FFG).
8. Preliminary product information, subject to change. Please contact your Xilinx representative for the latest information.
Important: Verify all data in this document with the device data sheets found at www.xilinx.com/virtex6 PN 2416
D evelopm ent Tools
3
4
Xilinx
D evelopm
Design Tools
ent -Tools
ISE 11.4
ISE Design Suite ISE WebPACK ISE Design Suite ISE Design Suite ISE WebPACK Logic Embedded DSP System
Device Support Logic Edition Comparison Table (Device Limited) Edition Edition Edition Edition
Embedded Edition
ISE Foundation with ISE Simulator (ISim)
DSP Edition
PlanAhead Design and Analysis Tool
System Edition
ChipScope Pro
Virtex-4 Virtex-4
LX: XC4VLX15, XC4VLX25 LX: All ChipScope Pro Serial I/O Toolkit
SX: XC4VSX25 SX: All

Embedded Development Kit (EDK)
FX: XC4VFX12 FX: All
Software Development Kit (SDK)
Virtex-5 Virtex-5

Virtex™ Series LX: XC5VLX30, XC5VLX50 LX: All System Generator for DSP
LXT: XC5VLX20T - XC5VLX50T LXT: All

FXT: XC5VFX30T SXT: All
FXT: All Targeted Standalone Products Usage
Virtex-6
Software Development Kit (SDK) ISE Foundation with ISE Simulator (ISim)
XCLX75T Virtex-6
All ChipScope Pro and ChipScope Pro Serial I/O Toolkit Lab Environments
Spartan-3 Spartan-3: All Embedded Development Kit (EDK)
XC3S50 - XC3S1500 Spartan-3A: All Spartan FPGA Design and ISE WebPACK users
Spartan-3A Spartan-3AN: All System Generator for DSP
All Spartan-3 DSP: All
Spartan-3AN Spartan-3E: All
All Spartan-6: All ISE Design Suite
Spartan-3A DSP XA (Xilinx Automotive) Spartan-3: All
Spartan™ Series Operating System Support
XC3SD1800A
Spartan-3E
All
Spartan-6
XC6SLX4 - XC6SLX45T
XA (Xilinx Automotive) Spartan-3
All
Coll Runner™ XPLA3

Cool Runner-II™ All
Cool Runner-IIA™
XC9500™ Series All (Except 9500XV Family)

Windows ® XP Professional 32-bit (US and Japan)
Windows ® XP Professional 64-bit (US and Japan)
Windows ® Vista Business 32-bit (US and Japan)
Windows ® Vista Business 64-bit (US and Japan)
Red Hat Enterprise Linux 4 WS 32-bit
Red Hat Enterprise Linux 4 WS 64-bit
Red Hat Enterprise Linux Desktop 5 32-bit
Red Hat Enterprise Linux Desktop 5 64-bit
464&-JOVY&OUFSQSJTFCJU
464&-JOVY&OUFSQSJTFCJU
Design Entry and Implementation Tools (ISE Foundation)

ISE Simulator (ISim)

ISE WebPACK

ChipScope Pro and ChipScope Pro Serial I/O Toolkit

Platform Studio and Embedded Development Kit (EDK)

Software Development Kit (SDK)

System Generator for DSP

Model SIM Xilinx Edition-III (MXE-III)

D evelopm ent Tools
FreeForm/104 for FPGA and Digital I/O
FreeForm/104 is a PC/104 based card that features a reconfigurable FPGA for digital
I/O and control applications.
Based on Xilinx’s Spartan-3E, Connect Tech’s FreeForm/104 provides off-the-

shelf flexibility, making it ideal for high speed, compute-intensive, reconfigurable
applications. The FPGA configuration is stored in flash memory, allowing users to
easily implement design changes during
development or in the field.
Customized FPGA configurations can be developed easily by the user with Xilinx’s
free ISE WebPACK software, or through Connect Tech’s engineering services.
The versatility and high speed processing core of the FreeForm/104 makes it ideal
for applications including; DSP, software defined radio, aerospace, defense systems,
computer hardware emulation, production or laboratory testing and industrial
process monitoring and control.
Specifications
Programmable
Xilinx Spartan-3E - 500,000 gates, 360K RAM
FPGA
Input Clock 66 MHz, internally scaleable
Key Features
FPGA Code
4 Mbit SPI Flash  Customizable PC/104 board based on Xilinx’s Spartan-3E -
Storage
500,000 gates
2 x 50 pin header - 48 regrogammable 5V buffered I/O
+/- 24mA drive current, each connector has 5V power  FPGA configurable through JTAG or SPI flash (4Mb)
and a ground pin  Reprogrammable in the field for standard and custom designs
1 x 26 pin header - 6 bi-directional pins, 12 input pins,
Connectors  External 5V power connection for stand alone usage
6 ground pins, unbuffered 5V TTL
PC/104 header - fully bi-directional, configurable as a  Four user configurable LEDS and on-board reset switch
master or a slave, 8 bit I/O, 12 address bits, all IRQ’s are  Eight position rotary switch connected to FPGA
connected, DMA’s 0-3
Programmable 96 high current TTL/CMOS (48 per 50 pin connector), 6
I/O TTL (26 pin connnector) Standard FPGA Configurations
Fixed I/O 12 TTL inputs (26 pin connector)  Digital I/O:
Interrupts All PC/104 interrupts are connected to the FPGA 96 digital I/O (8255 compatible), 6 x 8254 counter/timers
Operating Temperature (standard): 0º C to 70º C (32º F to 158º F)  Digital I/O Opto-22:

Environmental Industrial Temperature: -40º C to 85º C (-40º F to 185º F) 48 Opto-22 (8255 compatible, 6 x 8254 counter/timers
Humidity: 95% non-condensing
Power Custom Configurations
+5 V DC (+/- 5%)
Requirements
Custom configurations can be easily developed by user or through
Length: 9.5885 cm/3.775” Connect Tech’s engineering services
Dimensions
Width: 9.017 cm/3.55”
Bus PC/104 compatible or stand alone
Part Number FPGA Price
System
Varies by configuration
Requirements FBG001 Digital I/O $295.00
Warranty Lifetime warranty and free technical support FBG006 Digital I/O Opto-22 $326.00
Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/ 5
Reconfigurable FPGA -
D evelopm ent Tools
Virtex-5 FPGA based FreeForm/PCI-104
FreeForm/PCI-104 is a flexible reconfigurable board that combines a user

programmable FPGA with a 32-Bit, 33MHz PCI-104 interface. The advantages
of PCI-104’s high bandwidth along with the versatile FPGA architecture
allows users to create a high speed data interface and control solution that is
uniquely suited to each individual application.
Based on Xilinx’s Virtex®-5, Connect Tech’s FreeForm/PCI-104 is highly

versatile and provides a powerful platform for system development. Ideal
for real-time data acquisition, high performance signal processing, avionics,
autonomous vehicles and software defined radio, FreeForm/PCI-104 is
perfect for embedded systems designs when used along with an embedded
host processor.
Use Connect Tech’s engineering services for FPGA design and software/
driver development. FreeForm/PCI-104 Virtex-5 FPGA embedded computing
modules include lifetime warranty and free technical support.
Specifications
Programmable
Xilinx multi-platform Virtex-5 (LXT or FXT)
FPGA
Input Clock 100 MHz
Memory 8MB Flash, 128MB DDR2-400 FPGA & I/O Key Features
User I/O 64 single ended signals or 32 LVDS pairs  Based on the Virtex-5 FPGA - options include LX30T, LX50T and
Serial 2 x RS-485 FX30 T
Ethernet 2 x 10Base-T, 100Base-TX  PCI-104 form factor - 32-Bit/33MHz
Form Factor PCI-104  8MB Flash for embedded code storage
Industrial Temperature: -40º C to 85º C (-40º F to 185º F)  128MB DDR2-400 memory
Environmental
Humidity: 95% non-condensing  2 x 10Base-T, 100Base-TX Ethernet
Embedded  2 x RS-485 serial interface
QNX
Software Support
 GPIO - 64 single ended or 32 LVDS pairs
Host System
QNX, Windows, Linux  4 x RocketIO™ channels
Software Support
 Industrial temperature range
Power 5 V DC (+/- 5%)
Requirements Note - power requirements may vary by application  MicroBlaze™ and PowerPC™ 440 embedded processor options
PCI-104 1.0 compliant  Access to reference designs and BSPs
Dimensions
L: 3.775” x W: 3.575” x H: 0.535”
Two RJ-45 modular jacks (Ethernet) Part Number FPGA Price
Two 2x5 0.100” headers (serial)
Connectors FCG001 LX30T $1499.00
One 2x40 0.050 x 0.100” header (general I/O)
One 1x6 0.100” header (flash programming) FCG003 FX30T $2112.00
Warranty Lifetime warranty and free technical support FCG005 LX50T $2234.00
6 Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/
D evelopm ent Tools
High-performance Xilinx FPGA solutions
Faster Technology develops high-performance Xilinx
FPGA solutions that maximize processing throughput
while minimizing latency. We are a Xilinx Alliance Program
Partner, an Impulse Platform Partner, and member
of both the Xilinx SignOnce IP License and SignOnce
Services Agreement Programs. Faster Technology is also
the Xilinx ATP for the South Central and Rocky Mountain
territories. Information on Faster Technology products is
available at www.fastertechnology.com.
P-Series – Programmable PCI FPGA

Acceleration Cards
The P-Series is a complete line of PCI FPGA cards designed to FM-S14 and FM-S18 High Speed serial
be generic platforms that can be molded to fit specific FPGA interface FMC modules
acceleration or low latency needs. They excel at solving a wide
range of DSP and algorithm acceleration problems. A suite of The FM-S14 and FM-S18 are Xilinx compliant FPGA Mezzanine
IP cores and the innovative FastFlow development environment Card (FMC) modules that provide up to four or eight industry
are included to accelerate deployment of complex algorithm standard Small Form-factor Pluggable (SFP/SFP+) transceiver
processing systems. modules. The FM-S14 and FM-S18 are electrically compliant with
the FMC standard but due to the size of the SFP cages, they are
Features: classified as a mechanical superset of the FMC.
 Xilinx Virtex-4 FPGA,
 Up to 2 GB on-board memory Features:
 High-bandwidth busses  Interfaces directly into Multi-Gigabit Transceivers (GTHs,
 Flexible I/O options GTXs, or GTPs)
 Small Form-factor Pluggable (SFP/SFP+) modules that  Utilize 2.5V signaling to ensure interoperability across the
providing interface to: Spartan-6, Virtex-6 FPGA families and previous generations of
Gigabit Ethernet the Virtex family
Fiber channel  Compliant with both the Xilinx EK-S6-SP605-G and EK-V6-
Infiniband ML605-G development boards
SONET FM-S14 $450 (4 SFP/SFP+ transceiver modules)
 The P-series is available with a choice of the Virtex-4 FX40, FX60, FM-S18 $590 (8 SFP/SFP+ transceiver modules)
or FX100 FPGA
P4 $6,500 (populated with FX40)
FM-S22 10 Gigabit High Speed serial interface

FMC module
The FM-S22 is a Xilinx compliant FPGA Mezzanine Card (FMC)
module that provides dual 10 Gigabit Ethernet and related high
speed serial interfaces to the FMC carrier card. The FM-S22 is
electrically compliant with the FMC standard but due to the size
of the SFP cages, it is classified as a mechanical superset of the
FMC mechanical standards.
Features:
 Utilizes two Small Form-factor Pluggable + (SFP+) transceiver
module interfaces and physical layer devices from Marvell
 Utilize 2.5V signaling to ensure interoperability across the
Spartan-6, Virtex-6 FPGA families, and previous generations
of the Virtex family
 Compliant with the Xilinx EK-V6-ML605-G development board
FM-S22 $875
Note: SFP/SFP+ modules are sold separately
Spartan-6 FPGA Consumer Video Kit
D evelopm ent Tools
Speed up development of video algorithms and incorporate the

latest video interface standards right out of the box. The Spartan-6
FPGA Consumer Video Kit is a comprehensive design environment
for developing and debugging advanced video algorithms —
featuring FMC option boards* and pre-validated cores for emerging
and de facto high speed display interfaces like DisplayPort™,
V-by-One® HS, HDMI™ 1.3 and 1.05Gbps LVDS. DTV designers
can quickly verify algorithms and test new interfaces, enabling
faster time to market with differentiated video products.
Key Hardware Features

 Spartan-6 LX150T-3C FPGA
 1 x High Pin Count (HPC) FMC connector with up to eight GTP
connections. Note: All HPC pins are not connected to the FPGA.
 3 x Low Pin Count (LPC) FMC connectors
 2 x DDR2 SDRAM (Chip): (2Gbits x 2) 800Mbps Pro Edition Includes:
 Multiple clock sources  RoHS compliant Spartan-6 LX150T video evaluation base board
 Xilinx Platform Cable USB-II
 FMC Option Boards:
LVDS
V-by-One HS
Foundation Edition Includes: DisplayPort
HDMI 1.3
 RoHS compliant Spartan-6 LX150T video evaluation base board
 ISE Design Suite: Embedded Edition (device-locked for the
 FMC Option Boards: Spartan-6 LX150T FPGA)
 LVDS  PlanAhead™ Design Analysis Tool – Streamlined design
 ISE® Design Suite: Logic Edition (device-locked for the process between synthesis and place-and-route and intuitive IO
Spartan-6 LX150T FPGA) planning
 PlanAhead™ Design Analysis Tool – Streamlined design  Timing Driven Place and Route – Optimal quality of results
process between synthesis and place-androute and intuitive IO with advanced implementation algorithms
planning
 SmartGuide™ - Industry’s fastest incremental implement
 Timing Driven Place and Route – Optimal quality of results runtimes
with advanced implementation algorithms
 SmartXplorer Technology – Leverage computing resources for
 SmartGuide™ - Industry’s fastest incremental implement optimal quality of results
runtimes
 ISE Simulator – RTL simulation environment
 SmartXplorer Technology – Leverage computing resources for
optimal quality of results  ChipScope™ Pro and ChipScope Pro Serial IO Toolkit –
On-chip design verification for logic and serial connectivity
 ISE Simulator – RTL simulation environment analysis and measurement
 ChipScope™ Pro and ChipScope Pro Serial IO Toolkit –
 Evaluation version of DisplayPort LogiCORE IP
On-chip design verification for logic and serial connectivity
analysis and measurement  Evaluation version of V-by-One HS core
Part Number Price Part Number Price

TB-6S-CVK-FND $1,395.00 TB-6S-CVK-PRO $2,995.00
* - see page 10 for Inrevium FMC option boards
Virtex-6 PCI Express Evaluation Platform
D evelopm ent Tools

Key Features
 FPGA Options  3 FMC Connectors
LX240T 2 High Pin Count
LX365T 1 Low Pin Count
LX550T  DDR3 (1066 MHz)
SX475  Linear Technology Power Supply
 Part Numbers
TB-6V-LX240T-PCIEXP
Call Nu Horizons for pricing
TB-6V-SX475T-PCIEXP
Other Inrevium Products

Inrevium Virtex-5 DDR SDRAM Evaluation Board Inrevium Virtex-5 DDR SDRAM Evaluation Board
 TB-5V-LX110-DDR2 $2680  TB-5V-SX95T4-HSC $24900
 TB-5V-LX220-DDR2 $4980
 TB-5V-LX330-DDR2-1 $9980 Virtex-5 PCI Express Evaluation Board
 TB-5V-LX330-DDR2-2 $9980  TB-5V-LX50T-PCIEXP $2380
 TB-5V-LX110T-PCIEXP $3680
Inrevium Virtex-5 LX330 Evaluation Platform for  TB-5V-SX50T-PCIEXP $2380
Asic Prototyping  TB-5V-FX70T-PCIEXP $3760
 TB-5V-LX330-EX-2 $16800  TB-5V-LX330T-PCIE-EX $14980
Inrevium FMC Daughter Cards
D evelopm ent Tools
LVDS Option Board DisplayPort Option Board

 FMC Low Pin Count Connector  FMC High Pin Count
Part Number Price
 HRS FX15 series (51pins) connector x2 Connector
TB-FMCH-DP $495.00
 Data 12 pair, Clock 1 pair per connector  Receive: 4 ch
 Selectable Power Output to Panel  Transmit: 4 ch
Part Number Price

TB-FMCL-LVDS $295.00
V-by-One HS Option Board HDMI Option Board

 FMC High Pin Count Connector  FMC Low Pin Count Part Number Price
 HRS FX16 series (31pins) connector x4  External HDMI 1.3 Tx TB-FMCL-HDMI $495.00
 Tx: 4ch x2, Rx: 4ch x2 and Rx LSIs (non-HDCP)
 Selectable Power Output to Panel  Spartan-3AN for Controller
 Selectable Tx or Rx by Dip switch
Part Number Price
TB-FMCH-VB1 $495.00
LTC2175 14-Bit/12-Bit 25Msps to 125Msps
D evelopm ent Tools

Quad/Dual ADC Family
25Msps 40Msps 65Msps 80Msps 105Msps 125Msps
Linear Technologies newest high
speed ADC family achieves one-third 2170-14 2171-14 2172-14 2173-14 2174-14 2175-14
the power consumption of alternate 14-Bit

solutions without compromising AC 2263-14 2264-14 2265-14 2266-14 2267-14 2268-14
performance. Operating from a low

1.8V supply, the 14-bit, 125Msps 2170-12 2171-12 2172-12 2173-12 2174-12 2175-12
LTC®2175 dissipates only 140mW/ 12-Bit

2263-12 2264-12 2265-12 2266-12 2267-12 2268-12
channel while maintaining 73.1dB
SNR and 88dB SFDR at baseband.
Power 40mW/ch 50mW/ch 80mW/ch 95mW/ch 110mW/ch 140mW/ch
Digital outputs can be configured
Consumption
as single lane (<65Msps) or dual
lane serial LVDS to minimize FPGA Quad ADC D
Dual ADC
QFN52 QFN40
Serial LVDS Outputs S
Serial LVDS Outputs
pin count.
Key Features
 Quad/Dual-Channel Simultaneous
Sampling ADCs (LTC2175/LTC2268) 140mW/Channel
 73.1dB SNR (14-Bit Resolution)
1.8V 1.8V
 88dB SFDR VDD OVDD
 Low Power: 558mW (140mW/Channel) at
125Msps (LTC2175) 14-Bits OUT1A
CH1 S/H
125Msps OUT1B
 Single 1.8V Analog & Digital Supplies
 Serial LVDS Outputs OUT2A
14-Bits
CH2 S/H
 Selectable Input Ranges: 1VP-P to 2VP-P 125Msps OUT2B
 800MHz Full-Power Bandwidth S/H DATA
14-Bits SERIALIZER OUT3A SERIALIZED
 Optional Data Output Randomizer CH3 S/H
125Msps LVDS
OUT3B
OUTPUTS
 Optional Clock Duty Cycle Stabilizer
 1mW Sleep and 50mW Nap Modes 14-Bits OUT4A
CH4 S/H
125Msps OUT4B
 Serial SPI Port for Configuration
 Pin-Compatible 14-Bit and 12-Bit Versions DATA CLOCK
ENCODE OUT
INPUT PLL
 52-Pin (7mm × 8mm) QFN Package FRAME
(Quad Versions)
L
LT 5-14
LTC2175-14
 40-Pin (6mm × 6mm) QFN Package
(Dual Versions)
25Msps 40Msps 65Msps 80Msps 105Msps 125Msps
2170-14 2171-14 2172-14 2173-14 2174-14 2175-14
14-Bit
2263-14 2264-14 2265-14 2266-14 2267-14 2268-14
2170-12 2171-12 2172-12 2173-12 2174-12 2175-12
12-Bit
2263-12 2264-12 2265-12 2266-12 2267-12 2268-12
PLDA: Providing IP and Prototyping boards for
D evelopm ent Tools
PCI Express and USB Solutions

PLDA designs and sells a wide range of FPGA interconnect solutions including bus controllers and SoC IP. The company offers complete solutions including
semiconductor IP, hardware, software, and design services. Founded in 1996, PLDA is privately owned.
Prototyping boards:
PCI, PCI-X and PCI Express:

 XpressGEN2V5-200 for Virtex-5 FX200
 XpressGEN2V5-70 for Virtex-5 FX70
 XpressLX330T for Virtex-5 LXT
 XpressLX110T for Virtex-5 LXT
 XpressV5LC for Virtex-5 LXT
 XpressFX for Virtex-4 FX
 PCI-X SYS V5 for Virtex-5 LX
PCI, PCI-X and PCI Express:

 SuperUSBV5-70 based on Xilinx’s Virtex-5 FX70T
 SuperUSBV5-200 based on Xilinx’s Virtex-5 FX200T
And a wide range of daughterboards (SFP, Cameralink, PCI Express Cable …)
IP Cores:
PLDA offers comprehensive intellectual property (IP) solutions to a global market:
Spartan-3 Spartan-6 Virtex-4 Virtex-5 Virtex-6

DMA Controller for PCIe Integrated Block   
PCI, PCI-X     
PCIe 1.0 and 2.0     
USB 3.0   
Key Features
 IP is delivered in fully synthesizable Verilog and VHDL RTL
 Comprehensive event-based/procedure-based Testbench
 Extensive interoperability tests and hardware tests with all the supported FPGA Hard IPs. Guaranties seamless integration
 Professional services to customize our IP to fit any specific requirement
 Our IP customization GUI (Wizard) allows you to create a custom instance of the IP with only the required feature set
 Free evaluation that includes the same deliverables and technical support as the licensed IP
10
Virtex-6 FPGA ML605 Evaluation Kit
D evelopm ent Tools

The Virtex®-6 FPGA ML605 Evaluation Kit provides a development environment for system designs that demand high-performance, serial connectivity
and advanced memory interfacing. The ML605 is supported by pre-verified reference designs and an industry-standard FPGA Mezzanine Connector
(FMC) which allows scaling and customization with daughter cards. Integrated tools help streamline the creation of elegant solutions to complex design
requirements.
Key Features: What’s Inside the ML605 Evaluation Kit:

 FPGA: XC6VLX240T-1FFG1156  ROHS compliant ML605 Base Board including the
 Configuration XC6VLX240T-1FFG1156 FPGA
 Onboard configuration circuitry (USB to JTAG)
 128MB Platform Flash XL
 FPGA Design Software – A full-seat of Xilinx ISE Design Suite:
 32MB Parallel (BPI) Flash
Logic Edition – Device-Locked to Virtex-6 LX240T FPGA.
 System ACE 2G Compact FLASH (CF) Card
 Targeted Reference Designs
 Communications and Networking
 PCI Express Gen2 (x8)
 10/100/1000 Tri-Speed Ethernet (GMII, RGMII, SGMII, MII)
 PCI Express Gen 1 (x8)
 SFP transceiver connector
 Base Reference Design
 GTX port (TX, RX) with four SMA connectors
 DDR3 Memory Interface
 USB To UART Bridge
 IBERT
 USB Host Port and USB Peripheral Port
 Multiboot
 PCI Express x8 Edge Connector
 Documentation
 Memory
 Cables & Power Supply
 DDR3 SO-DIMM (512 MB)
 12V Universal Power Supply
 Input/Output and Expansion Ports
 Two USB Cables
 16x2 LCD character display
 One Ethernet Cable
 DVI Output
 DVI To VGA Adapter
 User GPIO with two SMA connectors
 Two FMC Expansion Ports
 High Pin Count (HPC)
 Low Pin Count (LPC)
 One GTX Transceiver
Ordering information
Part number— EK-V6-ML605-G
 Price -- $1,995
Virtex-6 FPGA Connectivity Kit
D evelopm ent Tools
The Virtex®-6 FPGA Connectivity Kit is a comprehensive high performance Connectivity Development, Debug and Demonstration platform for high-
bandwidth and high-performance applications in multiple market segments.
The Virtex-6 FPGA Connectivity Kit delivers a fully validated and supported Targeted Reference Design Framework that integrates built-in blocks for GTX
transceivers and PCI Express, soft IP for XAUI protocol, a high-performance 10G DMA IP core from Northwest Logic and a Virtual FIFO memory controller
interfacing to an external DDR3 memory. The Targeted Reference Design Framework delivers – hardware design / RTL source files, simulation environment,
implementation scripts and design flows. Along with the Linux device drivers, a GUI based software application is also provided.
Each Virtex-6 FPGA Connectivity Kit is a full-seat of Xilinx ISE® Design Suite: Embedded Edition device locked to the Virtex-6 LX240T device.
Key Features: What’s Inside the Virtex-6 FPGA Connectivity Kit:

 FPGA: XC6VLX240T-1FFG1156  ROHS compliant ML605 Base Board including the
 Serial Connectivity: XC6VLX240T-1FFG1156 FPGA
 PCI Express x8 Edge Connector  Vita57.1 FMC daughter card with one CX4, two SATA, and eight SMA
 SFP transceiver connector (SFP module not included)
connectors
 On board SMA: 1 SMA port (Tx & Rx) for off-board GTX
 ISE Design Suite 11.4: Embedded Edition; (Device-Locked to Virtex-6
transceiver connectivity LX240T FPGA)
 FMC Daughter Card:  Documentation
 CX4 connectivity  Virtex-6 FPGA Connectivity Kit Getting Started, Hardware Setup
Guides, and User Guide.
 2 SATA connectivity ports
 Example Designs User Guide.
 2 SMA ports for off-board GTX transceiver connectivity
 Schematics and PCB files.
 Parallel Connectivity:
 Cables & Adapters
 10/100/1000 Tri-Speed Ethernet (RJ-45)
 Connectivity Targeted Reference Design (TRD) and Demonstration
 Design includes support for PCI Express® (x8 Gen1 / x4 Gen2),
 USB Host Port and USB Peripheral Port DMA, Virtual FIFO Memory controller supporting DDR3 interface, and
 Memory XAUI interface
 DDR3 SO-DIMM (512 MB)  TRD Design Files including top-level RTL / Source files
 BPI Linear Flash (32 MB) (Also available for configuration)  TRD ISE Project files, Simulation and Implementation Environment
 Additional Connectivity:  10G DMA Design – Northwest Logic PCIe Packet DMA (Evaluation
 FMC Expansion Port: Low Pin Count (LPC) hardware timeout version and Simulation Model)
 User GPIO with two SMA connectors  TRD Interface Software – Linux Device Drivers, Application,
Demonstration
 Examples Designs and Demonstrations
 Board Diagnostic Demo
Part number— DK-V6-CONN-G  ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design.
 Price -- $2,995
Virtex-6 FPGA Embedded Kit
D evelopm ent Tools

Embedded processing using FPGAs have become an integral part of a growing number of applications such as industrial networking and video applications,
as well as closed-loop control systems in the industrial and Aerospace & Defense markets. The combined value of parallel processing performance, design
reuse, the mitigation of design risk and obsolescence, and the lower cost, weight, area and power resulting from the deeper levels of integration (made
even more attractive by the continuing march toward smaller and smaller process nodes) has fueled this trend to a seemingly unavoidable conclusion —
the FPGA is becoming the platform of choice for future embedded design in these markets.
The Virtex®-6 FPGA Embedded Kit is based on the Virtex-6 LX240T FPGA, this kit contains an extensible development board and the key Tools & IP needed
for embedded development. The Reference Designs and software/hardware tutorials provided with this kit will give a jump-start to your development. If you
are a software developer, you can now get started in a familiar Eclipse IDE without running any FPGA hardware design tools.
What’s Inside the Virtex-6 FPGA Embedded Kit: Features:

 ROHS compliant ML605 Base Board including the XC6VLX240T-1FFG1156 FPGA  Targeted Reference Design – MicroBlaze
 ISE® Design Suite: Embedded Edition (device-locked for the Virtex-6 LX240T FPGA) Processor Sub-System
 Ecosystem OS/RTOS Support  Includes all the development tools needed
 Linux, uC/OS-II, Treck
to support Embedded Hardware & Software
Development
 Documentation
 In-depth step-by-step Hardware and Software
 Cables & Power Tutorials
 Targeted Reference Design  Strong Ecosystem support
 MicroBlaze Processor Sub-System design that integrates the following key
Embedded processing IP:
 32-bit MicroBlaze Soft Processor
 Integrated Memory Management Unit (MMU)
 16KB Instruction & Data Caches
 JTAG Debug interface
 100Mhz clock frequency
 Memory
 Multi-Port Memory Controller (MPMC) connected to 128 MB of 800
Mbps DDR3 memory
 Flash memory controllers connected to 32Mbytes of NOR Flash memory
 High-Performance I/O Peripherals
 Gigabit Ethernet (Tri-Mode Ethernet MAC –TEMAC)
 UART 16550
 I2C, SPI – Serial Interface IP
 General Purpose Parallel I/O
 Infrastructure IP
 Dual 32-bit Timers
 Interrupt Controller
 Bus infrastructure, Clock and Reset Management IP
Part number— DK-V6-EMBD-G
 Price -- $2,495
Spartan-6 FPGA SP605 Evaluation Kit
D evelopm ent Tools
The Spartan®-6 FPGA SP605 Evaluation Kit delivers all the basic components of the Xilinx Base Targeted Design Platform in one package. It provides a
flexible environment for system design and provides customers reference design and examples on how to leverage features such as high-speed serial
transceivers, PCI Express®, DVI, and/or DDR3. It includes an industry-standard FMC (FPGA Mezzanine Card) connector for future scaling and customization
to specific applications and markets.
Key Features: What’s Inside the SP605 Evaluation Kit:

 FPGA: XC6SLX45T FGG484-3CES Spartan-6  SP605 Base Board with the XC6LX45T-FGG484 FPGA
 Configuration:  ISE® Design Suite Logic Edition: (device-locked) for
 Onboard JTAG configuration circuitry Spartan-6 LX45T FPGA
 128MB Platform Flash XL  Includes ChipScope™ Pro and the ChipScope Pro Serial I/O Toolkit
 Quad SPI Flash 64MB  Includes PlanAhead™ Design Analysis Tool
 16MB Parallel (BPI) Flash  Timing Driven Place and Route, SmartGuide™, and SmartXplorer
Technology
 System ACE 2G Compact FLASH (CF) Card
 Documentation
 JTAG
 Hardware Setup Guide
 Memory:
 Getting Started Guide
 DDR3 Component Memory 1Gb
 Hardware User Guide
 16MB Parallel (BPI) Flash (Also available for configuration)
 Reference Designs User Guide
 IIC 8Kb IIC EEPROM
 Schematics and PCB files
 Communications and Networking
 Universal 12V power supply
 10/100/1000 Tri-Speed Ethernet
 Cables: 2 USB, 1 Ethernet, 1 DVI-VGA adapter
 SFP transceiver connector
 Reference Designs and Demos
 GTX port (TX, RX) with four SMA connectors
 Board Diagnostic Demo
 Base System Reference Design featuring DSP48,
 PCI Express x1 Edge Connector Ethernet, Memory, and Serial Transceiver integration
 Expansion Connectors:  Multiboot Reference Design, featuring fail-safe
 FMC-LPC connector (1 GTP Transceiver, 68 single-ended or 34 configuration
differential user defined signals)  Hardened Memory Controller Reference Design
 User GPIO with two SMA connectors  Reference designs, demos, documentation, and applications
 4 User I/O (Digilent 2x6 Header) delivered on USB FLASH drive to get started quickly
 Clocking:
 200 MHz Oscillator (Differential)
 Oscillator socket (Single-Ended)
 SMA Connectors for external clock (Differential)
 GTX Reference Clock port with 2 SMA connectors
 Display:
 Video - DVI / VGA
 16x2 LCD character display
 4X LEDs
Part number— EK-S6-SP605-G
 Price -- $495
Spartan-6 FPGA Connectivity Kit
D evelopm ent Tools

The Spartan®-6 FPGA Connectivity kit is a complete, easy-to-use Connectivity Development and Demonstration platform for designing with standards
based protocols – PCIe®, Ethernet, implementing low-cost protocol bridging, providing higher efficiency alternative to LVDS communication, etc in multiple
market segments.
Provided with each Spartan-6 FPGA Connectivity Kit is a FULL seat of Production Netlist of Northwest Logic Packet DMA IP Core for implementing high
speed and maintaining efficient data transfer on the PCIe link.
The Spartan-6 FPGA Connectivity Kit delivers a fully tested and supported Connectivity Targeted Reference Design that integrates built-in blocks for PCI
Express and Memory Controller, soft IP for Gigabit Ethernet and the DMA IP core from Northwest Logic. The Targeted Reference Design is a framework that
delivers – hardware design / RTL source Files, simulation environment, implementation scripts and design flows, software device drivers, an application
and a GUI.
Key Features: What’s Inside the Spartan-6 FPGA Connectivity Kit:

 FPGA: XC6SLX45T FGG484-3CES Spartan-6 Configuration:  ROHS compliant SP605 Base Board including the
 Serial Connectivity: XC6SLX45T-FGG484 -3CES FPGA
 PCI Express x1 Edge Connector  ISE Design Suite: Embedded Edition (device-locked for the Spartan-6
 VSFP transceiver connector (SFP module not included)
LX45T FPGA)
 VSMA: 1 SMA port (Tx & Rx) for off-board GTP transceiver
 Documentation
connectivity  Spartan-6 FPGA Connectivity Kit Getting Started, Hardware Setup
Guide and User’s Guide.
 Parallel Connectivity
 Example Designs User Guide.
 V10/100/1000 Tri-Speed Ethernet
 Schematics and PCB files
 Memory:
 VDDR3 Component Memory 1Gb
 Cables & Adapter
 V16MB Parallel (BPI) Flash (Also available for configuration)
 Connectivity Targeted Reference Design (TRD) and Demonstration
 Design includes support for PCI Express (x1 Gen1), DMA, Virtual FIFO
 VIIC 8Kb IIC EEPROM
Memory controller supporting DDR3 interface, and Gigabit Ethernet
 Additional Connectivity: (GMII and SFP interfaces)
 VFMC-LPC connector (1 GTP Transceiver, 68 single-ended or  TRD Design Files including top-level RTL / Source files
34 differential user defined signals)
 TRD ISE Project files, Simulation and Implementation Environment
 VUser GPIO with two SMA connectors
 DMA Design – Northwest Logic PCIe Packet DMA (Full production
 V4 User I/O (Digilent 2x6 Header) version and Simulation Model)
 Voltage and current measurement capability of 2.5V, 1.5V, and  TRD Interface Software – Linux Device Drivers, Application,
1.2V, 1.0V supplies Demonstration
 Examples Designs and Demonstrations
Ordering information  Board Diagnostic Demo
 ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design
Part number— DK-S6-CONN-G
 Fedora 10 Live CD - Linux Operating System
 Price -- $2,495
Spartan-6 FPGA Embedded Kit
D evelopm ent Tools
Embedded processing using FPGAs have become an integral part of a growing number of applications such as industrial networking and video applications,
as well as closed-loop control systems in the industrial and Aerospace & Defense markets. The combined value of parallel processing performance, design
reuse, the mitigation of design risk and obsolescence, and the lower cost, weight, area and power resulting from the deeper levels of integration (made
even more attractive by the continuing march toward smaller and smaller process nodes) has fueled this trend to a seemingly unavoidable conclusion—the
FPGA is becoming the platform of choice for future embedded design in these markets.
The Spartan®-6 FPGA Embedded Kit is based on the Spartan-6 LX45T FPGA, this kit contains an extensible development board and the key Tools &
IP needed for embedded development. The Reference Designs and software/hardware tutorials provided with this kit will give a jump-start to your
development. If you are a software developer, you can now get started in a familiar Eclipse IDE without running any FPGA hardware design tools.
What’s Inside the Spartan-6 FPGA Embedded Kit: Features:

 ROHS compliant SP605 Base Board including the XC6SLX45T-FGG484 -3 FPGA  Targeted Reference Design – MicroBlaze
 ISE® Design Suite: Embedded Edition (device-locked for the Spartan-6 LX45T FPGA) Processor Sub-System
 Ecosystem OS/RTOS Support  Includes all the development tools needed
to support Embedded Hardware & Software
 Linux, uC/OS-II, Treck
Development
 Documentation
 In-depth step-by-step Hardware and Software
 Cables & Power Tutorials
 Targeted Reference Design  Strong Ecosystem support
 MicroBlaze Processor Sub-System design that integrates the following key
Embedded processing IP:
 32-bit MicroBlaze Soft Processor
 Integrated Memory Management Unit (MMU)
 16KB Instruction & Data Caches
 JTAG Debug interface
 100Mhz clock frequency
 Memory
 Multi-Port Memory Controller (MPMC) connected to 128 MB of 800 Mbps DDR3
memory
 Flash memory controllers connected to 32Mbytes of NOR Flash memory
 High-Performance I/O Peripherals
 Gigabit Ethernet (Tri-Mode Ethernet MAC – TEMAC
 UART 16550
 I2C, SPI – Serial Interface IP
 General Purpose Parallel I/O
 Infrastructure IP
 Dual 32-bit Timers
 Interrupt Controller
 Bus infrastructure, Clock and Reset Management IP
Part number— DK-S6-EMBD-G
 Price -- $995
Spartan-6 FPGA SP601 Evaluation Kit
D evelopm ent Tools

The Spartan®-6 FPGA SP601 Evaluation Kit is an ideal entry-level development environment for evaluating the Spartan-6 family. This low-cost kit is the
Xilinx Base Platform for developing consumer, infotainment, video and other cost and power-sensitive applications. As a Base Level Targeted Design
Platform, this kit provides an integration of hardware, software, IP and pre-verified reference designs so development can begin right out of the box.
Key Features: Ordering information

 FPGA: XC6SLX16 CS324-2CES Spartan-6 Part number— EK-S6-SP601-G
 Configuration:  Price -- $295
 Quad SPI Flash 64MB
 16MB Parallel (BPI) Flash
 Memory:
 DDR2 Component Memory 128MB
 IIC 8Kb IIC EEPROM
 Communication:
 10/100/1000 Tri-Speed Ethernet PHY
 Serial (UART) to USB Bridge
 Expansion Connectors:
 FMC-LPC connector (68 single-ended or 34 differential user defined signals)
 8 User I/O (Digilent 2x6 Header)
 Clocking:
 200MHz Oscillator (Differential)
 Socket (Single-Ended) Populated with 27MHz Osc
 SMA Connectors (Differential)
 Display:
 4X LEDs
 Control:
 4X Push Buttons
 4X DIP Switches
Digilent Spartan 6 Evaluation Kit

 XC6SL45-3CSG325 Xilinx Spartan 6 FPGA Call your local Nu Horizons sales office
 Micrel KSZ9021 10/100/1000 Ethernet Phy

 8 MB FLASH
 2 GB DDR2
 Linear Technology Power Supply
 One input and one output buffered HDMI port
 AC97 Codec
 Expansion Connectors
FMC XM104 Connectivity Card
D evelopm ent Tools
The FMC XM104 Connectivity Card is designed to provide access to eight serial transceivers on the FMC HPC connector found on Xilinx FMC-supported
boards including Virtex®-6 ML605. These eight serial transceivers can be accessed through one CX4 (x4 transceivers), two SATA (x2 transceivers), and
eight SMA (x2 transceivers) connectors.
Key Features:
 VITA 57.1 FMC High Pin Count (HPC) connector.

 One CX4 connector
 Two SATA connectors
 Eight SMA connectors
What’s Included:
 FMC XM104 Connectivity Card

 Four SMA to SMA cables
 One SATA cable
 Welcome letter
 Four (2) mounting screws
 Two (2) standoffs
 Module user manual, schematics, and PCB design files
Part number— HW-FMC-XM104-G
 Price -- $595
FMC XM105 Debug Card

The FMC XM105 Debug Card provides a number of multi-position headers and connectors which break out FPGA interface signals to and from the board
interface. A serial IIC bus re-programmable LVDS clock source and a pair of SMA connectors provide differential clock sources to the FMC-supported board
FGPA. A 2 Kb serial IIC EEPROM provides non-volatile storage. The FMC XM105 Debug Card contains a FMC HPC connector which mates with LPC or HPC
FMC-supported board connectors.

 VITA 57.1 FMC HPC connector Part number— HW-FMC-DBG-G
 Single-ended signals from the carrier board, clocks, JTAG, power  Price -- $159
 40 Single Ended I/O (20 Pairs) on the LPC Pins
 80 Single Ended I/O (40 Pairs) on the HPC Pins
 Mictor connector 38 pin female Mictor connector
 Shared I/O with LPC Pins
 Mictor JTAG pins broken out
 16 and 12 additional LPC Single Ended I/O
 8 LPC I/O on 6 pin x 2 row male header (2x6 Pmod Header)
 4 LPC I/O on 6 pin x 1 row male header (1x6 Pmod Header)
 Four User LEDS Shared with I/O
 12 additional HPC Single Ended I/O
D evelopm ent Tools
Enhance Your Design...

With Nu Horizons Education and Development Solutions
Portal is a monthly publication containing new products, technologies and development tools
available from Nu Horizons leading suppliers. Portal is availabe both in print and on the web.
Sign up online to receive your copy, be notified of upcoming issues or to request samples of
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LabCam delivers online training opportunities in a way that recognizes the value of engineers’
time. As easily as You Tube® videos, engineers can quickly load and watch videos from industry
leaders consisting of insights on products, evaluation kit overviews, end-user applications and
more. Each tutorial is up to ten minutes in length and features technology experts, CEOs and/
or peers introducing new solutions or explaining integral aspects of an important product,
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Nu Horizons is proud to present our education and training program, which offers engineers
the opportunity to participate in technical seminars conducted by experts focused on the
latest technologies from our leading suppliers. This program provides higher velocity
learning to help minimize start-up time to quickly begin your design process utilizing the latest
development tools, software and products. Check online for the latest seminar schedule.
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In order to simplify the design process, Nu Horizons has created a series of application notes
Application designed to guide engineers through the process of interfacing different devices together.
Using a detailed step-by-step approach, these design guides identify key elements in the design
process. Topics in the application notes are organized by design task and each topic is a
Notes stand-alone section, with a short introduction or overview, followed by the step-by-step design
guidelines. All steps include a sufficient level of detail to provide the designer with relevant
information to proceed quickly and easily from start to finish.
www.nuhorizons.com/appnotes
Development Nu Horizons offers a wide range of development / evaluation boards, tools and kits featuring
the latest technology from the most trusted suppliers in the industry. Visit the development
Tools tool section of our website for a variety of solutions all aimed at providing a low-cost solution
for designers to accelerate a product’s time-to-market.
http://uk.nuhorizons.com/development/

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D evelopm ent Tools

Embedded Hard PCI Express® Endpoint Block – – – – – – – – 1 1 1 1 1

Virtex-6 LXT FPGAs Virtex-6 SXT FPGAs Virtex-6 HXT FPGAs

Clock Resources Mixed Mode Clock Managers (MMCM) 6 10 10 12 12 18 18 12 18 12 12 18 18

PCI Express® Interface Blocks 1 2 2 2 2 2 – 2 2 4 2 4 4

GTH High-Speed Transceivers – – – – – – – – – – 24 24 24

FFA Packages (FF): flip-chip fine-pitch BGA (1.0 mm ball spacing)

FF484 23 x 23 mm 240 (8, 0) 240 (8, 0)

FF784 29 x 29 mm 360 (12, 0) 400 (12, 0) 400 (12, 0) 400 (12, 0)

FF1760 42.5 x 42.5 mm 1,200 (0, 0) 1,200 (0, 0)

FF1154 35 x 35 mm 320 (48, 0) 320 (48, 0)

FF1155 35 x 35 mm 440 (24, 12) 440 (24, 12)

FF1924 45 x 45 mm 640 (48, 24) 640 (48, 24)

D evelopm ent Tools

Coll Runner™ XPLA3

XC9500™ Series All (Except 9500XV Family)

Design Entry and Implementation Tools (ISE Foundation)

Based on Xilinx’s Spartan-3E, Connect Tech’s FreeForm/104 provides off-the-

Fixed I/O 12 TTL inputs (26 pin connector)  Digital I/O:

Operating Temperature (standard): 0º C to 70º C (32º F to 158º F)  Digital I/O Opto-22:

Virtex-5 FPGA based FreeForm/PCI-104

FreeForm/PCI-104 is a flexible reconfigurable board that combines a user

Based on Xilinx’s Virtex®-5, Connect Tech’s FreeForm/PCI-104 is highly

P-Series – Programmable PCI FPGA

FM-S22 10 Gigabit High Speed serial interface

Speed up development of video algorithms and incorporate the

Key Hardware Features

Part Number Price Part Number Price

* - see page 10 for Inrevium FMC option boards

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Other Inrevium Products

LVDS Option Board DisplayPort Option Board

 Selectable Power Output to Panel  Transmit: 4 ch

Part Number Price

V-by-One HS Option Board HDMI Option Board

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the power consumption of alternate 14-Bit

performance. Operating from a low

LTC®2175 dissipates only 140mW/ 12-Bit

25Msps 40Msps 65Msps 80Msps 105Msps 125Msps

2170-14 2171-14 2172-14 2173-14 2174-14 2175-14

2170-12 2171-12 2172-12 2173-12 2174-12 2175-12

PCI Express and USB Solutions

PCI, PCI-X and PCI Express:

PCI, PCI-X and PCI Express:

And a wide range of daughterboards (SFP, Cameralink, PCI Express Cable …)

Spartan-3 Spartan-6 Virtex-4 Virtex-5 Virtex-6

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Key Features: What’s Inside the ML605 Evaluation Kit:

Key Features: What’s Inside the Virtex-6 FPGA Connectivity Kit:

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What’s Inside the Virtex-6 FPGA Embedded Kit: Features:

Key Features: What’s Inside the SP605 Evaluation Kit:

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Key Features: What’s Inside the Spartan-6 FPGA Connectivity Kit:

What’s Inside the Spartan-6 FPGA Embedded Kit: Features:

D evelopm ent Tools

Key Features: Ordering information

Digilent Spartan 6 Evaluation Kit

 Micrel KSZ9021 10/100/1000 Ethernet Phy

 VITA 57.1 FMC High Pin Count (HPC) connector.

 FMC XM104 Connectivity Card

FMC XM105 Debug Card

Key Features: Ordering information