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Project Report For EE681

Anubhav Srivastava
Department Of Electrical Engineering
IIT Kanpur

Abstract
In this project different characteristics of
MOSFET are plotted by TCAD simulation. Plot is compared
with the measured values and optimized to match the data.
Thereafter threshold voltage based model is implemented
involving mobility degradation and channel length modulation.
Gummel Symmetry test is also performed.
Index TermsICCAP, TCAD, VERILOG-A, BSIM4.

I. INTRODUCTION
The project has two parts. They are described as follows.
In the first part TCAD simulation of long channel
MOSFET is performed. Current is plotted for different biases
and different drain voltages under various conditions. In
addition to current, its first derivative and log of current is also
plotted for all the conditions. These plots are compared with
the given experimental data. Then the plots are matched with
the data by varying different BSIM4 parameters. It is to be
noted that different parameters affect the plot in different
region viz. sub threshold, linear and saturation region. The
process is that first the plot is matched for sub threshold region
then for linear and at the last for saturation region. The process
is repeated till all the plots i.e. plots of currents and their first
derivative are completely matched. Final values of parameters
are noted.
In the second part threshold voltage based MOSFET model
is implemented for drain current. The affects that are included
are mobility degradation and channel length modulation.
Current is plotted for gate as well as drain voltage. First
derivative is also plotted. Gummel Symmetry test is performed
for Id- Vds curve. Model is checked to converge for extreme
biases. In this part MOSFET is implemented using Verilog-A
codes.

II. PARAMETER EXTACTION


This is the first part of the project. Simulation is performed for
long channel MOSFET. The MOSFET has equal length and
width and is equal to 10 um. Ignoring short channel effects and
other non-ideal factors physical and effective oxide thickness
are also equal and are equal to 10nm. Substrate is doped
uniformly with a doping of 5e17 cm -3. Different plots and their
conditions are described as follows:

a)
b)
c)
d)

Id v/s Vg varying Vd keeping Vb =0V


Id v/s Vg varying Vb keeping Vd=0.05
Id v/s Vg varying Vb keeping Vd=1.5V
Id v/s Vd varying Vg keeping Vb=0V
To plot the above curves I needed to extract 25
BSIM4 parameters whose value are listed below
PARAMETERS
VTH0
U0
UB
UC
K1
K2
A0
A1
A2
GAMMA1
LAMBDA
VSAT
VOFF
MINV
RDSW
PCLM
DELTA
PRWG
ALPHA0
WR
VOFFL
MOIN
PHIN
CIT

VALUES
775.5E-3
0.5
13.8E-10
-2.4E-9
500E-3
-60E-3
4.207
-34.8E-6
435.5E-3
0.97
727.8E-9
18E3
-267.3E-3
-241E-6
22080
4.009
700E-6
0.0665E-3
03595E-3
5.861E-3
560.5E-12
15
0
0

Details of each of the above cases are discussed below


Id v/s Vg varying Vd keeping Vb =0V
Id v/s Vg varying Vb keeping Vd =0.05

Fig. 1 Plot of Id v/s Vg varying Vd and keeping Vb=0V

Fig 4 Plot of Id v/s Vg varying Vb with Vd=0.05V

Fig. 2 Plot of log Id v/s Vg varying Vd and keeping Vb=0V

Fig 5 Plot of gm v/s Vg varying Vb with Vd=0.05V

Fig. 3 Plot of gm v/s Vg varying Vd and keeping Vb=0V

Fig 6 Plot of log Id v/s Vg varying Vb with Vd=0.05V

Id v/s Vg varying Vb keeping Vd = 1.5V

Fig 9 Plot of gm v/s Vg varying Vb keeping Vd=1.5 V

Id v/s Vd varying Vg keeping Vb = 0V

Fig 7 Plot of Id v/s Vg varying Vb keeping Vd=1.5V

Fig 10 Plot of Id v/s Vd varying Vg at Vb=0V

Fig 8 Plot of log Id v/s Vg varying Vb keeping Vd=1.5 V

Mobility first increases and the decreases with the increase


in the vertical field. At low values of field columbic
scattering dominates. It decreases with the increase in the
field as the particle energy increases. It increases the
mobility. At higher field, phonon scattering and surface
roughness start dominating. They decrease the mobility.
Mobility is thus given as

Fig 11 Plot of gsd v/s Vd varying Vg at Vb=0V

1 Vgs VT 0.2 / d * tox *0.9*106

1.85

0 Bulk Mobility
t ox Oxide thickness
Vt Threshold Voltage
B. Channel Length Modulation
Channel length decreases on increasing Vds. This results in
a finite output resistance which is ideally infinite. This
brings a slope in the otherwise constant Id-Vds curve. This
is incorporated by the following equation.

CLM 1 VDS
C. CONTINUITY

Fig 12 Plot of log gsd v/s Vd varying Vg at Vb=0V

III. THRESHOLD VOLTAGE BASED MOSFET


FOR IDS
This forms the second part of the project. Here drain current
of the MOSFET is to be plotted against Vds and Vgs. In
addition to it for the model to be feasible its first order
derivative must be continuous. Gummel symmetry test is
performed for Id-Vds curve. Model doesnt satisfy it.
Its first derivative is also not continuous.
The model is implemented incorporating two effects viz.
channel length modulation and mobility degradation.
Curves are plotted for extreme biases i.e. Vds= 20V and
model is found to be valid for those cases.
These effects are incorporated by the equations described
below.
A. Mobility degradation with vertical field

In order to ensure the continuity of the plots as well as their


slopes I used a single equation of current that is valid in all
regions of operations. For this I used the following equation
of Vgs and Vds.
Vgs-Vt is replaced by
(V V )

2nT ln 1 exp GS T
(2nt )

VGSTEFF
2t
(V V VOFF )
1 n
exp GS T
2nT
q s N A

T Thermal Voltage
N A Substrate Doping
VOFF Fitting Parameter

Similarly Vds is replaced by

VDSEFF VDSAT 0.5(VDSAT VDS VDSAT VDS 4VDSAT


2

Hence the single equation for drain current is given by

I DS W

VDSEFF
COX VGSTEFF 1 m
VDSEFF CLM
2 V
GSTEFF 2 kT / q

With this equation we plot Ids v/s Vgs and Ids v/s Vds, It is
found that plots are continuous up to second derivative. The
plots are shown below.

Fig 15 Plot of Id v/s Vd(-20 to +20)

Id v/s Vgs

Fig 16 Plot of Id v/s Vd(-1 to +20)

Fig 13 Plot of Id v/s Vg for different Vd

Draincurrent should increase exponentially on increasing


Vgs. But as seen in the figure, in this case, current first
increases and then starts decreasing. It is so because when the
exponential reaches 80 the value crosses the range of verilog-A
and hence it starts giving erroneous results.

Fig 14 Plot of gm v/s Vg (first derivative)

Id v/s Vds

The current does not pass the Gummel symmetry test. Drain
current is not symmetric for negative drain voltages. As seen
from the figure. Drain current does not show same behaviour
for positive and negative drain voltages. In fact , the behaviour
of drain current in the negative region is highly unpredictable
as beyond Vds= -10V current has positive values.

Fig 17 Plot of gd v/s Vd (first derivative)


(Vd varying from -1 to 20)

3.
4.
.

Fig 18

Plot of gd v/s Vd (first derivative)


(Vd varying from -20 to 20)

The model neither satisfies the gummel symmetry test nor


does it operate in the condition of extreme biases.
IV. ISSUES ENCOUNTERED
While completing the project various issues were
encountered. The biggest problem was the matching of the
parameters. Identification of the required parameters was
initially a challenge. But their apparent description in the
manual helped a lot. Then the challenge was to match all the 12
graphs simultaneously. Varying one parameter matched one
curve but also led to mismatching of the other curve. Model
doesnt converge for at 0 Vgs..
V. CONCLUSION
VI. ACKNOWLEDGEMENT
First of all I am thankful to the Almighty God for all His
love and grace.
I am sincerely thankful to Prof. Yogesh Singh Chauhan
for his valuable guidance and providing the ICCAP license for
simulating the model.
I would also like to thank Mr. Avirup Dasgupta and Mr.
Chandan Yadav for introducing me to the software and helping
me to get acquaintance with the software. They were always
available in times of need.
I extend my thanks to all the T.A.s of the course EE681A
who were always ready to support me.
I also thank to my family and friends for their constant and
selfless support.

1.
2.

VII. REFERENCES
Navid Paydavosi et al BSIM4v4.8.8 MOSFET
MODEL USERS MANUAL U.S. Berkeley, 2013
:Verilog-AMS Language Reference Manual,
Ver 2.3.1. June,2009

Chenming C. Hu , Modern Semiconductor Devices


for Integerayed Circuits.
Genmady
Gildenbalt,
Compact
Modelling:
Principles, Techniques and Applications

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