(My Document..) Automatic Room Light Control With Visitor Counting For Power Saving Applications in Seminar Halls

TITLE
A Mini Project report submitted in partial fulfillment of the requirements

For the Award of Degree of
BACHELOR OF TECHNOLOGY
In
ELECTRONICS AND COMMUNICATIONS ENGINEERING
By
Bhagyashri Bhosle (11N81A04D7)
D Ramakrishna Reddy (11N81A04F0)
Shaik Zakeer (11N81A04G8)
Under the Esteemed guidance of
Mr. S Harish Kumar
(Asst. Professor ECE Dept.)
DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
SPHOORTHY ENGINEERING COLLEGE
(Affiliated to J.N.T. University, Hyderabad)

Nadargul (Vill), Sagar Ring Road, Near Vanasthalipuram, Saroornagar,
Hyderabad
2013-2014
DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
SPHOORTHY ENGINEERING COLLEGE (SEC)
Nadargul (Vill), Sagar Road, Near Vanasthalipuram, Saroornagar
HYDERABAD
CERTIFICATE
This is to certify that the mini project entitled MICROCONTROLLER
BASED AUTOMATIC ROOM LIGHT CONTROL WITH VISITOR
COUNTER FOR AUDITORIUM is a bonafide work carried out by Bhagyashri
Bhosle (11N81A04D7), D Ramakrishna Reddy (11N81A04F0), Shaik Zakeer
(11N81A04G8), in partial fulfillment for the award of Degree of BACHELOR OF
TECHNOLOGY IN ELECTRONICS AND COMMUNICATION ENGINEERING
of JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD
during the year 2013-2014.
Name: S. Harish Kumar

INTERNAL GUIDE
P PRAVEEN RAJU
HEAD OF THE DEPARTMENT
Prof. Dr. V. CHANDRA MOULI
External Examiner
PRINCIPAL
SPHOORTHY ENGINEERING COLLEGE

(Affiliated to J.N.T. University, Hyderabad)
Nadargul (Vill), Sagar Road, Near Vanasthalipuram,

Saroornagar.
HYDERABAD - 501510.
________________________________________________________________________
DECLARATION
We, Bhagyashri Bhosle (11N81A04D7), D.Ramakrishna
Reddy(11N81A04F0), Shaik Zakeer (11N81A04G8) hereby declare that
the work embodied in this mini project dissertation entitled
MICROCONTROLLER BASED AUTOMATIC ROOM LIGHT
CONTROL WITH VISITOR COUNTER FOR AUDITORIUM
submitted to the Sphoorthy Engineering College Affiliated to JNTU,
Hyderabad, for partial fulfillment of the degree of B.Tech in Electronics
And Communications Engineering has been carried out by us under the
supervision of INTERNAL GUIDE S.HARISH KUMAR , ASST
PROFESSOR, ECE DEPT., Sphoorthy Engineering College,
Hyderabad. To the best of my knowledge, this work has not been submitted
for any other degree in any University.

D.Ramakrishna Reddy (11N81A04F0)
ACKNOWLEDGEMENT
The completion of this mini-project work gives me an opportunity to convey my
gratitude to all those who have helped me to reach a stage where I have the confidence to
launch my career in the competitive world in the field of ECE.
I express my sincere thanks to Prof. Dr. V. CHANDRA MOULI, Principal,
Sphoorthy Engineering College for providing all necessary facilities in completing my
mini project report.
I express my sense of gratitude to P PRAVEEN RAJU, Head of Department of
ELECTRONICS AND COMMUNICATION ENGINEERING, who encouraged me
to select the project and completion of this mini-project with providing necessary
facilities.
My honest thankfulness to S HARISH KUMAR , Asst Professor, ECE dept.,
(Internal Guide) for his kind help and for giving me the necessary guidance and valuable
suggestions in completing this mini-project work and in preparing this report
I take the opportunity to express my gratitude to the Management, Teaching and
Non-teaching Staff of Sphoorthy Engineering College for their kind co-operation during
the period of my Study.
Finally, I would like to thank my parents & friends for their continuous
encouragement and support during the entire course of this mini-project work.

D.Ramakrishna Reddy (11N81A04F0)
CONTENTS
NAME
PAGE NO.
1.
ABSTRACT
2.
TECHNICAL SPECIFICATION
3.
LIST OF FIGURES
4.
LIST OF TABLES
5.
BLOCK DIAGRAM OF 89S52
6.
BLOCK DIAGRAM OF POWER SUPPLY
CHAPTER1: INTRODUCTION
CHAPTER2: POWER SUPPLY
10
2.1 Transformer
10
2.2 Rectifier
11
2.3 Filter
11
2.4 Voltage Regulator
11
CHAPTER 3: MICRO CONTROLLER
12
3.1 Features of AT89S52
13
3.2 Description
13
3.3 Pin Diagram
14
3.4 Pin Description

3.5 Machine Cycle for 8051
CHAPTER 4: SOFTWARE COMPONENTS
14
17
18
4.1 Keil Compiler

4.2 Proload
CHAPTER 5: IR SECTION
19
5.1 What are Infrared
19
5.2 IR in Electronics
19
5.3 IR Generator
20
5.4 Rc-5
22
5.5 IR Receiver
23
5.5.1 Description
5.5.2 Features
5.5.3 Suitable Data Format
CHAPTER 6: L293D SREPPER MOTOR DRIVER
26
CHAPER 7: STEPPER MOTOR
28
7.1 Advantages
29
7.2 Disadvantages
30
7.3 Open Loop Operation
30
7.4 Stepper Motor Types
30
7.5 Variable Reluctance (Vr)
30
7.6 Permanent Magnet
31
7.7 Hybrid (Hb)
32
7.8 When to Use Stepper Motor
32
7.9 Rotating Magnetic Field
33
7.10 Torque Generation
33
7.11 Step Angle Accuracy
34
7.12 Torque versus Speed Characteristics
35
7.13 Single Step Response and Resonance
35
7.14 Few Definitions of Stepper Motor
36
7.15 Stepper Motor Interfacing with Microcontroller 37

CHAPTER 8: RELAYS
8.1 Operation
38
8.2 Driving a Relay
40
8.3 Relay Interfacing with Microcontroller
41
CHAPTER 9 DISPLAY COMPONENTS
9.1 Light Dependent Resistor

9.2 Liquid Crystal Device
41
42
9.2.1 Pin Function

9.2.2 Lcd Screen
9.2.3 Lcd Basic Commands
9.2.4 Lcd Connections
9.2.5 Lcd Initialization
9.2.6 Lcd Interfacing with Microcontroller
CHAPTER 10: SWITCH & LED INTERFACING WITH
MICROCONTROLLER
10.1switch Interfacing
10.2 Lcd Interfacing
50
51
CHAPTER 11: WORKING PROCEDURE OF PROJECT
52
CONCLUSION
55
RESULTS
56
REFERENCES
57
ABSTRACT
In this competitive world and busy schedule human cannot spare time to perform his
daily activities manually. The most common thing that he forgets to do is switching OFF
the lights wherever they are not required. This project is a standalone automatic room
light controller with auto door opening and closing. The main aim of the project is to
control the lighting in a room depending upon lighting that is present in the room. Use of
embedded technology makes this closed loop feedback control system efficient and
reliable. Micro controller (AT89S52) allows dynamic and faster control. Liquid crystal
display (LCD) makes the system user-friendly. AT89S52 micro controller is the heart of
the circuit as it controls all the functions.
The system comprises of two IR Transmitter-Receiver pairs, one of which is located in
front of the door outside the room. The other pair is located inside the room. LDR is
placed outside the room and is used to identify whether it is day or night time. Initially
the light is switched off in the room. Whenever a person tries to enter into the room, the
receiver of first IR pair identifies the person. Then the microcontroller opens the door by
rotating the stepper motor. After the person had entered into the room completely, the
door will be closed automatically.
The light is switched off even if anyone is present inside the room during the day time.
Similarly, the light is switched off if no one is there inside the room or if it is night times.
Thus, depending on the intensity of light and the surrounding temperature, the required
action is performed by the microcontroller. LCD displays the number of persons present
inside the room.
This project uses regulated 5V, 500mA power supply. 7805 three terminal voltage
regulator is used for voltage regulation. Bridge type full wave rectifier is used to rectify
the ac out put of secondary of 230/12V step down transformer.
TECHNICAL SPECIFICATIONS
Title of the project
MICROCONTROLLER BASED AUTOMATIC ROOM
LIGHT CONTROL WITH VISITOR COUNTING FOR AUDITORIUM
Domain
Embedded Systems Design
Software
Embedded C, Keil, Proload
Microcontroller
AT89S52
Power Supply
+5V, 500mA Regulated Power Supply
Display
LCD
LCD
HD44780 16-character, 2-line (16X2)
LED
5mm
Crystal
11.0592MHz
Sensor
IR Sensors
LIST OF FIGURES
DESCRIPTION
PAGE NO
1.
BLOCK DIAGRAM OF 89S52
2.
BLOCK DIAGRAM OF POWER SUPPLY
3.
POWER SUPPLY
10
4.
PIN DIAGRAM OF 8051
14
5.
BLOCK DIAGRAM OF IR RECEIVER
24
6.
APPLICATION CIRCUIT FOR IR receiver
24
7.
DIP 16 PACKAGE
26
8.
PIN CONNECTION OF ULN2003
27
9.
STEPPER MOTOR
28
10.
STEPPER MOTOR OPERATION
29
11.
CROSS SECTION OF VARIABLE RELUCTANCE MOTOR
31
12.
PM STEPPER MOTOR PRINCIPLE
32
13.
CROSS SCETION OF HYBRID STEPPER MOTOR
32
14.
MAGNETIC FLUX PATH TO A 2POLE STEPPER MOTOR WITH LAG
33
BETWEEN ROTOR &STATOR

15.
POSITIONAL ACCURACY OF STEPPER MOTOR
35
16.
TORQUE VS SPEED CHARACTERISTICS
35
17.
SINGLE STEP RESPONSE VS TIME
36
18.
CIRCUIT SYMBOL OF A RELAY
19.
RELAY OPERATION &USE OF PROTECTION DIODES
39
20.
PROCEDURE ON 8BIT INITIALIZATION
48
21.
INTERFACING SWITCH WITH MICROCONTROLLER
50
22.
LED INTERFACING WITH MICRO CONTROLLER
52
23.
SCHEMATIC DIAGRAM
38
54
LIST OF TABLES
1.
PORT3 ALTERNATE FUNCTION
17
2.
STEPPER MOTOR STEP ANGLE
36
3.
LIST COMMANDS WHICH LCD RECOGNISES
45
BLOCK DIAGRAM
BLOCK DIAGRAM OF AT89S52

LCD
ENTRY
SENSOR
IR
EXIT
SENSOR
IR
AT89S52
LDR
L293D
DRIVER
CRYSTAL
RESET
CIRCUIT
STEPPE
R
MOTOR
1
STEPPER
MOTOR 2
Fig1: Block Diagram of Automatic room light control
BLOCK DIAGRAM OF POWER SUPPLY:

Step
down
T/F
Bridge
Rectifier
Filter
Circuit
Regulator
Fig2: Block Diagram Of Power Supply
Power supply to all sections
CHAPTER -1
PROJECT REVIEW
1.
Introduction of Project
1.1 Project Definition:
Project title is
AUTOMATIC
ROOM LIGHT CONTROLLER WITH
BIDIRECTIONAL VISITOR COUNTER FOR AUDITORIUM
The objective of this project is to make a controller based model to count

number of persons visiting particular room and accordingly light up the room. Here
we can use sensor and can know present number of persons.
In todays world, there is a continuous need for automatic appliances with the
increase in standard of living; there is a sense of urgency for developing circuits that
would ease the complexity of life.
Also if at all one wants to know the number of people present in room so as
not to have congestion. This circuit proves to be helpful.
1.2 Project Overview
This Project Automatic Room Light Controller with Visitor Counter using
Microcontroller is a reliable circuit that takes over the task of controlling the room lights
as well us counting number of persons/ visitors in the room very accurately. When
somebody enters into the room then the counter is incremented by one and the light in the
room will be switched ON and when any one leaves the room then the counter is
decremented by one. The light will be only switched OFF until all the persons in the
room go out. The total number of persons inside the room is also displayed on the seven
segment displays.
The microcontroller does the above job. It receives the signals from the sensors,
and this signal is operated under the control of software which is stored in ROM.
Microcontroller AT89S52 continuously monitor the Infrared Receivers, When any object
pass through the IR Receiver's then the IR Rays falling on the receiver are obstructed ,
this obstruction is sensed by the Microcontroller
CHAPTER-2
BLOCK DIAGRAM AND ITS DESCRIPTION
2.1 BASIC BLOCK DIAGRAM
LCD
ENTRY
SENSOR
IR
EXIT
SENSOR
IR
AT89S52
LDR
L293D
DRIVER
CRYSTAL
RESET
CIRCUIT
STEPPE
R
MOTOR
1
STEPPER
MOTOR 2
Fig1: Block Diagram of Automatic room light control
BLOCK DIAGRAM OF POWER SUPPLY:

Step
down
T/F
Bridge
Rectifier
Filter
Circuit
Regulator
Fig2: Block Diagram Of Power Supply
Power supply to all sections
2.2 Block Diagram Description

The basic block diagram of the bidirectional visitor counter with
automatic light controller is shown in the above figure. Mainly this block
diagram consist of the following essential blocks.
1. Power Supply
2. Entry and Exit sensor circuit
3. AT89S52 micro-controller
4. Relay driver circuit
1. Power Supply:Here we used +12V and +5V dc power supply. The main function
of this block is to provide the required amount of voltage to essential
circuits. +12 voltage is given. +12V is given to relay driver. To get the
+5V dc power supply we have used here IC 7805, which provides the +5V
dc regulated power supply.
2. Enter and Exit Circuits:This is one of the main parts of our project. The main intention of
this block is to sense the person. For sensing the person and light we are
using the IR Sensors and light dependent register (LDR). By using these
sensors and its related circuit diagram we can count the persons.
3. 89S52 Microcontroller:It is a low-power, high performance CMOS 8-bit microcontroller

with 8KB of Flash Programmable and Erasable Read Only Memory
(PEROM). The device is manufactured using Atmels high-density
nonvolatile memory technology and is compatible with the MCS-51 TM
instruction set and pin out. The on-chip Flash allows the program memory
to be reprogrammed in-system or by a conventional nonvolatile memory
programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic hip, the Atmel AT89S52 is a powerful
Microcontroller provides a highly flexible and cost effective
solution to many embedded control applications.
4. Relay Driver Circuit:This block has the potential to drive the various controlled devices.
In this block mainly we are using the transistor and the relays. One relay
driver circuit we are using to control the light. Output signal from
AT89S52 is given to the base of the transistor, which we are further
energizing the particular relay. Because of this appropriate device is
selected and it do its allotted function.
POWER SUPPLY
The input to the circuit is applied from the regulated power supply. The a.c. input i.e.,
230V from the mains supply is step down by the transformer to 12V and is fed to a
rectifier. The output obtained from the rectifier is a pulsating d.c voltage. So in order to
get a pure d.c voltage, the output voltage from the rectifier is fed to a filter to remove any
a.c components present even after rectification. Now, this voltage is given to a voltage
regulator to obtain a pure constant dc voltage.
230V AC
50Hz
D.C
Output
Step down
Bridge
transformer
Rectifier
Filter
Regulator
Fig3: Power Supply
2.1 Transformer:
Usually, DC voltages are required to operate various electronic equipment and these
voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c
input available at the mains supply i.e., 230V is to be brought down to the required
voltage level. This is done by a transformer. Thus, a step down transformer is employed
to decrease the voltage to a required level.
2.2 Rectifier:
The output from the transformer is fed to the rectifier. It converts A.C. into pulsating D.C.
The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier
is used because of its merits like good stability and full wave rectification.
2.3 Filter:
Capacitive filter is used in this project. It removes the ripples from the output of rectifier
and smoothens the D.C. Output
received from this filter is constant until the mains
voltage and load is maintained constant. However, if either of the two is varied, D.C.
voltage received at this point changes. Therefore a regulator is applied at the output stage.
2.4 Voltage regulator:

As the name itself implies, it regulates the input applied to it. A voltage regulator
is an electrical regulator designed to automatically maintain a constant voltage level. In
this project, power supply of 5V and 12V are required. In order to obtain these voltage
levels, 7805 and 7812 voltage regulators are to be used. The first number 78 represents
positive supply and the numbers 05, 12 represent the required output voltage levels.
CHAPTER-3
MICROCONTROLLERS
Microprocessors and microcontrollers are widely used in embedded systems
products. Microcontroller is a programmable device. A microcontroller has a CPU in
addition to a fixed amount of RAM, ROM, I/O ports and a timer embedded all on a single
chip. The fixed amount of on-chip ROM, RAM and number of I/O ports in
microcontrollers makes them ideal for many applications in which cost and space are
critical.
The Intel 8051 is Harvard architecture, single chip microcontroller (C) which was
developed by Intel in 1980 for use in embedded systems. It was popular in the 1980s and
early 1990s, but today it has largely been superseded by a vast range of enhanced devices
with 8051-compatible processor cores that are manufactured by more than 20
independent manufacturers including Atmel, Infineon Technologies and Maxim
Integrated Products.
8051 is an 8-bit processor, meaning that the CPU can work on only 8 bits of data
at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the
CPU. 8051 is available in different memory types such as UV-EPROM, Flash and NVRAM.
The microcontroller used in this project is AT89S52. Atmel Corporation introduced this
89S52 microcontroller. This microcontroller belongs to 8051 family. This microcontroller
had 128 bytes of RAM, 4K bytes of on-chip ROM, two timers, one serial port and four
ports (each 8-bits wide) all on a single chip. AT89S52 is Flash type 8051.
The present project is implemented on Keil Uvision. In order to program the device,
Proload tool has been used to burn the program onto the microcontroller.
The features, pin description of the microcontroller and the software tools used are
discussed in the following sections.
3.1 FEATURES OF AT89S52:
8K Bytes of Re-programmable Flash Memory.
RAM is 256 bytes.
2.7V to 6V Operating Range.
Fully Static Operation: 0 Hz to 24 MHz.
Two-level Program Memory Lock.
128 x 8-bit Internal RAM.
32 Programmable I/O Lines.
Two 16-bit Timer/Counters.
Six Interrupt Sources.
Programmable Serial UART Channel.
Low-power Idle and Power-down Modes.
3.2Description:
The AT89S52 is a low-voltage, high-performance CMOS 8-bit microcomputer with 4K
bytes of Flash programmable memory. The device is manufactured using Atmels highdensity nonvolatile memory technology and is compatible with the industry-standard
MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic
chip, the Atmel AT89S52 is a powerful microcomputer, which provides a highly flexible
and cost-effective solution to many embedded control applications.
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system
to continue functioning. The power-down mode saves the RAM contents but freezes the
oscillator disabling all other chip functions until the next hardware reset.
3.3PIN DIAGRAM:
Fig4: Pin diagram of 8051
3.4PIN DESCRIPTION:
Vcc:
Pin 40 provides supply voltage to the chip. The voltage source is +5V.
GND:
Pin 20 is the ground.
XTAL1 and XTAL2:

The 8051 has an on-chip oscillator but requires an external clock to run it. Usually, a
quartz crystal oscillator is connected to inputs XTAL1 (pin19) and XTAL2 (pin18).
There are various speeds of 8051 family. Speed refers to the maximum oscillator
frequency connected to XTAL. When the 8051 is connected to a crystal oscillator and is
powered up, the frequency can be observed on the XTAL2 pin using the oscilloscope.
RESET:
Pin9 is the reset pin. It is an input and is active high. Upon applying a high pulse to this
pin, the microcontroller will reset and terminate all the activities. This is often referred to
as a power-on reset.
EA (External access):
Pin 31 is EA. It is an active low signal. It is an input pin and must be connected to either
Vcc or GND but it cannot be left unconnected.
The 8051 family members all come with on-chip ROM to store programs. In such cases,
the EA pin is connected to Vcc. If the code is stored on an external ROM, the EA pin
must be connected to GND to indicate that the code is stored externally.
PSEN (Program store enable):
This is an output pin.
ALE (Address latch enable):

This is an output pin and is active high.
Ports 0, 1, 2 and 3:
The four ports P0, P1, P2 and P3 each use 8 pins, making them 8-bit ports. All the ports
upon RESET are configured as input, since P0-P3 have value FFH on them.
Port 0(P0):
Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data.
ALE indicates if P0 has address or data. When ALE=0, it provides data D0-D7, but when
ALE=1, it has address A0-A7. Therefore, ALE is used for demultiplexing address and
data with the help of an internal latch.
When there is no external memory connection, the pins of P0 must be connected to a
10K-ohm pull-up resistor. This is due to the fact that P0 is an open drain. With external
pull-up resistors connected to P0, it can be used as a simple I/O, just like P1 and P2. But
the ports P1, P2 and P3 do not need any pull-up resistors since they already have pull-up
resistors internally. Upon reset, ports P1, P2 and P3 are configured as input ports.
Port 1 and Port 2:
With no external memory connection, both P1 and P2 are used as simple I/O. With
external memory connections, port 2 must be used along with P0 to provide the 16-bit
address for the external memory. Port 2 is designated as A8-A15 indicating its dual
function. While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to provide bits
A8-A15 of the address.
Port 3:
Port 3 occupies a total of 8 pins, pins 10 through 17. It can be used as input or output. P3
does not need any pull-up resistors, the same as port 1 and port 2. Port 3 has an additional
function of providing some extremely important signals such as interrupts.
Table1: Port 3 Alternate Functions

3.5Machine cycle for the 8051:
The CPU takes a certain number of clock cycles to execute an instruction. In the 8051
family, these clock cycles are referred to as machine cycles. The length of the machine
cycle depends on the frequency of the crystal oscillator. The crystal oscillator, along with
on-chip circuitry, provides the clock source for the 8051 CPU.
The frequency can vary from 4 MHz to 30 MHz, depending upon the chip rating and
manufacturer. But the exact frequency of 11.0592 MHz crystal oscillator is used to make
the 8051 based system compatible with the serial port of the IBM PC.
In the original version of 8051, one machine cycle lasts 12 oscillator periods. Therefore,
to calculate the machine cycle for the 8051, the calculation is made as 1/12 of the crystal
frequency and its inverse is taken.
CHAPTER-4
Software components
4.1KEIL COMPILER:
Keil compiler is software used where the machine language code is written and compiled.
After compilation, the machine source code is converted into hex code which is to be
dumped into the microcontroller for further processing. Keil compiler also supports C
language code.
4.2PROLOAD:
Proload is software which accepts only hex files. Once the machine code is converted
into hex code, that hex code has to be dumped into the microcontroller and this is done by
the Proload. Proload is a programmer which itself contains a microcontroller in it other
than the one which is to be programmed. This microcontroller has a program in it written
in such a way that it accepts the hex file from the keil compiler and dumps this hex file
into the microcontroller which is to be programmed. As the proload programmer kit
requires power supply to be operated, this power supply is given from the power supply
circuit designed above. It should be noted that this programmer kit contains a power
supply section in the board itself but in order to switch on that power supply, a source is
required. Thus this is accomplished from the power supply board with an output of
12volts.
CHAPTER-5
IR SECTION
5.1 WHAT IS INFRARED?
Infrared is a energy radiation with a frequency below our eyes sensitivity, so we cannot
see it.
Even that we can not "see" sound frequencies, we know that it exist, we can listen them.
Even that we can not see or hear infrared, we can feel it at our skin temperature sensors.
When you approach your hand to fire or warm element, you will "feel" the heat, but you
can't see it. You can see the fire because it emits other types of radiation, visible to your
eyes, but it also emits lots of infrared that you can only feel in your skin.
5.2 INFRARED IN ELECTRONICS

Infra-Red is interesting, because it is easily generated and doesn't suffer electromagnetic
interference, so it is nicely used to communication and control, but it is not perfect, some
other light emissions could contains infrared as well, and that can interfere in this
communication. The sun is an example, since it emits a wide spectrum or radiation.
The adventure of using lots of infra-red in TV/VCR remote controls and other
applications, brought infra-red diodes (emitter and receivers) at very low cost at the
market.
From now on you should think as infrared as just a "red" light. This light can means
something to the receiver, the "on or off" radiation can transmit different meanings. Lots
of things can generate infrared, anything that radiate heat do it, including out body,
lamps, stove, oven, friction your hands together, even the hot water at the faucet.
To allow a good communication using infra-red, and avoid those "fake" signals, it is
imperative to use a "key" that can tell the receiver what is the real data transmitted and
what is fake. As an analogy, looking eye naked to the night sky you can see hundreds of
stars, but you can spot easily a far away airplane just by its flashing strobe light. That
strobe light is the "key", the "coding" element that alerts us.
Similar to the airplane at the night sky, our TV room may have hundreds of tinny IR
sources, our body, and the lamps around, even the hot cup of tea. A way to avoid all
those other sources, is generating a key, like the flashing airplane. So, remote controls use
to pulsate its infrared in a certain frequency. The IR receiver module at the TV, VCR or
stereo "tunes" to this certain frequency and ignores all other IR received. The best
frequency for the job is between 30 and 60kHz, the most used is around 36kHz
5.3 IR GENERATION
To generate a 36 kHz pulsating infrared is quite easy, more difficult is to receive and
identify this frequency. This is why some companies produce infrared receives, that
contains the filters, decoding circuits and the output shaper, that delivers a square wave,
meaning the existence or not of the 36kHz incoming pulsating infrared.
It means that those 3 dollars small units, have an output pin that goes high (+5V)
when there is a pulsating 36kHz infrared in front of it, and zero volts when there is not
this radiation.
A square wave of approximately 27uS (microseconds) injected at the base of a transistor,

can drive an infrared LED to transmit this pulsating light wave. Upon its presence, the
commercial receiver will switch its output to high level (+5V).If you can turn on and off
this frequency at the transmitter; your receiver's output will indicate when the transmitter
is on or off.
Those IR demodulators have inverted logic at its output, when a burst of IR is sensed it
drives its output to low level, meaning logic level = 1.
The TV, VCR, and Audio equipment manufacturers for long use infra-red at their remote
controls. To avoid a Philips remote control to change channels in a Panasonic TV, they
use different codification at the infrared, even that all of them use basically the same
transmitted frequency, from 36 to 50 kHz. So, all of them use a different combination of
bits or how to code the transmitted data to avoid interference.
5.4 RC-5:
Various remote control systems are used in electronic equipment today. The RC5 control
protocol is one of the most popular and is widely used to control numerous home
appliances, entertainment systems and some industrial applications including utility
consumption remote meter reading, contact-less apparatus control, telemetry data
transmission, and car security systems. Philips originally invented this protocol and
virtually all Philips remotes use this protocol. Following is a description of the RC5.
When the user pushes a button on the hand-held remote, the device is activated and sends
modulated infrared light to transmit the command. The remote separates command data
into packets. Each data packet consists of a 14-bit data word, which is repeated if the user
continues to push the remote button. The data packet structure is as follows:
2 start bits
1 control bit
5 address bits
6 command bits.
The start bits are always logic 1 and intended to calibrate the optical receiver automatic
gain control loop. Next, is the control bit. This bit is inverted each time the user releases
the remote button and is intended to differentiate situations when the user continues to
hold the same button or presses it again. The next 5 bits are the address bits and select the
destination device. A number of devices can use RC5 at the same time. To exclude
possible interference, each must use a different address. The 6 command bits describe the
actual command. As a result, a RC5 transmitter can send the 2048 unique commands. The
transmitter shifts the data word, applies Manchester encoding and passes the created onebit sequence to a control carrier frequency signal amplitude modulator. The amplitude
modulated carrier signal is sent to the optical transmitter, which radiates the infrared
light. In RC5 systems the carrier frequency has been set to 36 kHz. Figure below displays
the RC5 protocol.
The receiver performs the reverse function. The photo detector converts optical
transmission into electric signals, filters it and executes amplitude demodulation. The
receiver output bit stream can be used to decode the RC5 data word. This operation is
done by the microprocessor typically, but complete hardware implementations are present
on the market as well. Single-die optical receivers are being mass produced by a number
of companies such as Siemens, Temic, Sharp, Xiamen Hualian, Japanese Electric and
others. Please note that the receiver output is inverted (log. 1 corresponds to illumination
absence).
5.5 IR RECEIVER
5.5.1 Description:
The TSOP17... Series are miniaturized receivers for infrared remote control systems.
PIN diode and preamplifier are assembled on lead frame, the epoxy package is designed
as IR filter.
The demodulated output signal can directly be decoded by a microprocessor. TSOP17.. is
the standard IR remote control receiver series, supporting all major transmission codes.
5.5.2 Features:
Photo detector and preamplifier in one package
Internal filter for PCM frequency
Improved shielding against electrical field disturbance
TTL and CMOS compatibility
Output active low
Low power consumption
High immunity against ambient light
Continuous data transmission possible (up to 2400 bps)
Suitable burst length .10 cycles/burst
Fig5: Block Diagram For IR Receiver
Fig6: Application Circuit For IR Receiver

5.5.3 Suitable Data Format
The circuit of the TSOP17 is designed in that way that unexpected output pulses due to
noise or disturbance signals are avoided. A bandpassfilter, an integrator stage and an
automatic gain control are used to suppress such disturbances. The distinguishing mark
between data signal and disturbance signal are carrier frequency, burst length and duty
cycle. The data signal should fulfill the following condition:
Carrier frequency should be close to center frequency of the bandpass (e.g. 38
kHz).
Burst length should be 10 cycles/burst or longer.
After each burst which is between 10 cycles and 70 cycles a gap time of at least
14 cycles is necessary.
For each burst which is longer than 1.8ms a corresponding gap time is necessary
at some time in the data stream. This gap time should have at least same length as the
burst.
Up to 1400 short bursts per second can be received continuously.

Some examples for suitable data format are: NEC Code, Toshiba Micom Format,
Sharp Code, RC5 Code, RC6 Code, R2000 Code, Sony Format (SIRCS). When a
disturbance signal is applied to the TSOP17.. it can still receive the data signal. However
the sensitivity is reduced to that level that no unexpected pulses will occur. Some
examples for such disturbance signals which are suppressed by the TSOP17 are:
DC light (e.g. from tungsten bulb or sunlight)
Continuous signal at 38 kHz or at any other frequency
Signals from fluorescent lamps with electronic ballast (an example of the signal
modulation is in the figure below).
Fig7: DIP 16 Package
CHAPTER-6
ULN2003 CURRENT DRIVER

The ULN2003 current driver is a high voltage, high current Darlington arrays each
containing seven open collector Darlington pairs with common emitters. Each channel is
rated at 500mA and can withstand peak currents of 600mA. Suppression diodes are
included for inductive load driving and the inputs are pinned opposite the outputs to
simplify board layout.
These versatile devices are useful for driving a wide range of loads including solenoids,
relays DC motors, LED displays filament lamps, thermal print heads and high power
buffers. This chip is supplied in 16 pin plastic DIP packages with a copper lead frame to
reduce thermal resistance.
Fig8: Pin Connection of ULN 2003

This ULN2003 driver can drive seven relays at a time. The pins 8 and 9 provide ground
and Vcc respectively.
The working of ULN driver is as follows:
It can accept seven inputs at a time and produces seven corresponding outputs. If the
input to any one of the seven input pins is high, then the value at its corresponding output
pin will be low, for example if the input at pin 6 is high, then the value at the
corresponding output i.e., output at pin 11 will be low. Similarly if the input at a
particular pin is low, then the corresponding output will be high.
CHAPTER -7
STEPPER MOTOR:
Fig9: Stepper motor
A stepper motor is a widely used device that translates electrical pulses into mechanical
movement. The stepper motor is used for position control in applications such as disk
drives, dot matrix printers and robotics.
Stepper motors commonly have a permanent magnet rotor surrounded by a stator. The
most common stepper motors have four stator windings that are paired with a centertapped common. This type of stepper motor is commonly referred to as a four-phase or
unipolar stepper motor. The center tap allows a change of current direction in each of the
two coils when a winding is grounded, thereby resulting in a polarity change of the stator.
The direction of the rotation is dictated by the stator poles. The stator poles are
determined by the current sent through the wire coils. As the direction of the current is
changed, the polarity is also changed causing the reverse motion of the rotor.
It should be noted that while a conventional motor shaft runs freely, the stepper motor
shaft moves in a fixed repeatable increment, which allows one to move it to a precise
position. Thus, the stepper motor moves one step when the direction of current flow in
the field coil(s) changes, reversing the magnetic field of the stator poles. The difference
between unipolar and bipolar motors lies in the may that this reversal is achieved.
Fig10: Stepper motor operation
7.1 Advantages:
1. The rotation angle of the motor is proportional to the input pulse.
2. The motor has full torque at standstill (if the windings are energized)
3. Precise positioning and repeatability of movement since good stepper motors have an
accuracy of 3 5% of a step and this error is non cumulative from one step to the next.
4. Excellent response to starting/ stopping/reversing.
5. Very reliable since there are no contact brushes in the motor. Therefore the life of the
motor is simply dependant on the life of the bearing.
6. The motors response to digital input pulses provides open-loop control, making the
motor simpler and less costly to control.
7. It is possible to achieve very low speed synchronous rotation with a load that is
directly coupled to the shaft.
8. A wide range of rotational speeds can be realized as the speed is proportional to the
frequency of the input pulses.
7.2 Disadvantages:
1. Resonances can occur if not properly controlled.
2. Not easy to operate at extremely high speeds.
7.3 Open Loop Operation:
One of the most significant advantages of a stepper motor is its ability to be accurately
controlled in an open loop system. Open loop control means no feedback information
about position is needed. This type of control eliminates the need for expensive sensing
and feedback devices such as optical encoders.
7.4 Stepper Motor Types:
There are three basic stepper motor types. They are:
Variable-reluctance
Permanent-magnet
Hybrid
7.5 Variable-reluctance (VR):
This type of stepper motor has been around for a long time. It is probably the easiest to
understand from a structural point of view. This type of motor consists of a soft iron
multi-toothed rotor and a wound stator. When the stator windings are energized with DC
current, the poles become magnetized. Rotation occurs when the rotor teeth are attracted
to the energized stator poles.
Fig 11: Cross-section of a variable reluctance (VR) motor.

7.6 Permanent Magnet (PM)
The permanent magnet step motor is a low cost and low resolution type motor with
typical step angles of 7.5 to 15. (48 24 steps/revolution) PM motors as the name
implies have permanent magnets added to the motor structure. In this type of motor, the
rotor does not have teeth. Instead the rotor is magnetized with alternating north and south
poles situated in a straight line parallel to the rotor shaft. These magnetized rotor poles
provide an increased magnetic flux intensity and because of this the PM motor exhibits
improved torque characteristics when compared with the VR type.
Fig12: PM stepper motor principle
Fig13: Cross section of a hybrid stepper motor
7.7 Hybrid (HB):

The hybrid stepper motor is more expensive than the PM stepper motor but provides
better performance with respect to step resolution, torque and speed. Typical step angles
for the HB stepper motor range from 3.6 to 0.9 (100 400 steps per revolution).
The hybrid stepper motor combines the best features of both the PM and VR type stepper
motors. The rotor is multi-toothed like the VR motor and contains an axially magnetized
concentric magnet around its shaft. The teeth on the rotor provide an even better path
which helps guide the magnetic flux to preferred locations in the air gap. This further
increases the detent, holding and dynamic torque characteristics of the motor when
compared with both the VR and PM types. This motor type has some advantages such as
very low inertia and a optimized magnetic flow path with no coupling between the two
stator windings. These qualities are essential in some applications.
7.8 When to Use a Stepper Motor:
A stepper motor can be a good choice whenever controlled movement is required. They
can be used to advantage in applications where you need to control rotation angle, speed,
position and synchronism. Because of the inherent advantages listed previously, stepper
motors have found their place in many different applications.
7.9 The Rotating Magnetic Field:
When a phase winding of a stepper motor is energized with current a magnetic flux is
developed in the stator. The direction of this flux is determined by the Right Hand Rule
which states:
If the coil is grasped in the right hand with the fingers pointing in the direction of the
current in the winding (the thumb is extended at a 90 angle to the fingers), then the
thumb will point in the direction of the magnetic field.
The below figure shows the magnetic flux path developed when phase B is energized
with winding current in the direction shown. The rotor then aligns itself so that the flux
opposition is minimized. In this case the motor would rotate clockwise so that its south
pole aligns with the north pole of the stator B at position 2 and its north pole aligns with
the south pole of stator B at position 6. To get the motor to rotate we can now see that we
must provide a sequence of energizing the stator windings in such a fashion that provides
a rotating magnetic flux field which the rotor follows due to magnetic attraction.
Fig14: Magnetic flux path through a two-pole stepper motor with a lag between the
rotor and stator.
7.10 Torque Generation:

The torque produced by a stepper motor depends on several factors.
The step rate
The drive current in the windings
The drive design or type
In a stepper motor, a torque will be developed when the magnetic fluxes of the rotor and
stator are displaced from each other. The stator is made up of a high permeability
magnetic material. The presence of this high permeability material causes the magnetic
flux to be confined for the most part to the paths defined by the stator structure. This
serves to concentrate the flux at the stator poles. The torque output produced by the motor
is proportional to the intensity of the magnetic flux generated when the winding is
energized.
The basic relationship which defines the intensity of the magnetic flux is defined by:
H = (N * i) / l
Where
N = the number of winding turns
i = current
H = Magnetic field intensity
l = Magnetic flux path length
This relationship shows that the magnetic flux intensity and consequently the torque is
proportional to the number of winding turns and the current and inversely proportional to
the length of the magnetic flux path. Thus from this basic relationship it is concluded that
the same frame size stepper motor could have very different torque output capabilities
simply by changing the winding parameters.
7.11 Step Angle Accuracy:
The main reason that the stepper motor gained such popularity as a positioning device is
for its accuracy and repeatability. Typically stepper motors will have a step angle
accuracy of 3 5% of one step. This error is also non cumulative from step to step. The
accuracy of the stepper motor is mainly a function of the mechanical precision of its parts
and assembly.
Fig15: Positional accuracy of a stepper motor

7.12 Torque versus Speed Characteristics:
The torque versus speed characteristics are the key to selecting the right motor and drive
method for a specific application. These characteristics are dependent upon (change with)
the motor, excitation mode and type of driver or drive method.
Fig16: Torque versus speed characteristics

7.13 Single Step Response and Resonances:
Stepper motors can often exhibit a phenomena referred to as resonance at certain step
rates. This can be seen as a sudden loss or drop in torque at certain speeds which can
result in missed steps or loss of synchronism. It occurs when the input step pulse rate
coincides with the natural oscillation frequency of the rotor. Often there is a resonance
area around the 100 200 pps region and also one in the high step pulse rate region. The
resonance phenomenon of a stepper motor comes from its basic construction and
therefore it is not possible to eliminate it completely. It is also dependent upon the load
conditions. It can be reduced by driving the motor in half or micro stepping modes.
Fig17: Single step response versus time
7.14 Definitions related to stepper motor:

1. Step angle:
Step angle is associated with the internal construction of the motor, in particular the
number of teeth on the stator and the rotor.
The step angle is the minimum degree of rotation associated with a single step.
Step angle
0.72
1.8
2.0
2.5
5.0
7.5
15
Steps per Revolution

500
200
180
144
72
48
24
Table 2: Stepper motor step angles

2. Steps per second and rpm relation:
The relation between rpm (revolutions per minute), steps per revolution and steps per
second is as follows:
Steps per second = (rpm*steps per revolution)/60
3. Motor speed:
The motor speed, measured in steps per second (steps/sec) is a function of the switching
rate.
4. Holding torque:
The AT
amount
of torque, from an external source, required to break away the shaft from its
89C51
holding position with the motor shaft standstill or zero rpm condition.
7.15 STEPPER MOTOR INTERFACING WITH MICROCONTROLLER:
P1.0
BLOCK DIAGRAM:
P1.1
P1.2
P1.3
16
2
3
4
5
6
7
8
L
N
2
0
0
3
15
14
13
12
11
10
9
Ground
STEPPER
MOTOR
Vcc
CHAPTER-8
RELAYS
A relay is an electrically controllable switch widely used in industrial controls,
automobiles and appliances.
The relay allows the isolation of two separate sections of a system with two different
voltage sources i.e., a small amount of voltage/current on one side can handle a large
amount of voltage/current on the other side but there is no chance that these two voltages
mix up.
Fig18: Circuit symbol of a relay
8.1 Operation:
When a current flow through the coil, a magnetic field is created around the coil i.e., the
coil is energized. This causes the armature to be attracted to the coil. The armatures
contact acts like a switch and closes or opens the circuit. When the coil is not energized, a
spring pulls the armature to its normal state of open or closed. There are all types of
relays for all kinds of applications.
Fig19: Relay Operation and use of protection diodes
Transistors and ICs must be protected from the brief high voltage 'spike' produced when
the relay coil is switched off. The above diagram shows how a signal diode (eg 1N4148)
is connected across the relay coil to provide this protection. The diode is connected
'backwards' so that it will normally not conduct. Conduction occurs only when the relay
coil is switched off, at this moment the current tries to flow continuously through the coil
and it is safely diverted through the diode. Without the diode no current could flow and
the coil would produce a damaging high voltage 'spike' in its attempt to keep the current
flowing.
In choosing a relay, the following characteristics need to be considered:
1. The contacts can be normally open (NO) or normally closed (NC). In the NC type, the
contacts are closed when the coil is not energized. In the NO type, the contacts are closed
when the coil is energized.
2. There can be one or more contacts. i.e., different types like SPST (single pole single
throw), SPDT (single pole double throw) and DPDT (double pole double throw) relay.
3. The voltage and current required to energize the coil. The voltage can vary from a few
volts to 50 volts, while the current can be from a few milliamps to 20milliamps. The relay
has a minimum voltage, below which the coil will not be energized. This minimum
voltage is called the pull-in voltage.
4. The minimum DC/AC voltage and current that can be handled by the contacts. This is
in the range of a few volts to hundreds of volts, while the current can be from a few amps
to 40A or more, depending on the relay.
8.2 DRIVING A RELAY:
. In order to operate more than one relay, ULN2003 can be connected between An SPDT
relay consists of five pins, two for the magnetic coil, one as the common terminal and the
last pins as normally connected pin and normally closed pin. When the current flows
through this coil, the coil gets energized. Initially when the coil is not energized, there
will be a connection between the common terminal and normally closed pin. But when
the coil is energized, this connection breaks and a new connection between the common
terminal and normally open pin will be established. Thus when there is an input from the
microcontroller to the relay, the relay will be switched on. Thus when the relay is on, it
can drive the loads connected between the common terminals and normally open pin.
Therefore, the relay takes 5V from the microcontroller and drives the loads which
consume high currents. Thus the relay acts as an isolation device.
Digital systems and microcontroller pins lack sufficient current to drive the relay. While
the relays coil needs around 10milli amps to be energized, the microcontrollers pin can
provide a maximum of 1-2milli amps current. For this reason, a driver such as ULN2003
or a power transistor is placed in between the microcontroller and the relay and
microcontroller.
8.3RELAY INTERFACING WITH THE MICROCONTROLLER:

BLOCK DIAGRAM:
AT 89C51
P1.0
Gnd
16
2
3
4
5
6
7
8
L
N
2
0
0
3
15
14
13
12
11
10
9
RELAY
Vcc
LOAD
CHAPTER-9
DISPLAY COMPONENTS
9.1 LIGHT DEPENDENT RESISTOR:
LDRs or Light Dependent Resistors are very useful especially in light/dark sensor
circuits. Normally the resistance of an LDR is very high, sometimes as high as 1,000,000
ohms, but when they are illuminated with light, the resistance drops dramatically.
Thus in this project, LDR plays an important role in controlling the electrical appliances
based on the intensity of light i.e., if the intensity of light is more (during daytime) the
loads will be in off condition. And if the intensity of light is less (during nights), the loads
will be switched on.
9.2 LIQUID CRYSTAL DISPLAY:
LCD stands for Liquid Crystal Display. LCD is finding wide spread use replacing LEDs
(seven segment LEDs or other multi segment LEDs) because of the following reasons:
1.
The declining prices of LCDs.
2.
The ability to display numbers, characters and graphics. This is in contrast to
LEDs, which are limited to numbers and a few characters.

3.
Incorporation of a refreshing controller into the LCD, thereby relieving the CPU
of the task of refreshing the LCD. In contrast, the LED must be refreshed by the CPU to
keep displaying the data.
4.
Ease of programming for characters and graphics.
These components are specialized for being used with the microcontrollers, which
means that they cannot be activated by standard IC circuits. They are used for writing
different messages on a miniature LCD.
Function
Ground
Power supply
Contrast
Pin
Number
1
2
3
Control of
operating
Data / commands
Name
Vss
Vdd
Vee
RS
R/W
7
8
9
10
11
12
13
14
D0
D1
D2
D3
D4
D5
D6
D7
Logic
State
-
Description
0V
+5V
0 - Vdd
D0 D7 are interpreted as
0
commands
1
D0 D7 are interpreted as data
Write data (from controller to
0
LCD)
1
Read data (from LCD to
controller)
0
Access to LCD disabled
1
Normal operating
From 1 to Data/commands are transferred to
0
LCD
0/1
Bit 0 LSB
0/1
Bit 1
0/1
Bit 2
0/1
Bit 3
0/1
Bit 4
0/1
Bit 5
0/1
Bit 6
0/1
Bit 7 MSB
A model described here is for its low price and great possibilities most frequently used in
practice. It is based on the HD44780 microcontroller (Hitachi) and can display messages
in two lines with 16 characters each. It displays all the alphabets, Greek letters,
punctuation marks, mathematical symbols etc. In addition, it is possible to display
symbols that user makes up on its own. Automatic shifting message on display (shift left
and right), appearance of the pointer, backlight etc. are considered as useful
characteristics.
9.2.1 Pins Functions
There are pins along one side of the small printed board used for connection to the
microcontroller. There are total of 14 pins marked with numbers (16 in case the
background light is built in). Their function is described in the table below:
9.2.2 LCD screen:
LCD screen consists of two lines with 16 characters each. Each character consists of 5x7
dot matrix. Contrast on display depends on the power supply voltage and whether
messages are displayed in one or two lines. For that reason, variable voltage 0-Vdd is
applied on pin marked as Vee. Trimmer potentiometer is usually used for that purpose.
Some versions of displays have built in backlight (blue or green diodes). When used
during operating, a resistor for current limitation should be used (like with any LE diode).
9.2.3 LCD Basic Commands:
All data transferred to LCD through outputs D0-D7 will be interpreted as commands or
as data, which depends on logic state on pin RS:
RS = 1 - Bits D0 - D7 are addresses of characters that should be displayed. Built in
processor addresses built in map of characters and displays corresponding symbols.
Displaying position is determined by DDRAM address. This address is either previously
defined or the address of previously transferred character is automatically incremented.
RS = 0 - Bits D0 - D7 are commands which determine display mode. List of commands
which LCD recognizes are given in the table below:
Command
Clear display
Cursor home
Entry mode set
Display on/off control
Cursor/Display Shift
RS
RW
0
0
0
0
0
0
0
0
0
0
D7 D6 D5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D4
D3
D2
D1
D0
0
0
0
0
1
0
0
0
1
D/C
0
0
1
D
R/L
0
1
I/D
U
x
1
x
S
B
x
Execution
Time
1.64mS
1.64mS
40uS
40uS
40uS
Function set
Set CGRAM address
0
0
0
0
0
0
Set DDRAM address
DDRAM address
40uS
BF
DDRAM address
D7 D6 D5
D4
D3
D2
D1
D0
40uS
D7 D6 D5
D4
D3
D2
D1
D0
40uS
Read BUSY flag

(BF)
Write to CGRAM or
DDRAM
Read from CGRAM

or DDRAM
0
1
DL
N
F
x
CGRAM address
Table3: List of commands which LCD recognizes
I/D 1 = Increment (by 1)

0 = Decrement (by 1)
S 1 = Display shift on
0 = Display shift off
R/L 1 = Shift right

0 = Shift left
DL 1 = 8-bit interface
0 = 4-bit interface
D 1 = Display on
N 1 = Display in two lines
0 = Display off
0 = Display in one line
U 1 = Cursor on
F 1 = Character format 5x10 dots
0 = Cursor off
0 = Character format 5x7 dots
B 1 = Cursor blink on
0 = Cursor blink off
9.2.4 LCD Connection:
D/C 1 = Display shift

0 = Cursor shift
40uS
40uS
Depending on how many lines are used for connection to the microcontroller, there are 8bit and 4-bit LCD modes. The appropriate mode is determined at the beginning of the
process in a phase called initialization. In the first case, the data are transferred through
outputs D0-D7 as it has been already explained. In case of 4-bit LED mode, for the sake
of saving valuable I/O pins of the microcontroller, there are only 4 higher bits (D4-D7)
used for communication, while other may be left unconnected.
Consequently, each data is sent to LCD in two steps: four higher bits are sent first (that
normally would be sent through lines D4-D7), four lower bits are sent afterwards. With
the help of initialization, LCD will correctly connect and interpret each data received.
Besides, with regards to the fact that data are rarely read from LCD (data mainly are
transferred from microcontroller to LCD) one more I/O pin may be saved by simple
connecting R/W pin to the Ground. Such saving has its price. Even though message
displaying will be normally performed, it will not be possible to read from busy flag since
it is not possible to read from display.
9.2.5 LCD Initialization:
Once the power supply is turned on, LCD is automatically cleared. This process lasts for
approximately 15mS. After that, display is ready to operate. The mode of operating is set
by default. This means that:
1. Display is cleared
2. Mode
DL = 1 Communication through 8-bit interface
N = 0 Messages are displayed in one line
F = 0 Character font 5 x 8 dots
3. Display/Cursor on/off
D = 0 Display off
U = 0 Cursor off
B = 0 Cursor blink off
4. Character entry
ID = 1 Addresses on display are automatically incremented by 1
S = 0 Display shift off

Automatic reset is mainly performed without any problems. Mainly but not always! If for
any reason power supply voltage does not reach full value in the course of 10mS, display
will start perform completely unpredictably. If voltage supply unit can not meet this
condition or if it is needed to provide completely safe operating, the process of
initialization by which a new reset enabling display to operate normally must be applied.
Algorithm according to the initialization is being performed depends on whether
connection to the microcontroller is through 4- or 8-bit interface. All left over to be done
after that is to give basic commands and of course- to display messages.
Fig 20: Procedure on 8-bit initialization.
9.2.6 LCD INTERFACING WITH THE MICROCONTROLLER:

BLOCK DIAGRAM:
P2.0
P2.1
P2.2
4 (RS)
5 (R/W)
6(EN)
Vcc
1
2
3
LCD
Gnd
PRESET
(CONTRAST
CONTROL)
89C51
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
D0
D1
D2
D3
D4
D5
D6
D7
15
16
Vcc
Gnd
FOR
BACKLIGHT
PURPOSE
CHAPTER-10
SWITCH AND LED INTERFACING WITH THE

MICROCONTROLLER:
Switches and LEDs are the most widely used input/output devices of the 8051.
10.1 SWITCH INTERFACING:
CPU accesses the switches through ports. Therefore these switches are connected to a
microcontroller. This switch is connected between the supply and ground terminals. A
single microcontroller (consisting of a microprocessor, RAM and EEPROM and several
ports all on a single chip) takes care of hardware and software interfacing of the switch.
These switches are connected to an input port. When no switch is pressed, reading the
input port will yield 1s since they are all connected to high (Vcc). But if any switch is
pressed, one of the input port pins will have 0 since the switch pressed provides the path
to ground. It is the function of the microcontroller to scan the switches continuously to
detect and identify the switch pressed.
The switches that we are using in our project are 4 leg micro switches of momentary
type.
Vcc
R
P2.0
Fig21: Interfacing switch with the microcontroller
Thus now the two conditions are to be remembered:

1.
When the switch is open, the total supply i.e., Vcc appears at the port pin P2.0
P2.0 = 1
2.
When the switch is closed i.e., when it is pressed, the total supply path is
provided to ground. Thus the voltage value at the port pin P2.0 will be zero.
P2.0 = 0
By reading the pin status, the microcontroller identifies whether the switch is pressed or
not. When the switch is pressed, the corresponding related to this switch press written in
the program will be executed.
10.2 LED INTERFACING:
LED stands for Light Emitting Diode.
Microcontroller port pins cannot drive these LEDs as these require high currents to
switch on. Thus the positive terminal of LED is directly connected to Vcc, power supply
and the negative terminal is connected to port pin through a current limiting resistor.
This current limiting resistor is connected to protect the port pins from sudden flow of
high currents from the power supply.
Thus in order to glow the LED, first there should be a current flow through the LED. In
order to have a current flow, a voltage difference should exist between the LED
terminals. To ensure the voltage difference between the terminals and as the positive
terminal of LED is connected to power supply Vcc, the negative terminal has to be
connected to ground. Thus this ground value is provided by the microcontroller port pin.
This can be achieved by writing an instruction CLR P1.0. With this, the port pin P1.0 is
initialized to zero and thus now a voltage difference is established between the LED
terminals and accordingly, current flows and therefore the LED glows. LED and switches
can be connected to any one of the four port pins.
Vcc
P1.0
Fig22: LED interfacing with the microcontroller
Fig23: Schematic diagram
ADVANTAGES:
A major advantage of a lighting control system over conventional

individual switching
Switching is the ability to control any light, group of lights, or all lights in a
building from a single user interface device.
Any light or device can be controlled from any location.
Reduces emission carbon footprints.
A lighting scene can create dramatic changes in atmosphere, for a residence or

the stage, by a simple button press
APPLICATIONS:
Used in In landscape design
landscape lighting
fountain pumps
water spa heating
swimming pool covers
motorized gates
outdoor fireplace ignition can be remotely or automatically controlled
CONCLUSION
CONCLUSION
Our project is a standalone AUTOMATIC ROOM LIGHT CONTROL WITH VISITOR
COUNTING FOR POWER SAVING APPLICATIONS IN SEMINAR HALLS . Use of
embedded technology makes this closed loop feedback control system efficient and
reliable. Micro controller (AT89S52) allows dynamic and faster control. Liquid crystal
display (LCD) makes the system user-friendly. AT89S52 micro controller is the heart of
the circuit as it controls all the functions.
RESULTS
RESULT
LDR is placed outside the room and is used to identify whether it is day or night time.
Whenever a person tries to enter into the room, the receiver of first IR pair identifies the
person. Then the microcontroller opens the door by rotating the stepper motor. After the
person had entered into the room completely, the door will be closed automatically. The
light is switched off even if anyone is present inside the room during the day time. The
light is switched off even if anyone is present inside the room during the day time.
Similarly, the light is switched off if no one is there inside the room or if it is night times.
Thus, depending on the intensity of light and the surrounding temperature, the required
action is performed by the microcontroller. LCD displays the number of persons present
inside the room.
REFERENCES
REFERENCES:
1.
Embedded System By Raj Kamal
2.
8052 Microcontroller And Embedded Systems By Mazzidi
3.
Embedded real time systems By Dr. K.V.K.K.Prasad
4.
8086 micro processor interfacing By A.K.Roy
APPENDIX
Features
Compatible with MCS-51 Products

8K Bytes of In-System Programmable (ISP) Flash Memory
Endurance: 1000 Write/Erase Cycles
4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz
Three-level Program Memory Lock
256 x 8-bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Eight Interrupt Sources
Full Duplex UART Serial Channel
Low-power Idle and Power-down Modes
Interrupt Recovery from Power-down Mode
Watchdog Timer
Dual Data Pointer
Power-off Flag
Description
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K
bytes of in-system programmable Flash memory. The device is manufactured using
Atmels high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on
a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a
highly-flexible and cost-effective solution to many embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes
of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a
six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt
or hardware reset.
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
AT89S52
Rev. 1919A-07/01
AT89S52
Pin Configurations
Block
Diagram
PLCC
P2.0 - P2.7
P0.0 - P0.7
VCC
PORT 0 DRIVERS
GND
RAM ADDR.
REGISTER
B
REGISTER
PORT 0
LATCH
RAM
PORT 2 DRIVERS
(MOSI) P1.5
7
(MISO) P1.6
8
(SCK) P1.7 9
RST 10
PORT11
2
(RXD) P3.0
LATCH
NC
12
(TXD) P3.1 13
(INT0) P3.2 14
(INT1) P3.3 15
(T0) P3.4 16
(T1) P3.5 17
FLASH
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
PROGRAM
ADDRESS
REGISTER
STACK
POINTER
ACC
39
38
37
36
35
34
33
32
31
30
29
BUFFER
TMP2
TMP1
TQFP
P1.1 (T2 EX)
P1.0 (T2)
P1.4
P1.3
P1.2
NC
ALU
VCC
INTERRUPT, SERIAL PORT,

AND TIMER BLOCKS
44 43 42 41 40 39 38 37 36 35 34
(MOSI) P1.5
(MISO) P1.6
(SCK) P1.7
RST
(RXD) P3.0
PSEN NC
(TXD) P3.1
ALE/PROG
(INT0) P3.2
EA / V PP
(INT1) P3.3
RSTP3.4
(T0)
(T1) P3.5
1
2
3
4
5
6
7
8
9
10
11
TIMING
AND
CONTROL
PC
INCREMENTER
P0.0
P0.1
(AD0)
(AD1)
33
32
31
30
29
28
27
INSTRUCTION
REGISTER 26
25
24
23
PROGRAM
COUNTER
P0.4 (AD4)
P0.5 (AD5)
PSW
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
WATCH
12 13 14 15 16 17 18 19
20 21 22
DOG
PORT 3
LATCH
DUAL DPTR
PORT 1
LATCH
ISP
PORT
PROGRAM
LOGIC
OSC
PORT 3 DRIVERS
P3.0 - P3.7
AT89S52
PORT 1 DRIVERS
P1.0 - P1.7
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an
output port, each pin can sink eight TTL inputs. When 1s
are written to port 0 pins, the pins can be used as highimpedance inputs.
Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external
program and data memory. In this mode, P0 has internal
pullups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program
verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups.
The Port 1 output buffers can sink/source four TTL inputs.
When 1s are written to Port 1 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 1 pins that are externally being pulled low will source
current (I IL) because of the internal pullups.
In addition, P1.0 and P1.1 can be configured to be the
timer/counter 2 external count input (P1.0/T2) and the
timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
Port 1 also receives the low-order address bytes during
Flash programming and verification.
Port Pin
Alternate Functions
P1.0
Port 2
current (I IL) because of the internal pullups.
Port 2 emits the high-order address byte during fetches
from external program memory and during accesses to
4
AT89S52
external data memory that use 16-bit addresses (MOVX @

DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data
memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.
Port 3
current (IIL) because of the pullups.
Port 3 also serves the functions of various special features
of the AT89S52, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles while
the oscillator is running resets the device. This pin drives
High for 96 oscillator periods after the Watchdog times out.
The DISRTO bit in SFR AUXR (address 8EH) can be used
to disable this feature. In the default state of bit DISRTO,
the RESET HIGH out feature is enabled.
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching
the low byte of the address during accesses to external
memory. This pin is also the program pulse input (PROG)
during Flash programming.
In normal operation, ALE is emitted at a constant rate of
1/6 the oscillator frequency and may be used for external
timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data
memory.
If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
AT89S52
weakly pulled high. Setting the ALE-disable bit has no
effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory.
When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during
each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be

internally latched on reset.
EA should be strapped to V CC for internal program executions.
This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Table 1. AT89S52 SFR Map and Reset Values

0F8H
0F0H
0FFH
B
00000000
0F7H
0E8H
0E0H
0EFH
ACC
00000000
0E7H
0D8H
0DFH
0D0H
PSW
00000000
0C8H
T2CON
00000000
0D7H
T2MOD
XXXXXX00
RCAP2L
00000000
RCAP2H
00000000
TL2
00000000
TH2
00000000
0CFH
0C0H
0C7H
0B8H
IP
XX000000
0BFH
0B0H
P3
11111111
0B7H
0A8H
IE
0X000000
0AFH
0A0H
P2
11111111
AUXR1
XXXXXXX0
WDTRST
XXXXXXXX
98H
SCON
00000000
90H
P1
11111111
88H
TCON
00000000
TMOD
00000000
TL0
00000000
TL1
00000000
TH0
00000000
TH1
00000000
80H
P0
11111111
SP
00000111
DP0L
00000000
DP0H
00000000
DP1L
00000000
DP1H
00000000
0A7H
SBUF
XXXXXXXX
9FH
97H
AUXR
XXX00XX0
8FH
PCON
0XXX0000
87H
Special Function Registers

A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future products to invoke
new features. In that case, the reset or inactive values of

the new bits will always be 0.
Timer 2 Registers: Control and status bits are contained in
registers T2CON (shown in Table 2) and T2MOD (shown in
Table 3) for Timer 2. The register pair (RCAP2H, RCAP2L)
are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers: The individual interrupt enable bits
are in the IE register. Two priorities can be set for each of
the six interrupt sources in the IP register.
Table 2. T2CON Timer/Counter 2 Control Register

T2CON Address = 0C8H
Reset Value = 0000 0000B
Bit Addressable
Bit
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
Symbol
Function
TF2
Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software. TF2 will not be set when
either
RCLK
or
TCLK
= 1. = 1
EXF2
Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and
EXEN2Timer
= 1. 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2 interrupt routine.
When
EXF2 must
be
cleared
by software.
EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1).
RCLK
Receive clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its receive clock in
serial port
Modes
1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive clock.
TCLK
Transmit clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its transmit clock
in serial1port
Modes
and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock.
EXEN2
Timer 2 external enable. When set, allows a capture or reload to occur as a result of a negative transition on
T2EX
Timer used to clock the serial port. EXEN2 = 0 causes Timer 2 to ignore events at T2EX.
2
is notif being
TR2
Start/Stop control for Timer 2. TR2 = 1 starts the timer.
C/T2
Timer or counter select for Timer 2. C/T2 = 0 for timer function. C/T2 = 1 for external event counter (falling
edge triggered).
Capture/Reload select. CP/RL2 = 1 causes captures to occur on negative transitions at T2EX if EXEN2 = 1.
CP/RL2automatic
=0
causes
reloads to occur when Timer 2 overflows or negative transitions occur at T2EX when
EXEN2RCLK
= 1. When
either
or TCLK = 1, this bit is ignored and the timer is forced to auto-reload on Timer 2 overflow.
CP/RL2
AT89S52
AT89S52
Table 3a. AUXR: Auxiliary Register
AUXR
Address = 8EH
Reset Value = XXX00XX0B
Not Bit Addressable
Bit
Reserved for future expansion
DISALE
Disable/Enable ALE
DISRTO
WDIDLE
4
DISRTO
DISALE
Operating Mode
ALE is emitted at a constant rate of 1/6 the oscillator frequency
ALE is active only during a MOVX or MOVC instruction
DISALE
0
Disable/Enable Reset out

DISRTO
WDIDLE
Reset pin is driven High after WDT times out
Reset pin is input only
Disable/Enable WDT in IDLE mode

WDIDLE
0
WDT continues to count in IDLE mode
WDT halts counting in IDLE mode
Dual Data Pointer Registers: To facilitate accessing both

internal and external data memory, two banks of 16-bit
Data Pointer Registers are provided: DP0 at SFR address
locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0
in SFR AUXR1 selects DP0 and DPS = 1 selects DP1.
The user should always initialize the DPS bit to the
appropriate value before accessing the respective Data

Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit
4 (PCON.4) in the PCON SFR. POF is set to 1 during
power up. It can be set and rest under software control and
is not affected by reset.
Table 3b. AUXR1: Auxiliary Register 1

AUXR1
Address = A2H
Reset Value = XXXXXXX0B
Not Bit Addressable
Bit
Reserved for future expansion
DPS
Data Pointer Register Select
DPS
1
DPS
0
Selects DPTR Registers DP0L, DP0H
Selects DPTR Registers DP1L, DP1H
Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external
Program and Data Memory can be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are
directed to external memory.
On the AT89S52, if EA is connected to V CC , program
fetches to addresses 0000H through 1FFFH are directed to
internal memory and fetches to addresses 2000H through
FFFFH are to external memory.
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The
upper 128 bytes occupy a parallel address space to the
Special Function Registers. This means that the upper 128
bytes have the same addresses as the SFR space but are
physically separate from SFR space.
AT89S52
When an instruction accesses an internal location above

address 7FH, the address mode used in the instruction
specifies whether the CPU accesses the upper 128 bytes
of RAM or the SFR space. Instructions which use direct
addressing access of the SFR space.
For example, the following direct addressing instruction
accesses the SFR at location 0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper

128 bytes of RAM. For example, the following indirect
addressing instruction, where R0 contains 0A0H, accesses
the data byte at address 0A0H, rather than P2 (whose
address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect

addressing, so the upper 128 bytes of data RAM are available as stack space.
AT89S52
Watchdog Timer
(One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations
where the CPU may be subjected to software upsets. The
WDT consists of a 13-bit counter and the Watchdog Timer
Reset (WDTRST) SFR. The WDT is defaulted to disable
from exiting reset. To enable the WDT, a user must write
01EH and 0E1H in sequence to the WDTRST register
(SFR location 0A6H). When the WDT is enabled, it will
increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external
clock frequency. There is no way to disable the WDT
except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output
RESET HIGH pulse at the RST pin.
Using the WDT

To enable the WDT, a user must write 01EH and 0E1H in
sequence to the WDTRST register (SFR location 0A6H).
When the WDT is enabled, the user needs to service it by
writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 13-bit counter overflows when it reaches 8191
(1FFFH), and this will reset the device. When the WDT is
enabled, it will increment every machine cycle while the
oscillator is running. This means the user must reset the
WDT at least every 8191 machine cycles. To reset the
WDT the user must write 01EH and 0E1H to WDTRST.
WDTRST is a write-only register. The WDT counter cannot
be read or written. When WDT overflows, it will generate an
output RESET pulse at the RST pin. The RESET pulse
duration is 96xTOSC, where TOSC=1/FOSC. To make the
best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the
time required to prevent a WDT reset.
WDT During Power-down and Idle

In Power-down mode the oscillator stops, which means the
WDT also stops. While in Power-down mode, the user
does not need to service the WDT. There are two methods
of exiting Power-down mode: by a hardware reset or via a
level-activated external interrupt which is enabled prior to
entering Power-down mode. When Power-down is exited
with hardware reset, servicing the WDT should occur as it
normally does whenever the AT89S52 is reset. Exiting
Power-down with an interrupt is significantly different. The
interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is
serviced. To prevent the WDT from resetting the device
while the interrupt pin is held low, the WDT is not started
until the interrupt is pulled high. It is suggested that the
WDT be reset during the interrupt service for the interrupt
used to exit Power-down mode.
To ensure that the WDT does not overflow within a few

states of exiting Power-down, it is best to reset the WDT
just before entering Power-down mode.
Before going into the IDLE mode, the WDIDLE bit in SFR
AUXR is used to determine whether the WDT continues to
count if enabled. The WDT keeps counting during IDLE
(WDIDLE bit = 0) as the default state. To prevent the WDT
from resetting the AT89S52 while in IDLE mode, the user
should always set up a timer that will periodically exit IDLE,
service the WDT, and reenter IDLE mode.
With WDIDLE bit enabled, the WDT will stop to count in
IDLE mode and resumes the count upon exit from IDLE.
UART
The UART in the AT89S52 operates the same way as the
UART in the AT89C51 and AT89C52. For further information on the UART operation, refer to the ATMEL Web site
(http://www.atmel.com). From the home page, select Products, then 8051-Architecture Flash Microcontroller, then
Product Overview.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way
as Timer 0 and Timer 1 in the AT89C51 and AT89C52. For
further information on the timers operation, refer to the
ATMEL Web site (http://www.atmel.com). From the home
page, select Products, then 8051-Architecture Flash
Microcontroller, then Product Overview.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either
a timer or an event counter. The type of operation is
selected by bit C/T2 in the SFR T2CON (shown in Table 2).
Timer 2 has three operating modes: capture, auto-reload
(up or down counting), and baud rate generator. The
modes are selected by bits in T2CON, as shown in Table 3.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the
Timer function, the TL2 register is incremented every
machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator
frequency.
Table 3. Timer 2 Operating Modes
In the Counter function, the register is incremented in

response to a 1-to-0 transition at its corresponding external
input pin, T2. In this function, the external input is sampled
during S5P2 of every machine cycle. When the samples
show a high in one cycle and a low in the next cycle, the
count is incremented. The new count value appears in the
register during S3P1 of the cycle following the one in which
the transition was detected. Since two machine cycles (24
oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least
once before it changes, the level should be held for at least
one full machine cycle.
Capture Mode
In the capture mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer
or counter which upon overflow sets bit TF2 in T2CON.
This bit can then be used to generate an interrupt. If

EXEN2 = 1, Timer 2 performs the same operation, but a 1to-0 transition at external input T2EX also causes the
current value in TH2 and TL2 to be captured into RCAP2H
and RCAP2L, respectively. In addition, the transition at
T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit,
like TF2, can generate an interrupt. The capture mode is
illustrated in Figure 5.
Auto-reload (Up or Down Counter)

Timer 2 can be programmed to count up or down when
configured in its 16-bit auto-reload mode. This feature is
invoked by the DCEN (Down Counter Enable) bit located in
the SFR T2MOD (see Table 4). Upon reset, the DCEN bit
is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on
the value of the T2EX pin.
Figure 5. Timer in Capture Mode

12
OSC
C/T2 = 0
TH2
C/T2 = 1
TR2
TL2
OVERFLOW
CONTROL
CAPTURE
T2 PIN
RCAP2H
RCAP2L
TRANSITION
DETECTOR
TIMER 2
INTERRUPT
T2EX PIN
EXF2
EXEN2
CONTROL
Figure 6 shows Timer 2 automatically counting up when

DCEN=0. In this mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to
0FFFFH and then sets the TF2 bit upon overflow. The
overflow also causes the timer registers to be reloaded with
the 16-bit value in RCAP2H and RCAP2L. The values in
Timer in Capture ModeRCAP2H and RCAP2L are preset
by software. If EXEN2 = 1, a 16-bit reload can be triggered
either by an overflow or by a 1-to-0 transition at external
input T2EX. This transition also sets the EXF2 bit. Both the
TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down,
as shown in Figure 6. In this mode, the T2EX pin controls
10
TF2
AT89S52
the direction of the count. A logic 1 at T2EX makes Timer 2

count up. The timer will overflow at 0FFFFH and set the
TF2 bit. This overflow also causes the 16-bit value in
RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively.
A logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal the values stored in
RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or
underflows and can be used as a 17th bit of resolution. In
this operating mode, EXF2 does not flag an interrupt.
AT89S52
Figure 6. Timer 2 Auto Reload Mode (DCEN = 0)
12
OSC
C/T2 = 0
TH2
TL2
OVERFLOW
CONTROL
TR2
C/T2 = 1
RELOAD
T2 PIN
RCAP2H
TIMER 2
INTERRUPT
RCAP2L
TF2
TRANSITION
DETECTOR
EXF2
T2EX PIN
CONTROL
EXEN2
Table 4. T2MOD Timer 2 Mode Control Register

T2MOD Address = 0C9H
Reset Value = XXXX XX00B
Not Bit Addressable

T2OE
Bit
DCEN
6
Symbol
Function
Not implemented, reserved for future
T2OE
Timer 2 Output Enable bit
DCEN
When set, this bit allows Timer 2 to be configured as an up/down counter
11
AT89S52
AT89S52
Figure
TimerGenerator
2 Auto Reload Mode (DCEN = 1)
Baud7.Rate
TOGGLE
Timer 2 is selected as the baud rate generator by (DOWN
settingCOUNTING
increments
every state time (at
1/2 the oscillator freRELOAD VALUE)
TCLK and/or RCLK in T2CON (Table 2). Note that the 0FFHquency).
The
baud
rate
formula
is
given below.
0FFH
EXF2
baud rates for transmit and receive can be different if Timer
2 is used for the receiver or transmitter and Timer 1 is used
Modes 1 and 3
Oscillator Frequency
for the other function. Setting RCLK and/or TCLK puts
--------------------------------------- = -------------------------------------------------------------------------------------Baud Rate
32 x [65536-RCAP2H,RCAP2L)]
Timer 2 into
its
baud
rate
generator
mode,
as
shown
in
FigOSC
OVERFLOW
12
ure 8.
C/T2 = 0
The baud rate generator mode is similar to the auto-reload TH2
TL2
TF2
mode, in that a rollover in TH2 causes the Timer 2 registers
where (RCAP2H, RCAP2L) is the content of RCAP2H and
to be reloaded with the 16-bit value in registers CONTROL
RCAP2H
RCAP2L taken as a 16-bit unsigned integer.
and RCAP2L, which are preset by software. TR2
Timer 2 as a baud rate generator is shown
TIMER 2in Figure 8. This
= 1
The baud rates in Modes 1 and 3 C/T2
are determined
by Timer
INTERRUPT
figure is valid only if RCLK or TCLK
= 1 in T2CON. Note
2s overflow rate according
T2 PINto the following equation.
that a rollover in TH2 does not set TF2 and will not generate RCAP2L
an interrupt. Note too, that if EXEN2 is set, a 1-to-0
RCAP2H
transition
in T2EX will setCOUNT
EXF2 but will not cause a reload
(UP COUNTING RELOAD VALUE)
DIRECTION
Timer
2
Overflow
Rate
from (RCAP2H, RCAP2L)1=UP
to (TH2, TL2). Thus, when Timer
Modes 1 and 3 Baud Rates = -----------------------------------------------------------16
2 is in use as a baud rate0=DOWN
generator, T2EX can be used as
an extra external interrupt.
T2EX
PINrunning (TR2 = 1) as a timer in
Note that when Timer
2 is
The Timer can be configured for either timer or counter
the baud rate generator mode, TH2 or TL2 should not be
Figure 8. Timer 2 in Baud Rate Generator Mode
operation. In most applications, it is configured for timer
read from or written to. Under these conditions, the Timer is
operation (CP/T2 = 0). The timer operation is different for
incremented every state TIMER
time, and
the results of a read or
1 OVERFLOW
Timer 2 when it is used as a baud rate generator. Normally,
write may not be accurate. The RCAP2 registers may be
as a timer, it increments every machine cycle (at 1/12 the
read but should not be written to, because a write might
oscillator frequency). As a baud rate generator, however, it
overlap a reload and cause write and/or reload errors. The
timer should be turned
2 off (clear TR2) before accessing the
Timer 2 or RCAP2 registers. "0"
"1"
NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12
Figure 9. Timer 2 in Clock-Out Mode

OSC
OSC
SMOD1
TL2
(8-BITS)
C/T2 = 0
TH2
(8-BITS)
"1"
TH2TR2
CONTROL
TR2
C/T2 = 1
"0"
TL2
RCLK
RCAP2L
C/T2 BIT
RCAP2H
"1"
"0"
T2 PIN
P1.0
(T2)
RCAP2H
16
P1.1
(T2EX)
Tx
CLOCK
T2OE (T2MOD.1)
TRANSITION
DETECTOR
T2EX PIN
TCLK
RCAP2L 2
TRANSITION
DETECTOR
16
Rx
CLOCK
EXF2
CONTROL
EXEN2
EXF2
TIMER 2
INTERRUPT
TIMER 2
INTERRUPT
EXEN2
12
13
Programmable Clock Out

A 50% duty cycle clock can be programmed to come out on
P1.0, as shown in Figure 9. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or
to output a 50% duty cycle clock ranging from 61 Hz to 4
MHz at a 16 MHz operating frequency.
To configure the Timer/Counter 2 as a clock generator, bit
C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1)
must be set. Bit TR2 (T2CON.2) starts and stops the timer.
The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers
(RCAP2H, RCAP2L), as shown in the following equation.
Table 5. Interrupt Enable (IE) Register
Clock-Out Frequency
In the clock-out mode, Timer 2 roll-overs will not generate

an interrupt. This behavior is similar to when Timer 2 is
used as a baud-rate generator. It is possible to use Timer 2
as a baud-rate generator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out
frequencies cannot be determined independently from one
another since they both use RCAP2H and RCAP2L.
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 10.
Each of these interrupt sources can be individually enabled
or disabled by setting or clearing a bit in Special Function
Register IE. IE also contains a global disable bit, EA, which
disables all interrupts at once.
Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also unimplemented. User software should not write 1s to these bit
positions, since they may be used in future AT89 products.
Timer 2 interrupt is generated by the logical OR of bits TF2
and EXF2 in register T2CON. Neither of these flags is
cleared by hardware when the service routine is vectored
to. In fact, the service routine may have to determine
whether it was TF2 or EXF2 that generated the interrupt,
and that bit will have to be cleared in software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at
S5P2 of the cycle in which the timers overflow. The values
are then polled by the circuitry in the next cycle. However,
the Timer 2 flag, TF2, is set at S2P2 and is polled in the
same cycle in which the timer overflows.
14
AT89S52
Figure 10. Interrupt Sources
AT89S52
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively,
of an inverting amplifier that can be configured for use as
an on-chip oscillator, as shown in Figure 11. Either a quartz
crystal or ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven, as shown in Figure 12.
There are no requirements on the duty cycle of the external
clock signal, since the input to the internal clocking circuitry
is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be
observed.
active long enough to allow the oscillator to restart

and stabilize.
Figure 11. Oscillator Connections
C2
XTAL2
C1
XTAL1
Idle Mode
GND
In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by
software. The content of the on-chip RAM and all the special functions registers remain unchanged during this
mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
Note that when idle mode is terminated by a hardware
reset, the device normally resumes program execution
from where it left off, up to two machine cycles before the
internal reset algorithm takes control. On-chip hardware
inhibits access to internal RAM in this event, but access to
the port pins is not inhibited. To eliminate the possibility of
an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that
invokes idle mode should not write to a port pin or to external memory.
Note:
C1, C2 = 30 pF 10 pF for Crystals

= 40 pF 10 pF for Ceramic Resonators
Figure 12. External Clock Drive Configuration
NC
XTAL2
EXTERNAL
OSCILLATOR
SIGNAL
XTAL1
Power-down Mode
GND
In the Power-down mode, the oscillator is stopped, and the

instruction that invokes Power-down is the last instruction
executed. The on-chip RAM and Special Function Registers retain their values until the Power-down mode is terminated. Exit from Power-down mode can be initiated either
by a hardware reset or by an enabled external interrupt.
Reset redefines the SFRs but does not change the on-chip
RAM. The reset should not be activated before V CC is
restored to its normal operating level and must be held
Table 6. Status of External Pins During Idle and Power-down Modes
Mode
Program Memory
ALE
PSEN
PORT0
PORT1
PORT2
PORT3
Idle
Internal
Data
Data
Data
Data
Idle
External
Float
Data
Address
Data
Power-down
Internal
Data
Data
Data
Data
Power-down
External
Float
Data
Data
Data
15
Program Memory Lock Bits

The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the following table.
Table 7. Lock Bit Protection Modes
Program Lock Bits
LB1
LB2
LB3
Protection Type
No program lock features
MOVC instructions executed

from external program
memory are disabled from
fetching code bytes from
internal memory, EA is
sampled and latched on reset,
and further programming of
the Flash memory is disabled
Same as mode 2, but verify is

also disabled
Same as mode 3, but external

execution is also disabled
When lock bit 1 is programmed, the logic level at the EA pin

is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random
value and holds that value until reset is activated. The
latched value of EA must agree with the current logic level
at that pin in order for the device to function properly.
Programming the Flash Parallel Mode

The AT89S52 is shipped with the on-chip Flash memory
array ready to be programmed. The programming interface
needs a high-voltage (12-volt) program enable signal and
is compatible with conventional third-party Flash or
EPROM programmers.
The AT89S52 code memory array is programmed byte-bybyte.
Programming Algorithm: Before programming the
AT89S52, the address, data, and control signals should be
set up according to the Flash programming mode table and
Figures 13 and 14. To program the AT89S52, take the following steps:
1. Input the desired memory location on the address
lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/V PP to 12V.
5. Pulse ALE/PROG once to program a byte in the
Flash array or the lock bits. The byte-write cycle is
self-timed and typically takes no more than 50 s.
16
AT89S52
Repeat steps 1 through 5, changing the address

and data for the entire array or until the end of the
object file is reached.
Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle. During a write cycle, an
attempted read of the last byte written will result in the complement of the written data on P0.7. Once the write cycle
has been completed, true data is valid on all outputs, and
the next cycle may begin. Data Polling may begin any time
after a write cycle has been initiated.
Ready/Busy: The progress of byte programming can also
be monitored by the RDY/BSY output signal. P3.0 is pulled
low after ALE goes high during programming to indicate
BUSY. P3.0 is pulled high again when programming is
done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been
programmed, the programmed code data can be read back
via the address and data lines for verification. The status of
the individual lock bits can be verified directly by reading
them back.
Reading the Signature Bytes: The signature bytes are
read by the same procedure as a normal verification of
locations 000H, 100H, and 200H, except that P3.6 and
P3.7 must be pulled to a logic low. The values returned are
as follows.
(000H) = 1EH indicates manufactured by Atmel
(100H) = 52H indicates 89S52
(200H) = 06H
Chip Erase: In the parallel programming mode, a chip
erase operation is initiated by using the proper combination
of control signals and by pulsing ALE/PROG low for a duration of 200 ns - 500 ns.
In the serial programming mode, a chip erase operation is
initiated by issuing the Chip Erase instruction. In this mode,
chip erase is self-timed and takes about 500 ms.
During chip erase, a serial read from any address location
will return 00H at the data output.
Programming the Flash Serial Mode

The Code memory array can be programmed using the
serial ISP interface while RST is pulled to V CC . The serial
interface consists of pins SCK, MOSI (input) and MISO
(output). After RST is set high, the Programming Enable
instruction needs to be executed first before other operations can be executed. Before a reprogramming sequence
can occur, a Chip Erase operation is required.
The Chip Erase operation turns the content of every memory location in the Code array into FFH.
Either an external system clock can be supplied at pin
XTAL1 or a crystal needs to be connected across pins
XTAL1 and XTAL2. The maximum serial clock (SCK)
AT89S52
frequency should be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK
frequency is 2 MHz.
Serial Programming Algorithm

To program and verify the AT89S52 in the serial programming mode, the following sequence is recommended:
1. Power-up sequence:
Apply power between VCC and GND pins.
Set RST pin to H.
If a crystal is not connected across pins XTAL1 and
XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds.
2. Enable serial programming by sending the Programming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 16.
3. The Code array is programmed one byte at a time
by supplying the address and data together with the
appropriate Write instruction. The write cycle is selftimed and typically takes less than 1 ms at 5V.
4. Any memory location can be verified by using the
Read instruction which returns the content at the
selected address at serial output MISO/P1.6.
5. At the end of a programming session, RST can be
set low to commence normal device operation.
Power-off sequence (if needed):
Set XTAL1 to L (if a crystal is not used).
Set RST to L.
Turn V CC power off.
Data Polling: The Data Polling feature is also available in
the serial mode. In this mode, during a write cycle an
attempted read of the last byte written will result in the complement of the MSB of the serial output byte on MISO.
Serial Programming Instruction Set

The Instruction Set for Serial Programming follows a 4-byte
protocol and is shown in Table 10.
17
Programming Interface Parallel Mode

Every code byte in the Flash array can be programmed by
using the appropriate combination of control signals. The
write operation cycle is self-timed and once initiated, will
automatically time itself to completion.
Table 8. Flash Programming Modes
Mode
Notes:
VCC
1.
2.
3.
4.
5.
RST
PSEN
ALE/
PROG
P2.6
P2.7
P3.3
P3.6
P3.7
P0.7-0
Data
P2.4-0
P1.7-0
Each PROG pulse is 200 ns - 500 ns for Chip Erase.

Each PROG pulse is 200 ns - 500 ns for Write Code Data.
Each PROG pulse is 200 ns - 500 ns for Write Lock Bits.
RDY/BSY signal is output on P3.0 during programming.
X = dont care.
Figure 13. Programming the Flash Memory

(Parallel Mode)
18
EA/
VPP
All major programming vendors offer worldwide support for

the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
AT89S52
Figure 14. Verifying the Flash Memory (Parallel Mode)
AT89S52
Flash Programming and Verification Characteristics (Parallel Mode)
TA= 20C to 30C, V
CC
= 4.5 to 5.5V
Symbol
Parameter
Min
Max
Units
VPP
Programming Supply Voltage
11.5
12.5
IPP
Programming Supply Current
10
mA
ICC
VCC Supply Current
30
mA
1/tCLCL
33
MHz
tAVGL
Address Setup to PROG Low
48tCLCL
tGHAX
Address Hold After PROG
48tCLCL
tDVGL
Data Setup to PROG Low
48tCLCL
tGHDX
Data Hold After PROG
48tCLCL
tEHSH
P2.7 (ENABLE) High to VPP
48tCLCL
tSHGL
VPP Setup to PROG Low
10
tGHSL
VPP Hold After PROG
10
tGLGH
PROG Width
0.2
tAVQV
Address to Data Valid
48tCLCL
tELQV
ENABLE Low to Data Valid
48tCLCL
tEHQZ
Data Float After ENABLE
tGHBL
PROG High to BUSY Low
tWC
Byte Write Cycle Time
48tCLCL
1.0
50
Figure 15. Flash Programming and Verification Waveforms Parallel Mode

PROGRAMMING
ADDRESS
P1.0 - P1.7
P2.0 - P2.5
P3.4
VERIFICATION
ADDRESS
tAVQV
PORT 0
DATA IN
tAVGL
tDVGL
tGHDX
DATA OUT
tGHAX
ALE/PROG
tSHGL
EA/VPP
P2.7
(ENABLE)
tGLGH
VPP
tGHSL
LOGIC 1
LOGIC 0
tEHSH
tEHQZ
tELQV
tGHBL
P3.0
(RDY/BSY)
BUSY
READY
tWC
19
Figure 16. Flash Memory Serial Downloading

VCC
AT89S52
VCC
INSTRUCTION
INPUT
P1.5/MOSI
DATA OUTPUT
P1.6/MISO
P1.7/SCK
CLOCK IN
XTAL2
3-33 MHz
XTAL1
RST
VIH
GND
Flash Programming and Verification Waveforms Serial Mode

Figure 17. Serial Programming Waveforms
20
AT89S52
AT89S52
Table 9. Serial Programming Instruction Set
Instruction
Format
Instruction
Byte 1
Byte 2
Byte 3
Byte 4
Operation
Programming Enable
1010 1100
0101 0011
xxxx xxxx
xxxx xxxx
0110 1001
(Output)
Enable Serial Programming

while RST is high
Chip Erase
1010 1100
100x xxxx
xxxx xxxx
xxxx xxxx
Chip Erase Flash memory

array
Read Program Memory

(Byte Mode)
0010 0000
xxx 2 A11
A10
A9A8
A1
D7D6D5D4 D3D2D1D0
Read data from Program

memory in the byte mode
Write Program Memory

(Byte Mode)
0100 0000
xxx 2 A11
0 A9A8
A1 A1
D7D6D5D4 D3D2D1D0
Write data to Program

memory in the byte mode
Write Lock Bits(2)
1010 1100
1110 00 B1B2
xxxx xxxx
xxxx xxxx
Write Lock bits. See Note (2).
Read Lock Bits
0010 0100
xxxx xxxx
xxxx xxxx
xxLB3LB2
1 xx
Read back current status of

the lock bits (a programmed
lock bit reads back as a 1)
Read Signature Bytes(1)
0010 1000
xxx A5A4A3A2A1A0
Signature Byte
Read Signature Byte
Read Program Memory

(Page Mode)
0011 0000
xxx 2 A11
A10
A9A8
Byte 0
Byte 1...
Byte 255
Read data from Program

memory in the Page Mode
(256 bytes)
Write Program Memory

(Page Mode)
0101 0000
xxx 2 A11
A10
A9A8
Byte 0
Byte 1...
Byte 255
Write data to Program

memory in the Page Mode
(256 bytes)
Notes:
A1
A1
A7A6A5A4A3A2A1A0
A7A6A5A4A3A2A1A0
xxx xxxx
LB
1. The signature bytes are not readable in Lock Bit Modes 3 and 4.
2. B1 = 0, B2 = 0 ---> Mode 1, no lock protection
Each of the lock bits needs to be activated sequentially before
B1 = 0, B2 = 1 ---> Mode 2, lock bit 1 activated
Mode 4 can be executed.
After Reset signal is high, SCK should be low for at least 64

system clocks before it goes high to clock in the enable
data bytes. No pulsing of Reset signal is necessary. SCK
should be no faster than 1/16 of the system clock at
XTAL1.
For Page Read/Write, the data always starts from byte 0 to

255. After the command byte and upper address byte are
latched, each byte thereafter is treated as data until all 256
bytes are shifted in/out. Then the next instruction will be
ready to be decoded.
21
Serial Programming Characteristics

Figure 18. Serial Programming Timing
22
AT89S52
MOSI
tOVSH
SCK
tSHOX
tSLSH
tSHSL
MISO
tSLIV
Table 10. Serial Programming Characteristics, T A= -40 C to 85 C, VCC = 4.0 - 5.5V (Unless otherwise noted)
Symbol
Parameter
Min
1/tCLCL
tCLCL
Oscillator Period
30
ns
tSHSL
SCK Pulse Width High
2 tCLCL
ns
tSLSH
SCK Pulse Width Low
2 tCLCL
ns
tOVSH
MOSI Setup to SCK High
tCLCL
ns
tSHOX
MOSI Hold after SCK High
2 tCLCL
ns
tSLIV
SCK Low to MISO Valid
tERASE
Chip Erase Instruction Cycle Time
tSWC
Serial Byte Write Cycle Time
10
Typ
16
Max
Units
33
MHz
32
ns
500
ms
64 tCLCL + 400
AT89S52
AC
Characteristics
Absolute
Maximum Ratings*
Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load
*NOTICE:
Stresses beyond those listed under Absolute
Operating
Temperature..................................
-55C to +125C
capacitance
for
outputs
= 80
pF.all other
Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
12 MHz Oscillator other conditions
Variable
Oscillator
Voltage on Any Pin
beyond
those indicated in the
with
Respect
to
Ground.....................................-1.0V
to
+7.0V
operational
sections
of this specification
isUnits
not
Symbol
Parameter
Min
Max
Min
Max
implied. Exposure to absolute maximum rating
1/t
Oscillator
Frequency
33 may affectMHz
Maximum
Operating
Voltage
............................................ 6.6V
CLCL
conditions for0 extended periods
device reliability.
tLHLL
ALE Pulse Width
127
2tCLCL -40
ns
DC Output Current...................................................... 15.0 mA
tAVLL
Address Valid to ALE Low
43
tCLCL -25
ns
External
Program and Data Memory
Characteristics
Storage Temperature.....................................
-65C to +150C
tLLAX Characteristics
Address Hold After ALE Low
DC
48
tCLCL -25
The
this
are valid for
tLLIVvalues shown
ALE in
Low
to table
Valid Instruction
In T =
A -40C to 85C and V
Symbol
tLLPL
Parameter
ALE
Low to PSEN Low
Condition
V
t IL
Input Low
Voltage
PSEN
Pulse
Width
V
t IL1
I
n to Valid
p
u
t In
PSEN
Low
Instruction
PLPH
PLIV
VIH
tPXIX
VIH1
tPXIZ
VOL
V
o
l
t
a
Input
High
(
E Voltage
AHold After
)
Input
Instruction
PSEN
Input High Voltage
Input Instruction Float After PSEN

(1)
Output Low Voltage
(Ports 1,2,3)
CC
=233
4.0V to 5.5V, unless otherwise
4tCLCLnoted.
-65
tCLCLMin
-25
43
x 205 c
L
o
w
g
e
0(Except. XTAL1,
50 RST)
0.2 VCC+0.9
59
PSEN to Address Valid
V
t OL1
Address
to Valid
Instruction
In
(Port 0, ALE,
PSEN
)
IOL = 3.2 mA
tPLAZ
PSEN Low to Address Float
IOH = -60 A, VCC = 5V 10% 10
tVRLRH
OH
Output High Voltage

RD
Pulse Width
(Ports 1,2,3, ALE, PSEN)
IOH = -25 A 400
AVIV
Output Low Voltage
tWLWH
75
312
2.4
Max
)
ns
Units
ns
-0.2 V0CC-0.1.
5 ns
V
VCC-0.3
3t0.2
CLCL -60
V
ns
VCC+0.5
V
ns
+0.5
CC
tCLCL
-25
0.45
ns
ns
0.45
5tCLCL
-80
V
ns
10
ns
V
6tCLCL
0.75-100
VCC
ns
V
0.9 VCC
2.4
IOH = -300 A
0.75 VCC
IOH = -80 A
0.9 VCC
IOH = -800 A, VCC = 5V 10%

VOH1
0.7 VCC
tCLCL -8
IOH = -10 A
Output High Voltage
(Port 0 in External Bus Mode)
A
3tECLCL -45
145
(XTAL1, RST)
IOL = 1.6 mA
tPXAV
(1)
ns
IIL
Logical 0 Input Current (Ports 1,2,3)
VIN = 0.45V
-50
ITL
Logical 1 to 0 Transition Current

(Ports 1,2,3)
VIN = 2V, VCC = 5V 10%
-650
ILI
Input Leakage Current (Port 0, EA)
0.45 < VIN < VCC
10
RRST
Reset Pulldown Resistor
30
CIO
Pin Capacitance
Test Freq. = 1 MHz, TA= 25C
10
pF
Active Mode, 12 MHz
25
mA
Idle Mode, 12 MHz
6.5
mA
VCC = 5.5V
50
ICC
Power Supply Current

(1)
Power-down Mode
Notes:
10
1. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum I OL per port pin: 10 mA
Maximum I OL per 8-bit port:
Port 0: 26 mA
Ports 1, 2, 3: 15 mA
Maximum total I OL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
2. Minimum VCC for Power-down is 2V.
24
AT89S52
23
AT89S52
External Program Memory Read Cycle
tLHLL
ALE
tAVLL
tLLIV
tLLPL
tPLIV
PSEN
tPXIZ
tPXIX
A0 - A7
PORT 0
tPXAV
tPLAZ
tLLAX
tPLPH
INSTR IN
A0 - A7
tAVIV
A8 - A15
PORT 2
A8 - A15
External Data Memory Read Cycle

tLHLL
ALE
tWHLH
PSEN
tLLDV
tLLWL
RD
tLLAX
tAVLL
PORT 0
tRLAZ
A0 - A7 FROM RI OR DPL
tRLRH
tRLDV
tRHDZ
tRHDX
DATA IN
A0 - A7 FROM PCL
INSTR IN
tAVWL
tAVDV
PORT 2
P2.0 - P2.7 OR A8 - A15 FROM DPH
A8 - A15 FROM PCH
25
AT89S52
External
Data
Memory
CycleMode Test Conditions
Serial Port
Timing:
ShiftWrite
Register
The values in this table are valid for V CC = 4.0V to 5.5V and Load Capacitance = 80 pF.
12 MHz Osc
Variable Oscillator
Symbol
Parameter
Min
Max
Min
Max
tXLXL
Serial Port Clock Cycle Time
1.0
12tCLCL
tQVXH
Output Data Setup to Clock Rising Edge
700
10tCLCL -133
ns
tXHQX
Output Data Hold After Clock Rising Edge
50
2tCLCL -80
ns
tXHDX
Input Data Hold After Clock Rising Edge
ns
tXHDV
Clock Rising Edge to Input Data Valid
700
Units
10tCLCL -133ns
Shift Register Mode Timing Waveforms

INSTRUCTION
ALE
tXLXL
CLOCK
tQVXH
tXHQX
WRITE TO SBUF
tXHDV
OUTPUT DATA
CLEAR RI
VALID
VALID
VALID
VALID
VALID
VALID
(1)
26
1.
Float Waveforms
VALID
V LOAD
0.2 VCC - 0.1V
AC Inputs during testing are driven at V CC - 0.5V

for a logic 1 and 0.45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL
max. for a logic 0.
AT89S52
(1)
V LOAD+ 0.1V
0.2 VCC + 0.9V

TEST POINTS
Note:
VALID
SET RI
AC Testing Input/Output Waveforms
0.45V
7
SET TI
INPUT DATA
VCC - 0.5V
tXHDX
V LOAD- 0.1V
Note:
1.
V OL - 0.1V
Timing Reference
Points
V OL + 0.1V
For timing purposes, a port pin is no longer floating

when a 100 mV change from load voltage occurs. A
port pin begins to float when a 100 mV change from
the loaded VOH/VOL level occurs.
27
Ordering Information
Speed
(MHz)
Power
Supply
24
4.0V to 5.5V
33
4.5V to 5.5V
Ordering Code
Package
AT89S52-24AC
AT89S52-24JC
AT89S52-24PC
44A
44J
40P6
Commercial
(0 C to 70 C)
AT89S52-24AI
AT89S52-24JI
AT89S52-24PI
44A
44J
40P6
Industrial
(-40 C to 85 C)
AT89S52-33AC
AT89S52-33JC
AT89S52-33PC
44A
44J
40P6
Commercial
(0 C to 70 C)
= Preliminary Availability
Package Type
44A
44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP)
44J
44-lead, Plastic J-leaded Chip Carrier (PLCC)
40P6
40-pin, 0.600" Wide, Plastic Dual Inline Package (PDIP)
28
AT89S52
Operation Range
Packaging Information
44A, 44-lead, Thin (1.0 mm) Plastic Gull Wing Quad
Flat Package (TQFP)
Dimensions in Millimeters and (Inches)*
44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC)

Dimensions in Inches and (Millimeters)
.045(1.14) X 45
12.21(0.478)
SQ
11.75(0.458)
PIN 1 ID
0.30(0.012)
0.80(0.031) BSC
.032(.813)
.026(.660)
.050(1.27) TYP
10.10(0.394)
SQ
9.90(0.386)
.630(16.0)
.590(15.0)
.695(17.7)
SQ
.685(17.4)
.500(12.7) REF SQ
.021(.533)
.013(.330)
.043(1.09)
.020(.508)
.120(3.05)
.090(2.29)
.180(4.57)
.165(4.19)
.022(.559) X 45 MAX (3X)

0.75(0.030)
0.45(0.018)
0.15(0.006)
0.05(0.002)
*Controlling dimension: millimeters

40P6, 40-pin, 0.600" Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AC
2.07(52.6)
2.04(51.8)
PIN
1
.566(14.4)
.530(13.5)
.090(2.29)
MAX
1.900(48.26) REF
.220(5.59)
MAX
.005(.127)
MIN
SEATING
PLANE
.065(1.65)
.015(.381)
.022(.559)
.014(.356)
.161(4.09)
.125(3.18)
.110(2.79)
.090(2.29)
.012(.305)
.008(.203)
29
.012(.305)
.008(.203)
1.20(0.047) MAX
0
7
0.20(.008)
0.09(.003)
.045(1.14) X 30 - 45
.656(16.7)
.650(16.5)
SQ
0.45(0.018)
PIN NO. 1
IDENTIFY
.065(1.65)
.041(1.04)
.630(16.0)
.590(15.0)
0 REF
15
.690(17.5)
.610(15.5)
AT89S52
6 Nantes Cedex 3, France

TEL (33) 0 2 40 18 18 18
FAX (33) 0 2 40 18 19 60
Atmel Rousset
Zone Industrielle
13106 Rousset Cedex, France
TEL (33) 4-4253-6000
FAX (33) 4-4253-6001
Atmel Smart Card ICs
Scottish Enterprise Technology Park

East Kilbride, Scotland G75 0QR
TEL (44) 1355-357-000
FAX (44) 1355-242-743
Fax-on-Demand
North America:
1-(800) 292-8635
International:
1-(408) 441-0732
e-mail
literature@atmel.com
Web Site
http://www.atmel.com
BBS
1-(408) 436-4309
Printed on recycled paper.

Rev.1919A-07/01/xM
Atmel Headquarters
Atmel Product Operations
Corporate Headquarters
Atmel Colorado Springs
Europe
Atmel Grenoble
2325 Orchard Parkway

San Jose, CA 95131
TEL (408) 441-0311
FAX (408) 487-2600
Atmel SarL
Route des Arsenaux 41
Casa Postale 80
CH-1705 Fribourg
Switzerland
TEL (41) 26-426-5555
FAX (41) 26-426-5500
Asia
Atmel Asia, Ltd.

Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimhatsui
East Kowloon
Hong Kong
TEL (852) 2721-9778
FAX (852) 2722-1369
1150 E. Cheyenne Mtn. Blvd.

Colorado Springs, CO 80906
TEL (719) 576-3300
FAX (719) 540-1759
Avenue de Rochepleine
BP 123
38521 Saint-Egreve Cedex, France
TEL (33) 4-7658-3000
FAX (33) 4-7658-3480
Atmel Heilbronn
Theresienstrasse 2
POB 3535
D-74025 Heilbronn, Germany
TEL (49) 71 31 67 25 94
FAX (49) 71 31 67 24 23
Atmel Nantes
La Chantrerie
BP 70602
4430
Japan
Atmel Japan K.K.

9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
TEL (81) 3-3523-3551
FAX (81) 3-3523-7581
Atmel Corporation 2001.

Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the
which
is detailed
in Atmels
Terms and Conditions located on the Companys web site. The Company assumes no
Companys
standard
warranty
which
may appear
in errors
this document, reserves the right to change devices or specifications detailed herein at any time
responsibility
for any
without
notice,
and does to update the information contained herein. No licenses to patents or other intellectual
not
make
any commitment
by
the Company
connection
property
of Atmelinare
granted with the sale of Atmel products, expressly or by implication. Atmels products are not
components
life as
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devices or systems.
authorized forinuse
critical

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TITLE

A Mini Project report submitted in partial fulfillment of the requirements

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

SPHOORTHY ENGINEERING COLLEGE

(Affiliated to J.N.T. University, Hyderabad)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

Name: S. Harish Kumar

Prof. Dr. V. CHANDRA MOULI

SPHOORTHY ENGINEERING COLLEGE

Nadargul (Vill), Sagar Road, Near Vanasthalipuram,

Bhagyashri Bhosle (11N81A04D7)

Bhagyashri Bhosle (11N81A04D7)

BLOCK DIAGRAM OF 89S52

BLOCK DIAGRAM OF POWER SUPPLY

CHAPTER2: POWER SUPPLY

2.4 Voltage Regulator

CHAPTER 3: MICRO CONTROLLER

3.1 Features of AT89S52

3.3 Pin Diagram

3.4 Pin Description

4.1 Keil Compiler

5.1 What are Infrared

CHAPTER 6: L293D SREPPER MOTOR DRIVER

CHAPER 7: STEPPER MOTOR

7.3 Open Loop Operation

7.4 Stepper Motor Types

7.5 Variable Reluctance (Vr)

7.6 Permanent Magnet

7.7 Hybrid (Hb)

7.8 When to Use Stepper Motor

7.9 Rotating Magnetic Field

7.10 Torque Generation

7.11 Step Angle Accuracy

7.12 Torque versus Speed Characteristics

7.13 Single Step Response and Resonance

7.14 Few Definitions of Stepper Motor

7.15 Stepper Motor Interfacing with Microcontroller 37

8.2 Driving a Relay

8.3 Relay Interfacing with Microcontroller

CHAPTER 9 DISPLAY COMPONENTS

9.1 Light Dependent Resistor

9.2.1 Pin Function

CHAPTER 11: WORKING PROCEDURE OF PROJECT

MICROCONTROLLER BASED AUTOMATIC ROOM

LIGHT CONTROL WITH VISITOR COUNTING FOR AUDITORIUM

Embedded Systems Design

Embedded C, Keil, Proload

+5V, 500mA Regulated Power Supply

HD44780 16-character, 2-line (16X2)

BLOCK DIAGRAM OF 89S52

BLOCK DIAGRAM OF POWER SUPPLY

PIN DIAGRAM OF 8051

BLOCK DIAGRAM OF IR RECEIVER

APPLICATION CIRCUIT FOR IR receiver

PIN CONNECTION OF ULN2003

STEPPER MOTOR OPERATION

CROSS SECTION OF VARIABLE RELUCTANCE MOTOR

PM STEPPER MOTOR PRINCIPLE

CROSS SCETION OF HYBRID STEPPER MOTOR

MAGNETIC FLUX PATH TO A 2POLE STEPPER MOTOR WITH LAG

BETWEEN ROTOR &STATOR

POSITIONAL ACCURACY OF STEPPER MOTOR