Sva Trivia.2211847

concurrent assertion
its a vacuous world !
Copyright 2006-2008
DefineView Consulting
www.defineview.com
Concurrent Assertion without an implication

Look!
Look!NO
NOIMPLICATION
IMPLICATION
property pr1;
@(posedge clk) req ##2 gnt;

endproperty
reqGnt: assert property (pr1) $display($stime,,,"\t\t %m PASS"); else
$display($stime,,,"\t\t %m FAIL");
Simulation
SimulationLog
Log
##run
run-all
-all
##
10
10 clk=1
clk=1req=0
req=0gnt=0
gnt=0
##
10
test_basic_property.reqGnt
10
test_basic_property.reqGntFAIL
FAIL
##
30
clk=1
req=0
30 clk=1 req=0gnt=0
gnt=0
##
30
30
FAIL
##
50
clk=1
req=1
50 clk=1 req=1gnt=0
gnt=0
##
70
70 clk=1
clk=1req=0
req=0gnt=0
gnt=0
##
70
70
FAIL
##
90
clk=1
req=0
90 clk=1 req=0gnt=1
gnt=1
##
90
90
FAIL
##
90
90
test_basic_property.reqGntPASS
PASS
##
110
clk=1
req=0
gnt=0
110 clk=1 req=0 gnt=0
##
110
110
FAIL
Copyright 2006-2008
Whenever
Wheneverreq
reqisisLow,
Low,the
theassertion
assertionFAILs
FAILs!!!!
Thats
Thatsbecause,
because,aasequence
sequencesimply
simplysays
saysthat
thatreq
reqbe
be
true
at
the
clock
edge
and
that
gnt
must
be
true
true at the clock edge and that gnt must be true22
clocks
clockslater.
later.
ItItdoes
doesNOT
NOTsay
saycheck
checkthe
thesequence
sequenceOnly
OnlyIfIfreq
reqisis
true
trueat
atposedge
posedgeclk.
clk.
But
Butyou
youreally
reallydont
dontcare
carefor
forresult
resultwhen
whenreq
reqisisLow.
Low.
Thats
Thatswhere
wherean
animplication
implicationoperator
operatorcomes
comes
into
picture
into picture
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Concurrent Assertion with an implication

sequence sr1;
##2 gnt;
endsequence
IMPLICATION
IMPLICATIONOPERATOR
OPERATOR(OVERLAPPING)
(OVERLAPPING)
ANTECEDENT
ANTECEDENT
CONSEQUENT
CONSEQUENT
property pr1;
@(posedge clk) req |-> sr1;

endproperty
Simulation
SimulationLog
Log
##
##
##
##
##
##
##
##
##
##
##
##
##
10
10 clk=1
clk=1
10
10
30
30 clk=1
clk=1
50
clk=1
50 clk=1
50
50
70
70 clk=1
clk=1
70
70
70
70
90
90 clk=1
clk=1
110
110 clk=1
clk=1
110
110
130
130 clk=1
clk=1
130
130
req=0
req=0gnt=0
gnt=0
test_basic_property1.reqGnt
test_basic_property1.reqGntPASS
PASS
req=1
gnt=0
req=1 gnt=0
req=0
req=0gnt=0
gnt=0
PASS
req=0
gnt=1
req=0 gnt=1
PASS
PASS
test_basic_property1.reqGnt PASS
req=1
req=1gnt=0
gnt=0
req=0
req=0gnt=0
gnt=0
PASS
req=0
req=0gnt=0
gnt=0
test_basic_property1.reqGntFAIL
FAIL
Copyright 2006-2008
InInthis
thisexample,
example,we
wemoved
movedaapart
partof
ofthe
thesequence
sequenceto
to
the
property
and
are
using
it
as
an
antecedent
the property and are using it as an antecedentto
to
imply
implyaaconsequent.
consequent.
With
Withan
animplication
implicationoperator,
operator,the
theantecedent
antecedentMUST
MUST
be
TRUE
to
evaluate
the
consequent.
Hence,
be TRUE to evaluate the consequent. Hence,
whenever
wheneverreq
reqisisLow,
Low,the
theantecedent
antecedentisisfalse
falseand
and
the
implication
simply
does
not
fire
and
there
the implication simply does not fire and thereisisno
no
failure
message
as
in
the
previous
example.
failure message as in the previous example.
BUT
BUTWAIT
WAIT
Now
Nowthe
theproperty
propertyPASSes
PASSeswhenever
wheneverreq
reqisisLow.
Low.
Whats
Whatsgoing
goingon???
on???
www.defineview.com
Concurrent Assertion Vacuous Pass What ??

sequence sr1;
##2 gnt;
endsequence
IMPLICATION
IMPLICATIONOPERATOR
(OVERLAPPING)
ANTECEDENT
ANTECEDENT
CONSEQUENT
CONSEQUENT
property pr1;

endproperty
LRM
LRM 3.1a
3.1a (Page
(Page 232)
232) ::::
If
If there
there isis no
no match
match of
of the
the antecedent
antecedent sequence_expr,
sequence_expr, then
then evaluation
evaluation of
of the
the
implication
implication succeeds
succeeds vacuously
vacuously and
and returns
returns true
true
AA couple
couple of
of ways
ways to
to get
get around
around this
this
One
One isis to
to simply
simply not
not use
use the
the action_block
action_block associated
associated with
with pass
pass (duh)
(duh) of
of the
the
property,
property, so
so that
that you
you dont
dont get
get pass
pass indication
indication vacuously
vacuously
But
But what
what ifif you
you do
do want
want to
to know
know when
when the
the property
property passes
passes
Copyright 2006-2008
www.defineview.com
Concurrent Assertion with 'cover' take 1

sequence sr1;
##2 gnt;
endsequence
IMPLICATION
IMPLICATIONOPERATOR
(OVERLAPPING)
ANTECEDENT
ANTECEDENT
CONSEQUENT
CONSEQUENT
property pr1;

endproperty
No
Noaction_block
action_blockassociated
associatedwith
withtrue
true
eval
of
the
property.
eval of the property.
A_reqGnt: assert property (pr1) else $display($stime,,,"\t\t %m FAIL");

C_reqGnt: cover property (pr1) $display($stime,,,"\t\t %m PASS");
You
Youmay
mayuse
useaacover
coverstatement
statementto
tocover
coverthe
thesame
sameproperty
propertythat
thatisisasserted.
asserted.cover
coverdoes
doesnot
notreport
report
vacuous
pass
(but
note
that
many
simulators
require
a
run
time
option
to
'filter'
out
vacuous
vacuous pass (but note that many simulators require a run time option to 'filter' out vacuouspass
passon
onaa
'cover').
'cover').
Note
Notethat
thatcover
coverdoes
doesnot
notallow
allowan
anaction_block
action_blockififthe
theproperty
propertyfails.
fails.
##run
run-all
-all
##
10
10 clk=1
clk=1
##
30
30 clk=1
clk=1
##
50
clk=1
50 clk=1
##
70
70 clk=1
clk=1
##
70
70
##
90
90 clk=1
clk=1
##
110
110 clk=1
clk=1
##
130
clk=1
130 clk=1
##
130
130
req=0
req=0gnt=0
gnt=0
req=1
req=1gnt=0
gnt=0
req=0
gnt=0
req=0 gnt=0
req=0
req=0gnt=1
gnt=1
test_basic_property2.C_reqGnt
test_basic_property2.C_reqGntPASS
PASS
req=1
gnt=0
req=1 gnt=0
req=0
req=0gnt=0
gnt=0
req=0
gnt=0
req=0 gnt=0
test_basic_property2.A_reqGnt
test_basic_property2.A_reqGntFAIL
FAIL
Copyright 2006-2008
InInthis
thisexample,
example,we
weremoved
removedthe
theaction
actionblock
block
associated
with
the
true
(i.e.
pass)
evaluation
associated with the true (i.e. pass) evaluationof
ofthe
the
property
to
avoid
the
vacuous
$display.
property to avoid the vacuous $display.
IfIfyou
youdo
doneed
needan
anaction
actionblock
blockfor
foraamatch
match(i.e.
(i.e.Pass)
Pass)
of
a
property,
you
may
use
a
cover
statement
to
of a property, you may use a cover statement to
cover
coverthe
thesame
sameproperty
propertythat
thatisisasserted.
asserted.
The
Thesimulators
simulatorsthat
thatthe
theauthor
authorhave
havetried
trieddo
dofilter
filterout
out
vacuous
pass
on
a
cover,
giving
you
only
a
Pass
vacuous pass on a cover, giving you only a Pass
indication
indicationwhen
whenantecedent
antecedentisisTrue
Trueand
andConsequent
Consequent
matches.
matches.
www.defineview.com
Concurrent Assertion with 'cover' take 2

OK,
OK,what
whatififyour
yoursimulator
simulatordoes
doesnot
notfilter
filterfor
foraavacuous
vacuouspass
passon
onaa'cover'.
'cover'.
There
Thereare
aremany
manyways
waysto
toget
getaround
aroundit.
it.Here's
Here'sone.
one.'cover'
'cover'the
thesequence/property
sequence/propertywithoutwithout-an
animplication.
implication.
property pr1;
@(posedge clk) req |-> ##2 gnt;
endproperty
property pr2;
@(posedge clk) req ##2 gnt;
endproperty
No
Noaction_block
action_blockassociated
associatedwith
withtrue
true
eval
of
the
property.
eval of the property.
A_reqGnt: assert property (pr1) else $display($stime,,,"\t\t %m FAIL");

C_reqGnt: cover property (pr2) $display($stime,,,"\t\t %m PASS");
##run
run-all
-all
##
10
10 clk=1
clk=1
##
30
30 clk=1
clk=1
##
50
clk=1
50 clk=1
##
70
70 clk=1
clk=1
##
70
70
##
90
90 clk=1
clk=1
##
110
110 clk=1
clk=1
##
130
clk=1
130 clk=1
##
130
130
req=0
req=0gnt=0
gnt=0
req=1
req=1gnt=0
gnt=0
req=0
gnt=0
req=0 gnt=0
req=0
req=0gnt=1
gnt=1
test_basic_property2.C_reqGnt
test_basic_property2.C_reqGntPASS
PASS
req=1
gnt=0
req=1 gnt=0
req=0
req=0gnt=0
gnt=0
req=0
gnt=0
req=0 gnt=0
test_basic_property2.A_reqGnt
test_basic_property2.A_reqGntFAIL
FAIL
Copyright 2006-2008
For
For'cover'
'cover'we
weremoved
removedthe
theimplication
implicationoperator.
operator.
Vacuous
pass
applies
only
when
there
is
Vacuous pass applies only when there isan
an
implication
implicationoperator
operatorand
andthe
theantecedent
antecedentdoes
doesnot
not
match.
match.
Without
Withoutan
animplication
implicationoperator
operatorthere
thereisisno
novacuos
vacuos
pass
and
since
there
is
no
'failure'
action_block
pass and since there is no 'failure' action_blockwith
withaa
'cover'
you
get
a
pass
indication
only
when
the
'cover' you get a pass indication only when the
property/sequence
property/sequencematches
matches
www.defineview.com
DefineView Consulting offers comprehensive trainings and consulting services in
System Verilog Assertions and Functional Coverage
that go into in-depth detail of such language nuances with simple to understand
examples and real life applications. Taught from and end user point of view,
the training also includes practical LABs to put it all in perspective.
1 Day Training in System Verilog Assertions Language and Methodology with LABs
2 Day Training in System Verilog Assertions & Functional Coverage Language and
Methodology with many more LABs and applications.
Please visit http://defineview.com/trainingpricing for complete detail on both

these classes.
Copyright 2006-2008
www.defineview.com
CUSTOMER TESTIMONIALS
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Ashokisisaavery
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ThomasSlee,
Slee,Sr.
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ElectricalEngineer,
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Copyright 2006-2008
www.defineview.com
happy asserting
For a detailed training that takes you through System Verilog Assertions
and Functional Coverage language and methodology step by step with
examples/simulation logs, real life applications and practical LABs please
contact
DefineView
Consulting
www.defineview.com
www.defineview.com
(email)
(email) ashok@defineview.com
ashok@defineview.com
(phone)
(phone) 408.309.1556
408.309.1556
Copyright 2006-2008
www.defineview.com

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concurrent assertion

its a vacuous world !

Concurrent Assertion without an implication

@(posedge clk) req ##2 gnt;

Concurrent Assertion with an implication

@(posedge clk) req |-> sr1;

Concurrent Assertion Vacuous Pass What ??

@(posedge clk) req |-> sr1;

Concurrent Assertion with 'cover' take 1

@(posedge clk) req |-> sr1;

A_reqGnt: assert property (pr1) else $display($stime,,,"\t\t %m FAIL");

Concurrent Assertion with 'cover' take 2

A_reqGnt: assert property (pr1) else $display($stime,,,"\t\t %m FAIL");

Please visit http://defineview.com/trainingpricing for complete detail on both

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