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SOIC8
W SUFFIX
CASE 751BD
UDFN8
HU5 SUFFIX
CASE 517BU
SOIC8
X SUFFIX
CASE 751BE
Features
PDIP8
L SUFFIX
CASE 646AA
PIN CONFIGURATION
NC
VCC
A1
WP
A2
SCL
VSS
SDA
VCC
SCL
PIN FUNCTION
CAT24M01
A2, A1
TSSOP8
Y SUFFIX
CASE 948AL
Pin Name
SDA
A1, A2
WP
VSS
Function
Device Address
SDA
Serial Data
SCL
Serial Clock
WP
Write Protect
VCC
Power Supply
VSS
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
CAT24M01
MARKING DIAGRAMS
24M01A
AYMXXX
M0L
ALL
YM
G
(SOIC8)
(UDFN8)
24M01A
AXXX
YYWWG
(PDIP8)
24M01A = Specific Device Code
A
= Assembly Location
XXX = Last Three Digits of
XXX = Assembly Lot Number
YY = Production Year (Last Two Digits)
WW = Production Week (Two Digits)
G = PbFree Designator
Ratings
Units
Storage Temperature
65 to +150
0.5 to +6.5
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Parameter
Endurance
Min
Units
1,000,000
Program/Erase Cycles
100
Years
Data Retention
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Test Condition: Page Mode, VCC = 5 V, 25C.
4. The device uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte
has to be written, 4 bytes (including the ECC bits) are re-programmed. It is recommended to write by multiple of 4 bytes in order to benefit
from the maximum number of write cycles.
Parameter
Test Conditions
Max
Units
mA
VCC = 1.8 V
3.5
mA
VCC = 5.5 V
5.0
ICCR
Read Current
ICCW
Write Current
ISB
IL
Standby Current
Min
TA = 40C to +85C
TA = 40C to +125C
TA = 40C to +85C
TA = 40C to +125C
mA
mA
VIL1
0.5
0.3 VCC
VIL2
0.5
0.25 VCC
VIH1
0.7 VCC
VCC + 0.5
VIH2
0.75 VCC
VCC + 0.5
VOL1
0.4
VOL2
0.2
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CAT24M01
Table 4. PIN IMPEDANCE CHARACTERISTICS
VCC = 1.8 V to 5.5 V, TA = 40C to +85C and VCC = 2.5 V to 5.5 V, TA = 40C to +125C, unless otherwise specified.
Max
Units
CIN (Note 5)
Parameter
VIN = 0 V
pF
CIN (Note 5)
VIN = 0 V
pF
75
mA
50
25
Symbol
IWP, IA (Note 6)
Conditions
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP, A1, A2 pins are pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively
strong; therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source.
Min
Max
Clock Frequency
Min
100
tLOW
tHIGH
Max
FastPlus
VCC = 2.5 V 5.5 V
TA = 405C to +855C
Min
400
Max
Units
1,000
kHz
0.6
0.25
ms
4.7
1.3
0.45
ms
0.6
0.40
ms
4.7
0.6
0.25
ms
ms
250
100
50
ns
tSU:STA
tHD:DAT
tSU:DAT
tR (Note 8)
1,000
300
100
ns
tF (Note 8)
300
300
100
ns
tSU:STO
tBUF
tAA
tDH
Ti (Note 8)
0.6
0.25
ms
4.7
1.3
0.5
ms
3.5
50
0.9
50
50
0.40
50
50
ms
ns
50
ns
tSU:WP
WP Setup Time
ms
tHD:WP
WP Hold Time
2.5
2.5
ms
tWR
tPU (Notes 8, 9)
7.
8.
9.
Parameter
Fast
VCC = 1.8 V 5.5 V
ms
0.1
0.1
0.1
ms
50 ns
0.5 x VCC
Output Load
Current Source: IL = 3 mA (VCC 2.5 V); IL = 1 mA (VCC < 2.5 V); CL = 100 pF
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CAT24M01
Power-On Reset (POR)
The CAT24M01 incorporates PowerOn Reset (POR)
circuitry which protects the internal logic against powering
up in the wrong state.
The device will power up into Standby mode after VCC
exceeds the POR trigger level and will power down into
Reset mode when VCC drops below the POR trigger level.
This bidirectional POR behavior protects the device
against brownout failure, following a temporary loss of
power.
Pin Description
SCL: The Serial Clock input pin accepts the Serial Clock
signal generated by the Master.
SDA: The Serial Data I/O pin receives input data and
transmits data stored in EEPROM. In transmit mode, this pin
is open drain. Data is acquired on the positive edge, and is
delivered on the negative edge of SCL.
A1 and A2: The Address pins accept the device address.
These pins have onchip pulldown resistors.
WP: The Write Protect input pin inhibits all write
operations, when pulled HIGH. This pin has an onchip
pulldown resistor.
Functional Description
The CAT24M01 supports the InterIntegrated Circuit
(I2C) Bus data transmission protocol, which defines a device
that sends data to the bus as a transmitter and a device
receiving data as a receiver. Data flow is controlled by a
Master device, which generates the serial clock and all
START and STOP conditions. The CAT24M01 acts as a
Slave device. Master and Slave alternate as either
transmitter or receiver. Up to 4 devices may be connected to
the bus as determined by the device address inputs A1 and
A2.
Acknowledge
The I2C bus consists of two wires, SCL and SDA. The
two wires are connected to the VCC supply via pullup
resistors. Master and Slave devices connect to the 2wire
bus via their respective SCL and SDA pins. The transmitting
device pulls down the SDA line to transmit a 0 and
releases it to transmit a 1.
Data transfer may be initiated only when the bus is not
busy (see A.C. Characteristics).
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CAT24M01
SCL
SDA
START
CONDITION
STOP
CONDITION
A2
A1
a16
R/W
DEVICE ADDRESS
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
tHIGH
tF
tLOW
tR
tLOW
SCL
tSU:STA
tHD:DAT
tHD:STA
tSU:DAT
tSU:STO
SDA IN
tAA
tDH
SDA OUT
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tBUF
CAT24M01
WRITE OPERATIONS
Acknowledge Polling
Byte Write
Page Write
Delivery State
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CAT24M01
S
T
BUS ACTIVITY: A
MASTER R
T
SLAVE
ADDRESS
BYTE ADDRESS
a15 a8
a7 a0
S
T
O
P
DATA
SDA LINE S
P
A
C
K
A
C
K
A
C
K
A
C
K
SCL
SDA
8th Bit
Byte n
ACK
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
S
BUS
T
ACTIVITY: A
MASTER R
T
SLAVE
ADDRESS
BYTE ADDRESS
a15 a8
a7 a0
DATA
DATA n
S
T
O
P
DATA n+63
SDA LINE S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
ADDRESS
BYTE
DATA
BYTE
a7
a0
d7
d0
SCL
SDA
tSU:WP
WP
tHD:WP
Figure 9. WP Timing
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A
C
K
A
C
K
CAT24M01
READ OPERATIONS
Sequential Read
Selective Read
S
T
O
P
SLAVE
ADDRESS
SDA LINE S
P
A
C
K
SCL
SDA
N
O
A
C
K
DATA
8th Bit
DATA OUT
NO ACK
STOP
S
T
A
R
T
BYTE ADDRESS
a15 a8
a7 a0
SLAVE
ADDRESS
SDA LINE S
SLAVE
ADDRESS
S
T
O
P
DATA
S
A
C
K
A
C
K
A
C
K
N
O
A
C
K
A
C
K
SLAVE
ADDRESS
DATA n
DATA n+1
DATA n+2
S
T
O
P
DATA n+x
SDA LINE
A
C
K
A
C
K
A
C
K
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A
C
K
N
O
A
C
K
CAT24M01
PACKAGE DIMENSIONS
PDIP8, 300 mils
CASE 646AA01
ISSUE A
SYMBOL
MIN
NOM
E1
5.33
A1
0.38
A2
2.92
3.30
4.95
0.36
0.46
0.56
b2
1.14
1.52
1.78
0.20
0.25
0.36
9.02
9.27
10.16
7.62
7.87
8.25
E1
6.10
6.35
7.11
e
PIN # 1
IDENTIFICATION
MAX
2.54 BSC
eB
7.87
2.92
10.92
3.30
3.80
TOP VIEW
E
A2
A1
c
b2
L
eB
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
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CAT24M01
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD01
ISSUE O
E1
SYMBOL
MIN
1.35
1.75
A1
0.10
0.25
0.33
0.51
MAX
0.19
0.25
4.80
5.00
5.80
6.20
E1
3.80
PIN # 1
IDENTIFICATION
NOM
4.00
1.27 BSC
0.25
0.50
0.40
1.27
TOP VIEW
A1
c
e
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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CAT24M01
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL01
ISSUE O
SYMBOL
MIN
NOM
E1
MAX
1.20
A1
0.05
A2
0.80
0.19
0.15
0.90
1.05
0.30
0.09
2.90
3.00
3.10
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.20
0.65 BSC
1.00 REF
L1
0.50
0.60
0.75
TOP VIEW
D
A2
q1
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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CAT24M01
PACKAGE DIMENSIONS
SOIC8, 208 mils
CASE 751BE01
ISSUE O
SYMBOL
MIN
NOM
E1 E
MAX
2.03
A1
0.05
0.25
0.36
0.48
0.19
0.25
5.13
5.33
7.75
8.26
E1
5.13
5.38
1.27 BSC
0.51
0.76
PIN#1 IDENTIFICATION
TOP VIEW
A1
SIDE VIEW
c
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with EIAJ EDR-7320.
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CAT24M01
PACKAGE DIMENSIONS
UDFN8 3.0x2.0, 0.5P
CASE 517BU01
ISSUE O
A B
PIN 1
REFERENCE
0.15 C
0.15 C
(0.065)
(0.127)
DETAIL A
DIM
A
A1
b
D
D2
E
E2
e
L
TOP VIEW
DETAIL A
0.05 C
A
0.05 C
A1
SIDE VIEW
NOTE 4
SEATING
PLANE
C
0.10
D2
8X
C A B
L
0.10
C A B
E2
5
8X
b
0.10
C A B
0.05
C D
BOTTOM VIEW
NOTE 3
RECOMMENDED
MOUNTING FOOTPRINT
1.56
8X
1.06
0.63
3.30
PKG
OUTLINE
1
8X
0.50
PITCH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
0.32
DIMENSIONS: MILLIMETERS
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MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.20
0.30
2.00 BSC
1.35
1.45
3.00 BSC
0.85
0.95
0.50 BSC
0.35
0.45
CAT24M01
Example of Ordering Information (Note 10)
Specific
Device
Marking
Package Type
Temperature
Range
Lead
Finish
CAT24M01LEG
24M01A
PDIP8
40C to +125C
NiPdAu
Rail
CAT24M01LIG
24M01A
PDIP8
40C to +85C
NiPdAu
Rail
CAT24M01WEGT3
24M01A
SOIC8, JEDEC
40C to +125C
NiPdAu
CAT24M01WIGT3
24M01A
SOIC8, JEDEC
40C to +85C
NiPdAu
CAT24M01XET2
24M01A
SOIC8, EIAJ
40C to +125C
MatteTin
CAT24M01XIT2
Device Order
Number
24M01A
SOIC8, EIAJ
40C to +85C
MatteTin
CAT24M01YEGT3
M01C
TSSOP8
40C to +125C
NiPdAu
CAT24M01YIGT3
M01C
TSSOP8
40C to +85C
NiPdAu
CAT24M01HU5IGT3
MOL
UDFN8
40C to +85C
NiPdAu
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CAT24M01/D
Mouser Electronics
Authorized Distributor
ON Semiconductor:
CAT24M01WI-GT3 CAT24M01LI-G CAT24M01XI-T2 CAT24M01HU5I-GT3 CAT24M01YI-GT3 CAT24M01XI
CAT24M01YI-GT3JN CAT24M01WI-G