IPAD2

8
K94 CHOPIN MLB
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
REV
ECN
DESCRIPTION OF REVISION
0001052699
CK
APPD
DATE
PRODUCTION RELEASED
2011-01-10
PVT
REV. A
LAST_MODIFIED=Mon Jan 10 13:11:06 2011

PDF CSA CONTENTS
SYNC MASTER
PDF CSA CONTENTS
DATE
TABLE_TABLEOFCONTENTS_HEAD
TABLE OF CONTENTS
MIKE
32
N/A
TABLE_TABLEOFCONTENTS_ITEM
BLOCK DIAGRAM: SYSTEM
MIKE
33
N/A
BOM TABLE
MIKE
34
N/A
AP: MAIN
JAMES
35
N/A
AP: I/Os
JAMES
36
N/A
AP: NAND
JAMES
37
N/A
AP: TV,DP,MIPI
JAMES
38
N/A
10
AP: PWR
JAMES
39
N/A
11
AP: PWR
JAMES
40
N/A
12
AP: MISC & ALIASES
JAMES
41
N/A
YOSH
N/A
82
POWER: PMU
YOSH
N/A
83
POWER: 3.3V VR
YOSH
N/A
90
DEBUG AND MISC
MIKE
N/A
93
FCT/ICT TEST/BRACKETS
MIKE
N/A
100
CONSTRAINTS: ASSIGNMENTS
MIKE
N/A
101
MIKE
N/A
102
CONSTRAINTS: MLB RULES
MIKE
N/A
106
CONSTRAINTS: RF RULES
MIKE
N/A
13
AP: VIDEO BUFFER,BB USB MUXES
JAMES
42
N/A
12
POWER: PMU
11
81
10
N/A
YOSH
POWER: BATTERY CONNECTOR
75
N/A
YOSH
POWER: ALIASES
14
NAND
JONATHANN/A
17
VIDEO: DISPLAY PORT
JAMES
N/A
20
VIDEO: MLC
MIKE
N/A
21
VIDEO: MLC ALIASES
MIKE
N/A
22
VIDEO: LVDS CONNECTOR
ALEX
N/A
30
GRAPE: GROUNDHOG,CONN,BOOST
RAMSIN
N/A
31
GRAPE: Z1, Z2
RAMSIN
N/A
36
AUDIO: L63 CODEC
LENG
N/A
37
AUDIO: SPEAKER AMP
LENG
N/A
38
AUDIO: HEADPHONE OUT
LENG
N/A
39
AUDIO: BLANK
LENG
N/A
42
AUDIO: DETECT/MIC BIAS
LENG
43
AUDIO: HP/MIC FILTERS
LENG
54
CONNECTOR: CANADA FLEX CONN,SENSOR

MARKPANEL
B. N/A ALIASES
55
CONNECTOR: CANADA FLEX FILTERS
56
CONNECTOR: SENSOR PANEL CONNECTORMARK
57
IO FLEX: DOCK COMPONENTS
JAMES
N/A
59
IO FELX: B2B Connector
JAMES
N/A
60
CONNECTOR: X23 WIFI/BT
MIKE
N/A
13
15
16
/m
17
18
19
20
21
22
tt
23
N/A
24
25
p:
/
yc
14
/x
/
73
su
DATE
om
p.
SYNC MASTER
TABLE_TABLEOFCONTENTS_HEAD
N/A
26
MARK B. N/A
27
B. N/A
28
29
30
A
DRAWING TITLE
CHOPIN MLB
31
61
CONNECTOR: X24 CELLULAR/GPS
MIKE
N/A
DRAWING NUMBER
Apple Inc.
051-8962
REVISION
NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING
TITLE=BACH
ABBREV=DRAWING
A.0.0
BRANCH
PAGE
1 OF 106
SHEET
1 OF 42
SIZE
Z2
H4P
SPI1
CSA 31
GROUNDHOG
ISP_I2C1
MIPI1C
FF CAMERA
ISP_I2C0
MIPI0C
REAR CAMERA
CANADA FLEX
SENSOR PANEL
X23
SDIO
CSA 31
WIFI/BT
BT_I2S
2X32-BIT
MLC
MIPI0D
USB1.1
UART1
UART2
UART4
GPU
DUAL-CORE IMG
SGX543-MP
LVDS
CSA 20
su
DISPLAY/
TOUCH PANEL
/x
/
400MHZ/800MB/S
SPI2
om
p.
AUDIO
BACKLIGHT
X24
ICE3.0/GPS
USB1.1
USART
UMTS
GPS
CELLULAR ANT
IPC
yc
BATTERY
/m
DWI
I2C0
CSA 81
CSA 61
UART0
30-PIN
DOCK
DISPLAYPORT
VIDEO DAC
p:
/
AMP
L63
tt
h
SENSOR PANEL
AUDIO CODEC
I2C1
COMPASS
GPS ANT
USB2.0
CSA 75
SENSOR PANEL
CSA 60
AE2
ARM A5 CPU
UART5
PROX SENSOR
WIFI/BT ANT
UART3
LPDDR2
PMU
ALISON
DUAL-CORE ARM
CORTEX-A9 W/ SMP
850 MHZ
Z1
CSA 30
I2S2
VSP
I2S0
ASP
I2S3
CSA 57
LINEOUT
AMP
SPEAKER
XSP
AMP
I2C2
FMI0 FMI1
FMI2 FMI3
HSIC0
MIC
HP
CSA 36
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
GYRO
ACCELEROMETER
ALS
BLOCK DIAGRAM: SYSTEM
NAND FLASH NAND FLASH
DRAWING NUMBER
SD CARD READER
Apple Inc.
051-8962
REVISION
SENSOR PANEL
SENSOR PANEL
CANADA FLEX
CSA 58
CSA 14
CSA 14

A.0.0
BRANCH
PAGE
2 OF 106
SHEET
2 OF 42
SIZE
Page Notes
Power aliases required by this page:
BOM OPTIONS
(NONE)
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
PROGRAMMABLE PARTS
ALL AVAIL BOM OPTIONS
COMMON
ALTERNATE
16GB_PROD
32GB_PROD
64GB_PROD
BKLT_PLL
DEVELOPMENT_JTAG
DEVELOPMENT_JTAG_TAP
JTAG_DAP
JTAG_TAP_NOT
SPEAKER
INTERNAL_MIC
PORTRAIT_DOCK
MLC_DEV
MLC_PROD
SCH AND BOARD P/N

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
051-8962
SCH,CHOPIN_AUDIO,MLB,K94
SCH1
820-3069
PCBF,CHOPIN_AUDIO,MLB,K94
PCB1
TABLE_5_ITEM
K93
K94
BOM OPTIONS
BASIC
COMMON,ALTERNATE
/x
/
TABLE_BOMGROUP_HEAD
BOM GROUP
TABLE_BOMGROUP_ITEM
TABLE_5_HEAD
PART#
yc
om
p.
DESCRIPTION
BOM OPTION
806-1396
FENCE,GRAPE,MLB,K93/K94
FENCE1
806-1397
CAN,GRAPE,MLB,K93/K94
CAN1
806-1398
FENCE,CPU,MLB,K93/K94
FENCE2
806-1399
CAN,CPU,MLB,K93/K94
806-1400
FENCE,NAND,MLB,K93/K94
806-1401
CAN,NAND,MLB,K93/K94
TABLE_5_ITEM
NOSTUFF
TABLE_5_ITEM
TABLE_5_ITEM
CAN2
NOSTUFF
TABLE_5_ITEM
FENCE3
TABLE_5_ITEM
CAN3
NOSTUFF
TOP BARCODE LABEL/EEE CODES

(ONLY ONE IS USED PER BOM)
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
TABLE_5_ITEM
825-7651
EEEE FOR 639-1180 (K93 16G)
DH36
CRITICAL
EEEE_K93_16G
825-7651
EEEE FOR 639-1426 (K93 32G)
DH37
CRITICAL
EEEE_K93_32G
825-7651
EEEE FOR 639-1428 (K93 64G)
DG99
CRITICAL
EEEE_K93_64G
825-7651
EEEE FOR 639-1112 (K94 16G)
DFC4
CRITICAL
EEEE_K94_16G
825-7651
EEEE FOR 639-1181 (K94 32G)
DFC5
CRITICAL
EEEE_K94_32G
825-7651
EEEE FOR 639-1182 (K94 64G)
DFC6
CRITICAL
EEEE_K94_64G
825-7651
EEEE FOR 639-1430 (K95 16G)
DH3C
CRITICAL
EEEE_K95_16G
825-7651
EEEE FOR 639-1427 (K95 32G)
DH3D
CRITICAL
EEEE_K95_32G
/m
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
p:
/
QTY
TABLE_5_ITEM
su
ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS
PD PARTS
TABLE_5_ITEM
TABLE_5_ITEM
825-7651
EEEE FOR 639-1429 (K95 64G)
DG9C
CRITICAL
EEEE_K95_64G
CRITICAL
BOM OPTION
BOTTOM LABEL TYPE 1

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
tt
TABLE_5_ITEM
825-7639
631- B/C LABEL
LBL1
CRITICAL
825-7639
639- B/C LABEL
LBL2
CRITICAL
TABLE_5_ITEM
BOTTOM LABEL TYPE 2

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
TABLE_5_ITEM
825-7640
MATRIX LABEL
LBL3
CRITICAL
825-7640
631- MATRIX LABEL
LBL4
CRITICAL
TABLE_5_ITEM
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
BOM TABLE
DRAWING NUMBER
Apple Inc.
051-8962
REVISION

A.0.0
BRANCH
PAGE
5 OF 106
SHEET
3 OF 42
SIZE
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
NEED TO ADD BOM TABLE FOR ALT P/N OF HYNIX (?)
COMMENTS:
R0620
=PP1V1_PLL_H4
32
0.00 2
PP1V1_PLL4_F
TABLE_5_HEAD
VOLTAGE=1.1V
0%
1/32W
MF
01005
C0651
0.01UF
C0648
PP1V1_PLL3_F
AY22
AY24
AY30
AY31
AY32
AY33
AY34
B1
B2
B7
B9
VSS
B10
B12
B13
B15
B17
B18
B20
B22
B23
B28
B29
B30
B32
B33
B34
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C23
C27
C29
C32
C33
D1
D3
D5
D7
D9
D11
D13
D15
D16
D23
VSS
=PP1V1_USB_H4
4 32
0%
1/32W
MF
01005
0.01UF
10%
6.3V
2 X5R
01005
0.00 2
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
PP1V1_PLL1_F
0%
1/32W
MF
01005
C0644
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=1.1V
0.01UF
10%
6.3V
2 X5R
01005
R0624
C0608
0.01UF
10%
2 6.3V
X5R
01005
56PF
C0660
C0661
C0654
0.1UF
5%
2 6.3V
NP0-C0G
01005
VOLTAGE=1.1V
0%
1/32W
MF
01005
=PP1V1_MIPI_PLL_H4
32
0201-1
PP1V1_PLL0_F
0.00 2
FL0610
80-OHM-0.2A-0.4-OHM
PP1V1_MIPID_PLL_F
10%
2 6.3V
X5R
201
C0655
1UF
10%
2 6.3V
CERM
402
56PF
5%
2 6.3V
NP0-C0G
01005
=PP1V1_USB_H4
4 32
=PP1V1_USB_H4
32 4
C0627
0.01UF
10%
2 6.3V
X5R
01005
C0643
0.22UF
20%
6.3V
2 X5R
0201
=PP3V3_USB_H4
4 32
=PP1V2_HSIC_H4
32
C0642
0.01UF
10%
6.3V
2 X5R
01005
C0641
0.01UF
10%
6.3V
2 X5R
01005
JTAGSEL
0 - PARALLEL
1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG)
PER RADAR #6755237
32 13 10 7 5 4
=PP1V8_H4
100K 2
4 28 39
32 13 10 7 5 4
R0646
1
100K 2
JTAG_AP_TMS
4 28 39
R0647
1
100K 2
32 4
JTAG_AP_TDI
4 10 39
=PP3V3_USB_H4
=PP1V8_H4
100K 2
1
39 10
OUT
39 10
OUT
39 10 4
39 28 4
39 28 4
IN
OUT
OUT
TP_HSIC1_AP_DATA
TP_HSIC1_AP_STB
A26
A27
NC_HSIC2_AP_DATA
NC_HSIC2_AP_STB
C26
D26
10 AP_JTAG_SEL
NC_JTAG_AP_RTCK
JTAG_AP_TRST_L
JTAG_AP_TDO
JTAG_AP_TDI
JTAG_AP_TMS
JTAG_AP_TCK
10
AP_TESTMODE
35 31 28
IN
RST_AP_L
HSIC1_DATA
HSIC1_STB
XI0 A18
HSIC2_DATA
HSIC2_STB
JTAG_SEL
JTAG_TRTCK
JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
P29
TESTMODE
39
XTAL_24M_O
USB11_DP A22
USB11_DM A23
10
FAST_SCAN_CLK
10
AP_HOLD_RESET
P31
HOLD_RESET
P32
RESET*
USB_FS_D_P
USB_FS_D_N
USB_DP A29
USB_DM A28
USB_D_P
USB_D_N
USB_ANALOGTEST G26
NC_USB_ANALOGTEST
(FOR IC TESTER)
(0=NORMAL)
BI
11 39
BI
11 39
BI
28 39
BI
28 39
USB_ID F28
USB_BRICKID G27
CFSB
DDR0_CKEIN
DDR1_CKEIN
22
SM-2
24.000MHZ-16PF-60PPM
2
39
24M_O
1
3
2 4
1
C0613
C0607
22PF
22PF
5%
16V
2 CERM
01005
5%
16V
CERM
01005
R0651
USB_AP_VBUS
NC_USB_ID
5%
1/32W
MF
01005
USB_VBUS F27
G11
R7
Y0602
R0640
XO0 A19
T32
AP_CFSB
CRITICAL
1% MF
010051/32W
FUSE1_FSRC
W30
R0655
1.00M
BGA
NOSTUFF
XW0604
35
OUT
XTAL_24M_I
U0652
AP_FAST_SCAN_CLK
SHORT-01005
1
2
39
H4P-512MB
RST_AP_1V8_L
1%
1/32W
MF
01005
RST_PMU_IN
SYM 1 OF 12
TST_STPCLK
TST_CLKOUT
100K 2
WDOG P30
6.5MA
P33
P34
R0617
R0632
0.01UF
10%
6.3V
2 X5R
01005
28MA
2.5MA
AP_TST_STPCLK
TP_AP_TST_CLKOUT
10
1%
1/32W
MF
2 01005
2.5MA EACH
N31
M30
N29
M31
M32
N32
N30
M28
10K
1UF
10%
6.3V
2 CERM
402
C0630
5MA
R0662
JTAG_AP_TCK
C0640
7MA
17MA 17MA
R0645
1
AY4
AY20
0.00 2
AY3
R0623
C0652
100K 2
PPVBUS_USB
34
5%
1/32W
MF
01005
DZ0600
GDZT2R5.1B
GDZ-0201
R06881
42.2K
1%
1/32W
MF
01005 2
C0618
1000PF
10%
16V
2 X7R
201
NOSTUFF
XW0605
AP_DDR1_CKEIN_1V2
SHORT-01005
1
2
AP_DDR1_CKEIN
R06891
82.5K
USB_REXT A21
USB_REXT
1
R0642
44.2
NOTE:
PAGE 4608
H4P UM V0.83
USB_VSSA0
USB_VSSAC
AY1
AY2
USB_DVSS
H26
J26
AW34
10%
2 6.3V
X5R
01005
R0625
VOLTAGE=1.1V
D28
AW23
AW33
0.01UF
PP1V1_PLL_USB_F
/x
/
AW4
PP1V1_PLL2_F
C0646
PLL0_AVSS11
PLL1_AVSS11
PLL2_AVSS11
PLL3_AVSS11
PLL4_AVSS11
PLL_USB_AVSS11
MIPI_VSS_0
MIPI_VSS_1
AW1
AW2
HSIC_DVSS
AV33
AV34
0%
1/32W
MF
01005
D19
D20
D21
D18
D17
D22
AN10
AN11
AV29
0.00 2
E24
AV16
AV17
VOLTAGE=1.1V
D25
HSIC_VDD121
D24
HSIC_VDD122
F24
HSIC_DVDD
C19
PLL0_AVDD11
C20
PLL1_AVDD11
C21
PLL2_AVDD11
C18
PLL3_AVDD11
C17
PLL4_AVDD11
C22
PLL_USB_AVDD11
AR10
MIPI0D_VDD11_PLL
AT14
MIPI1D_VDD11_PLL
C28
USB_DVDD
H27
H28
USB_VDD330
AV15
HSIC_VSS121
HSIC_VSS122
AV13
AV14
C25
C24
AV12
R0622
VOLTAGE=1.1V
su
AV10
AV11
0.01UF
10%
2 6.3V
X5R
01005
om
p.
AV8
AV9
yc
AV7
0%
1/32W
MF
01005
/m
AV5
AV6
BOM OPTION
0.00 2
p:
/
AV4
tt
SC58940X01-A030
AV2
AV3
CRITICAL
R0621
D27
D32
E1
E2
E3
E4
E6
E8
E10
E12
E14
E16
E17
E18
E19
E20
E21
E22
E23
E25
E26
E27
E28
E30
E31
E32
E34
F1
F2
F3
F5
F19
F20
F21
F22
F23
F25
F26
F29
F30
F31
F32
G1
G3
G4
G7
G8
G9
G10
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G25
G28
G29
G30
H1
H2
H3
H5
H7
H8
H10
H12
H14
H16
H18
H20
H22
H24
H25
H29
H30
J1
J2
J3
J4
J7
J9
J11
J13
J15
J17
J19
SYM 11 OF 12
AV1
BGA
DESCRIPTION
U0652
H4P-512MB
AU16
AU17
QTY
10%
6.3V
2 X5R
01005
AU14
AU15
PART#
USB_BRICKID OUT
1%
1/20W
MF
2 201
35
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: MAIN
1%
1/32W
MF
01005 2
DRAWING NUMBER
Apple Inc.
051-8962
REVISION

A.0.0
BRANCH
PAGE
6 OF 106
SHEET
4 OF 42
SIZE
6
32 27 26
=PP1V8_S2R_MISC
32 28 5
R0700
4.7K
5%
1/32W
MF
2 01005
39 35 19 10 5
39 25 5
39 25 5
R0701
4.7K
5%
1/32W
MF
2 01005
R0702
4.7K
5%
1/32W
MF
2 01005
R0703
R0704
4.7K
5%
1/32W
MF
2 01005
1.8K
39 26 25 5
R0705
HOME_L
35 29 5
5%
1/32W
MF
2 01005
35 29 5
IN
35 25 5
IN
HOME_L
ONOFF_L
NC_AP_GPIO2
NC_AP_GPIO3
R0770
I2C0_SDA_1V8
I2C0_SCL_1V8
32
I2C1_SDA_1V8
I2C1_SCL_1V8
=PP1V8_ALWAYS
35 25 5
I2C2_SDA_3V0
I2C2_SCL_3V0
NC_AP_GPIO4
220K 2
1
NC_AP_GPIO5
5%
1/20W
MF
201
ONOFF_L
NC_AP_GPIO6
30
=PP1V8_S2R_MISC
32 28 5
35 25 5
PM_BT_WAKE
NC_AP_GPIO8
31 5
OUT
220K 2
PM_RADIO_ON
NC_AP_GPIO10
5%
1/20W
MF
201
SRL_L
OUT
31
IN
31
IN
35
IN
RST_DET_L
SPI_IPC_SRDY
IRQ_PMU_L
19
IN
IRQ_CODEC_L
NC_AP_GPIO14
(SCREEN ROTATION LOCK)
NC_BOARD_ID_3
25 5
10
35 5
OUT IRQ_GYRO_INT2
IN BOOT_CONFIG_0
OUT PM_KEEPACT
NC_AP_GPIO20
18
OUT IRQ_GRAPE_HOST_INT_L
31
OUT GPS_SYNC
31
10
37 5
5
10
10
31
IN
IN
IN
OUT
IN
IN
OUT
OUT
GSM_TXBURST_IND
BOOT_CONFIG_1
FORCE_DFU
DFU_STATUS
BOOT_CONFIG_2
BOOT_CONFIG_3
RST_GPS_L
PM_GPS_STANDBY_L
IRQ_PROX_INT_L
IRQ_GYRO_INT1
IRQ_GPS_INT_L
TP_IRQ_COMPASS_INT_L
IRQ_ACCEL_INT1_L
IRQ_ALS_INT_L
IRQ_ACCEL_INT2_L
AUD_SPKRAMP_MUTE_L
su
31
25
OUT
25
IN
31
IN
25
IN
26
IN
om
p.
25
IN
20
OUT
33.2
1%
1/32W
MF
01005
AC33
AD32
Y34
W34
AC32
I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT
NC_I2S_AP_2_MCK
OUT I2S_AP_2_BCLK
OUT I2S_AP_2_LRCK
I2S_AP_2_DIN
IN
OUT I2S_AP_2_DOUT
V33
V32
U34
U32
V31
I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT
NC_I2S_AP_3_MCK
I2S_AP_3_BCLK
I2S_AP_3_LRCK
OUT
I2S_AP_3_DIN
IN
OUT I2S_AP_3_DOUT
T31
W32
U31
T30
W29
I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT
W31
SPDIF
NC_I2S_AP_1_MCK
NC_I2S_AP_1_BCLK
NC_I2S_AP_1_LRCK
NC_I2S_AP_1_DIN
NC_I2S_AP_1_DOUT
BB (NOT USED)
30 19
39
30 19
39
CODEC VSP & BT
30 19
39
30 19
39
39 19
39 19
CODEC XSP
39 19
39 19
OUT
NC_AP_GPIO216
10
IN
10
IN
10
IN
BOARD_ID_2_SPI_FLASH_DOUT
BOARD_ID_1_SPI_FLASH_DIN
BOARD_ID_0_SPI_FLASH_CLK
NC_SPI_FLASH_CS_L
AE29
AG34
AE31
AE32
SPI_GRAPE_MISO
SPI_GRAPE_MOSI
SPI_GRAPE_SCLK
SPI_GRAPE_CS_L
AH32
AF28
AG32
AF31
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI_IPC_MISO
SPI_IPC_MOSI
SPI_IPC_SCLK
SPI_IPC_MRDY
AF34
AG33
AE27
AE28
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
40 17
IN
40 17
OUT
40 17
OUT
40 17
OUT
TO GRAPE
A
TO BB
40 31
IN
40 31
OUT
40 31
IN
40 31
OUT
OUT PORT_DOCK_VIDEO_AMP_EN
GPIO_3V0
GPIO_3V1
NC_GPIO_218
BGA
SC58940X01-A030
SYM 2 OF 12
EHCI_PORT_PWR0 AL7
EHCI_PORT_PWR1 AL6
EHCI_PORT_PWR2 AM6
AP_GPIO40_BRD_REV0
AP_GPIO41_BRD_REV1
AP_GPIO42_BRD_REV2
10
IN
10
IN
10
3.0V
1.8V
GROUP 1
1.8V/3.0V
GROUP 0
NC_AP_GPIO185
NC_AP_GPIO186
NC_AP_GPIO187
UART0_RXD R31
UART0_TXD R30
UART_0_RXD
UART_0_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD
UART1_TXD
AN4
AM5
AM3
AM1
UART_1_CTS_L
UART_1_RTS_L
UART_1_RXD
UART_1_TXD
UART2_CTSN
UART2_RTSN
UART2_RXD
UART2_TXD
AP4
AM2
AM4
AN5
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
AP1
AR2
AR4
AP2
UART_3_CTS_L
UART_3_RTS_L
UART_3_RXD
UART_3_TXD
IN
10
OUT
10
UART4_CTSN
UART4_RTSN
UART4_RXD
UART4_TXD
AU1
AT3
AT4
AT1
UART_4_CTS_L
UART_4_RTS_L
UART_4_RXD
UART_4_TXD
IN
10
OUT
10
UART5_RTXD AR3
UART6_CTSN
UART6_RTSN
UART6_RXD
UART6_TXD
IN
10
OUT
10
IN
10
OUT
10
IN
10
OUT
10
SRL_L IN
RST_BB_L OUT
UART_2_RXD
IN
UART_2_TXD
OUT
AUD_VOL_DOWN_L
IPC_GPIO
AUD_VOL_UP_L
TP_PROX_GPIO
TO DOCK MUX
TO BB USART
5 25 35
31
10
TO BB UMTS
10
IN
10
OUT
10
IN
10
OUT
10
BATTERY_SWI OUT
AU2
AN3
AU3
AP3
TO BT UART
TO GPS UART
33 35
IN
25
IN
31
IN
25
VSS
I2C1_SCL AD31
I2C1_SDA AE30
GROUP 7
I2C2_SCL AF30
I2C2_SDA AF29
SWI_DATA AA30
DWI_CLK AB34
DUAL-WIRE INTF DWI_DI AA31
FOR PMU
DWI_DO Y27
I2C0_SCL_1V8
I2C0_SDA_1V8
PM_KEEPACT
IRQ_GYRO_INT2
FORCE_DFU
DFU_STATUS
PM_RADIO_ON
BI
OUT
R0735
100K
5 10 19 35 39
5%
1/20W
MF
2 201
5 10 19 35 39
I2C1_SCL_1V8
I2C1_SDA_1V8
OUT
I2C2_SCL_3V0
I2C2_SDA_3V0
OUT
BI
BI
5 25 39
R0736
100K
R0737
100K
5%
1/20W
MF
2 201
R0738
100K
5%
1/20W
MF
2 201
5 35
5 25
5 37
5
5 31
R0739
100K
5%
1/20W
MF
2 201
5 25 39
5 25 26 39
5 25 26 39
NC_SWI_AP
DWI_AP_CLK
DWI_AP_DI
DWI_AP_DO
OUT
35 39
IN
35 39
OUT
35 39
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SDIO0_CLK
SDIO0_CMD
SDIO0_DATA0
SDIO0_DATA1
SDIO0_DATA2
SDIO0_DATA3
AB27
AC26
AB31
AD30
AB26
AB32
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
AH31
AH29
AH30
AG30
SDIO_WL_CLK OUT
SDIO_WL_CMD OUT
SDIO_WL_DATA<0>
BI
SDIO_WL_DATA<1>
BI
SDIO_WL_DATA<2>
BI
SDIO_WL_DATA<3>
BI
30 40
30 40
30 40
TO WIFI
30 40
30 40
30 40
GROUP 6
SYNC_MASTER=JAMES
1.8V/3.0V
GROUP 5
SYNC_DATE=N/A
PAGE TITLE
NC_SPI_AP_3_MISO
NC_SPI_AP_3_MOSI
NC_SPI_AP_3_SCLK
NC_SPI_AP_3_CS_L
AP: I/Os
DRAWING NUMBER
Apple Inc.
051-8962
REVISION
A13
A14
A15
A16
A17
A20
A30
A33
A34
AA9
5%
1/32W
MF
2 01005
VSS
IN
D
TMR32_PWM0 AC30
TMR32_PWM1 AA27
TMR32_PWM2 AB30
p:
/
OUT
I2S0_MCK
U0652
I2S0_BCLK H4P-512MB
I2S0_LRCK
BGA
I2S0_DIN SC58940X01-A030 I2C0_SCL AD26
I2S0_DOUT
SYM 3 OF 12
I2C0_SDA AD29
tt
2 I2S_AP_0_MCK Y32
I2S_AP_0_MCK_R 1
AB33
39 19
OUT I2S_AP_0_BCLK
Y31
39 19
OUT I2S_AP_0_LRCK
AC34
I2S_AP_0_DIN
39 19
IN
AA32
I2S_AP_0_DOUT
39 19
U30
V30
U0652
H4P-512MB
CODEC ASP
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
/m
R0720
OUT
yc
11
AA3
AA4
AA5
AA6
AA7
AB3
AB4
AB5
AC7
AC4
AD7
AC3
AD6
AD5
AD4
AD3
AE7
AD1
AE1
AE4
AE3
AE2
AF4
AF3
AF7
AF2
AG7
AG6
AG5
AG4
AG3
AG1
AH1
AH2
AH7
AH3
AH4
AJ5
AJ4
AJ3
/x
/
NC_AP_GPIO22
39 19
220K 2
5%
1/20W
MF
201
1.8K
5%
1/32W
MF
2 01005
R0765
39 26 25 5
R0771
=PP3V0_OPTICAL
=PP1V8_H4
32 13 10 7 4
39 35 19 10 5
A1
A2
A3
A6
A7
A8
A9
A10
A11
A12

A.0.0
BRANCH
PAGE
7 OF 106
SHEET
5 OF 42
SIZE
4
10 9 6
H4P-512MB
BGA
SYM 12 OF 12
R11
R13
R15
39 12 6
R17
R19
39 12 6
39 12 6
R21
K5
K7
R23
R25
39 12 6
39 12 6
39 12 6
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
100K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
10 9 6
5%
1/32W
MF
2 01005
R0800 R0801 R0802 R0803

1
5%
1/32W
MF
2 01005
39 12 6
39 12 6
K14
T1
39 12 6
K16
K18
T2
T3
K20
K22
T5
T7
K24
T8
K26
K30
T10
T12
K31
T14
39 12 6
K32
L1
T16
T18
39 12 6
L2
T20
39 12 6
L3
L4
T22
T24
39 12 6
39 12 6
L13
L15
U1
U3
L17
U4
L19
L21
U7
U9
L23
U11
L25
L28
U13
U15
L29
L30
U17
U19
L31
U21
L32
L33
U23
U25
R0860 R0861 R0862 R0863
U27
5%
1/32W
MF
2 01005
39 12 6
R0864 R0865 R0866 R0867

1
39 12 6
1
39 12 6
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
100K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
39 12 6
5%
1/32W
MF
2 01005
F0ALE
F0CLE
F1ALE
F1CLE
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
BGA
H4P-512MB
V2
M8
M10
V3
V5
39 12 6
OUT
39 12 6
OUT
M12
M14
V7
V8
39 12 6
OUT
39 12 6
OUT
M16
V10
39 12 6
OUT
M18
M20
V12
V14
39 12 6
OUT
39 12 6
OUT
M22
V16
39 12 6
OUT
M24
M26
V18
V20
M29
V22
M33
N1
V24
V26
N2
N3
V28
V34
N4
W1
N7
N9
W2
W3
N11
AV20
AW21
AU19
AU20
AV31
AT31
AV32
AU30
FMI0_CEN0
FMI0_CEN1
FMI0_CEN2
FMI0_CEN3
FMI0_CEN4
FMI0_CEN5
FMI0_CEN6
FMI0_CEN7
AV18
AU18
AT22
AW19
AV21
AU22
AY21
AR20
FMI0_IO0
FMI0_IO1
FMI0_IO2
FMI0_IO3
FMI0_IO4
FMI0_IO5
FMI0_IO6
FMI0_IO7
AT20
AU21
AT19
AV22
AT21
FMI0_ALE
FMI0_CLE
FMI0_WEN
FMI0_REN
FMI0_DQS
AN22
AY19
AP20
AT18
AN30
AU34
AU33
AP30
FMI1_CEN0
FMI1_CEN1
FMI1_CEN2
FMI1_CEN3
FMI1_CEN4
FMI1_CEN5
FMI1_CEN6
FMI1_CEN7
F1AD<0>
F1AD<1>
F1AD<2>
F1AD<3>
F1AD<4>
F1AD<5>
F1AD<6>
F1AD<7>
AV25
AU23
AW25
AU25
AU24
AV24
AT23
AV23
FMI1_IO0
FMI1_IO1
FMI1_IO2
FMI1_IO3
FMI1_IO4
FMI1_IO5
FMI1_IO6
FMI1_IO7
F1ALE
F1CLE
F1WE_L
F1RE_L
AP23
AV19
AN23
AN21
AY25
FMI1_ALE
FMI1_CLE
FMI1_WEN
FMI1_REN
FMI1_DQS
F0CE0_L
F0CE1_L
F0CE2_L
F0CE3_L
F0CE4_L
F0CE5_L
F0CE6_L
F0CE7_L
BI
39 12
BI
39 12
BI
39 12
BI
39 12
BI
39 12
BI
39 12
BI
39 12
BI
F0AD<0>
F0AD<1>
F0AD<2>
F0AD<3>
F0AD<4>
F0AD<5>
F0AD<6>
F0AD<7>
p:
/
39 12
39 12 6
OUT
W4
39 12 6
OUT
N13
N15
W7
W9
39 12 6
OUT
39 12 6
OUT
N17
W11
N19
N21
W13
W15
N23
N25
W17
W19
N27
W21
N28
P1
W23
W25
P2
W27
P3
P5
Y3
Y5
39 12
BI
P7
Y7
39 12
BI
P8
P10
Y8
Y10
39 12
BI
39 12
BI
P12
P14
Y12
Y14
39 12
BI
39 12
BI
Y16
39 12
BI
P18
P20
Y18
Y20
39 12
BI
P22
Y22
P24
P26
Y24
Y29
R1
Y30
F0ALE
F0CLE
F0WE_L
F0RE_L
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
39 12 6
OUT
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
39 12 6
OUT
NC_AP_GPIO76
F1CE0_L
F1CE1_L
F1CE2_L
F1CE3_L
F1CE4_L
F1CE5_L
F1CE6_L
F1CE7_L
NC_AP_GPIO93
GROUP 2
GROUP 2
SYM 4 OF 12
GROUP 3
3.3V
GROUP 2
GROUP 5
GROUP 2
GROUP 2
GROUP 4
GROUP 3
3.3V
GROUP 5
GROUP 4
GROUP 2
FMI2_CEN0
FMI2_CEN1
FMI2_CEN2
FMI2_CEN3
FMI2_CEN4
FMI2_CEN5
FMI2_CEN6
FMI2_CEN7
AY26
AU26
AW26
AV26
AP34
AL32
AK31
AM32
NC_F2CE0_L
NC_F2CE1_L
NC_F2CE2_L
NC_F2CE3_L
FMI2_IO0
FMI2_IO1
FMI2_IO2
FMI2_IO3
FMI2_IO4
FMI2_IO5
FMI2_IO6
FMI2_IO7
AY29
AR30
AU29
AV28
AY28
AW30
AW28
AU28
NC_F2AD<0>
NC_F2AD<1>
NC_F2AD<2>
NC_F2AD<3>
NC_F2AD<4>
NC_F2AD<5>
NC_F2AD<6>
NC_F2AD<7>
FMI2_ALE
FMI2_CLE
FMI2_WEN
FMI2_REN
FMI2_DQS
AW27
AU27
AV27
AY27
AV30
NC_F2ALE
NC_F2CLE
NC_F2WE_L
NC_F2RE_L
FMI3_CEN0
FMI3_CEN1
FMI3_CEN2
FMI3_CEN3
FMI3_CEN4
FMI3_CEN5
FMI3_CEN6
FMI3_CEN7
AT30
AP31
AU31
AU32
AN34
AM33
AM34
AN33
FMI3_IO0
FMI3_IO1
FMI3_IO2
FMI3_IO3
FMI3_IO4
FMI3_IO5
FMI3_IO6
FMI3_IO7
AP33
AL31
AR34
AN32
AM31
AN31
AR32
AP32
NC_F3AD<0>
NC_F3AD<1>
NC_F3AD<2>
NC_F3AD<3>
NC_F3AD<4>
NC_F3AD<5>
NC_F3AD<6>
NC_F3AD<7>
FMI3_ALE
FMI3_CLE
FMI3_WEN
FMI3_REN
FMI3_DQS
AT32
AT34
AT33
AR31
AR33
NC_F3ALE
NC_F3CLE
NC_F3WE_L
NC_F3RE_L
RST_MLC_L
TP_GPIO_SD_CTRL
RST_GRAPE_L OUT
GRAPE_FW_DNLD_EN_L OUT
17
17
OUT
14
R0878
100K
5%
1/32W
MF
2 01005
NC_AP_GPIO_110
NC_F3CE0_L
NC_F3CE1_L
NC_F3CE2_L
NC_F3CE3_L
NC_AP_GPIO_147
TP_RST_SD_CTRL_L
PM_MLC_PWR_EN
OUT
36
TP_CD_SD_CTRL_L
SYNC_MASTER=JAMES
AP: NAND
DRAWING NUMBER
NC_AP_GPIO_135
Apple Inc.
051-8962
REVISION
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA29
AB1
AB6
AB8
SYNC_DATE=N/A
PAGE TITLE
VSS
100K
U0652
U28
V1
M7
P16
5%
1/32W
MF
2 01005
R0810 R0811 R0812 R0813
yc
VSS
/m
VSS
5%
1/32W
MF
2 01005
F1CE4_L
F1CE5_L
F1CE6_L
F1CE7_L
F0CE4_L
F0CE5_L
F0CE6_L
F0CE7_L
100K
39 12 6
100K
F0WE_L
F0RE_L
F1WE_L
F1RE_L
/x
/
T33
5%
1/32W
MF
2 01005
su
T26
T29
=PPIO_NAND_H4
om
p.
L7
L9
L11
39 12 6
39 12 6
100K
R29
R34
39 12 6
100K
R27
39 12 6
=PPIO_NAND_H4
100K
K8
10 9 6
R0831 R0834 R0825 R0827

1
K10
K12
M3
M5
39 12 6
5%
1/32W
MF
2 01005
F1CE0_L
F1CE1_L
F1CE2_L
F1CE3_L
F0CE0_L
F0CE1_L
F0CE2_L
F0CE3_L
100K
SC58940X01-A030
M1
R0832 R0836 R0833 R0828
R4
R9
tt
U0652
=PPIO_NAND_H4
R3
J21
J23
J25
J27
J28
J29
J30
K1
K3

A.0.0
BRANCH
PAGE
8 OF 106
SHEET
6 OF 42
SIZE
MIN_NECK_MIDTH SHOULD BE 0.2MM

VOLTAGE=1.8V
=PP3V0_IO_H4
32 9
C0954
10
0.01UF
R0910
PP_AP_DP_AVDD_AUX
10%
6.3V
2 X5R
01005
C0927
C0926
0.22UF
0.22UF
20%
6.3V
2 X5R
402
C0925
0.22UF
20%
2 6.3V
X5R
402
20%
2 6.3V
X5R
402
56PF
5%
2 6.3V
NP0-C0G
01005
=PP1V8_DPORT_H4
5%
1/20W
MF
201
C0924
32
C0923
56PF
5%
2 6.3V
NP0-C0G
01005
=PP3V0_VIDEO_H4
32 7
C0951
1UF
PP_DP_PAD_AVDD0
C0952
32 13 10 5 4
10%
2 6.3V
X5R
01005
R0930
PP_DP_PAD_AVDD1
H4P-512MB
DAC_COMP
DP_PAD_DVDD J31
DAC_AP_OUT3 OUT
DAC_AP_OUT2 OUT
DAC_AP_OUT1 OUT
11
40
11
40
YIN
11
40
CIN
CVBSIN
BGA
6.34K
DP_HPD R32
1%
1/20W
MF
201 2
DP_AP_HPD
13
DP_AP_AUX_P
DP_AP_AUX_N
BI
13 40
BI
13 40
DP_AP_TX_P<0> OUT
DP_AP_TX_N<0> OUT
DP_PAD_TX1P A32
DP_PAD_TX1N A31
DP_AP_TX_P<1> OUT
DP_AP_TX_N<1> OUT
R0955 1R0956 1R0957

200
200
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
10 13 40
10 13 40
10%
6.3V
2 CERM
402
=PP1V8_MIPI_H4
1
tt
C0907
0.1UF
5%
1/32W
MF
2 01005
R0933
1.00K
5%
1/32W
MF
2 01005
ISP_AP_0_SCL
ISP_AP_0_SDA
ISP_AP_1_SCL
ISP_AP_1_SDA
C0902
2.2NF
10%
2 6.3V
X5R
201
VOLTAGE=0.4V
10%
2 10V
X5R
201
PP_AP_MIPI1D_0P4V
1
C0908
0.1UF
10%
6.3V
2 X5R
201
C0903
0.1UF
10%
6.3V
2 X5R
201
40 27
MIPI_VDD11
28MA
IN
40 27
IN
NC_AP_GPIO184
AA26
MIPI_VSYNC
MIPI0C_AP_DATA_P<0>
MIPI0C_AP_DATA_N<0>
AW10
AY10
MIPI0C_DPDATA0
MIPI0C_DNDATA0
NC_MIPI0C_AP_DATA_P<1>
NC_MIPI0C_AP_DATA_N<1>
REAR CAMERA
40 27
OUT
40 27
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
40 14
OUT
MIPI0C_AP_CLK_P
MIPI0C_AP_CLK_N
AW11
AY11
MIPI0C_DPDATA1
MIPI0C_DNDATA1
AW13
AY13
MIPI0C_DPDATA2
MIPI0C_DNDATA2
AW14
AY14
MIPI0C_DPDATA3
MIPI0C_DNDATA3
AW12
AY12
SYM 5 OF 12
SC58940X01-A030
GROUP 5
U0652
MIPI0C_DPCLK
MIPI0C_DNCLK
H4P-512MB
BGA
C0920
2.2NF
10%
10V
2 X5R
201
ISP0_FLASH
ISP0_PRE_FLASH
ISP0_SCL
ISP0_SDA
AG31
AG29
AE26
AC29
NC_AP_GPIO153
ISP1_FLASH
ISP1_PRE_FLASH
ISP1_SCL
ISP1_SDA
AJ32
AG28
AC31
AF27
NC_AP_GPIO155
SENSOR0_CLK AA33
SENSOR0_RST Y26
SENSOR1_CLK AA34
SENSOR1_RST Y33
MIPID_AP_DATA_P<0>
MIPID_AP_DATA_N<0>
AW5
AY5
MIPI0D_DPDATA0
MIPI0D_DNDATA0
MIPI1C_DPDATA0 AW15
MIPI1C_DNDATA0 AY15
MIPID_AP_DATA_P<1>
MIPID_AP_DATA_N<1>
AW6
AY6
MIPI0D_DPDATA1
MIPI0D_DNDATA1
MIPI1C_DPDATA1 AW17
MIPI1C_DNDATA1 AY17
MIPID_AP_DATA_P<2>
MIPID_AP_DATA_N<2>
AW8
AY8
MIPI0D_DPDATA2
MIPI0D_DNDATA2
MIPI1C_DPCLK AW16
MIPI1C_DNCLK AY16
MIPID_AP_DATA_P<3>
MIPID_AP_DATA_N<3>
AW9
AY9
MIPI0D_DPDATA3
MIPI0D_DNDATA3
MIPID_AP_CLK_P
MIPID_AP_CLK_N
AW7
AY7
MIPI0D_DPCLK
MIPI0D_DNCLK
NC_AP_GPIO152
ISP_AP_0_SCL OUT
ISP_AP_0_SDA
BI
7 25 39
REAR CAMERA
7 25 39
NC_AP_GPIO154
ISP_AP_1_SCL OUT
ISP_AP_1_SDA
BI
7 26 39
FRONT CAMERA
7 26 39
R0900
CLK_CAM_RF_R
22
CLK_CAM_RF
OUT
27 39
PM_REAR_CAM_SHUTDOWN
OUT
25
CLK_CAM_FF
OUT
26 39
PM_FRONT_CAM_SHUTDOWN
OUT
26
R0940
CLK_CAM_FF_R
22
MIPI1C_AP_DATA_P<0> IN
MIPI1C_AP_DATA_N<0> IN
26 40
26 40
FRONT CAMERA
MIPI1C_AP_CLK_P
MIPI1C_AP_CLK_N
OUT
26 40
OUT
26 40
MIPI_VSS
AN12
AP12
AR14
AR16
AR17
AR18
1.00K
PP_AP_MIPI0D_0P4V
2MA ???
PLACE R0955-57 NEAR U0652
p:
/
NOTE:
10 13 40
/m
DP_PAD_DVSS
200
10 13 40
C0930
1UF
yc
DP_PAD_TX0P D34
DP_PAD_TX0N C34
J32
1%
1/32W
MF
2 01005
DP_PAD_AVSSP0
4.99K
M27 DAC_AVSS30A
K27 DAC_AVSS30A
X5R 2
01005
R0920
C31
0.01UF
10%
NOSTUFF 6.3V
DP_PAD_AVSS0
DP_PAD_AVSS1
DP_PAD_AVSS_AUX
C0950
DP_PAD_R_BIAS
DP_PAD_AVSSX
0.6V ANALOG REF

AP_DP_R_BIAS H34
D29
C30
NOTE:
DP_PAD_AUXP G34
DP_PAD_AUXN F34
DP_PAD_DC_TP
H32
H33
R0932
32
TP_DP_AP_ANALOG_TEST
32
=PP1V1_MIPI_H4
IN
5%
1/32W
MF
2 01005
VOLTAGE=0.4V
MIPI1D_VREG_0P4V AR15
K34
DAC_OUT3 L34
DAC_OUT2 M34
DAC_OUT1 N34
39 26 7
MIPI0D_VREG_0P4V AR11
DAC_AP_COMP
U0652
DAC_IREF
DAC_AVSS30D
10%
6.3V
X5R 2
201
R09501
SC58940X01-A030
G31
2MA
SYM 6 OF 12
DAC_VREF
39 26 7
MIPI0D_VDD18 AN13
MIPI1D_VDD18 AN15
J34
DAC_AP_IREF
0.1UF
1.2MA
5MA
su
J33
DAC_AP_VREF
C0956
0.1UF
10%
6.3V
2 X5R
201
<= 5MA
K28
39 25 7
AP10
AP11
AP13
AP14
AP15
AP16
AP17
AP18
AR12
0.1UF
10%
6.3V
2 X5R
201
63MA 63MA
39 25 7
C0909
/x
/
6MA
DP_PAD_AVDDX G32
21MA
C0955
om
p.
DP_PAD_AVDDP0 D31
DAC_AP_COMP_FTR
DP_PAD_AVDD0 E29
DP_PAD_AVDD1 D30
2
0201
DP_PAD_AVDD_AUX H31
DAC_AVDD30D K29
240-OHM-0.2A-0.8-OHM
DAC_AVDD30A L27
32
=PP3V0_VIDEO_H4
R0931
4.7K
5%
1/32W
MF
2 01005
=PP1V1_DPORT_H4
FL0910
4.7K
10
VOLTAGE=1.8V
32 7
=PP1V8_H4
10
0.01UF
10%
2 6.3V
CERM
402
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: TV,DP,MIPI
DRAWING NUMBER
Apple Inc.
051-8962
REVISION

A.0.0
BRANCH
PAGE
9 OF 106
SHEET
7 OF 42
SIZE
=PP1V2_S2R_H4
2.21K
1%
1/32W
MF
2 01005
32
PPVREF_DDR1_CA
PPVREF_DDR0_CA
8 39
VOLTAGE=0.6V
R1052
=PP1V2_VDDQ_H4
2.21K
NET_SPACING_TYPE=VREF
NOSTUFF
VOLTAGE=0.6V
C1052
0.01UF
1%
1/32W
MF
2 01005
10%
6.3V
2 X5R
01005
R1055
1.00K
32 8
1.00K
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
C1000
1.00K
1%
1/32W
MF
2 01005
C1054
0.01UF
10%
6.3V
2 X5R
01005
C1001
PPVREF_DDR1_DQ
20%
6.3V 2
X5R
0201
U0652
R1056
1.00K
NOSTUFF
0.01UF
1%
1/32W
MF
2 01005
10%
6.3V
2 X5R
01005
H11
R8
39 8
39 8
39 8
R1001
39 8
240
(DDR IMPEDANCE CONTROL)
PPVREF_DDR0_CA
PPVREF_DDR1_CA
AY23
AE34
PPVREF_DDR1_DQ
PPVREF_DDR0_DQ
AA1
A25
DDR0_ZQ
2
1% 1/20W MF 201
2
1% 1/20W MF 201
DDR1_ZQ
R1000
=PP1V2_S2R_H4
DDR0_VDDQ_CKE
DDR1_VDDQ_CKE
DDR0_VREF_CA
DDR1_VREF_CA
<1MA
SYM 7 OF 12
AY18
AK34
DDR1_VREF_DQ
DDR0_VREF_DQ
VSS_36 AB18
VSS_37 AB20
DDR0_ZQ
DDR1_ZQ
VSS_38 AB22
VSS_39 AB24
VDDCA
VSS
80MA
C1009
4.3UF
10UF
C1010
20%
6.3V
X5R 2
0201
C1011 1
1UF
1UF
C1006
0.22UF
20%
6.3V 2
X5R
0201
20%
6.3V
X5R 2
0201
C1012
C1013
0.01UF
56PF
10%
10V
X5R 2
201
10%
6.3V
CERM 2
402
10%
6.3V
CERM 2
402
A24
AA2
AF33
AK33
AL1
AW22
AW31
B4
B5
B25
F33
T34
Y1
C1007 1
0.22UF
5%
6.3V
NP0-C0G 2
01005
NOSTUFF
=PP1V8_S2R_H4
C1015
10UF
20%
6.3V
X5R 2
603
C1016
1UF
1UF
10%
6.3V
CERM 2
402
10%
6.3V
CERM 2
402
C1019
C1020 1
0.22UF
0.22UF
20%
6.3V 2
X5R
0201
0.01UF
C1018
0.01UF
10%
6.3V
X5R 2
01005
10%
6.3V
X5R 2
01005
C1021 1
C1022
0.22UF
56PF
20%
6.3V 2
X5R
0201
5%
6.3V
NP0-C0G 2
01005
NOSTUFF
20%
6.3V 2
X5R
0201
C1017
32 8
=PP1V2_VDDQ_H4
C1023
C1024
10UF
C1026
4.3UF
20%
6.3V
X5R 2
603
0.01UF
20%
4V
X5R-CERM 2
0610
C1027 1
C1029 1
56PF
0.22UF
5%
6.3V
NP0-C0G 2
01005
20%
6.3V 2
X5R
0201
C1030
0.22UF
20%
6.3V 2
X5R
0201
C1031
0.22UF
20%
6.3V 2
X5R
0201
NOSTUFF
10%
6.3V
X5R 2
01005
VDD2
320MA
A4
A5
AB2
AL2
AL33
AW18
AW32
B26
E33
U33
p:
/
C1014
tt
32
20%
4V
X5R-CERM 2
0610
20%
6.3V
X5R 2
603
0.22UF
VSS
/m
C1005
20%
6.3V
X5R 2
0201
yc
32 8
C1004
VSS_34 AB14
VSS_35 AB16
AC2
AG2
AK2
AN2
AT2
AW3
B3
B6
B8
B11
B14
B16
B19
B21
B24
B27
B31
D2
D33
G2
G33
K2
K33
M2
N33
R2
R33
U2
Y2
VDD1
VSS
40MA
VDDQ
VSS
500MA
(VDDQ = VDDIOD:
AB29
AC1
AC5
AC9
AC11
AC13
C1037
20%
6.3V 2
X5R
0201
VSS_32 AB10
VSS_33 AB12
<1MA
SC58940X01-A030
AD33
AH33
AW20
AW24
AW29
W33
240
0.22UF
0.22UF
H4P-512MB
VOLTAGE=0.6V
C1056
C1036
BGA
8 39
VOLTAGE=0.6V
C1008
20%
6.3V
X5R 2
0201
0.22UF
20%
6.3V
X5R 2
0201
8 39
0.22UF
20%
4V
X5R-CERM 2
0610
=PP1V2_S2R_H4
0.22UF
PPVREF_DDR0_DQ
R1054
C1035
4.3UF
20%
6.3V
X5R 2
603
R1053
NOSTUFF
C1034
10UF
=PP1V2_VDDQ_H4
32 8
C1032
/x
/
C1002
0.01UF
10%
6.3V
2 X5R
01005
D4
D6
D8
D10
D12
D14
E5
E7
E9
E11
E13
E15
F4
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
G5
G6
H4
H6
J5
J6
K4
K6
L5
L6
M4
M6
N5
N6
P4
P6
R5
R6
T4
T6
U5
U6
V4
V6
W5
W6
Y4
Y6
C1038
0.22UF
20%
6.3V 2
X5R
0201
C1039
0.22UF
C1040 1
20%
6.3V 2
X5R
0201
5%
6.3V
NP0-C0G 2
01005
0.22UF
20%
6.3V 2
X5R
0201
56PF
NOSTUFF
su
NOSTUFF
=PP1V2_VDDIOD_H4
8 39
om
p.
2.21K
32 8
R1051
1%
1/32W
MF
2 01005
2.21K
1%
1/32W
MF
2 01005
32 8
R1005
R1006
=PP1V2_S2R_H4
8 32
DONT DOUBLE COUNT)
AC15
AC17
AC19
AC21
AC23
AC25
AC27
AD2
AD8
AD10
AD12
AD14
AD16
AD18
AD20
AD22
AD24
AD27
AD34
AE5
AE9
AE11
AE13
=PP1V8_VDDIO18_H4
C1041
56PF
C1042
0.22UF
5%
6.3V
NP0-C0G 2
01005
20%
6.3V
X5R 2
0201
C1043
1UF
10%
6.3V
CERM 2
402
NOSTUFF
AE15
AE17
AE19
AE21
AE23
AE25
AE33
AF1
AF5
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF32
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AG25
C1044
0.22UF
20%
6.3V
X5R 2
0201
C1045
0.22UF
20%
6.3V
X5R 2
0201
C1046
BGA
SYM 9 OF 12
SC58940X01-A030
VDDIOD
1UF
10%
6.3V
CERM 2
402
VSS
500MA
(VDDQ = VDDIOD:
AA28
AB7
AB28
AC6
AC28
AD28
AE6
AF6
AH6
AN6
AN7
AN8
H23
P28
R28
T28
W28
Y28
32 9
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM29
AM30
AN1
AN14
AN16
AN17
AN18
AN19
AN20
AN24
AN25
AN26
AN27
AN28
AN29
AP5
AP6
AP7
AP8
AP9
AP19
AP21
AP22
AR1
AR5
AR6
AR7
AR8
AR9
AR13
AR19
AR24
AR25
AR26
AR27
AR28
AR29
AT5
AT6
AT7
AT8
AT9
AT10
AT11
AT12
AT13
AT15
U0652
H4P-512MB
DONT DOUBLE COUNT)
VDDIO18
AT16
AT17
AT24
AT25
AT26
AT27
AT28
AT29
AU4
AU5
AU6
AU7
AU8
AU9
AU10
AU11
AU12
AU13
VSS
44MA
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: PWR
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
10 OF 106
SHEET
8 OF 42
=PPVDD_SOC_H4
C1109 1
1
20%
6.3V
X5R 2
0201
C11121
0.22UF
20%
6.3V 2
X5R
0201
20%
6.3V
X5R 2
0201
C11131
0.22UF
20%
6.3V 2
X5R
0201
C11181
C1117 1
0.22UF
0.22UF
20%
6.3V 2
X5R
0201
C1121
0.22UF
20%
6.3V 2
X5R
0201
C1106 1
C1107 1
56PF
56PF
5%
6.3V
NP0-C0G 2
01005
C1110
0.22UF
20%
6.3V
X5R 2
0201
C1114
1
0.22UF
20%
6.3V 2
X5R
0201
C1119
1
0.22UF
20%
6.3V 2
X5R
0201
5%
6.3V
NP0-C0G 2
01005
C1111 1
0.22UF
20%
6.3V
X5R 2
0201
C11151
0.22UF
20%
6.3V 2
X5R
0201
C11201
0.22UF
20%
6.3V 2
X5R
0201
4.3UF
20%
4V
X5R-CERM 2
0610
C11161
0.22UF
20%
6.3V 2
X5R
0201
BGA
SYM 10 OF 12
SC58940X01-A030
VDD
VDD
2100MA
AL20
AL22
AL24
AL26
AM9
AM11
AM13
AM15
AM17
AM19
AM21
AM23
AM25
H9
H13
H15
H17
H19
H21
J8
J10
J12
J14
J16
J18
J20
J22
J24
K9
K11
K13
K15
K17
K19
K21
K23
K25
L8
L10
L12
L14
L16
L18
L20
L22
L24
L26
M9
M11
M13
M15
M17
M19
M21
M23
M25
N20
N22
N24
N26
P19
P21
P23
P25
P27
R20
R22
R24
R26
T19
T21
T23
T25
T27
U20
U22
U24
U26
V19
V21
V23
V25
V27
W20
W22
W24
W26
Y19
Y21
Y23
Y25
=PPVDD_CPU_H4
AA8
AA10
AA12
AA14
AA16
AA18
N8
N10
N12
N14
N16
N18
P9
P11
P13
P15
P17
R10
R12
R14
R16
R18
T9
T11
T13
T15
T17
U8
U10
U12
U14
U16
U18
V9
V11
V13
V15
V17
W8
W10
W12
W14
W16
W18
Y9
Y11
Y13
Y15
Y17
32
C1125
C1126
10UF
C1129
C1130
20%
4V
X5R-CERM 2
0610
C1131 1
C1132 1
56PF
5%
6.3V
NP0-C0G 2
01005
C1133
C1134 1
0.22UF
20%
6.3V 2
X5R
0201
20%
6.3V 2
X5R
0201
4.3UF
20%
4V
X5R-CERM 2
0610
56PF
0.22UF
56PF
5%
6.3V
NP0-C0G 2
01005
C1135
5%
6.3V
NP0-C0G 2
01005
C1136
20%
6.3V
X5R 2
0201
20%
6.3V 2
X5R
0201
C11391
0.22UF
20%
6.3V 2
X5R
0201
20%
6.3V 2
X5R
0201
0.22UF
0.22UF
20%
6.3V 2
X5R
0201
C11381
0.22UF
C1128
4.3UF
5%
6.3V
NP0-C0G 2
01005
C11371
C1127
20%
4V
X5R-CERM 2
0610
56PF
0.22UF
4.3UF
20%
6.3V
X5R 2
603
/x
/
C1108
0.22UF
5%
6.3V
NP0-C0G 2
01005
NOSTUFF
U0652
H4P-512MB
su
5%
6.3V
NP0-C0G 2
01005
56PF
NOSTUFF
AA20
AA22
AA24
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AD9
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD25
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF23
AF25
AG8
AG10
AG12
AG14
AG16
AG18
AG20
AG22
AG24
AG26
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH25
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AJ26
AK9
AK11
AK13
AK15
AK17
AK19
AK21
AK23
AK25
AL8
AL10
AL12
AL14
AL16
AL18
C11411
C1140
1
0.22UF
0.22UF
20%
6.3V 2
X5R
0201
20%
6.3V 2
X5R
0201
om
p.
C1105
56PF
20%
4V
X5R-CERM 2
0610
yc
NOSTUFF
4.3UF
20%
4V
X5R-CERM 2
0610
=PP3V0_IO_H4
G23
G24
U29
V29
32 9 7
C1142
/m
C1104
C1103
4.3UF
20%
6.3V 2
X5R
603
NOSTUFF
C1102
10UF
20%
4V
X5R-CERM 2
0610
C1143
0.22UF
0.22UF
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
AJ7
AK7
U0652
H4P-512MB
BGA
SYM 8 OF 12
SC58940X01-A030
VDD_CPU
AN9
32 8
AP24
AP25
AP26
AP27
AP28
AR21
AR22
AR23
NOSTUFF
C1150
C1151
0.22UF
C1152
0.22UF
20%
6.3V 2
X5R
0201
56PF
20%
6.3V 2
X5R
0201
5%
6.3V
NP0-C0G 2
01005
VSS
VDDIO30
100MA
VDDIOD0
VDDIOD1
10MA
=PP1V8_VDDIO18_H4
VSS
1900MA
9MA
p:
/
C1101
4.3UF
VDDIOD2
24MA
AK32
AL3
AL4
AL5
VSS
AL13
UART4
1.8V
VSS
FMI[0-2]
3.3V
10 6
AP29
C1144
0.22UF
20%
6.3V 2
X5R
0201
C1145
0.22UF
20%
6.3V 2
X5R
0201
C1146
C1147
56PF
C1148
1UF
5%
6.3V
NP0-C0G 2
01005
1UF
10%
6.3V 2
CERM
402
10%
6.3V 2
CERM
402
C1149
VDDIOD3
1
AL27
AM27
10UF
20%
6.3V 2
X5R
603
=PP3V0_IO_H4
32 9 7
1UF
10%
6.3V 2
CERM
402
C1181
1UF
10%
6.3V 2
CERM
402
C1182
1UF
10%
6.3V
CERM 2
402
C1160
0.22UF
20%
6.3V
X5R 2
0201
C1161
VDDIOD4
24MA
NOSTUFF
C1180
24MA
FMI[0-1]_CEN[4-7]
3.3V
AL15
AL17
AL19
AL21
AL23
AL25
AL28
AL29
AJ27
AK27
FMI[2-3]_CEN[4-7] VSS
SPI3,ISP FLASH
VDDIOD5 NOT
USED
24MA
AH27
AG27
VDDIOD6
VDDIOD7
1MA
1MA
SPI1
I2C2
AL30
AL34
AM7
FMI[3]
3.3V
3.0V
AM8
AM10
AM12
AM14
0.22UF
20%
6.3V
X5R 2
0201
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: PWR
DRAWING NUMBER
Apple Inc.
051-8962
SIZE
REVISION

AL9
AL11
GPIO[30-39]
1.8V
AH5
AH8
AH10
AH12
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH34
AJ1
AJ2
AJ6
AJ9
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21
AJ23
AJ25
AJ28
AJ29
AJ30
AJ31
AJ33
AJ34
AK1
AK3
AK4
AK5
AK6
AK8
AK10
AK12
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK29
AK30
=PPIO_NAND_H4
tt
C1100
32
A.0.0
BRANCH
PAGE
11 OF 106
SHEET
9 OF 42
BOOT CONFIG ID
32 13 10 7 5 4
=PP1V8_H4
FMI_TEST
1
R1200
10K
BOOT_CONFIG[3] (GPIO29)
BOOT_CONFIG_3
BOOT_CONFIG_2
BOOT_CONFIG_1
BOOT_CONFIG_0
5%
1/20W
MF
2 201
R1201
10K
5%
1/20W
MF
2 201
R1202
10K
5%
1/20W
MF
2 201
JTAG
FMI_NOTEST
1
R1203
10K
R1212
5%
1/32W
MF
2 01005
JTAG_DAP
39 4
JTAG_AP_TDO
IN
100
AP_JTAG_SEL
OUT
VIDEO_EMI_C_Y
OUT
11 28 40
IN
11 28 40
IN
11 28 40
R1213
JTAG_DAP
39 4
JTAG_AP_TDI
OUT
1
BOOT_CONFIG[3-0]
100
JTAG_AP_TRST_L
OUT
4 10 39
1.
2.
3.
VIDEO_EMI_Y_PR
S/W READ FLOW
FMI0/1 4/4 CS
FMI0/1 4/4 CS WITH TEST
0.00 2
0%
1/32W
MF
01005
R1211
1101
1110
0.00 2
0%
1/32W
MF
01005
R1210
R1214
SET GPIO AS INPUT

DISABLE PU AND ENABLE PD
READ
39 10 4
OUT
JTAG_AP_TRST_L
0.00 2
VIDEO_EMI_CVBS_PB
0%
1/32W
MF
01005
2-WIRE DAP
SCAN DUMP
PRODUCTION
BOARD ID
=PP1V8_H4
K93-K94
K94-K95
K9X_DEV
R1204 1R1205 1R1206
BOARD_ID[2]
BOARD_ID_2_SPI_FLASH_DOUT
BOARD_ID[1]
BOARD_ID_1_SPI_FLASH_DIN
BOARD_ID[0]
BOARD_ID_0_SPI_FLASH_CLK
BOARD_ID[3-0]
0100
0101
0110
0111
0010
0011
K93
K93
K94
K94
K95
K95
AP
DEV
AP
DEV
AP
DEV
10K
5%
1/32W
MF
2 01005
PLACEMENT NOTE:
S/W READ FLOW

1.
2.
3.
SET GPIO AS INPUT

DISABLE PU AND ENABLE PD
READ
5
5
DP_AP_TX_P<1>
OUT
DP_AP_TX_N<1>OUT
SIGNAL_MODEL=EMPTY
NOSTUFF
1
AP_GPIO42_BRD_REV2
AP_GPIO41_BRD_REV1
AP_GPIO40_BRD_REV0
R1251
150
150
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
DP_TERM_C1250
NOSTUFF
R1207 1R1208 1R1209
5%
1/20W
MF
2 201
10K
5%
1/20W
MF
2 201
FMI0/1 4/4 CS W/TEST

RESERVED
PP_DP_PAD_AVDD0
PP_DP_PAD_AVDD1
7 13 40
7 13 40
7 13 40
7 13 40
=PPIO_NAND_H4
=PP3V3_NAND_H4
9 6
32
R1253
150
150
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
R1260
1
NOSTUFF
SIGNAL_MODEL=EMPTY
NOSTUFF
1
XW0601
C1251
NOSTUFF
100PF
XW0602
5%
25V
2 CERM
201
NOSTUFF
XW0603
UART_0_RXD
UART_0_TXD
5
5
MAKE_BASE=TRUE
100
AP_TESTMODE 4
5%
1/32W
MF
01005
SHORT-01005
1
2
AP_TST_STPCLK
SHORT-01005
1
2
SHORT-01005
1
2
AP_FAST_SCAN_CLK
AP_HOLD_RESET
UART_AP_0_RXD IN
UART_AP_0_TXD OUT
11
TO DOCK MUX
11
MAKE_BASE=TRUE
UART_1_CTS_L
UART_1_RTS_L
UART_1_RXD
UART_1_TXD
5
5
5
5
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
UART_AP_1_CTS_L
IN
UART_AP_1_RTS_L OUT
UART_AP_1_RXD IN
UART_AP_1_TXD OUT
31
31
TO BB USART
31
31
MAKE_BASE=TRUE
UART_2_RXD
UART_2_TXD
5
5
MAKE_BASE=TRUE
UART_AP_2_RXD IN
UART_AP_2_TXD OUT
31
TO BB UMTS
31
MAKE_BASE=TRUE
UART_3_CTS_L
UART_3_RTS_L
UART_3_RXD
UART_3_TXD
BOOT_CONFIG[3:0]
0000
SPI0
0001
SPI3
0010
SPI0 W/TEST
0011
SPI3 W/TEST
0100
FMI0 2CS
0101
FMI0 4CS
0110
FMI0 4CS W/TEST
0111
RESERVED
1000
FMI1 2 CS
1001
FMI1 4 CS
1010
FMI1 4CS W/TEST
1011
RESERVED
1100
FMI0/1 2/2 CS
CURRENT SETTING -> 1101
FMI0/1 4/4 CS
1111
R1252
p:
/
FOR REFERENCE
1110
C1250
5%
25V
2 CERM
201
SET GPIO AS INPUT

ENABLE PU AND DISABLE PD
READ
MAKE_BASE=TRUE
DP_TERM_C1251
100PF
S/W READ FLOW

1.
2.
3.
PROTO 1
PROTO 2
EVT
EVT2
DVT
PP_AP_DP_AVDD_AUX
JTAG_DAP
tt
000
001
010
011
100
5%
1/20W
MF
2 201
DEVELOPMENT_JTAG
SIGNAL_MODEL=EMPTY
NOSTUFF
/m
10K
SIGNAL_MODEL=EMPTY
NOSTUFF
SIGNAL_MODEL=EMPTY
NOSTUFF
BRD_REV[2-0]
SIGNAL_MODEL=EMPTY
NOSTUFF
1
R1250
10K
NEAR U0652
DP_AP_TX_P<0> OUT
DP_AP_TX_N<0> OUT
BOARD REVISION
5
su
BOARD_ID_3
5%
1/32W
MF
2 01005
yc
BOARD_ID[3]
5%
1/32W
MF
2 01005
10K
om
p.
10K
DEVELOPMENT_JTAG
JTAG_DAP
/x
/
32 13 10 7 5 4
5
5
5
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
UART_AP_3_CTS_L
IN
UART_AP_3_RTS_L OUT
UART_AP_3_RXD IN
UART_AP_3_TXD OUT
30
30
TO BT UART
30
30
MAKE_BASE=TRUE
UART_4_CTS_L
UART_4_RTS_L
UART_4_RXD
UART_4_TXD
5
5
5
5
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
UART_AP_4_CTS_L
IN
UART_AP_4_RTS_L OUT
UART_AP_4_RXD IN
UART_AP_4_TXD OUT
31
31
TO GPS UART
31
31
MAKE_BASE=TRUE
CHS_SCL
CHS_SDA
23
23
MAKE_BASE=TRUE
I2C0_SCL_1V8
I2C0_SDA_1V8
IN
5 19 35 39
OUT
5 19 35 39
MAKE_BASE=TRUE
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: MISC & ALIASES

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
12 OF 106
SHEET
10 OF 42
D
NOTE:
LDO3 PROVIDES 50MA TO BOTH H4P AND U1300
IF THATS NOT ENOUGH, STUFF R1371 AND NOSTUFF R1370
R1371
=PP3V0_VIDEO_BUF
32
0.00 2
0%
1/32W
MF
01005
=PP3V2_S2R_USBMUX
VOLTAGE=3.0V
32
C1301
NOSTUFF
=PP3V0_VIDEO_BUFFER
32
0.00 2
0%
1/32W
MF
01005
C1300
56PF
~15MA
PP3V0_U0900_FILTR
10%
6.3V
X5R
201
C1370
0.1UF
VDH E2
PORT_DOCK_VIDEO_AMP_EN
su
VDL D2
VA_0 C1
VA_1 C4
10%
2 6.3V
X5R
201
om
p.
UCSP
VID_EN C3
40 7
CIN
IN
40 7
IN
40 7
IN
10
IN
10
OUT
39 31
BI
39 31
BI
A3
A4
B4
CH.1_IN
CH.2_IN
CH.3_IN
UART_AP_0_TXD
UART_AP_0_RXD
D4
E4
TX_VLOW
RX_VLOW
USB_BB_D_P
USB_BB_D_N
F3
F4
USB_D+
USB_D-
DAC_AP_OUT3
DAC_AP_OUT2
DAC_AP_OUT1
CH.1_OUT A2
CH.2_OUT A1
CH.3_OUT B1
5%
1/32W
MF
01005 2
yc
75
VIDEO_EMI_Y_PR OUT
10 28 40
1%
1/20W
MF
201
JTAG_DAP
R1361
BUF_Y_PR
BUF_CVBS_PB
40 BUF_C_Y
USB_FS_D_P
USB_FS_D_N
DOCK_BB_EN
75
VIDEO_EMI_CVBS_PB
OUT
10 28 40
VIDEO_EMI_C_Y
OUT
10 28 40
1%
1/20W
MF
201
USB_FS_P_ACC_RX
USB_FS_N_ACC_TX
USB_1D+ F2
USB_1D- F1
BI
4 39
BI
4 39
IN
35
OUT
28 39
IN
28 39
JTAG_DAP
R1362
1
R1315
75
1%
1/20W
MF
201
1.00M
DGND
D3
E3
R1320
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
/m
B2
B3
R1360
40
SEL C2
NOTE:
DOCK_BB_EN = 1:
DOCK_BB_EN = 0:
BB USB <-> DOCK SERIAL

BB USB <-> H4P FS USB
H4P UART0 <-> DOCK SERIAL
tt
p:
/
PLACE R0960-62 NEAR U0900
JTAG_DAP
40
RX_VHIGH/USB_2D+ E1
TX_VHIGH/USB_2D- D1
AGND
NOTE:
100K
THS7380IZSYR
YIN
CVBSIN
IN
R1372
U1300
0.1UF
5%
6.3V
NP0-C0G 2
01005
/x
/
R1370
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
AP: VIDEO BUFFER,BB USB MUXES

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
13 OF 106
SHEET
11 OF 42
16GB FLASH CONFIGURATIONS

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
TABLE_5_HEAD
BOM OPTION
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
335S0701
TOSHIBA 32NM 16GB RAW
U1400
TABLE_5_ITEM
16GB_PROD
335S0702
U1400,U1410
64GB_PROD
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
335S0682
335S0701
16GB_PROD
U1400
SAMSUNG 35NM 16GB RAW
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
335S0665
335S0702
64GB_PROD
U1400,U1410
335S0791
335S0702
64GB_PROD
U1400,U1410
335S0722
335S0702
64GB_PROD
U1400,U1410
SANDISK 32NM 32GB RAW
335S0782
335S0702
64GB_PROD
U1400,U1410
HYNIX 26NM 32GB PPN
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
335S0790
335S0701
16GB_PROD
TABLE_ALT_ITEM
U1400
TABLE_ALT_ITEM
335S0781
335S0701
16GB_PROD
TABLE_ALT_ITEM
HYNIX 26NM 16GB PPN
U1400
TABLE_ALT_ITEM

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
335S0701
U1400,U1410
32GB_PROD
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
335S0682
335S0701
32GB_PROD
U1400,U1410
335S0790
335S0701
32GB_PROD
U1400,U1410
335S0781
335S0701
32GB_PROD
U1400,U1410
HYNIX 26NM 16GB PPN
TABLE_ALT_ITEM
TABLE_ALT_ITEM
C1402
2.2UF
20%
6.3V
2 CERM
402-LF
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
R1400
1
100K 2
1%
1/20W
MF
201
12
NAND0_RB
NAND0_VDDL
C1404
1UF
10%
6.3V
2 X5R
402
LGA
IO2_1
IO3_0
IO3_1
IO4_0
IO4_1
IO5_0
IO5_1
IO6_0
IO6_1
IO7_0
IO7_1
CE2*
CE3*
CE4*
CE5*
CE6*
CE7*
CLE0
CLE1
RE0*
RE1*
A7
INC
OA8
OB8 INC_VDDI
OC0
OC8
OD0
OD8
OF0
OF8
CE0*
CE1*
R/B0*
R/B1*
WE0*
WE1*
F0ALE
F1ALE
A5
C5
A1
OA0
G5
F2
OB0
OE0
F0CE0_L
F1CE0_L
F0CE1_L
F1CE1_L
F0CE4_L
F1CE4_L
F0CE5_L
F1CE5_L
A3
C3
F0CLE
F1CLE
C7
D6
E5
E7
E3
E1
F0RE_L
F1RE_L
NAND0_RB
IN
6 12 39
IN
6 12 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
IN
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
39 12 6
BI
6 12 39
39 12 6
BI
6 12 39
39 12 6
BI
IN
6 12 39
IN
6 12 39
12
yc
BI
U1400
C1
D2
/m
39 12 6
IO2_0
ALE1
39 12 6
BI
39 12 6
BI
39 12 6
BI
F0WE_L
F1WE_L
IN
6 12 39
IN
6 12 39
G3
G1
H2
J1
J3
L1
K2
N3
L5
N5
K6
L7
J5
J7
H6
G7
F0AD<0>
F1AD<0>
F0AD<1>
F1AD<1>
F0AD<2>
F1AD<2>
F0AD<3>
F1AD<3>
F0AD<4>
F1AD<4>
F0AD<5>
F1AD<5>
F0AD<6>
F1AD<6>
F0AD<7>
F1AD<7>
R1401
100K 2
1
p:
/
BI
ALE0
1%
1/20W
MF
201
12
NAND1_RB
NAND1_VDDL
C1414
1UF
10%
6.3V
2 X5R
402
tt
39 12 6
IO1_1
5%
25V
2 CERM
0201
OC0
OC8
OD0
OD8
OF0
OF8
C1410
0.1UF
10%
6.3V
2 X5R
201
C1411
0.1UF
10%
6.3V
2 X5R
201
C1412
2.2UF
20%
6.3V
2 CERM
402-LF
OMIT
IO0_0
IO0_1
ALE0
IO1_0
IO1_1
IO2_0
ALE1
U1410
LGA
IO2_1
IO3_0
IO3_1
IO4_0
IO4_1
IO5_0
IO5_1
IO6_0
IO6_1
IO7_0
IO7_1
CE0*
CE1*
CE2*
CE3*
CE4*
CE5*
CE6*
CE7*
C1
D2
A5
C5
A1
OA0
G5
F2
OB0
OE0
F0ALE
F1ALE
F0CE2_L
F1CE2_L
F0CE3_L
F1CE3_L
F0CE6_L
F1CE6_L
F0CE7_L
F1CE7_L
IN
6 12 39
IN
6 12 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
IN
6 39
A3
CLE1 C3
F0CLE
F1CLE
IN
6 12 39
IN
6 12 39
C7
RE1* D6
F0RE_L
F1RE_L
IN
6 12 39
IN
6 12 39
CLE0
RE0*
A7
INC
OA8
OB8 INC_VDDI
BI
IO0_1
IO1_0
VSSQ
39 12 6
IO0_0
M2
OE8
BI
VCCQ
B6
M6
N1
N7
VCC
39 12 6
G3
G1
H2
J1
J3
L1
K2
N3
L5
N5
K6
L7
J5
J7
H6
G7
F0AD<0>
F1AD<0>
F0AD<1>
F1AD<1>
F0AD<2>
F1AD<2>
F0AD<3>
F1AD<3>
F0AD<4>
F1AD<4>
F0AD<5>
F1AD<5>
F0AD<6>
F1AD<6>
F0AD<7>
F1AD<7>
NAND-XXNM-64GX8
VLGA5-N90
BI
VSS
BI
39 12 6
B2
F6
L3
39 12 6
C1413
82PF
om
p.
C
OMIT
1
1
12 32
VCCQ
10%
6.3V
2 X5R
201
E5
R/B1* E7
R/B0*
WE0* E3
WE1* E1
NAND1_RB
F0WE_L
F1WE_L
12
IN
6 12 39
IN
6 12 39
VSSQ
0.1UF
M2
OE8
C1401
B6
M6
N1
N7
VCC
10%
6.3V
2 X5R
201
5%
25V
2 CERM
0201
NAND-XXNM-64GX8
VLGA5-N90
C1400
0.1UF
82PF
VSS
C1403
=PP3V3_NAND
su
12 32
B2
F6
L3
=PP3V3_NAND
/x
/
TABLE_ALT_ITEM
SYNC_MASTER=JONATHAN
SYNC_DATE=N/A
PAGE TITLE
NAND
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
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PAGE
14 OF 106
SHEET
12 OF 42
D
DISPLAYPORT AC COUPLING
DP_AP_TX_P<0>
C1702
10%
0.1UF
40 10 7
IN
DP_AP_TX_N<0>
C1703
40 10 7
IN
DP_AP_TX_P<1>
C1704
IN
DP_AP_TX_N<1>
10%
0.1UF
1
40 10 7
40 7
BI
C1706
DP_AP_AUX_P
40 7
BI
C1707
DP_AP_AUX_N
0.1UF
X5R
X5R
DP_EMI_TX_P<1> OUT
28 40
6.3V
201
28 40
X5R
DP_EMI_TX_N<1> OUT
201
6.3V
2
10%
X5R
201
DP_EMI_AUX_N
6.3V
X5R
=PP3V0_IO_MISC
R1720
1%
1/32W
MF
2 01005
201
BI
13 28 40
BI
13 28 40
40 28 13
DP_EMI_AUX_N
40 28 13
DP_EMI_AUX_P
R1723
100K
1%
1/32W
MF
2 01005
yc
om
p.
6.3V
32 13
100K
DP_EMI_AUX_P
10%
0.1UF
28 40
6.3V
DP_EMI_TX_N<0> OUT
201
2
10%
0.1UF
201
2
10%
0.1UF
C1705
DP_EMI_TX_P<0> OUT
28 40
X5R
6.3V
/x
/
IN
su
40 10 7
/m
DISPLAYPORT HOT PLUG DETECT
p:
/
IN
R1731
220K
=PP1V8_H4
1
C1750
0.00
0%
FW_ZENER_PWR
1/32W
MF
01005
10%
6.3V
2 X5R
201
R1750
CRITICAL
5%
1/32W
MF
2 01005
VCC
U1701
74LVC1G07
SOT886
2 A
DP_BUF_HPD
R1751
DP_AP_HPD OUT
Y 4
1 NC
NOSTUFF
tt
35 28
1
32 10 7 5 4
0.1UF
=PP3V0_IO_MISC
NC 5
GND
10K
32 13
5%
1/32W
MF
2 01005
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
311S0536
311S0341
BOM OPTION
REF DES
COMMENTS:
U1701
RADAR:8481319
TABLE_ALT_ITEM
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
VIDEO: DISPLAY PORT

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
17 OF 106
SHEET
13 OF 42
MLC EEPROM:RAW APN 335S0661
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
CRITICAL
100MHZ_PANEL
TABLE_5_ITEM
341S2799
=PP3V3_MLC
32 16 14
0.1UF
R2006
OMIT
U2001
M24C64
EEPROM
1%
1/20W
MF
201 2
E2
E1
E0
WC*
3
2
1
7
MLC_2WC_L
R20501
R20511
4.7K
4.7K
5%
1/20W
MF
201 2
MLP
SCL
SDA
VSS THM_P
5%
1/20W
MF
201 2
MLC_MUX_SDA_3V3
MLC_MUX_SCL_3V3
BI
IN
15
15
/x
/
FL2000
PP3V3_MLC_LVDS
0201-1
1
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
FL2001
C2016
80-OHM-0.2A-0.4-OHM
82PF
5%
25V
2 CERM
0201
PP3V3_MLC_18LDO_12LDO
VOLTAGE=3.3V
0201-1
FL2002
80-OHM-0.2A-0.4-OHM
2
PP3V3_MLC_DIG_12LDO
VOLTAGE=3.3V
4.7UF
20%
10V
2 CERM
402
20%
6.3V
X5R-CERM 2
402
C2014
C2012
0.1UF
4.7UF
20%
10V
2 CERM
402
B3 M_VREG_0P4V
MIPID_AP_DATA_N<3>
7 14 40
U2000
C2004
2.2NF
NOSTUFF
PP2011
7 14 40
32 16 14
=PP3V3_MLC
40 14 7
IN
40 7
IN
40 14 7
IN
40 7
IN
40 7
NOSTUFF
R20521
R20081
100K
100K
1%
1/20W
MF
201 2
1%
1/20W
MF
201 2
IN
40 7
IN
40 7
IN
40 7
IN
40 14 7
C1 M_DPCLK
C2 M_DNCLK
NC_MIPI_MLC_MASTER_DATA_P
NC_MIPI_MLC_MASTER_DATA_N
B1 M_DPDATA0
B2 M_DNDATA0
MIPID_AP_CLK_P
MIPID_AP_CLK_N
IN
40 7
NC_MIPI_MLC_MASTER_CLK_P
NC_MIPI_MLC_MASTER_CLK_N
IN
IN
1%
1/20W
MF
201 2
R2003
100K
1%
1/20W
MF
2 201
MLC_SCL_3V3
MLC_SDA_3V3
OUT
EDID_SCL
EDID_SDA
A8
LVDS_DDC_CLK
LVDS_DDC_DATA
OUT
16
OUT
16
TCLKP
TCLKN
C8
TAP
TAN
G8
G7
TBP
TBN
F8
TCP
TCN
E8
TDP
TDN
D8
F1 S_DPCLK
F2 S_DNCLK
D1 S_DPDATA0
D2 S_DNDATA0
MIPID_AP_DATA_P<1>
MIPID_AP_DATA_N<1>
E1 S_DPDATA1
E2 S_DNDATA1
MIPID_AP_DATA_P<2>
MIPID_AP_DATA_N<2>
G1 S_DPDATA2
G2 S_DNDATA2
MIPID_AP_DATA_P<3>
MIPID_AP_DATA_N<3>
H1 S_DPDATA3
H2 S_DNDATA3
MLC_BIST
MLC_TEST
B7 BIST
B8 TEST
RST_MLC_L
B5 RESET*
R2010
100K
MLC_MONITOR0_PD
NC_MLC_MONITOR1
NC_MLC_MONITOR2
NC_MLC_MONITOR3
1%
1/20W
MF
201 2
138S0618
REF DES
COMMENTS:
TABLE_ALT_ITEM
C2000,C2001,C2002,C2003,C2010,C2011,C2012,C3609,C3611,C3616
MLC_CAP_1V8LDO
MLC_CAP_1V2LDO_0
MLC_CAP_1V2LDO_1_3
E3
H7
RADAR:8377307
A4
B6
C7
F7
E7
MLC_CAP_1V2_LDO_5
BI
LVDS_CLK_P
LVDS_CLK_N
16 40
16 40
LVDS_DATA_P<0>
LVDS_DATA_N<0>
OUT
16 40
OUT
16 40
LVDS_DATA_P<1>
LVDS_DATA_N<1>
OUT
16 40
OUT
16 40
LVDS_DATA_P<2>
LVDS_DATA_N<2>
OUT
16 40
OUT
16 40
C5
ROUT_LVDS
VSYNC
PWM
PPC
F5
MONITOR4
MONITOR5
MONITOR6
F4
E4
G4 MONITOR2
G5 MONITOR3
D3
VOLTAGE=1.2V
C2000
B
C2001
4.7UF
OUT
D7
H5 MONITOR0
G3 MONITOR1
15
OUT
ROUT_LVDS
D4
G6
15
VOLTAGE=1.2V
VOLTAGE=1.2V
VOLTAGE=1.2V
A7
NC_LVDS_DATA_P<3>
NC_LVDS_DATA_N<3>
H6 SWI
A3 VSS12D_PLL
100K
A6
A5
S6T2MLC
MIPID_AP_DATA_P<0>
MIPID_AP_DATA_N<0>
SWI_MLC
R20021
MLC_SCL
MLC_SDA
tt
MIPID_AP_DATA_P<0>
C3
FBGA1
CAP_18LDO
CAP_12LDO_0
CAP_12LDO_1
CAP_12LDO_3
CAP_12LDO_5
p:
/
10%
10V
2 X5R
201
PP
0.1UF
20%
10V
2 CERM
402
MLC_VREG_0V4
P4MM
SM
1
C2015
/m
PP2009
PP
VOLTAGE=0.4V
NOSTUFF
P4MM
SM
1
20%
6.3V
X5R-CERM 2
402
138S0652
BOM OPTION
yc
C2011
0.1UF
VDD33D_LVDS E5
C2013
VDD33A_LVDS C6
ALTERNATE FOR
PART NUMBER
4.7UF
20%
6.3V
X5R-CERM 2
402
20%
6.3V
X5R-CERM 2
402
C2002
C2003
4.7UF
4.7UF
20%
6.3V
X5R-CERM 2
402
20%
6.3V
X5R-CERM 2
402
TP_MLC_VSYNC
TP_PM_LCD_BKLT_PWM
R2001
8.45K
PM_MLC_PPC_OUT
OUT
16
1%
1/20W
MF
2 201
NC_MLC_MONITOR4
NC_MLC_MONITOR5
NC_MLC_MONITOR6
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
F6 VSS33D_LVDS
20%
6.3V
X5R-CERM 2
402
VDD33P_LVDS D5
4.7UF
7 14 40
D6 VSS33A_LVDS
C2010
MIPID_AP_CLK_P
E6 VSS33P_LVDS
VDD33A_12LDO_0 F3
VDD33A_12LDO_1 H8
VDD33A_12LDO_2 B4
SM
PP
H3 VSS33A_12LDO_0
C4 VSS33A_12LDO_1
PP2000
P4MM
VDD33A_OSC H4
NOSTUFF
VDD33A_18LDO A2
0201-1
A1 VSS33A_18LDO
TABLE_ALT_HEAD
PART NUMBER
om
p.
su
80-OHM-0.2A-0.4-OHM
=PP3V3_MLC
32 16 14
U2001
VCC
10K
WHEN WC_L IS LOW, CAN WRITE TO EEPROM
WHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM
MLC EEPROM 100MHZ LVDS,2MHZ SWI
C2017
20%
2 10V
CERM
402
VIDEO: MLC
DRAWING NUMBER
Apple Inc.
R

051-8962
SIZE
REVISION
A.0.0
BRANCH
PAGE
20 OF 106
SHEET
14 OF 42
su
/x
/
14
MLC_SDA_3V3
MLC_SCL_3V3
MLC_MUX_SDA_3V3
MLC_MUX_SCL_3V3
14
14
/m
yc
14
om
p.
tt
p:
/
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
VIDEO: MLC ALIASES

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
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PAGE
21 OF 106
SHEET
15 OF 42
LVDS CONNECTOR
CRITICAL
Q2200
VOLTAGE=3.3V
PP3V3_S0_LCD_FERR
SIA413DJ
C2240
82PF
32 16 14
5%
25V
2 CERM
0201
R2210
C2241
82PF
5%
25V
2 CERM
0201
R2203
39K
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
R2204
R22111
1%
1/20W
MF
201
LCDVDD_PWREN_L
D 3
1
R2250_1
5%
1/20W
MF
201
C2203
0.1UF
10%
2 6.3V
X5R
201
C2202
10UF
5%
2 25V
CERM
0201
20%
6.3V
2 X5R
603
1
G
PM_MLC_PPC_OUT
1
R2205
CRITICAL
J2201
CABLINE-CA
F-RT-SM
32
0.015UF
1
2
LCDVDD_PWREN_L_R
C2231
10%
6.3V
X5R
0201
2N7002TXG
SOT-523-3
S 2
C2232
40
82PF
5%
25V
2 CERM
0201
5%
25V
CERM
0201
39
38
37
36
C2200
35
1000PF
32 16 14
=PP3V3_MLC
10K
14
14
LVDS_DDC_CLK
IN
SIA413DJ
40 14
P-TYPE
100MOHM @-1.5V
RDS(ON)
IMAX
3 A
VGS MAX
+/- 8V
40 14
COMMENTS:
40 14
TABLE_ALT_ITEM
376S0796
Q2200
RADAR:8403895
376S0903
376S0796
Q2200
RADAR:8403865
155S0583
155S0460
IN
IN
LVDS_DATA_N<1>
LVDS_DATA_P<1>
/m
TABLE_ALT_HEAD
376S0961
LVDS_DATA_P<0>
TABLE_ALT_ITEM
IN
LVDS_DATA_N<2>
LVDS_DATA_P<2>
p:
/
40 14
IN
TABLE_ALT_ITEM
L2202,L2212,L2222,L2232,L5500,L5501,L5600,L5601,L5702,L5716
RADAR:8376383
35
OUT
40 14
IN
IN
26
24
40
40
23
LVDS_DATA_CONN_N<0>
LVDS_DATA_CONN_P<0>
22
21
20
LVDS_DATA_CONN_N<1>
40 LVDS_DATA_CONN_P<1>
40
19
18
40
40
LVDS_DATA_CONN_N<2>
LVDS_DATA_CONN_P<2>
17
16
15
LVDS_CLK_CONN_N
40 LVDS_CLK_CONN_P
14
40
13
12
L2200
11
NC_LCD_PGAMMA
FERR-240-OHM-25%-300MA
3
32
=PPLED_REG
10
9
PPLED_BACK_REG
0402
1
4
SYM_VER-2
TCM0605
90-OHM-50MA
L2222
2
35
IN
35
IN
35
IN
35
IN
35
IN
35
IN
35
25
NC
LED_IO_6
LED_IO_5
LED_IO_4
LED_IO_3
LED_IO_2
LED_IO_1
BOARD_TEMP4_N
6
5
4
3
2
1
VOLTAGE=20.4V
4
SYM_VER-2
TCM0605
90-OHM-50MA
31
L2232
1
LVDS_CLK_N
LVDS_CLK_P
C2233
C2220
820PF
100PF
10%
2 50V
CERM
402
5%
50V
CERM
402
4
SYM_VER-2
TCM0605
90-OHM-50MA
L2202
tt
40 14
27
(LVDS DDC POWER)
BOARD_TEMP4
L2212
40 14
REF DES
29
PP3V3_LCDVDD_SW_F
28
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
30
VOLTAGE=3.3V
SYM_VER-2
TCM0605
90-OHM-50MA
40 14
BOM OPTION
IN
LVDS_DATA_N<0>
yc
CHANNEL
IN
33
LVDS_DDC_DATA
IN
SIA413DJ
MOSFET
10K
34
om
p.
R2200
su
R2201
10%
16V
X7R
201
1
1
41
1
82PF
1%
1/20W
MF
2 201
ALTERNATE FOR
PART NUMBER
CABLINE-CA CONNECTOR: 518S0787

NOTE: CONNECTOR ON PANEL IS FLIPPED
82PF
100K
PART NUMBER
2
10%
16V
X7R
201
/x
/
IN
C2230
Q2201
14
C2206
1000PF
C2204
R2250
21.5K2
10K
10K
NOSTUFF
1%
1/20W
MF
201 2
NOSTUFF
G
=PP3V3_MLC
L2201
FERR-120-OHM-1.5A
0402
=PP3V3_LCD
32
SC70-6L
NOSTUFF RESISTORS ARE THERE TO

INVESTIGATE POSSIBILITY OF REMOVING
THE CHOKE
SYNC_MASTER=ALEX
SYNC_DATE=N/A
PAGE TITLE
VIDEO: LVDS CONNECTOR

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
22 OF 106
SHEET
16 OF 42
=PP3V0_GRAPE_MARIO1
C3005
0.1UF
QTY
DESCRIPTION
CRITICAL
U3003
CRITICAL
1
=PP3V0_GRAPE
PP18V_GRAPE
BOM OPTION
C3007
0.1UF
10%
25V
X5R
402
TABLE_5_HEAD
PART#
C3053
1
1
0.1UF
10%
25V
X5R
402
R3025
C3006
10K
0.1UF
10%
25V
X5R
402
17 18 32
32
5%
1/20W
MF
2 201
10%
6.3V
2 X5R
201
A6
17
F3
E9
B6
TABLE_5_ITEM
VCC_DIG
18
18
18
18
18
CONNECTORS TO GRAPE FLEX
18
18
18
18
P/N 518S0817
18
18
18
18
18
41
39
17
18
18
18
18
18
18
18
18
18
18
18
18
18
18
MT_PANEL_IN<29>
MT_PANEL_IN<27>
MT_PANEL_IN<25>
MT_PANEL_IN<23>
MT_PANEL_IN<21>
MT_PANEL_IN<19>
MT_PANEL_IN<17>
MT_PANEL_IN<15>
MT_PANEL_IN<13>
MT_PANEL_IN<11>
MT_PANEL_IN<9>
MT_PANEL_IN<7>
MT_PANEL_IN<5>
MT_PANEL_IN<3>
MT_PANEL_IN<1>
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
MT_PANEL_OUT<37>
MT_PANEL_OUT<39>
MT_PANEL_IN<28>
MT_PANEL_IN<26>
MT_PANEL_IN<24>
MT_PANEL_IN<22>
MT_PANEL_IN<20>
MT_PANEL_IN<18>
MT_PANEL_IN<16>
MT_PANEL_IN<14>
MT_PANEL_IN<12>
MT_PANEL_IN<10>
MT_PANEL_IN<8>
MT_PANEL_IN<6>
MT_PANEL_IN<4>
MT_PANEL_IN<2>
MT_PANEL_IN<0>
J10
I10
H10
F11
C11
E10
NC
NC
NC
NC
A11
B4
A5
A2
Z1_BON_L<0>
Z1_BON_L<1>
Z1_BON_L<2>
Z1_BON_L<3>
Z1_BON_L<4>
Z1_BON_L<5>
C7
A7
B7
B8
A8
C8
17
17
18
18
18
18
18
18
18
18
18
18
18
OMIT
BON_L0
BON_L1
BON_L2
BON_L3
BON_L4
BON_L5
18
C6
D3
D4
D5
D6
D8
D9
E4
E8
F4
F5
F8 NC
F9
G3
G4
G9
H3
H4
H7
H8
H9
J6
K7
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
18
18
18
18
18
18
18
18
18
38
40
F-RT-SM
502250-8237
J3010
MATES WITH LEFTMOST GRAPE FLEX TAIL
D2
E2
F1
G1
G2
I1
H2
I2
K1
K2
I3
K3
J4
I4
K6
H6
K5
J5
I7
K9
I8
K10
I6
J7
K11
I9
J11
I11
H11
G11
G10
F10
C10
D10
E11
D11
B11
B10
C4
A4
MT_PANEL_OUT<0> 17
MT_PANEL_OUT<1> 17
MT_PANEL_OUT<2> 17
MT_PANEL_OUT<3> 17
MT_PANEL_OUT<4> 17
MT_PANEL_OUT<5> 17
MT_PANEL_OUT<6> 17
MT_PANEL_OUT<7> 17
MT_PANEL_OUT<8> 17
MT_PANEL_OUT<9> 17
MT_PANEL_OUT<10> 17
MT_PANEL_OUT<11> 17
MT_PANEL_OUT<12> 17
MT_PANEL_OUT<13> 17
MT_PANEL_OUT<14> 17
MT_PANEL_OUT<15> 17
MT_PANEL_OUT<16> 17
MT_PANEL_OUT<17> 17
MT_PANEL_OUT<18> 17
MT_PANEL_OUT<19> 17
MT_PANEL_OUT<20> 17
MT_PANEL_OUT<21> 17
MT_PANEL_OUT<22> 17
MT_PANEL_OUT<23> 17
MT_PANEL_OUT<24> 17
MT_PANEL_OUT<25> 17
MT_PANEL_OUT<26> 17
MT_PANEL_OUT<27> 17
MT_PANEL_OUT<28> 17
MT_PANEL_OUT<29> 17
MT_PANEL_OUT<30> 17
MT_PANEL_OUT<31> 17
MT_PANEL_OUT<32> 17
MT_PANEL_OUT<33> 17
MT_PANEL_OUT<34> 17
MT_PANEL_OUT<35> 17
MT_PANEL_OUT<36> 17
MT_PANEL_OUT<37> 17
MT_PANEL_OUT<38> 17
MT_PANEL_OUT<39> 17
NC
NC
NC
NC
NC
NC
NC
NC
B5
A3
C5
B3
A_AD_R0 A10
A_AD_R1 B9
A_AD_R2 A9
GND
SPI_GRAPE_MOSI
RST_GRAPE_L
MAKE_BASE=TRUE
IN
IN
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
BOOST CONVERTOR
17
17
17
L3000
VR_BOOST_L 1
D3000
SOD-323
1
2
VR_BOOST_SW
17
VLF
C3009
17
17
32 18 17
=PP3V0_GRAPE
40 17 5
18
SPI_GRAPE_MISO
OUT
GRAPE_MISO
=PP3V0_GRAPE
R3030 1R3031 1 C3030
10K
10K
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
IN
40 17 5
IN
0.1UF
10%
6.3V
2 X5R
201
0.1UF
IN
SPI_GRAPE_MOSI
7 1A2
9 2A2
5 2DIR
16 2OE*
GRAPE_FW_DNLD_EN_L
CRITICAL
17
17
IN
Z1_SCLK
OUT
Z2_H_CS_L
OUT
U3000
17 18
TO Z1/Z2
Z1_MISO
OUT
Z1_CS_OE
1B2 14
2B2 12
OUT
18
17 18
APN:311S0485
GND
R3009 1
1M
1%
1/16W
MF-LF
402
CRITICAL
LOAD CURRENT ~ 153UA

18 17
R3066
C3000
0.1
1%
1/20W
MF
201
Z1_CS_OE
1 OE
Z2_H_CS_L
2 A
IN
10%
2 6.3V
X5R
201
CRITICAL
C3050
U3009
0.1UF
SN74LVC1G125DRYR-M
LLP
40 17 5
SN74LVC1G126DRYR-M
LLP
C3041
0.1UF
17 18 32
10%
6.3V
2 X5R
201
VCC
U3010
17 18 32
OUT
SPI_GRAPE_MISO
Z1_MOSI
IN
4
3
18
NC 5
OE*
PP18V_GRAPE
VOLTAGE=18V
17
18 17
IN
Y 4
Z1_CS_L
OUT
18
Z1_CS_OE
18 17
GND
1UF
IN
NC
10%
2 25V
X5R
603-1
2
FB
VR_BOOST_FBK
CTRL
PM_BOOST_EN
TPS61045
17
NC 3
QFN-1
DO
C3001
10%
2 6.3V
X5R
603
F-RT-SM
502250-8237
THRML
PAD
9
R3012
18
C3002
470PF
10%
16V
2 X5R-X7R
201
GND
2.2UF
SW
PGND
71.5K
1%
1/20W
MF
2 201
SYNC_MASTER=RAMSIN
GRAPE: GROUNDHOG,CONN,BOOST
DRAWING NUMBER
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
Apple Inc.
TABLE_ALT_ITEM
XW3000
311S0523
311S0485
U3007
311S0524
311S0533
U3009
311S0525
311S0532
U3010

TABLE_ALT_ITEM
051-8962
SIZE
REVISION
A.0.0
TABLE_ALT_ITEM
SM
MATES WITH RIGHTMOST GRAPE FLEX TAIL
SYNC_DATE=N/A
PAGE TITLE
AGND_U3000
J3011
18
VIN
1
17
38
40
17
5%
1/20W
MF
2 201
1B1 15
2B1 13
5%
25V
NP0-C0G 2
201
10%
16V
X5R
402
17
10K
5%
1/20W
MF
2 201
(A -> B)
=PP3V0_GRAPE
VOLTAGE=18V
33PF
0.1UF
17
3.3K
PQFP1
6 1A1
8 2A1
10%
2 6.3V
X5R
201
U3007
SPI_GRAPE_SCLK
SPI_GRAPE_CS_L
4 1DIR
1 1OE*
40 17 5
CRITICAL
17 18 32
C3031 1R3032 1R3033
VCCA VCCB
DIR_U3007
40 17 5
18
IN
MAKE_BASE=TRUE
=PP3V0_GRAPE
PP18V_R_GRAPE
C3008
17
18
Z1_B_ADR<0> 18
Z1_B_ADR<1> 18
Z1_B_ADR<2> 18
B0520WSXG
OUT
TO Z2
OUT
4.7UH-700MA-280MOHM
17
18
17
17
GRAPE_MOSI
OUT
RST_GRAPE_Z1_L
RST_GRAPE_Z2_L
17
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
tt
17
MT_PANEL_OUT<1>
MT_PANEL_OUT<3>
MT_PANEL_OUT<5>
MT_PANEL_OUT<7>
MT_PANEL_OUT<9>
MT_PANEL_OUT<11>
MT_PANEL_OUT<13>
MT_PANEL_OUT<15>
MT_PANEL_OUT<17>
MT_PANEL_OUT<19>
MT_PANEL_OUT<21>
MT_PANEL_OUT<23>
MT_PANEL_OUT<25>
MT_PANEL_OUT<27>
MT_PANEL_OUT<29>
MT_PANEL_OUT<31>
MT_PANEL_OUT<33>
MT_PANEL_OUT<35>
MT_PANEL_OUT<0>
MT_PANEL_OUT<2>
MT_PANEL_OUT<4>
MT_PANEL_OUT<6>
MT_PANEL_OUT<8>
MT_PANEL_OUT<10>
MT_PANEL_OUT<12>
MT_PANEL_OUT<14>
MT_PANEL_OUT<16>
MT_PANEL_OUT<18>
MT_PANEL_OUT<20>
MT_PANEL_OUT<22>
MT_PANEL_OUT<24>
MT_PANEL_OUT<26>
MT_PANEL_OUT<28>
MT_PANEL_OUT<30>
MT_PANEL_OUT<32>
MT_PANEL_OUT<34>
17
17
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
18
MAKE_BASE=TRUE
G8
G7
G6
G5
F7
F6
E7
E6
E5
E3
D7
C9
41
39
18
OUT
D
40 17 5
p:
/
18
MT_PANEL_OUT<36>
MT_PANEL_OUT<38>
J8
J9
K8
CRITICAL
A1
B2
C2
D1
GRAPE_SCLK
OUT
GRAPE_CS_L
MAKE_BASE=TRUE
/m
17
18
K4
H5
I5
VSTM0
VSTM1
VSTM2
VSTM3
VSTM4
VSTM5
VSTM6
VSTM7
VSTM8
VSTM9
VSTM10
VSTM11
VSTM12
VSTM13
VSTM14
VSTM15
VSTM16
VSTM17
VSTM18
VSTM19
VSTM20
VSTM21
VSTM22
VSTM23
VSTM24
VSTM25
VSTM26
VSTM27
VSTM28
VSTM29
VSTM30
VSTM31
VSTM32
VSTM33
VSTM34
VSTM35
VSTM36
VSTM37
VSTM38
VSTM39
VSTM40
VSTM41
VSTM42
VSTM43
VSTM44
VSTM46
VSTM45
VSTM47
MAKE_BASE=TRUE
18
BGA
MUX0
MUX1
MUX2
MUX3
MUX4
MUX5
MUX6
MUX7
MUX8
MUX9
MUX10
MUX11
MUX12
MUX13
MUX14
MUX15
MUX16
MUX17
MUX18
MUX19
MUX20
MUX21
MUX22
MUX23
SPI_GRAPE_SCLK
SPI_GRAPE_CS_L
SN74AVCH4T245RSV
18
IN
11
18
IN
40 17 5
10
18
40 17 5
/x
/
B1
C1
E1
F2
H1
J1
J2
J3
MUX_IN<0>
MUX_IN<1>
MUX_IN<2>
MUX_IN<3>
MUX_IN<4>
MUX_IN<5>
MUX_IN<6>
MUX_IN<7>
MUX_IN<8>
MUX_IN<9>
MUX_IN<10>
MUX_IN<11>
MUX_IN<12>
MUX_IN<13>
MUX_IN<14>
MUX_IN<15>
MUX_IN<16>
MUX_IN<17>
MUX_IN<18>
MUX_IN<19>
18
U3003
GROUNDHOG
VDDH
su
IC,ASIC,GROUNDHOG B0,120B BGA
om
p.
yc
343S0525

BRANCH
PAGE
30 OF 106
SHEET
17 OF 42
ARM9 MCU (Z2 BASED)
32
=PP3V0_GRAPE_Z1
18 32
VOLTAGE=1.8V
C3107
R3101
VOLTAGE=1.8V
C3112
2.2UF
20%
2 4V
X5R
402
Z1_1V8_OUT
1%
1/20W
MF
201
VOLTAGE=1.8V
C3110
0.1UF
10%
6.3V
2 X5R
201
C3108
0.1UF
C3106
C3191
20%
6.3V
2 X5R-CERM
603
10%
6.3V
2 X5R
201
18
C3104
2.2UF
20%
2 4V
X5R
402
2.2UF
C3103
0.1UF
10%
2 6.3V
X5R
201
=PP3V0_GRAPE
17 18 32
R3155
CFG0
MODE
DEPENDENT 1
DEPENDENT 2
AUTONOMOUS
SLAVE
B2
NC C1
NC
B1
NC
A1
NC
E6
NC
K48 USES DEPENDENT 2 MODE
BOOT_CFG0_R
BOOT_CFG1_R
NC
1
R3173
5%
1/20W
MF
2 201
NC
U3101
BCM5974CKFBGH
IN2_0
IN2_1
FBGA
IN3_0
IN3_1
17
17
18
17
=PP3V0_GRAPE_Z2
NOSTUFF
Z1_CS_OE_R
NC_BON_L1
NC_BON_L2
NC_BON_L3
NC_BON_L4
Z2_BON_L4
17
18 32
17
R3161
100K
17
NOTE: PLATEFORM DETECTION PIN "H5"

PULL DOWN = K48
FLOATING = K93/K94
PULL UP = RESERVED FOR FUTURE
5%
1/20W
MF
2 201
17
17
17
17
IN7_0
IN7_1
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
G6
E8
E9
F7
IN8_0
IN8_1
IN9_0
IN9_1
H_CS*
H_SCLK
H_SDI
H_SDO
IN10_0
IN10_1
IN11_0
IN11_1
A_CS*
A_SCLK
A_SDI
A_SDO
ARMTAPMD*
G5
F5
FLOO
LFOO
EXTFLLIN
INTERNAL PU
TM0
TM1
CLKIN
CLKOUT
E5
E4
17
17
IN
17
IN
17
OUT
17
IN
17
17
100K
17
5%
1/20W
MF
2 201
17
17
17
17
17
17
17
=PP3V0_GRAPE
OUT
17
17
17
R3107
17 18
17
100K
5%
1/20W
MF
2 201
17 18
17 18
Z2_A_CS_L
TP_Z2_A_SCLK
TP_Z2_A_SDI
TP_Z2_A_SDO
17
17
17
R3180
1
100
5%
1/32W
MF
01005
TP_U3101_TM0
U3101_TM1
HOST_REFCLK
CLK_32K_PMU
MAKE_BASE=TRUE
NC
RST_GRAPE_Z2_L
17 18 32
IN
17
GND
C3
C4
D6
D7
D8
C9
D9
G2
D1
H8
IN
32 18 17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
BGA-HF
G4 IN15
G5 IN16
H1 IN17
H2 IN18
H3 IN19
H4 IN20
H5 IN21
J1 IN22
K1 IN23
J2 IN24
J4 IN28
K4 IN29
J5 IN30
INTERNAL PU
138S0648
C3107
RADAR:8392120
138S0618
138S0648
C3107
BOM CONSOLIDATION
17 18
IN
17
IN
17 18
OUT
17 18
18
18
18
Z1_STMIN
B_ADR0 B2
B_ADR1 B3
B_ADR2 B4
Z1_B_ADR<0>
Z1_B_ADR<1>
Z1_B_ADR<2>
BON_L0 A1
BON_L1 A2
BON_L2 A3
Z1_BON_L<0>
Z1_BON_L<1>
Z1_BON_L<2>
Z1_BON_L<3>
Z1_BON_L<4>
Z1_BON_L<5>
17
17
17
17
17
17
17
17
17
U3100_TM
RST_GRAPE_Z1_L
RESET* C5
K5 IN31
K6 IN32
J6 IN33
R3181
J7 IN34
K7 IN35
J8 IN36
5%
1/32W
MF
01005
100
17
K8 IN37
J9 IN38
K9 IN39
J10 IN40
K10 IN41
H6 IN42
H7 IN43
H8 IN44
H9 IN45
H10 IN46
G6 IN47
G7 IN48
G8 IN49
G9 IN50
G10 IN51
F7 IN52
F8 IN53
F9 IN54
F10 IN55
E7 IN56
E8 IN57
E9 IN58
E10 IN59
D7 IN60
D8 IN61
D9 IN62
D10 IN63
GNDDIG GNDIO
F6
COMMENTS:
Z1_PCLK
TM B8
E6
REF DES
PCLK A10
BON_L3 A4
BON_L4 A5
BON_L5 B1
K2 IN25
J3 IN26
K3 IN27
C9
D6
138S0652
BOM OPTION
Z1_GO
Z1_DONE
IN
G1 IN12
G2 IN13
G3 IN14
C2
ALTERNATE FOR
PART NUMBER
Z1_SCLK
Z1_CS_L
Z1_MISO
Z1_MOSI
GO B5
DONE B6
STMOUT B9
STMIN B10
GNDANA
TABLE_ALT_HEAD
PART NUMBER
5%
1/20W
MF
2 201
MOSI A6
F2 IN9
F3 IN10
F4 IN11
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
tt
=PP3V0_GRAPE
17
35 39
p:
/
17
R3160
Z2_H_CS_L
IN
Z1_SCLK
IN
Z1_MISO
IN
Z1_MOSI
D5
5
17
18
TP_U3101_TCK
TP_U3101_TDI
TP_U3101_TDO
TP_U3101_TMS
F1
G1
F2
G4
OUT
OUT
18
GRAPE_CS_L
GRAPE_MOSI
GRAPE_MISO
GRAPE_SCLK
H1
J1
H3
J4
E7
D4
RESET*
IRQ_GRAPE_HOST_INT_L
PM_BOOST_EN
Z1_GO
Z1_DONE
U3100
E3 IN6
E4 IN7
F1 IN8
100K
SCLK A9
CS* A8
MISO A7
CRITICAL
D4 IN3
E1 IN4
E2 IN5
su
J2
J3
H4
J6
G3
F3
F4
H6
IN6_0
IN6_1
R3171
1
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
IN5_0
IN5_1
J8
H9
J9
H7
J7
H5
IN4_0
IN4_1
BOOT_CFG0
BOOT_CFG1
G7
BON_L0
BON_L1
BON_L2
BON_L3
BON_L4
BON_L5
Z1_CS_OE IN
17
F6
D3
NC
IN1_0
IN1_1
Z1_PCLK
17
om
p.
CRITICAL
B_ADR0
B_ADR1
B_ADR2
yc
A7
NC
A8
NC
B8
NC
C8
NC
B7
NC
C7
NC
A6
NC B6
NC
C6
NC C5
NC
B5
NC
A5
NC
A4
NC B4
NC
A3
NC
B3
NC
C2
NC
A2
NC
IN0_0
IN0_1
F9
F8
G9
17
/m
A9
NC
B9
NC
D1 IN0
D2 IN1
D3 IN2
MT_PANEL_IN<0>
MT_PANEL_IN<1>
MT_PANEL_IN<2>
MT_PANEL_IN<3>
MT_PANEL_IN<4>
MT_PANEL_IN<5>
MT_PANEL_IN<6>
MT_PANEL_IN<7>
MT_PANEL_IN<8>
MT_PANEL_IN<9>
MT_PANEL_IN<10>
MT_PANEL_IN<11>
MT_PANEL_IN<12>
MT_PANEL_IN<13>
MT_PANEL_IN<14>
MT_PANEL_IN<15>
MT_PANEL_IN<16>
MT_PANEL_IN<17>
MT_PANEL_IN<18>
MT_PANEL_IN<19>
MT_PANEL_IN<20>
MT_PANEL_IN<21>
MT_PANEL_IN<22>
MT_PANEL_IN<23>
MT_PANEL_IN<24>
MT_PANEL_IN<25>
MT_PANEL_IN<26>
MT_PANEL_IN<27>
MT_PANEL_IN<28>
MT_PANEL_IN<29>
MUX_IN<0>
MUX_IN<1>
MUX_IN<2>
MUX_IN<3>
MUX_IN<4>
MUX_IN<5>
MUX_IN<6>
MUX_IN<7>
MUX_IN<8>
MUX_IN<9>
MUX_IN<10>
MUX_IN<11>
MUX_IN<12>
MUX_IN<13>
MUX_IN<14>
MUX_IN<15>
MUX_IN<16>
MUX_IN<17>
MUX_IN<18>
MUX_IN<19>
17
5%
1/20W
MF
201
BCM5973
R3120
VDDIO VDDLDO
/x
/
E2
E3
G8
H2
J5
E1
D2
VDDANA
VDDANA VDDCORE
C3101
20%
2 4V
X5R
402
MT_3V3_INT
22UF
0.1UF
10%
6.3V
2 X5R
201
Z1_1V8_OUT
V18 C6
1.00 2
1
VOLTAGE=3.0V
C1
Z2_3V3_1V8_IN
4.7
5%
1/20W
MF
201
R3190
VOLTAGE=1.8V
18
0.1UF
20%
6.3V
2 X5R
402
Z2_VDDANA
C3102
10%
2 6.3V
X5R
201
4.7UF
C3
C4
10%
6.3V
2 X5R
201
VDDIO
C3105
0.1UF
10%
6.3V
2 X5R
201
C8
0.1UF
B7
C3109
F5
VDDANA AND VDDCORE

ARE EACH GENERATED WITHIN
Z2 AND BYPASSED OUTSIDE
VDDDIG C7
20%
6.3V
2 X5R
603
E5
C3111
10UF
C10
D5
CFG1
ZEPHYR 1+ ASIC
=PP3V0_GRAPE_Z2
Z2_VDDCORE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
SYNC_MASTER=RAMSIN
SYNC_DATE=N/A
PAGE TITLE
GRAPE: Z1, Z2
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
31 OF 106
SHEET
18 OF 42
L63 AUDIO CODEC

APN:338S0940
D
32 20
32
=PP1V7_VA_VCP
=PPVCC_MAIN_AUDIO
C3605
27PF
0.1UF
C3603
10UF
20%
4V
X5R 2
01005
GND_AUDIO_CODEC
VD B11
39 5
I2C0_SCL_1V8
BI
I2C0_SDA_1V8
C7 SDA
HPOUTB G9
IRQ_CODEC_L
E4
HPOUTA G10
IN
RST_L63_L
E5 RESET*
HPOUT_REF F9
OUT
AUD_MIK_HS1_INT_L
E3 WAKE*
IN
I2S_AP_0_MCK_R
B9 MCLK
LINEOUT1B G8
LINEOUT1A F8
IN
39 5
IN
39 5
IN
39 5
OUT
39 30 5
39 30 5
39 30 5
39 30 5
I2S_AP_0_LRCK
I2S_AP_0_BCLK
I2S_AP_0_DOUT
I2S_AP_0_DIN
1
R3601 5%
1/32W
I2S_AP_2_LRCK
I2S_AP_2_BCLK
IN
I2S_AP_2_DOUT
IN
OUT I2S_AP_2_DIN
2 22
MF
01005
39
C8 ASP_LRCLK
B7 ASP_SCLK
B8 ASP_SDIN
A9 ASP_SDOUT
L63_ASP_SDOUT
C9 VSP_LRCLK
C10 VSP_SLCLK
A11 VSP_SDIN
IN
R36025%1
1/32W
I2S_AP_3_LRCK
I2S_AP_3_BCLK
IN
I2S_AP_3_DOUT
39 5
IN
I2S_AP_3_DIN
39 5 OUT
NOSTUFF R3608 22
1
2
DMIC_SCLK_SENSOR
OUT
5%
MF
39 5
22
MF
39
L63_VSP_SDOUT
A10 VSP_SDOUT
01005
B6 XSP_LRCLK
A6 XSP_SCLK
A8 XSP_SDIN/DAC2B_MUTE
A7 XSP_SDOUT
IN
39 5
25
OUT
25
25
IN
IN
22
39
MF
01005
01005
R36202 22
DMIC_SCLK_CANADA
DMIC_SD_SENSOR
1/32W
1
5%
1/32W
NOSTUFF
DMIC_SD_CANADA
MF
01005
MF
01005
B5 DMIC_SCLK
A5 DMIC_SD
NC_LINE_IN1_CODEC
C5 LINEINA
NC_LINE_IN1_REF_CODEC
C4 LINEINA_REF
D6 LINEINB
D5 LINEINB_REF
p:
/
NC_MIC1_FILT_CODEC
23
40 23
OUT
IN
EXT_MIC_BIAS
IN
40 23
IN
23
IN
R3604
HSMIC_C_P
1%
1/32W
EXT_MIC_P
EXT_MIC_REF
R3605
HSMIC_C_N
1.00K
2
MIC2_DET
MF
01005
IN
24
HP_R OUT
21
HP_L OUT
21
IN
21 23
LINEOUT2A D7
LINEOUT2A_REF E7
LEFT_CH_OUT_P OUT
LEFT_CH_OUT_REF IN
20 40
LINEOUT2B F7
LINEOUT2B_REF G7
RIGHT_CH_OUT_P OUT
RIGHT_CH_OUT_REF IN
20 40
EAROUT+ G3
EAROUT- F3
NC_EAROUT_AP
NC_EAROUT_AN
SPEAKEROUTA+ F6
SPEAKEROUTA- G6
NC_SPEAKEROUT_AP
NC_SPEAKEROUT_AN
SPEAKEROUTB+ F4
SPEAKEROUTB- G4
NC_SPEAKEROUT_BP
NC_SPEAKEROUT_BN
FILT+ G1
21
20 40
20 40
2.2UF
1
FLYC F11
21
21
C3617
FLYP E11 VHP_FLYP
C3618
20%
10V
X5R-CERM
402
VHP_FLYC
2.2UF
1
20%
10V
X5R-CERM
402
SPKR_VQ
NOT USING SPEAKER AMPLIFIER, THIS CAN BE A NO STUFF
FILT_P
E2 MIC1_BIAS_FILT
C2 MIC2_BIAS
D3 MIC2_DETECT
B1 MIC2
B2 MIC2_REF
+VCP_FILT D10 VHPPFILT

-VCP_FILT F10 VHPNFILT
MIC2_BIAS_FILT C1 MIC2_BIAS_FILT
D2 MIC3A_BIAS
A1 MIC3A
2.2UF
RECOMMENDED
A2 MIC3A_REF
D1 MIC3A_BIAS_FILT
C3614
C3613
10UF
GND
20%
6.3V
2 X5R
603
C3615
20%
2 6.3V
X5R-CERM
402
1UF
10%
2 6.3V
TANT
402-1
D9
D8
G5 GNDP
4.7UF
F2 GNDA
B10 GNDD
20%
6.3V
X5R-CERM 2
402
E10 GNDCP
E1 MIC3B_BIAS_FILT
4.7UF
C3609
C3616
4.7UF
CRITICAL
1
B4 MIC3B_REF
1
20%
6.3V
X5R 2
603
A4 MIC3B
C3611
CRITICAL
10UF
F1 MIC3B_BIAS
21 23
HP_DET
MIC2_DET_REF C3 MIC2_DETECT_REF
1%
1/32W
MF
01005
GND_AUDIO_HP_AMP
1.00K
tt
23
B3 MIC1_REF
NC_MIC1N_CODEC
HP_REF
FLYN G11 VHP_FLYN
A3 MIC1
NC_MIC1P_CODEC
MF
01005
LINEOUT1_REF E8
SPEAKER_VQ E6
D4 MIC1_BIAS
NC_MIC1_BIAS_CODEC
R36222 22
1
5%
1/32W
DMIC_SCLK_CODEC
DMIC_SD_CODEC
NC_LINE_IN2_CODEC
NC_LINE_IN2_REF_CODEC
R36212 22
1
5%
1/32W
L63_XSP_SDOUT
2
SM
CODEC_LINE_OUT_R OUT
CODEC_LINE_OUT_L OUT
CODEC_LINE_OUT_REF IN
yc
1/32W
R36035%1
/m
25
HP_DETECT E9
XW3602
su
39 5
2
SM
IN
INT*
19 21
XW3601
om
p.
4.7UF
SM
WLCSP
35
C3608
XW3600
I2C ADDRESS: 1001010X??
35
20%
2 4V
TANT
402-3
10%
6.3V
2 X5R
201
C6 SCL
OUT
0.1UF
C3604
U3600
C3607
20%
4V
2 X5R
01005
0.1UF
20%
6.3V
X5R 2
603
CS42L63B
39 35 10 5
20%
4V
2 X5R
402
/x
/
C3602
20%
4V
X5R 2
01005
C3606
VCP D11
0.1UF
VP F5
C3601
10%
6.3V 2
X5R
01005
VA G2
1000PF
VL C11
C3600
10UF
5%
16V
2 NP0-C0G
01005
39 35 10 5
32
=PP1V8_AUDIO
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
20%
6.3V
X5R-CERM 2
402
AUDIO: L63 CODEC

DRAWING NUMBER
Apple Inc.
21 19
GND_AUDIO_CODEC
051-8962
SIZE
REVISION
A.0.0
BRANCH

PAGE
36 OF 106
SHEET
19 OF 42
VDD
47K
NC
SHORT
NC
NC
GAIN
12DB
9DB
6DB
3DB
0DB
SPEAKER AMPLIFIER
APN:353S2958
TURN ON TIME: 7.5MS
80HZ +/- XXX%
TURN ON DELAY: 20MS
GND
NC
47K
NC
NC
SHORT
XW3701
SM
32 20 19
=PPVCC_MAIN_AUDIO
AUD_SPKR_AMP1_PBUS
LEFT CHANNEL IS INVERTED TO FIX CODEC BUG ON LINEOUT2

10%
LEFT_CH_OUT_REF
201
U3700
SSM2375_L_IN_N
SSM2375
WLCSP
LEFT_CH_OUT_P
100
40
201
C3701
0.047UF
LEFT_CH_P
1%
1/32W
MF
01005
40
SSM2375_L_IN_P
IN
OUT+ C3
OUT- B3
A2 SD*
GAIN A3
GND
C3704
10UF
20%
2 10V
X5R
603
SPKRAMP_L_OUT_P
SPKRAMP_L_OUT_N
SSM2375_L_GAIN
R37001
R3702
100K
0.00
5%
1/32W
MF
01005 2
0%
1/32W
MF
01005 2
SM
C
M-RT-SM
5
GND_SPKR_AMP1
SM
=PPVCC_MAIN_AUDIO
AUD_SPKR_AMP2_PBUS
p:
/
B
1
40
RIGHT_CH_P
40
RIGHT_CH_OUT_REF
AUD_SPKRAMP_MUTE_L
40
C3750
C3752
100PF
100PF
5%
5%
16V
2 NP0-C0G
01005
NOSTUFF
CRITICAL
NOSTUFF
CRITICAL
C3751
C3753
100PF
100PF
5%
5%
16V
NP0-C0G
01005
R37131
C3713
0.00
6.3V
X5R
201
0%
1/32W
MF
01005 2
VDD
2
U3710
SSM2375_R_IN_P
C3714
10UF
20%
2 10V
X5R
603
SSM2375
WLCSP
C3712
1
NOSTUFF
CRITICAL
0.047UF
2
NOSTUFF
CRITICAL
16V
CRITICAL
tt
10%
6.3V
X5R
201
NP0-C0G
01005
0.047UF
20 5
20
B1 IN+
A1 IN-
OUT+ C3
OUT- B3
A2 SD*
GAIN A3
SPKRAMP_R_OUT_P
SPKRAMP_R_OUT_N
SSM2375_R_GAIN
OUT
20
OUT
20
EDGE B2
SSM2375_R_IN_N
GND
10%
6.3V
X5R
201
C1
100
1%
1/32W
MF
01005
OUT
20
SPKRAMP_L_OUT_P
SPKRAMP_L_OUT_N
SPKRAMP_R_OUT_P
SPKRAMP_R_OUT_N
01005
10%
C3711
R3711
40 19
20
16V
0.1UF
CRITICAL
RIGHT_CH_OUT_P
20
2 NP0-C0G
C2
XW3711
J3700
78171-0004
yc
/m
L63 LINEOUT2A IS CONNECTED TO U3700

L63 LINEOUT2B IS CONNECTED TO U3710
IN
20
SPEAKER CONNECTOR
APN 518S0521
40 19
20
OUT
XW3700
1
32 20 19
OUT
GAIN:6DB
AUD_SPKRAMP_MUTE_L
om
p.
20 5
B1 IN+
A1 IN-
EDGE B2
10%
6.3V
X5R
CRITICAL
0%
1/32W
MF
01005 2
su
IN
6.3V
X5R 2
40
10%
6.3V
X5R
201
R3701
40 19
0.00
VDD
C1
OUT
R37031
/x
/
0.1UF
0.047UF
40 19
C2
C3703
CRITICAL
C3702
GAIN:6DB
R37121
0.00
0%
1/32W
MF
01005 2
XW3710
SM
1
GND_SPKR_AMP2
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
AUDIO: SPEAKER AMP

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
37 OF 106
SHEET
20 OF 42
HEADPHONE OUTPUT ZOBEL NETWORK

XW3851
SM
HP_L
19
IN
AUD_HP1_MLBCON_L OUT
24
XW3850
SM
HP_R
IN
R38501
1%
1/32W
MF
2 01005
23 19
23 19
OUT
C3853
27PF
C3852
27PF
5%
2 16V
NP0-C0G
01005
5%
16V
2 NP0-C0G
01005
C3851
/x
/
HP_ZL
HP_ZR
100
10%
6.3V 2
X5R
201
24
R3851
1%
1/32W
MF
01005 2
C3850
OUT
100
33000PF
AUD_HP1_MLBCON_R
33000PF
10%
2 6.3V
X5R
201
GND_AUDIO_HP_AMP
HP_REF
su
19
C3854
27PF
XW3800
SM
19
OUT
CODEC_LINE_OUT_REF
XW3801
SM
19
IN
CODEC_LINE_OUT_L
XW3802
SM
19
IN
CODEC_LINE_OUT_R
AUD_LO_REF_FILT
p:
/
/m
DOCK LINE OUTPUT
R3800
1
1.00 2
AV_EMI_DIFF_SENSE
IN
28
OUT
28
1%
1/20W
MF
201
AUDIO_EMI_LO_L
AUDIO_EMI_LO_R
OUT
tt
5%
16V
2 NP0-C0G-CERM
01005
XW3803
C3802
15PF
5%
16V
NP0-C0G-CERM 2
01005
C3803
28
DOCK
15PF
NOSTUFF
C3800 1
5%
16V
NP0-C0G-CERM 2
01005
0.01UF
10%
10V 2
X7R
201
SM
GND_AUDIO_CODEC
C3801
15PF
CODEC
19
yc
om
p.
5%
16V
2 NP0-C0G
01005
IN
GND_AUDIO_PT_DK
IN
28
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
AUDIO: HEADPHONE OUT

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
38 OF 106
SHEET
21 OF 42
su
/x
/
/m
yc
om
p.
tt
p:
/
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
AUDIO: BLANK
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
39 OF 106
SHEET
22 OF 42
32
/x
/
EXTERNAL (HEADSET) MIC INPUT CIRCUITRY
=PP3V0_S2R_HALL_CHSW
1
C4200
0.1UF
CHS_CLAMPI
A1
10%
2 6.3V
X5R
201
R4203
U4200
TS3A8235YFP
WCSP
D3
C4
AUD_HS_MIC1_HI
C4216
33PF
5%
16V
NP0-C0G 2
01005
C4212
CLAMPO
B4
CHS_CLAMPO
MIC
REF
D2
D1
HSMIC_C_P
HSMIC_C_N
SCL
SDA
ADDR
A3
A4
A2
B1 MIC1
C1 MIC2
15PF
5%
16V
NP0-C0G-CERM 2
01005
AUD_HS_MIC1_LO
IN
24
21 19
AUD_HS_RET1
AUD_HS_RET2
GND_AUDIO_HP_AMP
XW4200
SM
21 19
OUT
HP_REF
1%
1/20W
MF
201
1K
EXT_MIC_BIAS
IN
5%
1/20W
MF
201
HSMIC_R_P
470
EXT_MIC_P
1%
1/20W
MF
201
10%
6.3V
X5R
201
C4201
19 40
TO CODEC
R4213
0.1UF
10%
6.3V
X5R
201
OUT
1000PF
C4213
1
19 2319 23
C4217
10%
2 16V
X7R
201
10UF
20%
6.3V
2 CERM-X5R
0402-1
OUT
R4212
0.1UF
HSMIC_C_P
C4211
19
HSMIC_R_N
470
EXT_MIC_REF
OUT
19 40
HSMIC_C_N
OUT
19 2319 23
1%
1/20W
MF
201
CHS_SCL
CHS_SDA
10
10
EXT MIC LPF FC = 677KHZ
tt
p:
/
R4201
2.2K 2
/m
24
B2
C2
C3
B3
GND
R4202
yc
IN
FROM HEADSET
24
RAMPO
CLAMPI
GND2
GND1
24
RAMPI
D4
1%
1/20W
MF
201
om
p.
2.2K 2
su
VDD
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
AUDIO: DETECT/MIC BIAS

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
42 OF 106
SHEET
23 OF 42
/x
/
HEADPHONE JACK CONNECTION IS ON FRONT PANEL FLEX, CSA 55/PDF 29

PLACE ALL COMPONENTS NEAR J5501
L4301
30-OHM-1.7A
IN
CONN_AUD_HS_MIC1_HI
2
0402
L4302
30-OHM-1.7A
25
IN
CONN_AUD_HS_MIC1_LO
25
IN
CONN_AUD_HS_RET1
IN
CONN_AUD_HS_RET2
MAKE_BASE=TRUE
MAKE_BASE=TRUE
om
p.
25
2
0402
su
25
AUD_HS_MIC1_HI
AUD_HS_MIC1_LO
AUD_HS_RET1
OUT
23
AUD_HS_RET2
OUT
23
OUT
23
OUT
23
L4303
240-OHM-0.2A-0.8-OHM
25
IN
CONN_AUD_HP1_DET_H
AUD_HP1_DET_H
0201
OUT
24
AUD_HP1_MLBCON_R
IN
21
AUD_HP1_MLBCON_L
IN
21
L4304
30-OHM-1.7A
25
OUT
CONN_AUD_HP1_MLBCON_R
OUT
CONN_AUD_HP1_MLBCON_L
/m
25
yc
0402
L4306
30-OHM-1.7A
1
2
0402
HEADSET JACK INSERTION DETECT

R4312
24
AUD_HP1_DET_H
3.3K 2
p:
/
IN
5%
1/32W
MF
01005
HP_DET
OUT
19
NOSTUFF
1
C4310
4700PF
tt
10%
10V
2 X7R
201
SYNC_MASTER=LENG
SYNC_DATE=N/A
PAGE TITLE
AUDIO: HP/MIC FILTERS

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
43 OF 106
SHEET
24 OF 42
CANADA FLEXES CONN.
SENSOR BOARD CONN ALIASES
/x
/
APN: 518S0817
J5501
39 27
40 27
CRITICAL
41
39
40 27
40 27
OUT
24
OUT
IN
24
OUT
26
OUT
39 26
BI
39 26
BI
26
IN
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
40 27
SIM_RST
SIM_IO
CONN_AUD_HS_RET1
CONN_AUD_HS_RET2
CONN_AUD_HP1_MLBCON_L
DMIC_SCLK_CANADA
I2C2_SCL_3V0_ALS
DMIC_SD_CANADA
ISP_CAM_1_SCL
PP3V0_ALS
CLK_CAM_FF_CONN
PP1V8_CAM_FF
PP2V85_CAM_FF
MIPI1C_CAM_CLK_P
MIPI1C_CAM_CLK_N
MIPI1C_CAM_DATA_P<0>
MIPI1C_CAM_DATA_N<0>
IN
BI
31
su
OUT
24
24
IN
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
31
OUT
24
OUT
24
IN
24
IN
26 39
IN
26 39
IN
26 39
IN
19
OUT
19
26
26
26
IN
26 40
IN
26 40
BI
26 40
BI
26 40
om
p.
26
31
PPVSIM
SIM_CLK_FILT
SIM_DET
CONN_AUD_HS_MIC1_HI
CONN_AUD_HS_MIC1_LO
CONN_AUD_HP1_MLBCON_R
CONN_AUD_HP1_DET_H
IRQ_ALS_INT_CONN_L
I2C2_SDA_3V0_ALS
ISP_CAM_1_SDA
PM_FRONT_CAM_SHUTDOWN_FILT
yc
31 26
38
40
F-RT-SM
19
MAKE_BASE=TRUE
MAKE_BASE=TRUE
CONN_CLK_CAM_RF_FILT
CONN_MIPI0C_CAM_DATA_N<0>
CONN_MIPI0C_CAM_DATA_P<0>
27
27
27
MAKE_BASE=TRUE
MIPI0C_CAM_CLK_N
MIPI0C_CAM_CLK_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PM_REAR_CAM_SHUTDOWN
MAKE_BASE=TRUE
PP1V8_SENSOR_FILT
PP2V85_CAM_REAR
DMIC_SD_SENSOR
MAKE_BASE=TRUE
MAKE_BASE=TRUE
CONN_MIPI0C_CAM_CLK_N
CONN_MIPI0C_CAM_CLK_P
27
27
CONN_PM_REAR_CAM_SHUTDOWN
27
CONN_PP1V8_SENSOR_FILT
CONN_PP2V85_CAM_REAR
CONN_DMIC_SD_SENSOR
27
27
27
MAKE_BASE=TRUE
19
39 7
39 7
39 26 5
39 26 5
5
5
5
5
39 5
39 5
35
5
27
35 5
5
5
DMIC_SCLK_SENSOR
ISP_AP_0_SCL
ISP_AP_0_SDA
I2C2_SCL_3V0
I2C2_SDA_3V0
IRQ_ACCEL_INT1_L
IRQ_ACCEL_INT2_L
IRQ_GYRO_INT1
IRQ_GYRO_INT2
I2C1_SCL_1V8
I2C1_SDA_1V8
IRQ_HALL
IRQ_PROX_INT_L
PP3V0_S2R_HALL_FILT
ONOFF_L
SRL_L
AUD_VOL_UP_L
AUD_VOL_DOWN_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
CONN_DMIC_SCLK_SENSOR
CONN_ISP_AP_0_SCL
CONN_ISP_AP_0_SDA
CONN_I2C2_SCL_3V0
CONN_I2C2_SDA_3V0
CONN_IRQ_ACCEL_INT1_L
CONN_IRQ_GYRO_INT1
CONN_IRQ_GYRO_INT2
CONN_I2C1_SCL_1V8
CONN_I2C1_SDA_1V8
CONN_IRQ_HALL
CONN_IRQ_PROX_INT_L
CONN_PP3V0_S2R_HALL
CONN_ONOFF_FTR_L
CONN_SRL_FTR_L
CONN_AUD_VOL_UP_FTR_L
CONN_AUD_VOL_DOWN_FTR_L
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
MAKE_BASE=TRUE
27
PP3V0_OPTICAL_SENS
CONN_PP3V0_OPTICAL_SENS
27
MAKE_BASE=TRUE
tt
p:
/
27
35 5
/m
502250-8237
27
CLK_CAM_RF_FILT
SYNC_MASTER=MARK B.
SYNC_DATE=N/A
PAGE TITLE
CONNECTOR: CANADA FLEX CONN,SENSOR PANEL ALIASES

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
54 OF 106
SHEET
25 OF 42
VOLTAGE=3.0V
25
PP3V0_ALS
L5540
240-OHM-0.2A-0.8-OHM
=PP3V0_OPTICAL
5 27 32
0201
1
31 25
PPVSIM
C5542
10%
2 16V
X7R
201
C5530
0.1UF
10%
6.3V
201
C5540 1 C5541 FILTER PLACEHOLDER

1UF
82PF
1000PF
10%
2 10V
X5R
402
5%
2 25V
CERM
0201
2 X5R
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
=PP1V8_CAM
32 26
PP1V8_CAM_FF
VOLTAGE=2.85V
25
/x
/
L5520
240-OHM-0.2A-0.8-OHM
CANADA FLEX CONN ON PG 54
25
0201
1
C5521 1 C5520
82PF
FILTER PLACEHOLDER
1UF
C5522
1000PF
10%
2 10V
X5R
402
10%
2 16V
X7R
201
27 32
0201
C5512
1000PF
10%
16V
2 X7R
201
C5510 1 C5511 FILTER PLACEHOLDER

1UF
82PF
10%
2 10V
X5R
402
5%
2 25V
CERM
0201
su
5%
2 25V
CERM
0201
PP2V85_CAM_FF
L5510
240-OHM-0.2A-0.8-OHM
1
2
=PP2V85_CAM
yc
om
p.
/m
CANADA FLEX SIGNAL FILTERS
31
IN
SIM_CLK
SIM_CLK_FILT
OUT
0603
39 25 5
39 7
OUT
BI
IRQ_ALS_INT_L
1
2
3
4
I2C2_SDA_3V0
CLK_CAM_FF
IN
NOSTUFF
1
IN1
OUT1 5
IN2
OUT2 6
IN3
IN4
OUT3 7
OUT4 8
GND
C5501
10%
16V
201
NOSTUFF
I2C2_SDA_3V0_ALS
CLK_CAM_FF_CONN
IN
BI
OUT
90-OHM-50MA
TCM0605
SYM_VER-1
25
40 7
IN
40 7
IN
40 7
BI
40 7
BI
25 39
25 39
R5511
1
MIPI1C_AP_CLK_P
MIPI1C_AP_CLK_N
MIPI1C_AP_DATA_P<0>
MIPI1C_AP_DATA_N<0>
5%
1/20W
R5512
1
5%
1/20W
MIPI1C_CAM_CLK_P
OUT
25 40
MIPI1C_CAM_CLK_N
OUT
25 40
0
2
MF
201
02
NOSTUFF
NOSTUFF
MF
201
L5501
90-OHM-50MA
TCM0605
2 X7R
32 26
2
MF
201
L5500
9
10
1000PF
IRQ_ALS_INT_CONN_L
5%
1/20W
25
tt
U5500
800MHZ-100MA-27PF
R5510
1
p:
/
SYM_VER-1
BI
25 40
BI
25 40
=PP1V8_CAM
1
R5501
100K
39 25 5
IN
39 7
BI
IN
39 7
IN
800MHZ-100MA-27PF
5%
1/20W
0603
I2C2_SCL_3V0
ISP_AP_1_SDA
PM_FRONT_CAM_SHUTDOWN
ISP_AP_1_SCL
1
2
3
4
IN1
IN2
OUT1 5
OUT2 6
IN3
OUT3 7
OUT4 8
IN4
NOSTUFF
C5500
100PF
I2C2_SCL_3V0_ALS
ISP_CAM_1_SDA
PM_FRONT_CAM_SHUTDOWN_FILT
ISP_CAM_1_SCL
OUT
BI
25 39
MF
201
NOSTUFF
SYNC_MASTER=MARK B.
25 39
SYNC_DATE=N/A
PAGE TITLE
OUT
OUT
0
2
CONNECTOR: CANADA FLEX FILTERS
25
25 39
DRAWING NUMBER
GND
Apple Inc.
9
10
R5513
1
U5501
5%
1/20W
MF
2 201
051-8962
201

A.0.0
5%
2 25V
CERM
SIZE
REVISION
BRANCH
PAGE
55 OF 106
SHEET
26 OF 42
R5600
39 7
CLK_CAM_RF
IN
5%
1/20W
MF
201
CLK_CAM_RF_FILT
NOSTUFF
1
C5600
1000PF
10%
16V
201
2 X7R
R5610
1
2
MF
201
5%
1/20W
NOSTUFF
L5600
90-OHM-50MA
TCM0605
SYM_VER-1
R5611
1
40 7
IN
40 7
BI
40 7
IN
40 7
BI
MIPI0C_AP_DATA_N<0>
MIPI0C_AP_DATA_P<0>
MIPI0C_AP_CLK_N
MIPI0C_AP_CLK_P
R5612
1
NOSTUFF
2
MF
201
5%
1/20W
NOSTUFF
su
5%
1/20W
/x
/
2
MF
201
L5601
90-OHM-50MA
TCM0605
R5613
1
5%
1/20W
NOSTUFF
MIPI0C_CAM_CLK_N
MIPI0C_CAM_CLK_P
L5610
2
PP3V0_S2R_HALL_FILT
0201
1
C5601
82PF
5%
2 25V
CERM
0201
C5602
1UF
C563
1000PF
10%
2 10V
X5R
402
10%
2 16V
X7R
201
VOLTAGE=3.0V
L5611
240-OHM-0.2A-0.8-OHM
1
=PP1V8_SENSOR
PP1V8_SENSOR_FILT
0201
1
C5612
82PF
5%
25V
2 CERM
0201
C5613
1UF
10%
10V
2 X5R
402
C5620
1000PF
10%
16V
2 X7R
201
VOLTAGE=1.8V
240-OHM-0.2A-0.8-OHM
=PP2V85_CAM
2
0201
PP2V85_CAM_REAR
1
C5617
82PF
5%
25V
0201
2 CERM
C5618
1UF
C5621
1000PF
10%
10V
402
10%
16V
201
2 X5R
CONN_PP2V85_CAM_REAR
CONN_PP1V8_SENSOR_FILT
25
25 40
25
25
25
25
25
25
25
CONNECTED BY
PG 54 ALIASES
1
2
3
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
CONN_CLK_CAM_RF_FILT
CONN_ISP_AP_0_SCL
CONN_ISP_AP_0_SDA
CONN_PM_REAR_CAM_SHUTDOWN
CONN_MIPI0C_CAM_DATA_N<0>
CONN_MIPI0C_CAM_DATA_P<0>
CONN_MIPI0C_CAM_CLK_N
CONN_MIPI0C_CAM_CLK_P
CONN_IRQ_HALL
CONN_I2C1_SDA_1V8
CONN_I2C1_SCL_1V8
CONN_IRQ_PROX_INT_L
CONN_PP3V0_S2R_HALL
CONN_IRQ_GYRO_INT2
CONN_IRQ_GYRO_INT1
CONN_I2C2_SCL_3V0
CONN_I2C2_SDA_3V0
CONN_AUD_VOL_DOWN_FTR_L
CONN_AUD_VOL_UP_FTR_L
CONN_SRL_FTR_L
CONN_ONOFF_FTR_L
25
CONN_DMIC_SD_SENSOR
CONN_DMIC_SCLK_SENSOR
25
CONN_PP3V0_OPTICAL_SENS
25
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
33
25
34
VOLTAGE=3.3V
35
32 26
25
25
tt
L5613
31
25
25 40
p:
/
32
F-RT-SM
25 40
25
/m
=PP3V0_S2R_HALL
CABLINE-CA
25 40
yc
240-OHM-0.2A-0.8-OHM
32
CRITICAL
J5600
25 39
0
2
MF
201
CABLINE-CA CONNECTOR: 518S0787
om
p.
SYM_VER-1
SENSOR PANEL CONNECTOR
36
37
2 X7R
38
39
40
41
L5612
32
240-OHM-0.2A-0.8-OHM
32 26 5
=PP3V0_OPTICAL
PP3V0_OPTICAL_SENS
25
0201
1
C5614
82PF
5%
25V
0201
2 CERM
C5615
1UF
10%
10V
402
2 X5R
C5616
0.1UF
10%
6.3V
201
2 X5R
C5623
1000PF
VOLTAGE=3.0V
10%
16V
201
2 X7R
SYNC_MASTER=MARK B.
SYNC_DATE=N/A
PAGE TITLE
CONNECTOR: SENSOR PANEL CONNECTOR

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
56 OF 106
SHEET
27 OF 42
7
VOLTAGE=5V
L5757
USB
32
FERR-70-OHM-4A
PPVBUS_USB_EMI
C5721
C5722
1
5%
2 25V
NP0-C0G
201
DZ5760
R5790
C5783
40 11 10
IN
JTAG
VIDEO_EMI_CVBS_PB
10%
2 25V
X7R
402
29 40
39 4
IN
39 4
IN
R5730
R5731
JTAG_AP_TCK
JTAG_AP_TMS
VIDEO_PT_DK_CON_C_Y
R5795
28 29 40
BI
USB_D_N
USB_PT_DK_CON_D_P
1%
1/32W
MF
2 01005
IN
VIDEO_EMI_Y_PR
=PP1V8_S2R_MISC
VIDEO_PT_DK_CON_Y_PR
U5730
MAX9061
B1 REF
32 5
OUT A1
VIDEO_PT_DK_CON_Y_PR 28 29 40
VIDEO_PT_DK_CON_C_Y 28 29 40
VIDEO_PT_DK_CON_CVBS_PB 28 29 40
AV_PT_DK_CON_RET 29
29 39
5 IO
2 NC
AUDIO_PT_DK_RET
GND
NOTE:
JTAG_AP_TMS = 3.3V:
JTAG_AP_TMS = 1.8V:
ACCESSORY
DISPLAYPORT
VOLTAGE=3.3V
TCM0806-4SM
SYM_VER-1
40 13
ACC_PT_DK_CON_PP3V3
IN
DP_EMI_TX_P<0>
IN
DP_EMI_TX_N<0>
29
0402
1
DZ5790
0.095 OHM DCR
8V-100PF
0201
1
32
C5751
27PF
5%
2 25V
NP0-C0G
201
L5760
FERR-120-OHM-1.5A
21
AUDIO_EMI_LO_L
IN
40 13
C5782
0.01UF
10%
2 10V
X5R
201
=PPVCC_MAIN_DOCK
AUDIO_PT_DK_CON_LO_L
0402
DP_PT_DK_CON_TX_P<0>
DP_PT_DK_CON_TX_N<0>
NC_D5700_6
DZ5710
29 40
UCLAMP0511Z
0201
29 40
VBUS
L5761
IO 4
NC 3
5 IO
2 NC
FERR-120-OHM-1.5A
21
AUDIO_EMI_LO_R
IN
AUDIO_PT_DK_CON_LO_R
0402
SLP1210N6
220K
5%
1/20W
MF
2 201
29
40 13
6.8V-100PF
0201
1
C5752
27PF
5%
2 25V
NP0-C0G
201
40 13
R5752
1
35
100K 2
p:
/
1/20W 201
MF 1%
R5753
10K
5%
1/20W
MF
201
ACC_PT_DK_CON_ID
0201
C5760
14.2V-6PF
0.01UF
2
DZ5752
10%
16V
X5R-CERM
0201
C5753
27PF
5%
2 25V
NP0-C0G
201
R5720
39 11
IN
29
C
1
USB_FS_N_ACC_TX
IN
DP_EMI_TX_N<1>
NC_D5701_6
ACC_PT_DK_CON_TX
5%
1/20W
MF
201
21
IN
AV_EMI_DIFF_SENSE
AV_PT_DK_CON_DIFF_SENSE 29
0201
2
DZ5712
6.8V-100PF
IO 4
NC 3
5 IO
0201
R5740
100
2 NC
5%
1/20W
MF
2 201
D5701
SLP1210N6
L5763
GND
30-OHM-1.7A
1
21
IN
GND_AUDIO_PT_DK
AUDIO_PT_DK_RET 28
0402
L5702
90-OHM-50MA
TCM0605
SYM_VER-1
40 13
IN
DP_EMI_AUX_P
DP_PT_DK_CON_AUX_P
40 13
IN
DP_EMI_AUX_N
DP_PT_DK_CON_AUX_N
NC_D5702_6
29 40
29 40
FIREWIRE DETECT/ DISPLAYPORT HPD

6
R5710
VBUS
IO 4
NC 3
29 39
5 IO
2 NC
C5754
35 13
D5702
5%
25V
2 NP0-C0G
201
B1
29 40
VBUS
27PF
A1
L5762
22-OHM-25%-900MA
NOSTUFF
1
29 40
RCLAMP0502N
tt
35
OUT PORT_DOCK_ACCID
DP_EMI_TX_P<1>
/m
DZ5753
SYM_VER-1
IN
FW_ZENER_PWR
OUT
47K
5%
1/20W
MF
201
DZ5720
SLP1210N6
GDZ-0201
GND
29
C5780
0.01UF
10%
50V
2 X7R
402
GDZT2R5.1B
RCLAMP0502N
FW_PT_DK_CON_PWR
1
12-OHM-100MA-8.5GHZ
TCM0806-4SM
yc
ACC_PT_DK_CON_DET_L
5%
1/20W
MF
201
PLACE
BY PMU
PMU_ADC_REF
UCLAMP0511Z
0201
1
10K
DZ5711
GND
1
L5701
R5751
1
OUT PORT_DOCK_ACC_DET_L
29
RCLAMP0502N
R5750
35
D5700
29
2
om
p.
U5730S IN = 2.13V
U5730S IN = 1.16V
LINEOUT
L5700
12-OHM-100MA-8.5GHZ
su
1%
1/32W
MF
2 01005
/x
/
SLP1210N6
=PP3V3_PORT_ACC
1.00M
RCLAMP0502N
32
OUT
R5796
SOT953
SM
D5703
L5714
NUP412VP5XXG
XW5700
28
FERR-120-OHM-1.5A
DEVELOPMENT_JTAG
0.1UF
10%
2 6.3V
X5R
201
U5700
OMIT
IO 4
NC 3
4 31 35
GND
C5730
CRITICAL
VBUS
RST_AP_L
B2
USB_PT_DK_CON_D_N
NC_D5703_6
UCSP
A2 IN
U5730_IN
DEVELOPMENT_JTAG
BI
29
(JTAG_TMS)
28 29 40
0201
29 39
1
39 4
29
DEVELOPMENT_JTAG
523K
80-OHM-0.2A-0.4-OHM
40 11 10
0
0
DEVELOPMENT_JTAG
FL5708
SYM_VER-1
1
1
VIDEO_EMI_C_Y
NOTE: MAX CONTINUOUS VOLTAGE IS 19V - SPEC IS 16V
USB_D_P
DEVELOPMENT_JTAG
80-OHM-0.2A-0.4-OHM
IN
90-OHM-50MA
TCM0605
39 4
FL5707
0201
(JTAG_TCK)
PT_DK_CON_P14
PT_DK_CON_P17
DEVELOPMENT_JTAG
VIDEO_PT_DK_CON_CVBS_PB 28
0201
40 11 10
L5716
FL5711
29
0.01UF
5%
2 25V
NP0-C0G
201
0402
5%
1/20W
MF
2 201
C5750
27PF
27V-100PF
100K
5%
2 25V
NP0-C0G
201
80-OHM-0.2A-0.4-OHM
2
12PF
ANALOG VIDEO
PPVBUS_USB_PT_DK_CON
0603
27PF
DZ5751
USBULC6-2F3
BGA
A2
B2
SYNC_MASTER=JAMES
SYNC_DATE=N/A
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
377S0090
377S0111
R5721
39 11
OUT
USB_FS_P_ACC_RX
PAGE TITLE
REF DES
COMMENTS:
377S0081
DZ5751
377S0099
DZ5710,DZ5711
RADAR:8379541
IO FLEX: DOCK COMPONENTS
TABLE_ALT_ITEM
ACC_PT_DK_CON_RX
5%
1/20W
MF
201
29 39
DRAWING NUMBER
NOSTUFF
1
TABLE_ALT_ITEM
C5755
27PF
Apple Inc.
TABLE_ALT_ITEM
5%
2 25V
NP0-C0G
201
BOM OPTION
377S0107
377S0066
155S0625
155S0559
D5700,D5701,D5702,D5703
BRANCH
RADAR:8423156
SIZE
A.0.0
RADAR:8289785
TABLE_ALT_ITEM
L5700,L5701
051-8962
REVISION
PAGE
57 OF 106
SHEET
28 OF 42
/x
/
PN 516S0817 (PLUG - MALE)
su
CRITICAL
J5900
AXK844135WG
M-ST-SM
28
PPVBUS_USB_PT_DK_CON
11
14
13
16
28
39 28
39 28
IN
OUT
IN
28 40
IN
28 40
IN
28 40
IN
28 40
23
26
25
28
27
30
PT_DK_CON_P14
PT_DK_CON_P17
ACC_PT_DK_CON_RX
ACC_PT_DK_CON_TX
IN
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
AV_PT_DK_CON_DIFF_SENSE
AUDIO_PT_DK_CON_LO_L
AUDIO_PT_DK_CON_LO_R
AV_PT_DK_CON_RET
ACC_PT_DK_CON_DET_L
DP_PT_DK_CON_AUX_P
DP_PT_DK_CON_AUX_N
HOME_L
OUT
28
IN
28
IN
28
OUT
28
OUT
28
BI
28 40
BI
28 40
OUT
5 29 35
35 29 5
OUT
HOME_L
2
tt
p:
/
IN
21
24
yc
28
19
22
/m
(JTAG_TCK)
(JTAG_TMS)
17
20
VIDEO_PT_DK_CON_CVBS_PB
VIDEO_PT_DK_CON_C_Y
IN
VIDEO_PT_DK_CON_Y_PR
40 28
IN
ACC_PT_DK_CON_ID
28
OUT
(DP_HPD) 28 OUT FW_PT_DK_CON_PWR
ACC_PT_DK_CON_PP3V3
28
28 39
15
18
IN
28 39
BI
12
40 28
BI
10
40 28
USB_PT_DK_CON_D_P
USB_PT_DK_CON_D_N
om
p.
DZ5750
6.8V-100PF
0201
1
SYNC_MASTER=JAMES
SYNC_DATE=N/A
PAGE TITLE
IO FELX: B2B Connector

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
59 OF 106
SHEET
29 OF 42
X23 WIFI/BT CONNECTOR

D
/x
/
PPVCC_MAIN_WL_CONN
VOLTAGE=4.7V
C6000
516S0884
J6000
AXT530224
F-ST-SM
OUT
35
IN
35
OUT
IN
10
OUT
10
IN
10
OUT
10
IN
39 19 5
IN
39 19 5
IN
39 19 5
OUT
IN
UART_AP_3_RXD
UART_AP_3_TXD
UART_AP_3_CTS_L
UART_AP_3_RTS_L
I2S_AP_2_BCLK
I2S_AP_2_DOUT
I2S_AP_2_DIN
I2S_AP_2_LRCK
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
L6001
22-OHM-25%-0.4A-0.35DCR
1
2
=PP1V8_S2R_WL
SDIO_WL_CLK
SDIO_WL_CMD
SDIO_WL_DATA<3>
SDIO_WL_DATA<2>
SDIO_WL_DATA<1>
SDIO_WL_DATA<0>
CLK_32K_WLAN
C6001
C
32
0402
68PF
5%
25V
CERM
201
IN
5 40
BI
5 40
BI
5 40
BI
5 40
BI
5 40
BI
5 40
IN
35 39
/m
39 19 5
RST_WLAN_L
PM_WLAN_HOST_WAKE
RST_BT_L
PM_BT_HOST_WAKE
PM_BT_WAKE
5%
25V
CERM
201
PP1V8_S2R_WL_CONN
om
p.
IN
35
yc
35
68PF
VOLTAGE=1.8V
32
0603
1
su
L6000
22-OHM-25%-0.5A-0.20DCR
1
2
=PPVCC_MAIN_WL
tt
p:
/
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
CONNECTOR: X23 WIFI/BT

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
60 OF 106
SHEET
30 OF 42
X24 CELLULAR/GPS CONNECTOR

D
D
998-3141
J6100
CELL-MODULE-X24
HB-SM
SNSV_BATT_POS_ACF
=BATT_POS_F_3G
32
R6100
255K
1%
1/32W
MF
2 01005
5
6
7
ADC_IN7
OUT
/x
/
35
OMIT
35 28 4
R6101
NOSTUFF
C6100
0.01UF
10%
6.3V 2
X5R
01005
255K
1%
1/32W
MF
2 01005
OUT
IN
35
IN
OUT
IN
OUT
RST_AP_L
PM_RADIO_ON
RST_BB_PMU_L
GSM_TXBURST_IND
RST_BB_L
RST_DET_L
8
9
10
11
12
13
IN
OUT
40 5
IN
IN
40 5
OUT
SPI_IPC_MRDY
SPI_IPC_SRDY
SPI_IPC_SCLK
SPI_IPC_MOSI
SPI_IPC_MISO
IPC_GPIO
PM_BB_HOST_WAKE
15
16
18
19
OUT
OUT
35
IN
39 11
BI
39 11
BI
10
IN
10
OUT
10
OUT
10
IN
10
OUT
10
IN
BB_VBUS_DET
USB_BB_D_P
USB_BB_D_N
UART_AP_1_RXD
UART_AP_1_TXD
UART_AP_1_CTS_L
UART_AP_1_RTS_L
UART_AP_2_RXD
UART_AP_2_TXD
yc
35
32
/m
p:
/
10
10
10
10
5
5
39 35
IN
26 25
25
IN
25
OUT
26
OUT
25
BI
PPVSIM
SIM_DET
SIM_RST
SIM_CLK
SIM_IO
20
21
22
23
24
25
26
27
28
29
30
31
32
33
=PP1V8_S2R_GPS
RST_GPS_L
IN
PM_GPS_STANDBY_L
IN
UART_AP_4_RXD
OUT
UART_AP_4_TXD
IN
UART_AP_4_CTS_L
OUT
UART_AP_4_RTS_L
IN
GPS_SYNC
IN
IRQ_GPS_INT_L
OUT
CLK_32K_GPS
17
om
p.
40 5
su
14
40 5
VOLTAGE=1.2V
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
tt
50
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
CONNECTOR: X24 CELLULAR/GPS

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
61 OF 106
SHEET
31 OF 42
POWER CONN / ALIAS

LDO RAILS
BUCK RAILS
CHARGER MAIN
PROGRAMMABLE ON/OFF
34
34
PP3V0_S2R_HALL
MAKE_BASE=TRUE
VOLTAGE=3.0V
=PP3V0_S2R_HALL
=PP3V0_S2R_HALL_CHSW
PP1V2_SOC
=PPVDD_SOC_H4
MAKE_BASE=TRUE
VOLTAGE=1.2V
27
23
9
35 34
PPVCC_MAIN
MAX_NECK_LENGTH=0.8 MM
MAKE_BASE=TRUE
VOLTAGE=4.7V
=PPVCC_MAIN_AUDIO
=PPVCC_MAIN_WL
=PPVCC_MAIN_DOCK
=PPVCC_MAIN_LED
19 20
30
28
35
PP1V7_VA_VCP
=PP1V7_VA_VCP
19
MAKE_BASE=TRUE
VOLTAGE=1.7V
34
34
PP3V0_VIDEO
MAKE_BASE=TRUE
VOLTAGE=3.0V
=PP3V0_VIDEO_BUFFER
=PP3V0_VIDEO_H4
PP3V0_OPTICAL
=PP3V0_OPTICAL
BI
=PP1V2_S2R_H4
PP1V2_S2R
MAKE_BASE=TRUE
VOLTAGE=1.2V
5 26 27
34
PP3V2_SD
MAKE_BASE=TRUE
VOLTAGE=3.2V
PP1V8_S2R
=PP1V8_S2R_H4
=PP1V8_S2R_WL
=PP1V8_S2R_GPS
=PP1V8_S2R_MISC
MAKE_BASE=TRUE
VOLTAGE=1.8V
PP3V3_ACC
34
PP3V0_VIDEO_BUF
=PP3V3_PORT_ACC
28
=PP3V0_VIDEO_BUF
11
MAKE_BASE=TRUE
VOLTAGE=3.3V
MAKE_BASE=TRUE
VOLTAGE=3.0V
34
PP1V8
=PP1V8_CAM
=PP1V8_SENSOR
=PP1V8_AUDIO
=PP1V8_H4
=PP1V8_VDDIO18_H4
=PP1V8_MIPI_H4
=PP1V8_DPORT_H4
MAKE_BASE=TRUE
VOLTAGE=1.8V
om
p.
34
PP3V2_S2R_USBMUX
=PP3V2_S2R_USBMUX
11
MAKE_BASE=TRUE
VOLTAGE=3.2V
34
PP3V0_IO
MAKE_BASE=TRUE
VOLTAGE=3.0V
=PP3V0_IO_H4
=PP3V0_IO_MISC
13
=PP2V85_CAM
26 27
7 9
PP2V85_CAM
34
MAKE_BASE=TRUE
VOLTAGE=2.85V
PP3V3_OUT
MAKE_BASE=TRUE
VOLTAGE=3.3V
yc
34
MAKE_BASE=TRUE
VOLTAGE=3.0V
34
PP1V1
MAKE_BASE=TRUE
VOLTAGE=1.1V
34
PP1V8_ALWAYS
=PP3V0_GRAPE
=PP3V0_GRAPE_Z1
=PP3V0_GRAPE_Z2
=PP3V0_GRAPE_MARIO1
=PP1V1_PLL_H4
=PP1V1_MIPI_H4
=PP1V1_DPORT_H4
=PP1V1_USB_H4
=PP1V1_MIPI_PLL_H4
=PP1V8_ALWAYS
MAKE_BASE=TRUE
VOLTAGE=1.8V
17 18
/m
PP3V0_GRAPE
18
18
17
35
4
7
7
4
PPLED_OUT
36
tt
=PP3V3_NAND
=PP3V3_USB_H4
=PP3V3_MLC_HI
=PP3V3_LCD
=PP3V3_NAND_H4
=PPLED_REG
MAKE_BASE=TRUE
VOLTAGE=20.4V
p:
/
34
BATTERY
37 34
PPBATT_VCC
MAKE_BASE=TRUE
VOLTAGE=4.2V
30
=BATT_POS_F_3G
=BATT_POS_CONN
31
33
31
5 28
su
34
34
7
34
MAKE_BASE=TRUE
VOLTAGE=3.0V
=PPVDD_CPU_H4
MAKE_BASE=TRUE
VOLTAGE=1.2V
11
34
PP1V2_CPU
/x
/
34
26
27
19
USB POWER INPUT
4 5 7 10 13
8 9
7
7
28
PPVBUS_USB_EMI
PPVBUS_USB_DCIN
34
MAKE_BASE=TRUE
12
4
36
16
10
16
PP3V3_MLC_OUT
=PP3V3_MLC
14 16
MAKE_BASE=TRUE
VOLTAGE=3.3V
34
PP1V2
MAKE_BASE=TRUE
VOLTAGE=1.2V
=PP1V2_VDDQ_H4
=PP1V2_VDDIOD_H4
=PP1V2_HSIC_H4
8
8
4
GND
MAKE_BASE=TRUE
VOLTAGE=0V
NET_SPACING_TYPE=GND
SYNC_MASTER=YOSH
SYNC_DATE=N/A
PAGE TITLE
POWER: ALIASES
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
73 OF 106
SHEET
32 OF 42
su
/x
/
yc
om
p.
XW7520
34
BATT_SNS
/m
SM
NET_SPACING_TYPE=ANLG
32
=BATT_POS_CONN
TP7500
1
A
FL7500
240-OHM-0.2A-0.8-OHM
35 5
BI
BATTERY_SWI
p:
/
TP-P55
NOSTUFF
2
R7541
BI
BATTERY_NTC
5%
1/20W
C7522
33PF
MF
201
5%
25V
NP0-C0G 2
201
33PF
5%
25V
NP0-C0G 2
201
C7524
1000PF
10%
16V
X7R 2
201
C7525
1
2
3
4
82PF
5%
25V
CERM 2
0201
NOTE: GET RID OF THE

RES AFTER BRINGUP
C7523
tt
35
J7500
BATT-K93
7F-ST-SM
5
BATT_SWI_CONN
BATT_NTC_CONN
0201-1
CRITICAL
6
8
POS
HDQ
THERM
GND
NOTE:
VERIFY PINOUT OF
BATTERY CONNECTOR
VERIFY MOUNTING CONN TO GND
APN:516-0240
TP7501
1
A
TP-P55
NOSTUFF
TP7502
1
A
TP-P55
NOSTUFF
TP7503
1
A
TP-P55
NOSTUFF
SYNC_MASTER=YOSH
SYNC_DATE=N/A
PAGE TITLE
POWER: BATTERY CONNECTOR

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
75 OF 106
SHEET
33 OF 42
CRITICAL
L8100
2.2UH-20%-1.85A-80MOHM
1
BUCK0_LXL
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
IC,PMU,ALISON,D1946A2,OTPXX,UFBGA292
U8100
PP1V2_CPU
CRITICAL
CRITICAL
L8101
TABLE_5_ITEM
343S0542
PST25201B-SM
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
BOM OPTION
CRITICAL
C8102
2.2UH-20%-1.85A-80MOHM
1
BUCK0_LXM
CRITICAL
1
22UF
PST25201B-SM
DIDT=TRUE
C8103
22UF
20%
2 6.3V
X5R-CERM
603
32
ADDITIONAL DISTRIBUTED
25UF (NO DE-RATING)
20%
2 6.3V
X5R-CERM
603
XW8103
1
BUCK0_FB
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
197S0392
197S0299
BOM OPTION
REF DES
COMMENTS:
Y8138
ALT FOUNDRY
2
SM
NOSTUFF
CRITICAL
L8105
TABLE_ALT_ITEM
2.2UH-20%-1.85A-80MOHM
1
BUCK2_LXL
PP1V2_SOC
PST25201B-SM
DIDT=TRUE
CRITICAL
L8107
CRITICAL
2.2UH-3.5A-54M-OHM
DIDT=TRUE
CRITICAL1
CRITICAL
Q8104
FDMC6683
MLP3.3X3.3
NOSTUFF
R8116
CHANNEL
P-TYPE
470K
1%
1/20W
MF
2 201
RDS(ON)
27 MOHM @-4.5V
IMAX
6.9 A
PPBATT_VCC
ACT_DIO
PPVBUS_PROT
+/- 25V
2
VGS MAX
37 34 32
DZ8120
CRITICAL
VOLTAGE=6V
BZT52C10LP
Q8123
CRITICAL
LLP
MLP3.3X3.3
C8124
CRITICAL
FDMC6676BZ
G 4
XW8114
SHORT-0201
1
PPVBUS_USB 2
NOSTUFF
2.2UF
NOTE: 10V ZENER
10%
25V
X5R-CERM 2
805
LAYOUT NOTE: PLACE

RIGHT AT THE PIN
VBUS_PROT_G
PPVBUS_USB_DCIN
VOLTAGE=6V
R81301
NC_VBUS_B_OV_N
10%
25V
2 X5R
805
5
32
C8125
10UF
CRITICAL
LAYOUT NOTE: PLACE

RIGHT AT THE PIN
220K
IBAT
ACT_DIO
VBUS_A
F1
F2
H1
J1
BUCK5_BYP
J2
BUCK5_FB G4
VBUS_A_OV_N
VCENTER_B
VBUS_B
VBUS_B_OV_N
BUCK5_LX
A10
VDD_BUCK0
B10
A3
B3
VDD_BUCK2
B7
B6
A17 VDD_BUCK3
A13
VDD_BUCK4
B13
E1
VDD_BUCK5
E2
G1
G2
VDD_BUCK5_BYP
H2
G22 VCC_MAIN_S
N19
P19
VCC_MAIN
N20
P20
yc
34 32
CRITICAL
C8100
C8101
22UF
22UF
20%
6.3V
X5R-CERM 2
603
20%
6.3V
X5R-CERM 2
603
R81001
0.5
1%
1/16W
MF
402 2
C8135
1UF
10%
6.3V
2 CERM
402
BATT_POS_RC
35 34 32
VOLTAGE=4.6V
34 32
PPVCC_MAIN
PP1V2_S2R
1
K2
L4
N9
N4
N10
N6
L2
N7
tt
NOSTUFF
CRITICAL
PP1V8_S2R
C8136
1UF
10%
6.3V
2 CERM
402
L1
P3
P9
N5
P10
K1
P4
P8
P11
P5
M1
P6
M2
PMU_EXTAL
18PF
5%
25V
NP0-C0G 2
201
XW8117
BUCK3_LX
DIDT=TRUE
C8117
22UF
20%
6.3V
2 X5R-CERM
603
SM
NOSTUFF
CRITICAL
BUCK3_FB
CRITICAL
C8118
22UF
20%
6.3V
2 X5R-CERM
603
CRITICAL
2.2UH-20%-1.85A-80MOHM
1
PP1V2_S2R
PST25201B-SM
CRITICAL
L8121
2.2UH-20%-1.85A-80MOHM
1
BUCK4_LXM
DIDT=TRUE
20%
2 6.3V
X5R-CERM
603
PST25201B-SM
CRITICAL
XW8126
1
C8121
22UF
BUCK4_FB
32 34
20UF (NO DE-RATING)
C8122
10UF
20%
6.3V
2 X5R
603
CRITICAL
2
SM
L8128
2.2UH-20%-3.3A-0.064OHM
32 34
32 34
BUCK5_LX
32 34
DIDT=TRUE
DCR=64MOHM MAX
32 34
PP3V3_OUT
PIME051E-SM
1
32 34
32 34
BUCK5_FB
32 34
C8119
22UF
XW8132
32 34
20%
6.3V
2 X5R-CERM
603
2
SM
NOSTUFF
CRITICAL
32
47UF (NO DE-RATING)
C8120
22UF
20%
6.3V
2 X5R-CERM
603
CRITICAL
32 34
32 34
32 34
32 34
PP1V2_S2R
PP1V2
32 34
32
TP8133
DSP_SW 1 TP
PP1V8_S2R 32 34
PP1V8 32
TP-P55
NOSTUFF
TP8101
PP1V8_GRAPE 1 TP
1
VOLTAGE=4.6V
C8138
C8140
C8139
C8141
1UF
1UF
1UF
1UF
20%
2 6.3V
X5R
0201
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
TP-P55
NOSTUFF
ADDITIONAL DISTRIBUTED:
PP1V2: 30UF (NO DE-RATING)
PP1V8: 6UF (NO DE-RATING)
0.01UF
10%
6.3V 2
X5R
01005
LDO BYPASS
34 32
C8143
34 32
18PF
34 32
5%
25V
2 NP0-C0G
201
34 32
34 32
PP3V0_GRAPE
PP1V7_VA_VCP
PP3V0_VIDEO
PP3V0_OPTICAL
PP3V2_SD
PP3V3_ACC
PP3V0_VIDEO_BUF
CRITICAL
C8150
2.2UF
10%
6.3V
X5R 2
402
VCC_MAIN BYPASS
CRITICAL
C8149
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8148
4.7UF
20%
6.3V
X5R-CERM1 2
402
CRITICAL
C8146
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8145
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8144
10UF
20%
6.3V
CERM-X5R 2
0402
CRITICAL
C8147
2.2UF
10%
6.3V
X5R 2
402
TOTAL CAPS = ~400UF
A
CRITICAL
CRITICAL
C8166 1
C8165 1
150UF-0.035OHM
20%
6.3V 2
POLY-TANT
CASE-B15G-SM
150UF-0.035OHM
20%
6.3V 2
POLY-TANT
CASE-B15G-SM
(DISTRIBUTED AND NO DE-RATING)
(PLACE ONE 1UF CAP AT EACH VDD INPUT)
PLACEMENT_NOTE=PLACE NEAR L8225.1
PPVCC_MAIN
CRITICAL
1
C8154
10UF
20%
2 6.3V
X5R
603
CRITICAL CRITICAL
1
C8155
10UF
20%
2 6.3V
X5R
603
C8156
4.7UF
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
C8157
4.7UF
C8158
4.7UF
C8159
4.7UF
C8160
4.7UF
C8161
4.7UF
C8162
4.7UF
C8130
4.7UF
C8131
1.0UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
2 6.3V
X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R
402
402
402
402
402
402
402
402
0201-MUR
C8163
82PF
5%
2 25V
CERM
0201
C8164
34 32
18PF
34 32
5%
2 25V
NP0-C0G
201
34 32
PP3V2_S2R_USBMUX
PP3V0_IO
PP3V0_S2R_HALL
PP2V85_CAM
PP1V1
PP1V8_ALWAYS
C8169
20%
6.3V
X5R 2
0201
SYNC_MASTER=YOSH
C8168
SYNC_DATE=N/A
PAGE TITLE
POWER: PMU
DRAWING NUMBER
CRITICAL
0.22UF
NOTE: CONCERNED ABOUT ESR > 20MOHM
34 32
34 32
32 34 35
34 32
NOSTUFF
CRITICAL
32 34
VPUMP B18 PMU_VPUMP
C8137
32 34
14UF (NO DE-RATING)
L8119
VBUCK0_SW0_G B21 NC_PMU_VBUCK0_SW0_G

VBUCK0_SW0_S A21 NC_PMU_VBUCK0_SW0_S
NET_SPACING_TYPE=CRYSTAL
PP1V8_S2R
VBUCK3 A19
CPU1V8_SW A20 (RON=0.2 OHM MAX)
WDIG_SW B19 (RON=0.5 OHM MAX)
34 32
2012
2
PST25201B-SM
VBUCK4 B17
CPU1V2_SW A18 (RON=0.1 OHM MAX)
DSP_SW B20 (RON=1 OHM MAX)
Y8138
1
2
SM
NOSTUFF
DIDT=TRUE
PP3V0_GRAPE
(100MA; 1.65-1.805V; BUCK3) PP1V7_VA_VCP
(50MA; 2.5-3.3V)
PP3V0_VIDEO
(100MA; 1.8-3.3V)
PP3V0_OPTICAL
(300MA; 2.5-3.6V)
PP3V2_SD
(150MA; 2.5-3.6V)
PP3V3_ACC
(50MA; 1.5-3.3V)
PP3V0_VIDEO_BUF
(10MA; 2.0-3.55V) PP3V2_S2R_USBMUX
(300MA; 1.2-3.0V)
PP3V0_IO
(200MA; 2.5-3.55V)
PP3V0_S2R_HALL
(200MA; 1.7-3.0V)
PP2V85_CAM
(150MA; 0.6-1.3V)
PP1V1
PP1V8_ALWAYS
34 32
C8142
BUCK4_LXL
(150MA; 2.5-3.55V)
CRITICAL
32.768K-20PPM-12.5PF
PMU_XTAL
VDD_LDO1_6
VDD_LDO2
VDD_LDO3_5_8
VDD_LDO4_7
VDD_LDO9
VDD_LDO10
VDD_LDO11
VDD_LDO12
P1 XTAL1
P2 XTAL2
NET_SPACING_TYPE=CRYSTAL
37 34 32
PPBATT_VCC
LDO INPUT
NOTE: FOR NO BATTERY SITUATION
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
VLDO11
VLDO12
ON_BUF
BUCK2_FB
(BYPASS RON=0.14 OHM MAX)
XTAL
p:
/
BUCK3_FB D16
BUCK4_FB D14
L8115
2.2UH-20%-1.85A-80MOHM
XW8113
BUCK3_LX A16
BUCK4_LXL A14
BUCK4_LXM B11
CRITICAL
PST25201B-SM
DIDT=TRUE
A7
B8
BUCK2_LXM A6
BUCK2_LXR A4
BUCK2_FB D7
VCENTER_A
BUCK2_LXR
BUCK2_LXL
/m
USB REVERSE VOLTAGE PROTECTION
L8110
BUCK0_LXL A11
BUCK0_LXM A9
BUCK0_FB D9
CHG_B_LX
VBAT
IBAT_S
VCC-MAIN
1%
1/20W
MF
201 2
CHG_A_LX
SWITCH POWER
FDMC6676BZ
3
2
1
MOSFET
RDSON=0.0136@VGS=-2.5V
ID=12.0A
UFBGA
(SYM 2 OF 3)
/x
/
PMEG4030ER
S
4
G24
G25
DIDT=TRUE
H24
NC_CHGB
H25
L25
BATT_SNS
33
P25
N17
P17
N18
P18
P24
F24
F25
A22
A23
B24
NC_VBUS_A_OV_N
J24
J25
PMU_VCENTER
P22
P23
VOLTAGE=6V
N22
20%
2 6.3V
X5R-CERM
603
CRITICAL
su
SOD-123W
C8108
22UF
20%
2 6.3V
X5R-CERM
603
32
30UF (NO DE-RATING)
2.2UH-20%-1.85A-80MOHM
om
p.
BUCK
D8100
1 2
22UF
PST25201B-SM
DIDT=TRUE
ALISON-A0-OTPXX
D1946A0-110-00
SW_CHGA
2
USB/BAT
2
PIME061E-SM
DCR=54MOHM MAX
BUCK2_LXM
U8100
LDO
PPVCC_MAIN
CRITICAL
C8107
2.2UH-20%-1.85A-80MOHM
OMIT
L8112
35 34 32
CRITICAL
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8167
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8153
2.2UF
10%
6.3V
X5R 2
402
CRITICAL
C8152
4.7UF
20%
6.3V
X5R-CERM1 2
402
Apple Inc.
CRITICAL
C8151
1UF
10%
6.3V
CERM 2
402
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
81 OF 106
SHEET
34 OF 42
R8203
OMIT
IN
IN
(DOCK CONN)
(BETWEEN WLED AND CHARGER)
(H4P)
(PANEL)
16
1
1
C8215
R8222
0201
10KOHM-1%
R8218
0201
10KOHM-1%
100PF
C8221
5%
6.3V
CERM 2
01005
CRITICAL
10KOHM-1%
CRITICAL
1
2
100PF
NOTE: TDEV4 NTC ON PANEL
C8220
C8223
100PF
5%
6.3V 2
CERM
01005 16
XW8201
BOARD_TEMP2_N
XW8200
BOARD_TEMP1_N
3.92K
0.1%
402
1/16W
MF
PLACE CLOSE TO PMU
PLACE CLOSE TO PMU
PLACE CLOSE TO PMU
SM
IN
39 19 10 5
BI
39 5
IN
DWI NAMING RELATIVE TO AP
NOSTUFF
L8225
=PPVCC_MAIN_LED
D8228
1
DCR=106MOHM MAX
OUT
LED_IO_1
OUT
LED_IO_2
20%
25V
X5R-CERM
0805
16
C8234
1UF
C8235
1UF
10%
25V
2 X5R
402
10%
25V
2 X5R
402
OUT
C8232
LED_IO_3
1%
1/20W
MF
201
16
OUT
1.00
OUT
LED_IO_4
1.00
1%
1/20W
MF
201
1%
1/20W
MF
201
LED_IO_6
1.00
1%
1/20W
MF
201
WLED1
WLED2
WLED3
WLED4
WLED5
WLED6
C8201
1UF
10%
25V
X5R 2
402
1.00
1%
1/20W
MF
201
0.1UF
AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_AY
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_BY
E24
E25
G21
D25
G20
H21
H20
J20
J21
K19
NC_PMU_AMUX_A0
NC_PMU_AMUX_A1
NC_PMU_AMUX_A2
NC_PMU_AMUX_A3
NC_PMU_AMUX_AY
NC_PMU_AMUX_B0
NC_PMU_AMUX_B1
NC_PMU_AMUX_B2
NC_PMU_AMUX_B3
NC_PMU_AMUX_BY
LCM2_EN C25
VLCM2 N11
VLCM1 P12
VLCM3 L10
U8100
ALISON-A0-OTPXX
D1946A0-110-00
C8210
0.22UF
20%
2 6.3V
X5R
0201
PLACEMENT NOTE: PLACE NEAR PIN H22

B2
B4
PMU_ADC_REF
CLK_32K_PMU
CLK_32K_WLAN
RST_BT_L
RST_WLAN_L
RST_BB_PMU_L
BATTERY_SWI
PM_BT_HOST_WAKE
PM_WLAN_HOST_WAKE
PM_BB_HOST_WAKE
AUD_MIK_HS1_INT_L
DOCK_BB_EN
CLK_32K_GPS
NC_PMU_GPIO13
RST_L63_L
IRQ_HALL
NC_PMU_GPIO16
NC_PMU_GPIO17
NC_PMU_GPIO18
VBOOST_LCM N12
PPVCC_MAIN 32 34 35
PP6V0_LCM_HI
LCM_LX
PP6V0_LCM_VBOOST
NC_LCM2_EN
NC_VLCM2
NC_VLCM1
OUT
18 39
OUT
30 39
OUT
30
OUT
30
OUT
31
IN
5 33
IN
30
IN
30
IN
31
IN
19
OUT
11
OUT
31 39
OUT
19
IN
25
(1.8 PUSH-PULL)
(1.8_S2R PUSH-PULL)
(1.8_S2R;NO PD REQD PER BB TEAM) 2
(1.8_S2R;NO PD REQD PER BB TEAM)
(PU TO BATTERY IN BB)
(2.5V ALWAYS ON PU IN BMU)
(INTERNAL PD)
(INTERNAL PD)
(INTERNAL PD; CANT BE USED FOR 32K
(INTERNAL PU TO PP1V8_S2R)
(1.8_S2R;EXT PD BY BB MUXES)
(1.8 PUSH-PULL)
UFBGA
(SYM 3 OF 3)
VSS_BUCK02
2.2UF
20%
10V
X5R-CERM 2
402
C2
28
C8214
1000PF
10%
6.3V
X5R
01005
D4
VSS_BUCK2
D5
D6
VSS_BUCK04
VSS_BUCK34
E4
E5
VSS_BUCK5
E6
E7
VSSA_BUCK0
VSSA_BUCK2
VSSA_BUCK3
VSSA_BUCK4
VSSA_BUCK5
PVSS_CHG_A
PVSS_CHG_B
E8
E9
CLK OUTPUT)
E10
E11
E12
E13
E14
E15
(EXTERNAL PU)
A8
B9
VSS_WLED
VSS_LCM
A5
B5
A12
B12
A15
B15
D1
D2
D10
D8
B16
B14
C1
E22
J22
N14
P14
N16
E16
E17
E18
E19
F4
F5
(WHAT SIGNALS DO YOU WANT MEASURED?)
F6
F7
F8
F9
F10
CRITICAL
(NOTE: 2MHZ)
L8229
F11 VSS
F12
F13
2.2UH-1.05A-0.195OHM
1
MAKE_BASE=TRUE
VLS201612E-SM
VOLTAGE=5V
CRITICAL
2
DIDT=TRUE
D8230
F14
F15
PMEG2005AEL
1
F16
SOD882
(INTERNAL PULLDOWN; TE ENABLE)
C8237
F17
F18
MAKE_BASE=TRUE
VOLTAGE=6V
BB_VBUS_DET OUT
C8236
1UF
10%
2 6.3V
CERM
402
VDD_LCM N21
VDD_LCM_SW P21
LCM_LX P16
C8209
PMU_VDD_RTC
D11
D12
D13
D18
D19
D20
D15
D17
E20
D21
B22
B23
L18
L19
L20
K20
K21
L21
I2C ADDRESS: 0111100X (0X78)
F19
31
G7
C8238
G8
G9
1UF
10UF
20%
10V
2 X5R
603
VSS
G5
G6
10%
6.3V
2 CERM
402
G10
G11
G12
G13
G14
G15
tt
OUT
VOUT_LED
PLACEMENT_NOTE=PLACE NEAR U8100.N23
R8239
R8240
16
WLED_LX
C8212
10%
6.3V
2 X5R
201
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
LED_IO_5
R8232
R8235
16
1UF
10%
25V
2 X5R
402
1.00
1%
1/20W
MF
201
PPLED_OUT
1.00
R8231
N15
P15
N23
L11
L12
N13
P13
L13
L14
LED_IO1_R
LED_IO2_R
LED_IO3_R
LED_IO4_R
LED_IO5_R
LED_IO6_R
R8227
CRITICAL
(INTERNAL PULL-DOWN) F21 DWI_CK

(INTERNAL PULL-DOWN) D22 DWI_DI
E21 DWI_DO
DWI_AP_CLK
DWI_AP_DO
DWI_AP_DI
16
22UF
A25 SCL
A24 SDA
I2C0_SCL_1V8
I2C0_SDA_1V8
DIDT=TRUE
SOD-323
16
C8233
IN
OUT
C24 KEEPACT
B1 SHDN
(INTERNAL PULL-DOWN) F20 RESET_IN

D24 RESET*
(PULLUP INSIDE H4P) B25 IRQ*
RST_PMU_IN
RST_AP_L
IRQ_PMU_L
WLED_LX
20%
10V
X5R 2
603
39 5
39 5
TDEV1
TDEV2
TDEV3
TDEV4
TBAT
TCAL
PMEG4010BEA
10UF
32
(INTERNAL PULL-DOWN)
p:
/
PM_KEEPACT
PMU_SHDWN
2
PIME051E-SM
C8226
CRITICAL
4.7UH-3.2A
32
OUT
39 19 10 5
PLACE CLOSE TO PMU
CRITICAL
NOSTUFF
2
SM
SM
IN
OUT
NOSTUFF
IN
RESISTOR FOR TEMP CALIBRATION
NOSTUFF
IN
31 28 4
2
SM
5
37
PLACE CLOSE TO PMU
XW8203
BOARD_TEMP4_N
XW8202
BOARD_TEMP3_N
5%
6.3V
CERM 2
01005
5%
6.3V
CERM 2
01005
R8219
100PF
100PF
IN
2CRITICAL
0201
C8217
5%
6.3V
CERM 2
01005
33
yc
R8216
M25
M24
L22
L24
N24
N25
/m
CRITICAL
BOARD_TEMP1
BOARD_TEMP2
BOARD_TEMP3
BOARD_TEMP4
BATTERY_NTC
PMU_TCAL
PMU_IREF
PMU_VREF
PMU_VDD_REF
/x
/
4
31
K24 ACC_ID
K22 BRICK_ID
K25 ADC_IN7
PORT_DOCK_ACCID
USB_BRICKID
ADC_IN7
N2
N1
H22
K4
P7
N8
su
IN
REFERENCES
28
DIGITAL INPUT
IN
GPIO
28
IREF
VREF
VDD_REF
VDD_REF_A
VDD_RTC
ADC_REF
ANALOG MUX
IN
FW_DET
BUTTON1
BUTTON2
BUTTON3
ACC_DET_A
ACC_DET_B
LCM/GRAPE
25 5
FW_ZENER_PWR
HOME_L
ONOFF_L
SRL_L
PORT_DOCK_ACC_DET_L
1%
1/20W
MF
2 201
PLACEMENT NOTE: PLACE NEAR PIN K4
ANALOG
INPUT
IN
(INTERNAL PULL-DOWN) F22

L15
L16
L17
A2
A1
PMU_ACC_DET_B
200K
OMIT
UFBGA
(SYM 1 OF 3)
1%
1/20W
MF
2 201
TEMPERATURE
IN
25 5
220K
WDOG
IN
29 5
R8202
10%
6.3V
X5R
01005
om
p.
28 13
ALISON-A0-OTPXX
D1946A0-110-00
0.01UF
2
RESET
C8207
0.01UF
10%
2 6.3V
X5R
01005
10%
6.3V
2 X5R
201
U8100
32 34 35
I2C & DWI
LED
BACKLIGHT
C8206
0.1UF
VIB
PPVCC_MAIN
C8204
G16
G17
G18
G19
H4
H5
H6
H7
H8
H9
H10
H11
H12
N3
L8
L6
K18
K16
K14
K12
K10
K8
K6
J19
J17
J15
J13
J11
J9
J7
J5
H19
H13
H14
H15
H16
H17
H18
J4
J6
J8
J10
J12
J14
J16
J18
K5
K7
K9
K11
K13
K15
K17
L5
L7
L9
SYNC_MASTER=YOSH
SYNC_DATE=N/A
PAGE TITLE
POWER: PMU
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
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BRANCH
PAGE
82 OF 106
SHEET
35 OF 42
su
/x
/
om
p.
K48
POWER BUDGET
CRITICAL
PEAK=0.12A
AVG=0.12A
Q8350
CSD68803W15
=PP3V3_MLC_HI
BGA
32
PP3V3_MLC_OUT
A3
B3
C2
C3
R8353
10K
C8352
4.7UF
C8353
1000PF
10%
6.3V
2 X5R-CERM
603
10%
16V
2 X7R
201
39K
1%
1/20W
MF
2 201
R8352
47K
R8354
0
/m
PM_P3V3MLC_EN
A1
R8351
1%
1/20W
MF
2 201
yc
A2
B1
B2
C1
NOSTUFF
32
C8351
0.015UF
1
R8354_SS
D 3
1%
1/20W
MF
201
5% PM_P3V3MLCWR_SS
10%
1/20W
6.3V
MF
X5R
201
0201
CSD68803
Q8351
SSM3K15FV
p:
/
SOD-VESM-HF
1
IN
S 2
PM_MLC_PWR_EN
1
R8350
MOSFET
CSD68803W15
CHANNEL
P-TYPE
RDS(ON)
52MOHM @-1.8V
IMAX
4 A
VGS MAX
+/- 6V
100K
tt
1%
1/20W
MF
2 201
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
376S0972
376S0612
BOM OPTION
REF DES
COMMENTS:
Q8351
RADAR:8537160
TABLE_ALT_ITEM
SYNC_MASTER=YOSH
SYNC_DATE=N/A
PAGE TITLE
POWER: 3.3V MLC & 1.2V VR

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
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PAGE
83 OF 106
SHEET
36 OF 42
DEBUG RESET ACCESS

D
PLACE OUTSIDE OF CAN?

34 32
PPBATT_VCC
/x
/
NOSTUFF
1
R9002
1.5K
1%
1/20W
MF
2 201
FORCE_DFU
5
OUT
PMU_SHDWN
35
PWR_ON_LED
NOSTUFF
R9000
300
RED-50MCD-20MA
0603
K
NOSTUFF
1
R9001
300
5%
1/20W
MF
2 201
/m
yc
om
p.
NOSTUFF
LED9000
5%
1/20W
MF
2 201
su
OUT
LEFT AND RIGHT MOUNTING TABS

MT1
BRKT-MTG-TAB-MLB-K93K94
SM
tt
p:
/
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
DEBUG AND MISC

DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
90 OF 106
SHEET
37 OF 42
su
/x
/
PLATED THROUGH HOLES
om
p.
DRILL SIZE: 1.1MM X 0.4MM

PLATING SIZE: 1.4MM X 0.7MM
SL9300
TH-NSP
1
yc
SL-1.1X0.4-1.4X0.7
SL9302
TH-NSP
1
/m
SL-1.1X0.4-1.4X0.7
p:
/
SL9303
TH-NSP
1
SL-1.1X0.4-1.4X0.7
SL9304
TH-NSP
1
SL-1.1X0.4-1.4X0.7
SL9305
TH-NSP
1
tt
SL-1.1X0.4-1.4X0.7
SL9306
TH-NSP
1
SL-1.1X0.4-1.4X0.7
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
FCT/ICT TEST/BRACKETS
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
93 OF 106
SHEET
38 OF 42
Clock Signal Constraints

TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
CLK_50S
50_OHM_SE
USB
TABLE_PHYSICAL_ASSIGNMENT_ITEM
JTAG
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
USB_90D
90_OHM_DIFF
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
JTAG
2:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
CLK
5:1_SPACING
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
USB
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
SPACING
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
I63
I162
I81
I88
I89
I95
I96
I94
CLK_32K_PMU
CLK_32K_WLAN
CLK_32K_GPS
CLK_CAM_FF
CLK_CAM_FF_FILT
CLK_CAM_FF_CONN
CLK_CAM_RF
CLK_CAM_RF_FILT
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
PHYSICAL
SPACING
NET_TYPE
18 35
JTAG
JTAG
JTAG
JTAG
JTAG
I16
30 35
I15
31 35
I14
7 26
I13
I20
JTAG_AP_TCK
JTAG_AP_TMS
JTAG_AP_TDI
JTAG_AP_TDO
JTAG_AP_TRST_L
4 28
PHYSICAL
4 28
I5
4 10
I6
4 10
I7
4 10
25 26
I8
I82
I131
I157
I158
I2S_AP_0_MCK
I2S_AP_0_MCK_R
CLK_CAM_FF_R
CLK_CAM_RF_R
CLK
CLK
CLK
CLK
I84
/x
/
CLK_50S
CLK_50S
CLK_50S
CLK_50S
5 19
7
7
I2C
NAND
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NAND_50S
50_OHM_SE
I2C_50S
50_OHM_SE
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
I2C
1.5:1_SPACING
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
NAND
2:1_SPACING
PHYSICAL
SPACING
NET_TYPE
PHYSICAL
SPACING
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I1
I2
I47
I46
I163
I164
I166
I165
I41
I42
I43
I44
I37
I49
I51
I52
I53
I54
I167
I168
I169
I170
I55
I56
I57
I58
I59
I4
6 12
I61
6 12
I62
6 12
I98
6 12
I99
6 12
I100
6 12
I101
6 12
I102
6 12
I103
6 12
6 12
6 12
I2C_50S
I2C_50S
I124
6 12
I125
6 12
6 12
6 12
6 12
XTAL
6 12
6 12
NET_SPACING_TYPE1
6 12
I2C
I2C
NET_SPACING_TYPE2
AREA_TYPE
6 12
I106
I108
I107
I109
I110
I111
I113
I112
I114
I115
I116
I117
I118
I119
I120
I121
I122
I123
F2AD<7..0>
F2CE0_L
F2CE1_L
F2CE2_L
F2CE3_L
F2CLE
F2ALE
F2RE_L
F2WE_L
F2WP_L
F3AD<7..0>
F3CE0_L
F3CE1_L
F3CE2_L
F3CE3_L
F3CLE
F3ALE
F3RE_L
F3WE_L
F3WP_L
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_BB_D_P
USB_BB_D_N
USB_FS_D_P
USB_FS_D_N
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_FS_N_ACC_TX
USB_FS_P_ACC_RX
ACC_PT_DK_CON_TX
ACC_PT_DK_CON_RX
4 28
4 28
28 29
28 29
CRYSTAL
6 12
6 12
I129
I171
I172
4 11
11 28
11 28
28 29
28 29
I2S
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
I2S_90S
45_OHM_SE
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
I2S
3:1_SPACING
I2S
I2S
2:1_SPACING
5 10 19 35
5 25 26
5 25 26
7 25
7 25
7 26
NET_TYPE
PHYSICAL
SPACING
7 26
25 26
I140
25 26
I143
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I142
I141
25 26
I159
25 26
I144
I148
I147
I146
I160
I145
I149
I150
SPACING_RULE_SET
I85
I128
11 31
11 31
4 11
5 10 19 35
I151
5:1_SPACING
I161
I2S_AP_0_BCLK
I2S_AP_0_LRCK
I2S_AP_0_DIN
I2S_AP_0_DOUT
L63_ASP_SDOUT
I2S_AP_2_BCLK
I2S_AP_2_LRCK
I2S_AP_2_DIN
I2S_AP_2_DOUT
L63_VSP_SDOUT
I2S_AP_3_BCLK
I2S_AP_3_LRCK
I2S_AP_3_DIN
I2S_AP_3_DOUT
L63_XSP_SDOUT
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
5 19
5 19
5 19
5 19
19
5 19 30
5 19 30
5 19 30
5 19 30
19
5 19
5 19
5 19
5 19
19
NET_TYPE
6 12
6 12
6 12
I92
I90
PHYSICAL
SPACING
XTAL_24M_I
XTAL_24M_O
24M_O
CRYSTAL
CRYSTAL
CRYSTAL
DWI
4
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
DWI
2:1_SPACING
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
I104
USB_D_P
USB_D_N
USB_PT_DK_CON_D_P
USB_PT_DK_CON_D_N
5 25
I93
I105
USB
USB
USB
USB
5 25
ISP_CAM_1_SCL
ISP_CAM_1_SDA
/m
I48
I3
6 12
p:
/
I45
F0AD<7..0>
F0CE0_L
F0CE1_L
F0CE2_L
F0CE3_L
F0CE4_L
F0CE5_L
F0CE6_L
F0CE7_L
F0CLE
F0ALE
F0RE_L
F0WE_L
F0WP_L
F1AD<7..0>
F1CE0_L
F1CE1_L
F1CE2_L
F1CE3_L
F1CE4_L
F1CE5_L
F1CE6_L
F1CE7_L
F1CLE
F1ALE
F1RE_L
F1WE_L
F1WP_L
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
tt
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
I50
I2C1_SDA_1V8
I2C1_SCL_1V8
I2C0_SDA_1V8
I2C0_SCL_1V8
I2C2_SDA_3V0
I2C2_SCL_3V0
ISP_AP_0_SCL
ISP_AP_0_SDA
ISP_AP_1_SCL
ISP_AP_1_SDA
I2C2_SCL_3V0_ALS
I2C2_SDA_3V0_ALS
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
yc
om
p.
NET_TYPE
su
SPACING
USB_90D
USB_90D
USB_90D
USB_90D
7 27
25 27
I83
I130
5:1_SPACING
NET_TYPE
PHYSICAL
NET_TYPE
VREF
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
VREF
5:1_SPACING
I153
I156
SPACING
DWI_AP_CLK
DWI_AP_DI
DWI_AP_DO
DWI
DWI
DWI
I152
NET_SPACING_TYPE1
PHYSICAL
5 35
5 35
5 35
NET_TYPE
I136
I137
I139
I138
PHYSICAL
SPACING
VREF
VREF
VREF
VREF
PPVREF_DDR0_CA
PPVREF_DDR0_DQ
PPVREF_DDR1_CA
PPVREF_DDR1_DQ
8
8
8
8
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
100 OF 106
SHEET
39 OF 42
AUDIO/SPEAKER
ANALOG VIDEO CONSTRAINTS
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR PRIMARY GAP
DIFFPAIR NECK GAP
VID_50S
=50_OHM_SE
=50_OHM_SE
=50_OHM_SE
=STANDARD
=STANDARD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
AUDIO
1:1_DIFFPAIR
SPEAKER
SPEAKER
TABLE_PHYSICAL_RULE_ITEM
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
ANALOG_VIDEO
5:1_SPACING
ANALOG_VIDEO
ANALOG_VIDEO
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
AUDIO
3:1_SPACING
LVDS
3:1_SPACING
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
LVDS_100D
90_OHM_DIFF
D
PHYSICAL
SPACING
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
4:1_SPACING
I287
I215
I232
I231
I233
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
DAC_AP_OUT1
DAC_AP_OUT2
DAC_AP_OUT3
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
BUF_C_Y
BUF_CVBS_PB
BUF_Y_PR
LVDS
7 11
I220
I221
I222
I224
I223
I288
I289
7 11
I290
NET_TYPE
7 11
I359
SPACING
PHYSICAL
11
I291
11
LVDS_100D
LVDS_100D
LVDS_100D
LVDS_100D
I175
11
I174
I219
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
VIDEO_EMI_CVBS_PB 10
VIDEO_EMI_C_Y 10 11 28
VIDEO_EMI_Y_PR 10 11 28
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
VIDEO_PT_DK_CON_CVBS_PB
VIDEO_PT_DK_CON_C_Y 28 29
VIDEO_PT_DK_CON_Y_PR 28 29
11 28
I245
I244
LVDS_DATA_P<2..0> 14 16
LVDS_DATA_N<2..0> 14 16
LVDS_DATA_CONN_P<2..0>
LVDS_DATA_CONN_N<2..0>
LVDS
LVDS
LVDS
LVDS
28 29
LVDS_100D
LVDS_100D
LVDS_100D
LVDS_100D
I176
I178
I234
PHYSICAL_RULE_SET
DP_100D
90_OHM_DIFF
MIPI_100D
90_OHM_DIFF
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
DP
5:1_SPACING
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
NET_TYPE
4:1_SPACING
PHYSICAL
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
DP_100D
I247
NET_TYPE
PHYSICAL
I249
SPACING
I248
I94
I95
I96
I271
I270
I97
I98
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
I311
I312
I315
I316
I341
I344
I343
I342
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
I345
I346
I347
I348
I353
I355
I354
I356
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
7 14
I250
7 14
I251
7 14
I252
7 14
I273
7 14
I274
7 14
I275
7 14
I276
7 14
MIPI0C_AP_DATA_P<0> 7
MIPI0C_AP_DATA_N<0> 7
MIPI0C_AP_CLK_P 7 27
MIPI0C_AP_CLK_N 7 27
MIPI0C_CAM_CLK_P 25 27
MIPI0C_CAM_CLK_N 25 27
MIPI1C_AP_DATA_P<0> 7
MIPI1C_AP_DATA_N<0> 7
MIPI1C_AP_CLK_P 7 26
MIPI1C_AP_CLK_N 7 26
MIPI1C_CAM_CLK_P 25 26
MIPI1C_CAM_CLK_N 25 26
I277
I272
I327
I329
27
I328
27
I331
I330
I332
25 27
25 27
26
26
25 26
25 26
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
LEFT_CH_OUT_P
LEFT_CH_OUT_REF
LEFT_CH_P
SSM2375_L_IN_P
SSM2375_L_IN_N
RIGHT_CH_OUT_P
RIGHT_CH_OUT_REF
RIGHT_CH_P
SSM2375_R_IN_P
SSM2375_R_IN_N
19 20
19 20
20
20
20
19 20
19 20
20
20
20
EXT_MIC_P
EXT_MIC_REF
19 23
19 23
C
SDIO
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
SDIO_50S
50_OHM_SE
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
SDIO
2:1_SPACING
SDIO_CLK
4:1_SPACING
NET_TYPE
I200
I280
I201
I202
29
PHYSICAL
SPACING
SDIO_50S
SDIO_50S
SDIO_CLK
SDIO_CLK
SDIO_WL_CLK
SDIO_WL_CLK_R
SDIO_50S
SDIO_50S
SDIO
SDIO
SDIO_WL_CMD
5 30
SDIO_WL_DATA<3..0> 5
5 30
30
29
29
29
SPI
p:
/
I93
MIPID_AP_DATA_P<0>
MIPID_AP_DATA_N<0>
MIPID_AP_DATA_P<1>
MIPID_AP_DATA_N<1>
MIPID_AP_DATA_P<2>
MIPID_AP_DATA_N<2>
MIPID_AP_DATA_P<3>
MIPID_AP_DATA_N<3>
MIPID_AP_CLK_P 7 14
MIPID_AP_CLK_N 7 14
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
SPI_50S
45_OHM_SE
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
SPI
2:1_SPACING
NET_TYPE
tt
I92
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
MIPI
DP_AP_TX_P<0> 7 10 13
DP_AP_TX_N<0> 7 10 13
DP_AP_TX_P<1> 7 10 13
DP_AP_TX_N<1> 7 10 13
DP_AP_AUX_P 7 13
DP_AP_AUX_N 7 13
DP_EMI_TX_P<0> 13 28
DP_EMI_TX_N<0> 13 28
DP_EMI_TX_P<1> 13 28
DP_EMI_TX_N<1> 13 28
DP_EMI_AUX_P 13 28
DP_EMI_AUX_N 13 28
DP_PT_DK_CON_TX_P<0> 28
DP_PT_DK_CON_TX_N<0> 28
DP_PT_DK_CON_TX_P<1> 28
DP_PT_DK_CON_TX_N<1> 28
DP_PT_DK_CON_AUX_P 28 29
DP_PT_DK_CON_AUX_N 28 29
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
I360
I363
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
MIPI_100D
I91
SPACING
yc
/m
MIPI
I357
16
om
p.
NET_SPACING_TYPE1
NET_SPACING_TYPE1
16
su
AREA_TYPE
PHYSICAL_RULE_SET
I294
I372
NET_PHYSICAL_TYPE
MIPI
AREA_TYPE
I293
LVDS_CLK_P
14 16
LVDS_CLK_N
14 16
LVDS_CLK_CONN_P 16
LVDS_CLK_CONN_N 16
LVDS
LVDS
LVDS
LVDS
DISPLAYPORT
NET_PHYSICAL_TYPE
I292
I371
I235
SPACING
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
/x
/
I214
PHYSICAL
NET_SPACING_TYPE1
I213
NET_TYPE
NET_TYPE
I361
I362
I364
I365
I366
I367
PHYSICAL
SPACING
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI_GRAPE_MISO
SPI_GRAPE_MOSI
SPI_GRAPE_SCLK
SPI_GRAPE_CS_L
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI_IPC_MISO
SPI_IPC_MOSI
SPI_IPC_SCLK
SPI_IPC_MRDY
5 17
5 17
5 17
5 17
5 31
5 31
5 31
5 31
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
101 OF 106
SHEET
40 OF 42
MLB CONSTRAINTS
TABLE_BOARD_INFO
BOARD LAYERS
BOARD AREAS
BOARD UNITS
(MIL or MM)
ALLEGRO
VERSION
TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,BOTTOM
NO_TYPE,BGA,BGA06-06
MM
15.2
PHYSICAL CONSTRAINTS
SPACING CONSTRAINTS
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP
DEFAULT
=45_OHM_SE
=45_OHM_SE
30 MM
0 MM
0 MM
STANDARD
=DEFAULT
=DEFAULT
12.7 MM
=DEFAULT
=DEFAULT
DEFAULT/BGA SPACING RULES
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
BGA
BGA_SPA
CLK
BGA
BGA_SPA
PWR
PWR_P1SPACING
GND
GND_P1SPACING
SWITCHNODE
SWITCHNODE
ANLG
3:1_SPACING
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
DEFAULT
0.08 MM
STANDARD
=DEFAULT
BGA_SPA
=DEFAULT
/x
/
REGULAR SPACING RULES

SINGLE-ENDED PHYSICAL RULES
45 OHMS
SPACING_RULE_SET
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
45_OHM_SE
ISL2,ISL3,ISL8,ISL9
0.055 MM
0.055 MM
ISL4,ISL5,ISL6,ISL7
0.060 MM
0.060 MM
0.060 MM
0.060 MM
0P08_SPACING
0.080 MM
50 OHMS
0.090 MM
0.120 MM
0.150 MM
PHYSICAL_RULE_SET
LAYER
50_OHM_SE
TOP,BOTTOM
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
0.085 MM
0.085 MM
3.0 MM
DIFFPAIR NECK GAP

50_OHM_SE
0.050 MM
0.050 MM
3.0 MM
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
50_OHM_SE_RF
TOP
0.240 MM
0.240 MM
3.0 MM
DIFFPAIR NECK GAP

50_OHM_SE
ISL4
0.060 MM
0.060 MM
3.0 MM
yc
50 OHMS - CLEAR ON TOP AND BOTTOM

PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP

ISL2,ISL9
0.090 MM
0.090 MM
3.0 MM
/m
50_OHM_SE
DIFFERENTIAL PAIR PHYSICAL RULES

100 OHMS
MM
~ 3 MIL
0.089
MM
~ 3.5 MIL
0.102
MM
~ 4 MIL
0.180 MM
4:1_SPACING
0.240 MM
5:1_SPACING
0.300 MM
0.114
MM
~ 4.5 MIL
0.125
MM
~ 5 MIL
0.140
MM
~ 5.5 MIL
0P5MM_SPACING
0.5 MM
0P64MM_SPACING
0.64 MM
*NOTE: ASSUMING 0.060MM DIELECTRIC THICKNESS
50 OHMS - CLEAR ON LAYER 2 AND 5

PHYSICAL_RULE_SET
0.075
3:1_SPACING
om
p.
ALLOW ROUTE
ON LAYER?
3.0 MM
NOTES:
2:1_SPACING
2.5:1_SPACING
1.5:1_SPACING
su
0.060 MM
3.0 MM
45_OHM_SE
WEIGHT
3.0 MM
45_OHM_SE
1:1_SPACING
DIFFPAIR NECK GAP
LAYER
POWER/GND SPACING RULES
0.15 MM
~ 6 MIL
0.18 MM
~ 7 MIL
0.2
~ 8 MIL
MM
0.25 MM
~ 10 MIL
0.3
MM
~ 12 MIL
0.33 MM
~ 13 MIL
0.4
MM
~ 16 MIL
1.0
MM
= 39.37 MIL
SPACING_RULE_SET
LAYER
WEIGHT
PWR_P1SPACING
0.1 MM
900
GND_P1SPACING
0.1 MM
950
SWITCHNODE
0.5 MM
1000
SWITCHNODE
TOP,BOTTOM
0.2 MM
1000
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
100_OHM_DIFF
TOP,BOTTOM
0.076 MM
0.076 MM
100_OHM_DIFF
0.057 MM
0.057 MM
=STANDARD
0.300 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP
90_OHM_DIFF
TOP,BOTTOM
0.095 MM
0.095 MM
0.200 MM
0.200 MM
90_OHM_DIFF
ISL2,ISL3,ISL8,ISL9
0.054 MM
0.054 MM
=STANDARD
0.200 MM
0.100 MM
90_OHM_DIFF
ISL4,ISL5,ISL6,ISL7
0.060 MM
0.060 MM
=STANDARD
0.200 MM
0.100 MM
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP
0.210 MM
p:
/
PHYSICAL_RULE_SET
0.210 MM
90 OHMS
0.300 MM
tt
AUDIO PHYSICAL RULES

PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP
1:1_DIFFPAIR
=STANDARD
=STANDARD
=STANDARD
0.08 MM
0.08 MM
SPEAKER
0.3 MM
0.19MM
10 MM
0.08 MM
0.08 MM
BGA AREA PHYSICAL RULES

NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
BGA
BGA_PHY
SYNC_MASTER=MIKE
LAYER
ALLOW ROUTE
ON LAYER?
MINIMUM LINE WIDTH
MINIMUM NECK WIDTH
MAXIMUM NECK LENGTH
DIFFPAIR NECK GAP
BGA_PHY
0.060 MM
0.060 MM
=STANDARD
0.076 MM
0.075 MM
SYNC_DATE=N/A
PAGE TITLE
PHYSICAL_RULE_SET
CONSTRAINTS: MLB RULES
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
102 OF 106
SHEET
41 OF 42
su
/x
/
/m
yc
om
p.
tt
p:
/
SYNC_MASTER=MIKE
SYNC_DATE=N/A
PAGE TITLE
CONSTRAINTS: RF RULES
DRAWING NUMBER
Apple Inc.
051-8962

SIZE
REVISION
A.0.0
BRANCH
PAGE
106 OF 106
SHEET
42 OF 42

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8

K94 CHOPIN MLB

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

LAST_MODIFIED=Mon Jan 10 13:11:06 2011

PDF CSA CONTENTS

BLOCK DIAGRAM: SYSTEM

AP: MISC & ALIASES

DEBUG AND MISC

CONSTRAINTS: MLB RULES

AP: VIDEO BUFFER,BB USB MUXES

POWER: BATTERY CONNECTOR

VIDEO: DISPLAY PORT

VIDEO: MLC ALIASES

VIDEO: LVDS CONNECTOR

AUDIO: L63 CODEC

AUDIO: SPEAKER AMP

AUDIO: HEADPHONE OUT

AUDIO: DETECT/MIC BIAS

AUDIO: HP/MIC FILTERS

CONNECTOR: CANADA FLEX CONN,SENSOR

CONNECTOR: CANADA FLEX FILTERS

CONNECTOR: SENSOR PANEL CONNECTORMARK

IO FLEX: DOCK COMPONENTS

IO FELX: B2B Connector

CONNECTOR: X23 WIFI/BT

CONNECTOR: X24 CELLULAR/GPS

NOTICE OF PROPRIETARY PROPERTY:

BLOCK DIAGRAM: SYSTEM

NAND FLASH NAND FLASH

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

ALL AVAIL BOM OPTIONS

SCH AND BOARD P/N

TOP BARCODE LABEL/EEE CODES

EEEE FOR 639-1180 (K93 16G)

EEEE FOR 639-1426 (K93 32G)

EEEE FOR 639-1428 (K93 64G)

EEEE FOR 639-1112 (K94 16G)

EEEE FOR 639-1181 (K94 32G)

EEEE FOR 639-1182 (K94 64G)

EEEE FOR 639-1430 (K95 16G)

EEEE FOR 639-1427 (K95 32G)

EEEE FOR 639-1429 (K95 64G)

BOTTOM LABEL TYPE 1

631- B/C LABEL

639- B/C LABEL

BOTTOM LABEL TYPE 2

631- MATRIX LABEL

NOTICE OF PROPRIETARY PROPERTY:

NEED TO ADD BOM TABLE FOR ALT P/N OF HYNIX (?)

NOTICE OF PROPRIETARY PROPERTY:

(SCREEN ROTATION LOCK)

CODEC VSP & BT

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

R0800 R0801 R0802 R0803

R0860 R0861 R0862 R0863

R0864 R0865 R0866 R0867

NOTICE OF PROPRIETARY PROPERTY:

R0810 R0811 R0812 R0813

R0831 R0834 R0825 R0827

R0832 R0836 R0833 R0828

THE INFORMATION CONTAINED HEREIN IS THE