Name: _____________________________

Student Number: _____________________

Page 1

ELEC ENG 2EI5

Microelectronic Devices and Circuits I
Winter 2013
Final Exam 4/22/13
INSTRUCTOR:

Yaser M. Haddara
Ext. 24968
Email: yaser@mcmaster.ca

EXAMINATION TIME
3 HOURS
CALCULATOR
Use of Casio FX-991 calculator only is allowed

THIS EXAMINATION PAPER INCLUDES 7 PAGES AND 8 QUESTIONS. YOU ARE

RESPONSIBLE FOR ENSURING THAT YOUR COPY OF THE PAPER IS
COMPLETE. BRING ANY DISCREPANCY TO THE ATTENTION OF YOUR
INVIGILATOR.
Questions 1-7 are REQUIRED. Question 8 is a bonus question.
Problems do NOT all have equal weight.
********* YOUR QUESTION SHEET WILL NOT BE MARKED. *********
********* Any work you want marked, including circuit drawings, *********
********* must be included in your answer booklet.
*********
SHOW ALL WORK. Correct answers without appropriate justification or reasoning
may receive NO CREDIT.

You may use the following formulas in your work:

1. Diode model:

v
vD nVT ln D 1
iD I S exp D 1
nVT
IS

VT = 25 mV at room temperature. Default value for n is n = 1.

Continued on Page 2

Name: _____________________________
Student Number: _____________________
2. n-MOSFET model:
Region of
Operation
i DS 0
Cutoff
Linear
Saturation
W
K n K n
L

Page 2

Assume

Check
vGS VTN

v2
i DS K n vGS VTN v DS DS
2

K
2
i DS n vGS VTN 1 v DS
2

vGS VTN

0 v DS vGS VTN
vGS VTN

v DS vGS VTN 0

W
e C ox

For DC analysis, unless explicitly specified otherwise, assume 0

3. p-MOSFET model:
Region of
Operation
i SD 0
Cutoff
Linear
Saturation
W
K p K p
L

Assume

Check
v SG VTP

v2
i SD K p v SG VTP v SD SD
2

K
2
iSD p vSG VTP 1 vSD
2

v SG VTP

0 v SD v SG VTP
v SG VTP

v SD v SG VTP 0

W
h C ox

For DC analysis, unless explicitly specified otherwise, assume 0

4. NPN BJT:
Region of
Operation
Cutoff

Assume
i B iC 0

Check
v BE V BEon
v BC V BCon

Saturation
Linear

v BE V BEon

i B , iC 0

v BC V BCon

iC i B

v BE V BEon

iB 0

iC i B

v BC V BCon

Unless otherwise stated, assume VBEon = 0.7V, VBCon = 0.5V, VA =

Continued on Page 3

Name: _____________________________
Student Number: _____________________
5. PNP BJT:
Region of
Operation
Cutoff

Page 3

Assume

Check
v EB V EBon

i B iC 0

vCB V CBon
Saturation
Linear

v EB V EBon

i B , iC 0

vCB V CBon

iC i B

v EB V EBon

iB 0

iC i B

vCB V CBon

Unless otherwise stated, assume VEBon = 0.7V, VCBon = 0.5V, VA =

6. MOSFET Small Signal Model Parameters:
2 I DS
gm
2 KI DS (1 VDS ) 2 KI DS
VGS VT

1
VDS
ro
I DS

Valid for vgs 0.2 VGS VT

here VT is the threshold voltage of the MOSFET
(For p-MOSFET replace IDS with ISD, VDS with VSD, VGS with VSG)
7. BJT Small Signal Model Parameters:
gm

IC
VT

re

gm

gm

ro

V A VCE
IC

(also recall

Valid for vbe 0.2VT

here, VT is the thermal voltage, 25 mV at room temperature
(For PNP replace VCE with VEC)
8. Reference CMOS Inverter Propagation Delay:
For the reference inverter with VDD = +5V, VTN = VTP = 1V, and load capacitance C,
we get:
W
2 /1
L n

W
5 /1
L p

Kn K p K

PHL PLH 0.322

C
K

Continued on Page 4

Name: _____________________________
Student Number: _____________________
9. MOSFET Single Stage Transistors
Common Source
Circuit

Av

vo
vin

Page 4

gm RL || ro

Common Gate

Common Drain

gm RL || ro
1 gm RS

gm R L
1
1 gm R L

Rin

Rout

ro

ro 1 gm RS

0.2V GS VT

0.2V GS VT 1 gm RS

0.2V GS VT 1 gm R L

Common Emitter

Common Base

Common Collector

gm R L
Rin

1
1 gm RL Rin RS

gm RL || ro
1 gm RS
1
gm

ro

ro 1 gm RS

0.2VT

0.2VT 1 gm RS

Allowed input signal range

gm

gm

10. BJT Single Stage Transistors

Circuit

Av

vo
vin

Rin
Rout
Allowed input signal range

gm RL || ro

r
RS r

r 1 gm RL

gm

RS
1

0.2VT 1 gm RL

Continued on Page 5

Name: _____________________________
Student Number: _____________________

Page 5

Question 1 (60 points)

Consider the circuit shown on the right.
(a) Determine the voltage across each diode and the
current through it. Note: you will need to copy the
circuit in your answer booklet and carefully label
voltages and currents to which you refer in your
analysis.
(40 points)
(b) If D2 is connected in the opposite direction, how
would the voltages or currents change?
(20 points)

Question 2 (60 points)

Consider the circuit shown on the right. Determine ID, VD.

Question 3 (60 points)

Consider the circuit shown on the left. 1 = 9.2 = 15.
I C 1 0 . Determine I C 1 and I C 2 .

Continued on Page 6

Name: _____________________________
Student Number: _____________________

Page 6

Question 4 (60 points)

Consider the circuit shown on the right. 1 2 99 .
I C 1 20A , I C 2 2mA , and VC 1 2V . RC 4 k and
RE 4.3k .
(a) Sketch the small signal equivalent circuit, clearly labeling
input and output voltages and any other quantities of
interest. I suggest you use the pi model for both transistors
but you are free to choose a different strategy.
(20 points)
(b) From your model in part (a) calculate

vbe 2
.
vbe 1

(20 points)
(c) Hence calculate the gain

vo
.
vin

(20 points)

Question 5 (60 points)

Consider the circuit shown on the
right. Determine the gain, Rin and
Rout of the amplifier.
K1 K 2 4mA/V 2 and
I D 1 I D 2 0.5mA .

Continued on Page 7

Name: _____________________________
Student Number: _____________________

Page 7

Question 6 (50 points)

The circuit shown on the right is an inverter. The
BJT has 50 .
(a) Determine VL and VH for this inverter.
(25 points)
(b) Determine the input voltage, VM, for which
VO 2.5V .
(15 points)
(c) Suggest two ways in which VM may be made closer to 2.5V.

(10 points)

Question 7 (50 points)

Consider the circuit shown on the right. The labels A-E represent
the inputs. The label Y represents the output.
(a) Determine the function Y represented by this circuit.
(10 points)
(b) Show the corresponding NMOS circuit. Be sure to indicate
where you connect this to ground and where you connect it to
the output.
(20 poitns)
(c) Determine the proper sizing for the FETs in the NMOS and
PMOS networks.
(20 points)
Remember to give justification for your answers. If you just put
down an answer you may receive zero even if it is correct.
Remember to include any work you want marked in the answer
booklet.
Question 8 (BONUS 40 points)
Consider again the circuit of Question 6. Assuming that an RC circuit reaches steady state after 5
time constants, and using the simple DC analysis assumptions that we usually make for BJT
circuits, estimate PLH and PHL . The output capacitor is 1 nF.
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