Reliability, Design Qualification,

and Prognostic Opportunity

of in Die eFuse

W.R. Tonti Ph.D./MBA

FIEEE
IEEE Director, Future Directions

Outline
Introduction
Drive to PHM
One Time Programmablen (OTP) eFuse
Design
Programming Conditions
Reliability
Applications

Introduction
Need for an electronic fuse
Laser (non-PHM) versus electronic (PHM)fuse
One Time Programmable (OTP) eFuse
PHM, but 1 way street by design
Leveraging a failure mode: Electromigration
Integration in a standard CMOS process flow.
Base level fuse design
A statement of reliability
Typical use of the efuse

Spectrum 2004
er, W. Tonti

Spectrum 2004
er, W. Tonti

roduction:

The need for an eFuse

Circuit elements at time zero are not perfect. Circuit spares are
esigned, tested and available for replacement. Fuses are needed
o enable the replacement.
Time zero PHM

Circuit trimming for process variances is needed to optimize

erformance. Fuses serve in this optimization.
Custom PHM

Electronic Chip ID (ECID) is very useful throughout a products life

ycle. Fuses are used to encode a chips DNA.
PHM identification.

Products require unique personalization for a given customer. For

xample the identical memory chip may be available in x8 or x16.
uses can be used to personalize and deliver the correct
ustomization.
Custom PHM

Non volatile data is an option whenever fuses are provided.

eFuse at 100,000 Feet

The eFuse advantage are:
Enabled at any level of assembly.
They function within the product.
Do not require an external programming
stimulus
Have autonomic capability
They can be used to make a reliable
product more reliable

eFuse versus Laser Fuse

eFuse scales with technology critical
dimension

(*)

se-box

Laser Fuse does dot scale

eFuse enables autonomic repair capability
PHM

Laser Fuse cannot be used to enable

autonomic repair.

Laser fuse-box

eFuse relies on front end process

technology, Laser fuse relies on back end
process technology
eFuse is designed to not impact the back
end wiring channels.

OTP eFuse

Programming Current is
Established by T0 Fuse
Resistance

Ipgm limited

Incomplete programming
resets T0 fuse resistance
Not possible to reprogram

Latch Trip Point

E Fuse RIntrinsic
Rintrinsic + Rsystem

esign for Electromigration

Investigate a fuse programming solution that we can electrically control
Control is governed by electromigtaion of a low resistance species

Design of a structure where

he flux of a migrating species

D (T )
F=N
Z * qE
kT

mic density
diffusion coefficient of the migrating species (Silicide)

ective charge

cal Electric Field

tromigration to initiate F 0

n be influenced by either changing the diffusion species gradient,

anging the thermal gradient the species sees,

D ,

electrically programmed eFuse one can easily control the thermal gradient
the design of the Cathode, Link, and Anode. Electrical optimization through the
f the programming delivery system, ie the programming transistor provides an
al control for establishing the thermal gradient. Using the thermal insulating
es of shallow trench isolation completes the loop for controlled electromigration.

This methodology leads to

physical eFuse scaling

Programmed eFuse in a standard

CMOS
flow
ogram Open
Controlled EM in fuse link

Silicide
Polysilicon
Cathode

Shallow Trench Isolation:

Dielectric

Anode

Si Substrate

Programmed eFuse: WSi2 0.2m technology

Reliability, and Desiqn Qualification of a Sub-Micron Tungsten Silicide eFuse

eFUSE Programming Control

Final R

Intact Fuse

Current

Actual post program resistance

distributions

Fail

Pass

Latch Trip Point

Actual statistics affected by long tails, and

Erratic programmed bits due to ruptures
and EM stringers

Fuse Applications

ECID: PHM identification

PHM Repairs: Wafer, Module, Field
e-Odometer: PHM Electronic oil
change
PHM Autonomic Core control

Data, Thermal

mpedance Control Using eFuses

USPA 6141245 10/31/2000

USPA 6,243,283 6/5/2001 IBM

Teaches: In system customization.

Trimming driver for exact
impedance matching.
PHM

hanging Machine function with eFuse

USPA 7,268,577 9/11/2007 IBM

Teaches: In system customization.

Tamper proof, ability to
lock out a hacker
PHM

V Memory Element

A 6,208549 3/27/2001 Xilinix

ches: Trusted Data

elements.
PHM

Rao, Voogel

Odometer Field Repair and replacement

USPA 7,287,177 10/23/2007 IBM

Teaches: Autonomic
Repair using standard
Product Rel model to
anticipate failure and
replacement.
PHM

Conclusions
eFuses are the electronic gateway to PHM
eFuse programming requires precise thermal control of
the migrating species flux
eFuse use and application is limitless
Design and programming conditions of the eFuse
ultimately determine long term reliability of the element
As the MOSFET evolves so will the eFuse
This element has enabled autonomic computing

Acknowledgements
Claude Bertin
Wayne Berry
J. Fifield
J. Higgins
R. Kothadaraman
P. Farrar
S. Iyer
C. Narayan
W. Guthrie
R. Mohler
N. Robson
P. Spinney
C. Tian

IBM (retired)
IBM (retired)
IBM
IBM (retired)
IBM
IBM
IBM
IBM
IBM
IBM
IBM
U. Maine Orono
IBM

This work was performed at the IBM Microelectronics,Division Semiconductor Research & Development Center
Hopewell Junction NY 12533, and in Essex Junction VT 05452

Backups

Programming Conditions and

Reliability

ramming Conditions Establish the Basis for

ability

Vdd

eFuse

Vgs

Programming
Transistor

Bookkeeping:
3 banks of fuses, 960 fuses/bank
- 128 Bits for ECID
- Fuse Read: latch trip point 5K

nm Programming Study:
oltage and Temperature Variation
Initial Fuse Resistance Summary
7000
6000
5000
Frequency

22 C
T=nom

4000
3000

85 C

T=high

2000
1000

nom

high

0
150 160

170 180 190

200 210 220

230 240 250

Resistance (ohms)

ment: Analyze eFuse variation over programming voltage and temperature window

D Programming: Control Cell, nominal conditions.

ts= cell 1, 16 bits=cell 3, 16 bits =cell 2, 16 bits = cell 4.
grouping is repeated twelve times for a total of 768 bits experimentally programmed.
: This leaves 64 additional bits that are NOT programmed.

260 270

Programming Summary

Cell
m)

3K
7K

Cell 1
(Vlow=T=nom)
Mean: 10.5K
Median: 6.9K
: 119
Min: 1.7K
Max: 1.4M

Cell 2
(V=high,T=nom)
Mean: 39K
Median: 26K
: 0.7K
Min: 1.8K
Max: 5M

Cell 3
(V=low,T=high)
Mean: 2.4K
Median: 2.35K
: 5
Min: 1.2K
Max: 9.4K

All eFuse bits shown are passing

Cell 4 (V,T=high)
Mean: 7.4K
Median: 7.2K
: 20
Min: 1.6K
Max: 23K

icide Migration Length vs Program Resistance

cide migrated length measured from the cathode-link interface

- Application: ballast resistor

Actual eFuse circuit

*
Current Controlled Latch

atch Precharge
trobe Iread via 74

solation Device

Cross Coupled latch

E-Fuse Decode
Igpm Regulation

Rasied to Pgm
ommon to a fuse bank)
Rfuse affects
programming
J.Fifield

Programming Transistor Control

The programming transistor

power and device control
governs the effectiveness of the
eFuse and its reliability

integrated fuses on polysilicon for low voltage 0.18m CMOS applications,

Effect of programming pulse time (Vgs)

Experiment: Vdd, Temp=nom. Programming pulse
varied

ramming
dition

lt

25S

High Z

1mS

Isolation Damage

2mS

4mS

Conductive Conductive

eliability of a fuse with correct programming

Conditions

Equivalent Product Lifetime

SRAM-a

Rationale

DRAM-b

130C/2.85V/192 hr, 100% duty

1.5E6 device hours

2.4E9 years

Electrical Duty-c

140C/2.85V/500 hr, 50% duty

2E6 device hours

3.1E9 years

Electrical Duty-c

-55/125C/500 cycles

43 years

43 years

Coffin-Manson model -d

sumes 500 ps fuse query per 1000 clock cycles at 4 ns cycle

sumes 400 ns fuse query at powerup, and 2 powerups per day
mperature and voltage acceleration not included
sumes minimum exponent of 5.5 for e.g. thin film cracking {1}, deltaT(field) =
e.g. Tj = 105C and Toff = 20C, and 2 on/off per day
EIA Bulletin SSB-1

Fuse Scaling: Additional data

1e+13
1e+12

Fuse W

CA

La, Lc

0.08

0.08

0.06

0.06

0.12

0.08

16

0.08

0.5

0.08

|Programed Resistance| @ +0.1V (ohms)

se L

1e+14

SHORT NECK

1e+11
1e+10
1e+9

Cathode/Anode
Thermal gradient

1e+8
1e+7
1e+6
1e+5
10000
1000
100

fuse_D

fuse_B

fuse_C

0.06

0.08

0.06

0.6

0.8

0.9

fuse_A

fuse_F

fuse_G

fuse_H

0.08

fuse_I

fuse_E
0.12

1.2

device
fuse length (um
fuse width (um)

e doping, link length reliability effects

20

10
7
5
3
2

1
0.7
0.5
0.3
0.2

0.1
0.07
0.05
0.03
0.02

0.01
0.007
0.005
0.003
0.002

0.9

N
HN halo
Nadder only
HN halo adder only

0.6

0.9

0.001
f

P ext/halo

P ext/halo

P
P

ost programming Resistance

variation in N doped fuse
al design constraint for latch trip point

0.6

0.9

N
HN halo
Nadder only
HN halo adder only

0.6

0.9

P
PP ext/halo
P ext/halo

Link length (m)

Link doping
Terminal doping

Ratio of stressed to initial programming resistance

- Higher variation in N doped fuse

Si2 eFuse program mechanism and Reliability

The Authors show a programmed eFuse Reliability does not degrade (A) represents Silicide
melt, (B) represents Co migration to the anode, and C represents Quenching of the the
programming, and an amorphous Si region formed in the fuse link. 488 hours of Runtime stress
shows 100nA of eFuse movement, which is in the noise of the ATE.

Melt-Segregate-Quench Programming of Electrical Fuse,

0.35m Polysilicon TiSi2 eFuse Reliability

Authors show HTOL results for eFuse that is programmed at nominal, low, and high
programming currents. Some drift is noticed at other than optimal programmed level,
indicating initial programming criterion is key for an optimized fuse geometry.

Lifetime Study for a Poly Fuse in a 0.35m Polycide CMOS Process,

5nm NiSi Polysilicon eFuse

Authors show 65nm fuses can be reliably programmed at -400C, 250C, and +1250C.
Reliability data is limited to a 1000hr 2500C bake.

NiSi Polysilicon Fuse Reliability in 65nm Logic CMOS Technology,

Effects of Metal tracks over eFuse

Minimum M1

Parallel Min. M2
M1

M2B

Comb structure M2
M1M2

TSTM2A

GND

al effects over fuse T0 (pre), T1 (post programming)

Metal 2 serpentine current

Metal 1 current

Minimal impact to all types of Metal tracks

over a fuse bay.