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Advances in Series-Compensated

Line Protection

Copyright SEL 2014

Series Capacitors
Improve power transfer
Improve system stability
Location of capacitor varies
Dedicated protection

Spark gap

Metal-oxide varistor (MOV)

Gap-Protected Bank
Series
Capacitor

Spark
Gap

Discharge
Reactor

Bypass
Switch

MOV-Protected Bank
Series
Capacitor

MOV
Discharge
Reactor

Triggered Air
Gap

Bypass
Switch

Line Protection Challenges


Voltage inversion
Current inversion

Reduced line impedance


Subharmonic-frequency resonance

Voltage Inversion Forward Fault


XS

mXL
XC

I
V

Fault

ES

ER

XC > mXL
XC < XS + mXL

Voltage Inversion Reverse Fault


mXL
S

I
Fault

XL + XR
XC

R
V

ES

ER
XC > mXL
XC < mXL + XL + XR

Voltage Inversion May Affect Faulted


Line and Adjacent Line Relays
Relay
S

Line 1

XC1

Fault 1

Line 2

XC2

Fault 2

Relay

Voltage Inversion Negative-Sequence


XS

XL

XC

XR

Phase-to-Ground
Fault

V2

V2
XC > X2S

V2F

Current Inversion
S
XS

XC

XL

XR

Fault

IS
IS
VS

IR

XC > XS

VR
IR

Impedance Measurement Mid-Line


A

ZL
2

ZL
2

XC

B
ZL
B

jXC

Impedance Measurement End-of-Line


A

B
A
XC

ZL
X

B
ZL

B
A
jXC

Subharmonic-Frequency Transient
X 4

1
0
2

2
R

Advancements and Solutions


Memory polarization
Directional element offset
Overreach supervision
Differential elements

Mho Characteristic
XI

mZ

V = m ZR I V

V
VP

RI

Memory-Polarized Mho Element


Trips for Close-In Forward Fault

ZR I VPMEM

VPMEM

= TRIP

V
= NO TRIP

I
V=0

With Memory

No Memory

Memory-Polarized Mho Element


Restrains for Close-In Reverse Fault

V VPMEM

VPMEM

= NO TRIP

I
ZR I

With Memory

V V
= TRIP
No Memory

Negative-Sequence Network for


Line-End Forward Fault

V2
Z2S

I2

Z2L

Relay

Z2R

Directional Element Characteristic


X2
Reverse
Faults

Z1L + Z2R
Z1L

Z2F

Z2R

Forward Faults

R2

Z2S

Out-of-Section Fault Beyond Capacitor

Z1L

Relay

10

XC

Voltage Ratio Check Secures Zone 1


S

R
XC

Z1L

Relay
Ratio

1
VMEAS

Threshold

VCALC

Alpha-Plane Representation of Load


and Fault Conditions
I
Im R
Internal Faults
IL
With Outfeed at R

1180

I
Re R
IL

Internal Faults
With Outfeed at L

Load and External


Fault Conditions

11

Internal
Faults

Alpha-Plane Differential Characteristic


Im IR
IL
87LANG
2
1
87LR

87LR
1 180
Restraint
Region

Re IR
IL

Trip
Region

87LANG
2

Alpha Plane Element Has


Superior Performance
Advantage in
I
Im R
Tolerance to
IL
Channel Asymmetry

1180

Advantage in
Tolerance to
Outfeed

I
Re R
IL

I
Im R
IL

1180

(b)

(a)

12

I
Re R
IL

Differential Element Response


to Internal Fault
Im

IR
IL

Re IR
IL

Advantages of Alpha Plane


Differential Elements
High sensitivity
High operation speed
Immune to voltage inversion
Tolerant of current inversion and
subharmonic-frequency transients

13

Relay Setting Guidelines for


Series-Compensated Line Applications

Factors Influencing Zone 1 Setting


Capacitor and line impedances
Series capacitor location
Capacitor protection type
Capacitor protection level

14

Zone 1 Setting
If spark gap fires for external faults: Set
Zone 1 to 80% of compensated line
impedance
If spark gap does not fire for external faults
or MOVs are used: Set Zone 1 to 50% of
compensated line impedance
Validate settings with transient simulation
studies or testing

Overreaching Zone Setting


Set overreaching elements beyond
value used for uncompensated lines
to accommodate the effect of
subharmonic-frequency transients
Validate settings with transient simulation
studies or testing

15

Infeed Effect Increases Apparent


Capacitive Reactance
S

R
XC

ZL

Relay
Infeed

Directional Element Offset


Mid-Line Capacitor
S

ZL
2

XC

ZL
2

Relay

Relay

Z 2F

Z1L XC
2

Z 2R Z 2F 0.1

16

Directional Element Offset


End-of-Line Capacitor, Bus-Side VT
S

XC

ZL

Relay

Relay

Z 2F

Z1L XC
2

Z 2R Z 2F 0.1

Directional Element Offset


End-of-Line Capacitor, Line-Side VT
S

XC

ZL

Relay

Relay

Z 2F

Z1L XC
XC
2

Z 2R Z 2F 0.1

17

Directional Element Offset


End-of-Line Capacitors, Bus-Side VTs
S

XCS

ZL

XCR

Relay

Relay

Z 2F

Z1L ( XCS XCR )


2

Z 2R Z 2F 0.1

Directional Element Offset


End-of-Line Capacitors, Line-Side VTs
S

XCS

ZL

Relay

XCR

Relay

Z1L ( XCS XCR )


X CS
2
Z ( XCR XCS )
Z 2F 1L
X CR
2
Z 2R Z 2F 0.1
Z 2F

18

Alpha Plane Differential


Element Setting
Set radius 87LR to accommodate
maximum expected outfeed current
Set 87LANG to less than 195 to
increase speed
Validate settings with transient simulation
studies or testing

Analysis of Field Events


Parallel 500 kV lines with 70%
compensation (voltage ratio logic
performance)
Internal fault on 500 kV line (effect of
subharmonic-frequency transient)
Internal fault on 345 kV line with bus
side VTs (voltage inversion)

19

Voltage Ratio

Voltage Ratio Check Close-In Fault

Zone 1 Trip
Threshold
6

9
10
Time (Cycles)

11

12

Voltage Ratio

Voltage Ratio Check Parallel Line

Zone 1 Trip
Threshold

9
10
Time (Cycles)

20

11

12

Zone 2 Internal Fault


Measured
Impedance

Recommended Zone 2 Setting

Measured Impedance
(Ohms)

Present Zone 2 Setting

Line Impedance

11
13
Time (Cycles)

15

Voltage Inversion Phase Voltage

Angle (Degrees)

160

120

80

40

0
3

5
Time (Cycles)

21

Voltage Inversion V1

Angle (Degrees)

60

40

20

4
5
Time (Cycles)

Conclusions
Memory polarization and directional element
offset address voltage inversion
Line differential elements are immune to
voltage inversion and tolerant of current
inversion and subharmonic-frequency
transients

22

Conclusions
Subharmonic-frequency transients can
cause overreach and underreach of
distance elements
Transient simulation and testing is
strongly recommended

23

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