I

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fion No F(Presllzaet-UGSvll,

Syllabu for B.Scl't yr

Subjet: Electronic
Effect ve from A,cademic Sr ssion-2012

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Subject
Code
PaperA

PoperB
Lob 1$

It:

Lab 2^d

Subject rlome
Electron: Device
& Circuit-I
DigitolE rctronic
& LoqicI zsign
Electroni: Device
d Circuitr
Lqborotov-r
DigitolEl rtroni
& LogicD zsign
LoborqtoY

Theott
Mox

35
35

Theory I ternol fnternol Externol Externol

lrlin
il tx
irtin
i{ox
itlin
13
13

20

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20

20

Annexure-t to Notifico'l on No r(Pres/R :net-U6Svll,

t-

B Sc. 1t" 'ear-Electrr,nics

ffectir efrom rrcademicsesion-2O12

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Paper A: Electror ic Der icesant Circuits-I

Unit-I: Network Anal Eir
Voltageandcunentsoures, Netvl rrk Laws: LCL-KVL-Curre
rt and voltagedivision theorems-Node
and Mesh analysis-Appcations t T a n d I networks-Thev
,nin's and Norton's Theorems-Souree
transformation-Superpos ion Theo Em.Time nd Frequency
d rmainAnalysis:RC, RL, LC and LCR
circuits.

Unit-II: Semiconductrr Mlfcr els nnd fl lvices

Energybands:Metals-smicondu,
lors and i rsulators,
direct and indirectsemiconductors,
Charge
carriersin semiconducto
;: ElectrcrsandHol ,s,Intrinsicand lxtrinsicSemiconductors,
n & p- type
Semiconductors,
Carrier
on: Fermilevel,EHPs-ten
leraturedependence,
conductivityand
mobility-driftand resistarce-effecrof temperture and dopingon mobility.
Qualitativetreatmentof
PN junction: Barrier he fit, Depl tion regior andjunction <apacitance,Forward and reversebias
characteristics,
Cut-in ar I breakdwn volta6:s, Applications
of diodc as rectifier(half and l.uil),
ClipperandClarnper,
Spr rial purp<rediodes:ienerdiode,Photldiode,LED andTunnelDiode.
Unit-III: RJT and bia ino Tonl nioues
NPN and PNPtransistorrction,h- rarameter
r rodelanalysis:
e <pression
of voltageand currentgaininputand outputimpedace, Tranl stor confi1urations:CE-CI and CC, a and p of a transistorand
their determinationfrom haracteritics.Need rf Biasing,Biasltg Techniques:basefeedbackresistor,
emitterresistor& voltag, divider, riasstabilir, load line and rperatingpoint,Active-saturation
and
cutoff,Transistoras an A rplifierar J Switch.
Unit- IV: Special Sem rnndrraf r Dcwioor
Field effecttransistors
(. rET and vrosFET)operation-pinchoff and saturation-pinch
otf voltagegatecontrol-volt-ampere
characterstics,n-ch nnel and p-chanrel FETs,Enhancement
and depletion
types.FET biasingand :s applic lion as an amplifier. Volt- rmperecharacteristics:
SCR, TRIAC,
DIAC,UJTIntroduction
I ,lC techrrlory.

Text Books:
l. Integrated
CircuitsB J. Millnr,ll,
2. Microelectronicscirc
ritsby Se ra & smitl
3. Physics
andTechnol,gy of Ser iconductorDevices
A. S.G ove, JohnWiley and Sons,
4. SolidStateElectroni,Devicesien G: Stre)tman,Prentice
I allof lndiaLtd, N. Delhi,
5. Physics
of semicondr
:tor Devi e sB y R . l Neeman

2
B.
Effectiv

r-Electrortics
emic sesSion-2012

ls

icD
Reviewof numbersystems,
radix
2's complements,
binarycofles,theo

(9'spnd l0's),subtraction
usingI's and
of Boo

n algebra,'canqnical
forms,logic gates.

Unit'II: Combinational Logic .

llepresentationof logic f unctio
irlplementation
of combin4tional
encoders
anddecoders,
codecon

sirnplifi tion Lrsing Kprnauglr lnap, tabulation rnethod,

c u s i n g ndardlogic gatgs,multiplexers
and de-multiplexers,
adders,
tors,parity checkerand magnitudecomparator

Flip flops - SR, JK, D afrd T fli

flops,I

counters,asynclrronousand synch
diagram,shift registers,
typg of regi

circuit

Memoryorganization,
claspification
R/W memories,
PLA. DigitAllogic
i l i e s i;n
ITL, ECL, and MOS logic families: MOS,
opencollectoroutputs,TTL subfamili

comparl

I triggeringang edgetriggering,excitationtables,
modulo counterls,designwith state equationstate
S

of menfories,
sequential
memories,
ROMs,
uctionto bipolprlogicfamilies:RTL,DCTL,DTL,
CMOS,det4ilsof TTL logicfamily,totempole,
of differentlqgic families,

Text books:
l. Floyd,"DigitalFunflamental, Pearson
2. MorriesM Mano,"pigital
Pub.
3. R P Jain"ModernDisital
tronics",
T ta McGrall-Hill

t--

B.ScI

lcs

Lab lst
Laboratory -lI
Verifovoltagediv
2 . Verification
J.
Verificationof
4.
Studyof Series
5.
Studyof Parallel
6 . ' Studyof T andzr
7.
Determination
of
Determination
8.
of
9.
Studythe I-V c
WaveRectifier,C
1 0 . StudyofZener di
I l . Study the I-V c
12. Studyfrequency
1 3 . Verifr the re
l.

t divisionKVL, KCL
Norton's
Theorem.

\
given signal ing LCR circuit.
ofLC network.

ofPNj

ion diode(A

icationsas Half W

Rectifier.Full

ftunnel d

ifier.

F =t - qq,
15.

StudytheI-V

B.Sc t'vear Elec ronrcs

Lab 2nd
ital El

tron

and Logic DesignLaboratory

Desigrrandrealize ND,O
NOT
Designand realize iversal
S.
ImplementAND, OT and
g universal
lC's.
Verification of
organs
\
Designand realize
r and ubtractor singgates).
Desien and realize
subtract ing universal tes.
Designand realizeMultiple
Design and realizeDe-mu
exers.
Designand realize
Design and realize Decoders
Designand realizel-bit com
Study the n-bit comparator ing IC.
Designand realizeSR flip
usingN ND andNOR

DesignandrealizeJK flip
DesignandrealizeD flip
DesignandrealizeT flip
StudyJK andD Flip Flop
Note:- Thereshallbemi

usingN D andNOR
usingNA D andNOR
usingNA D andNOR
lC's.
projects,

out by a goup of students.

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