M54HC194

M74HC194
4 BIT PIPO SHIFT REGISTER

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.
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.
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.
.

HIGH SPEED
tPD = 12 ns (TYP.) AT VCC = 5 V
LOW POWER DISSIPATION
ICC = 4 A (MAX.) AT TA = 25 C
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
BALANCED PROPAGATION DELAYS
tPLH = tPHL
HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS194

DESCRIPTION
The M54/74HC194 is a high speed CMOS 4 BIT PIPO
2
SHIFT REGISTER fabricated in silicon gate C MOS
technology. It has the same high speed performance
of LSTTL combined with true CMOS low power consumption. This SHIFT REGISTER is designed to incorporate virtually all of the features a system designer
may want in a shift register. It features parallel inputs,
parallel outputs, right shift and left shift serial inputs,
clear line. The register has four distinct modes of operation : PARALLEL (broadside) LOAD ; SHIFT RIGHT
(in the direction QA QD); SHIFT LEFT ; INHIBIT
CLOCK (do nothing). Synchronous parallel loading is
accomplished by applying the four data bits and taking
both mode control inputs, S0 and S1 high. The data
are loaded into their respective flip-flops and appear
at the outputs after the positive transition of the
CLOCK input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with
the rising edge of the clock pulse when S0 is high and
S1 is low. Serial data for this mode is entered at the
SHIFT RIGHT data input. When S0 is low and S1 is
high,data shifts left synchronously and new data is entered at the SHIFT LEFT serial input. Clocking of the
flipflops is inhibited when both mode control inputs are
low. The mode control inputs should be changed only
when the CLOCK input is high. All inputs are equipped
with protection circuits against static discharge and
transient excess voltage.
October 1992

B1R
(Plastic Package)

F1R
(Ceramic Package)

M1R
(Micro Package)

C1R
(Chip Carrier)

ORDER CODES :
M54HC194F1R
M74HC194M1R
M74HC194B1R
M74HC194C1R

PIN CONNECTIONS (top view)

NC =
No Internal
Connection

1/12

M54/M74HC194
INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

IEC LOGIC SYMBOL

PIN No

SYMBOL

CLEAR

SR

Serial Data Input (Shift

Right)

3, 4, 5, 6
7

A to D
SL

Parallel Data Input

Serial Data Input (Shift
Left)
Mode Control Inputs

9, 10

S0, S1

11

CLOCK

15, 14, 13, 12

8

QA to QD
GND

16

VCC

NAME AND FUNCTION

Asynchronous Reset
Input (Active LOW)

Clock Input (LOW to

HIGH Edge-triggered)
Paralle Outputs
Ground (0V)
Positive Supply Voltage

TRUTH TABLE
INPUTS
CLEAR
L

MODE
S1
X

CLOCK

S0
X

OUTPUS

SERIAL
LEFT
X

PARALLEL

QA

QB

QC

QD

RIGHT
X

A
X

B
X

C
X

D
X

QA0

QB0

QC0

QD0

H
H

H
L

H
H

X
X

X
H

a
X

b
X

c
X

d
X

a
H

b
QAn

c
QBn

d
QCn

QAn

QBn

QCn

H
H

H
H

L
L

H
L

X
X

X
X

X
X

X
X

X
X

QBn
QBn

QCn
QCn

QDn
QDn

H
L

QA0

QB0

QC0

QD0

X: Dont Care
a ~d
QA0 ~ QD0
QAn ~ QDn

2/12

: Dont Care
: The level of steady state input voltage at input A ~ D respactively
: No change
: The level of QA, QB, QC, respectively, before the mst recent positive transition of the clock.

M54/M74HC194
LOGIC DIAGRAM

TIMING CHART

3/12

M54/M74HC194
ABSOLUTE MAXIMUM RATINGS
Symbol

Value

Unit

VCC
VI

Supply Voltage
DC Input Voltage

-0.5 to +7
-0.5 to VCC + 0.5

V
V

VO

DC Output Voltage

-0.5 to VCC + 0.5

IIK
IOK

DC Input Diode Current

DC Output Diode Current

20
20

mA
mA

IO

DC Output Source Sink Current Per Output Pin

25

mA

DC VCC or Ground Current

50

mA

500 (*)

mW

ICC or IGND

Parameter

PD

Power Dissipation

Tstg
TL

Storage Temperature
Lead Temperature (10 sec)

-65 to +150
300

o
o

C
C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC

RECOMMENDED OPERATING CONDITIONS

Symbol
VCC

Parameter
Supply Voltage

VI

Input Voltage

VO
Top

Output Voltage
Operating Temperature: M54HC Series
M74HC Series
Input Rise and Fall Time

tr, tf

4/12

VCC = 2 V

Value
2 to 6

Unit
V

0 to VCC

0 to VCC
-55 to +125
-40 to +85
0 to 1000

V
C
o
C
ns

VCC = 4.5 V

0 to 500

VCC = 6 V

0 to 400

M54/M74HC194
DC SPECIFICATIONS
Test Conditions
Symbol

VIH

V IL

Parameter

High Level Input

Voltage
Low Level Input
Voltage

Value

VCC
(V)

TA = 25 oC
54HC and 74HC
Min. Typ. Max.

2.0

1.5

1.5

1.5

4.5
6.0

3.15
4.2

3.15
4.2

3.15
4.2

High Level
Output Voltage

0.5

0.5

0.5

4.5

1.35

1.35

1.35

2.0
4.5
6.0
4.5

VOL

Low Level Output

Voltage

6.0
2.0
4.5
6.0
4.5
6.0

II
ICC

Input Leakage
Current
Quiescent Supply
Current

6.0
6.0

1.8

1.8

Unit

2.0
6.0

V OH

-40 to 85 oC -55 to 125 oC

74HC
54HC
Min. Max. Min. Max.

1.8

1.9

2.0

1.9

1.9

VI =
IO=-20 A
VIH
or
V IL IO=-4.0 mA

4.4
5.9

4.5
6.0

4.4
5.9

4.4
5.9

4.18

4.31

4.13

4.10

IO=-5.2 mA

5.68

5.8
0.0

5.63

5.60

VI =
IO= 20 A
VIH
or
V IL IO= 4.0 mA

0.1

0.1

0.1

0.0

0.1

0.1

0.1

0.0
0.17

0.1
0.26

0.1
0.33

0.1
0.40

IO= 5.2 mA

0.18

0.26

0.33

0.40

VI = VCC or GND

0.1

VI = VCC or GND

40

80

5/12

M54/M74HC194
AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)
Test Conditions
o

TA = 25 C
54HC and 74HC

Value
-40 to 85 oC -55 to 125 oC
74HC
54HC

Symbol

Parameter

VCC
(V)

tTLH
tTHL

Output Transition
Time

2.0
4.5

Typ.
30
8

Max.
75
15

tPLH
tPHL

Propagation
Delay Time
(CLOCK - Q)

6.0
2.0
4.5
6.0

7
48
15
13

13
115
23
20

16
145
29
25

20
175
35
30

ns

tPHL

Propagation
Delay Time
(CLEAR - Q)

2.0
4.5
6.0
2.0
4.5

52
17
15
13
50

125
25
21

155
31
26

190
38
32

ns

fMAX

Maximum Clock
Frequency

tW(H)
tW(L)

Minimum Pulse
Width
(CLOCK)

6.0
2.0
4.5
6.0

tW(L)

Minimum Pulse
Width
(CLEAR)
Minimum Set-up
Time
(SI, PI - CK)

ts

ts

th

tREM

Minimum Set-up
Time
(S0, S1 - CK)

Min.

6.2
31
37

Min.

Max.
95
19

5.0
25

Min.

Max.
115
23

4.2
21

30

Unit

ns

MHz

59
20
5
4

75
15
13

95
19
16

25
110
22
19

ns

2.0
4.5
6.0

24
6
5

75
15
13

95
19
16

110
22
19

ns

2.0
4.5

20
5

75
15

95
19

110
22

ns

6.0
2.0

4
28

13
75

16
95

20
110

4.5
6.0

7
6

15
13

19
16

23
20

Minimum Hold
Time

2.0
4.5
6.0

0
0
0

0
0
0

0
0
0

Minimum
Removal Time

2.0
4.5
6.0

5
5
5
10

5
5
5
10

5
5
5
10

CIN

Input Capacitance

CPD (*)

Power Dissipation
Capacitance

85

ns

ns

ns
pF
pF

(*) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC

6/12

M54/M74HC194
SWITCHING CHARACTERISTICS TEST WAVEFORM

TEST CIRCUIT ICC (Opr.)

7/12

M54/M74HC194

Plastic DIP16 (0.25) MECHANICAL DATA

mm

DIM.
MIN.
a1

0.51

0.77

TYP.

inch
MAX.

MIN.

TYP.

MAX.

0.020
1.65

0.030

0.065

0.5

0.020

b1

0.25

0.010

20

0.787

8.5

0.335

2.54

0.100

e3

17.78

0.700

7.1

0.280

5.1

0.201

L
Z

3.3

0.130
1.27

0.050

P001C

8/12

M54/M74HC194

Ceramic DIP16/1 MECHANICAL DATA

mm

DIM.
MIN.

TYP.

inch
MAX.

MIN.

TYP.

MAX.

20

0.787

0.276

D
E

3.3

0.130

0.38

e3

0.015
17.78

0.700

2.29

2.79

0.090

0.110

0.4

0.55

0.016

0.022

1.17

1.52

0.046

0.060

0.22

0.31

0.009

0.012

0.51

1.27

0.020

0.050

N
P
Q

10.3
7.8

8.05
5.08

0.406
0.307

0.317
0.200

P053D

9/12

M54/M74HC194

SO16 (Narrow) MECHANICAL DATA

mm

DIM.
MIN.

TYP.

A
a1

inch
MAX.

MIN.

TYP.

1.75
0.1

0.068

0.2

a2

MAX.

0.004

0.007

1.65

0.064

0.35

0.46

0.013

0.018

b1

0.19

0.25

0.007

0.010

0.5

0.019

c1

45 (typ.)

9.8

5.8

10

0.385

6.2

0.228

0.393
0.244

1.27

0.050

e3

8.89

0.350

3.8

4.0

0.149

0.157

4.6

5.3

0.181

0.208

0.5

1.27

0.019

0.050

M
S

0.62

0.024
8 (max.)

P013H

10/12

M54/M74HC194

PLCC20 MECHANICAL DATA

mm

DIM.
MIN.

TYP.

inch
MAX.

MIN.

TYP.

MAX.

9.78

10.03

0.385

0.395

8.89

9.04

0.350

0.356

4.2

4.57

0.165

0.180

d1

2.54

0.100

d2

0.56

0.022

7.37

8.38

0.290

0.330

1.27

0.050

e3

5.08

0.200

0.38

0.015

0.101

0.004

1.27

0.050

M1

1.14

0.045

P027A

11/12

M54/M74HC194

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A

12/12

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