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University of New Mexico

Department of Electrical and Computer Engineering

ECE 520 - VLSI Design (spring 2015)

Homework #4

Due in class: Monday Feb. 16, 2015


This homework requires Lab work. You will need to use T-SPICE, one of the
Tanner EDA tools. The SPICE model for ON Semi 0.5um CMOS process is provided
in the class website at www.ece.unm.edu/~payman/classes/ECE520/homeworks.html.
We will be using this model to: (1) extract NMOS basic parameters (characterization),
and (2) compare the SPICE results with hand calculations. The purpose of this
homework is to show how MOS transistors are characterized for hand calculations.
1.

Use SPICE simulation to find the parameters K n nCox , , and for ON Semi
0.5um NMOS transistor. To eliminate the short channel effects in your
measurements, choose channel length of L = 10um. Assume transistor aspect
ratio (W/L) = 5, supply voltage Vdd = 5 V, zero-biased threshold voltage
VTno = 0.63 V, and 2 f 0.83 V .

Hint: To measure K n n C ox , plot

I DS versus VGS when Gate terminal is connected

to Drain terminal (VDS=VGS) and measure the slope of the curve as explained in the
class. To measure , make the same plot for VBS = 0 V and VBS = -1 V and measure the
shift of the carves as explained in the class. To measure , plot ID versus VDS
when VGS = 3.0 V and measure the slope of the curve in saturation region. For long
channel device you will find 0 V 1 .
2.

Repeat step 1 for short channel device. Assume channel length of the NMOS
device is now L = 0.5um.

Hint: Use the hint given in step one. You will find that the plot of

I DS versus VGS

wont be a straight line in this case. Explain which part of this curve represents velocity
saturation. Measure the slope at the region that the transistor is not in velocity saturation
and compare your K n nCox with your measurement in step 1. Dont forget to measure
in this case.
3.

Use the simplified velocity saturation model and find VDSAT when L = 0.5 um.
Assume that n 449.41 cm 2 vs and saturation velocity of electron is
5
sat =1.972 x 10 m/s. Show the value of VGS=VDSat in your I DS versus VGS

plot in step 2.
4.

As we reduce the channel length from 10um to 0.5um, the short channel effect
starts to show. Use the simplified velocity saturation model and determine at which
channel length the velocity saturation starts to show. Assume VDSat = Vdd = 5 V.

5.

Using the measured parameters in step 1 and long-channel approximation MOS


model, compute ID for a NMOS with (W/L) = 5, L = 10 um, VDS = 5 V, and
VGS = 3.0 V. Verify your results with SPICE and determine %error.

6.

Using the measured parameters in step 1 and long-channel approximation MOS


model, compute ID for a NMOS with (W/L) = 5, L = 0.5 um, VDS = 5 V, and
VGS = 3.0 V. Verify your results with SPICE and determine %error.

7.

Using the measured parameters in step 1 and short-channel approximation MOS


model, compute ID for a NMOS with (W/L) = 5, L = 0.5 um, VDS = 5V, and
VGS = 3.0 V. Verify your results with SPICE and determine %error.