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IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 44, NO. 2, MAY 2002

designed to evaluate the effectiveness of various power island structures.

Initial measurements were conducted on a bare 2-layer board at frequencies where both islands were electrically small. This structure can
be readily modeled using a simple capacitor-divider circuit (Fig. 2).
The measured results indicated that significant isolation (relative to a
solid power bus) was achieved even with a relatively narrow gap (16
mils) between the planes. Wider gaps resulted in additional isolation,
although the importance of the gap width diminished when the gap
width was more than twice the plane separation. Connecting the power
islands with a narrow copper bridge nearly eliminated the isolation provided by the gap structure at most frequencies. The small amount of inductance due to the bridge was not enough to impede current flow significantly. However, connecting the power islands with a ferrite bead
(chosen to have a high impedance at the frequencies of interest) was
nearly as effective as the original gapped structure.
At frequencies where each power island was no longer electrically
small, additional factors come into play. The amount of coupling across
the gap is a function of the electric field strength at the gap and this is a
function of the source and load positions on the power islands. At frequencies where both power islands are resonant, the isolation provided
by the gapped structure may be minimal. For this reason power islands
should not have exactly the same size and shape.
Measurements of a production PC motherboard with a power island
also indicate that power islands can be used effectively to isolate power
bus noise in one area of the board from devices in another area. In the
boards evaluated, the amount of additional isolation (relative to a solid
plane) was generally several dB or more depending on the location of
the source and receiver.
REFERENCES
[1] Pentium III processor power distribution guidelines, Intel Corporation, Intel Application Note AP-907, order no. 245 085-001, Apr. 1999.
[2] Z. Soe, Layout guideline for the RC7100 motherboard system clock,
Fairchild Semiconductor Corporation, Fairchild Semiconductor Application Bulletin AB-19, stock no. AB00 000 019, 1998.
[3] T. H. Hubing, J. Chen, J. L. Drewniak, T. P. Van Doren, Y. Ren, J.
Fan, and R. DuBroff, Power bus noise reduction using power islands
in printed circuit board designs, in Proc. 4th Int. Symp. Electromagn.
Compat., Tokyo, Japan, May 1999, pp. 14.
[4] J. Fan, Y. Ren, J. Chen, D. M. Hockanson, H. Shi, J. L. Drewniak, T.
H. Hubing, T. P. Van Doren, and R. E. DuBroff, RF isolation using
power islands in DC power bus design, in Proc. 1999 IEEE Int. Symp.
Electromagn. Compat., Seattle, WA, Aug. 1999, pp. 838843.
[5] W. Cui, J. Fan, H. Shi, and J. L. Drewniak, DC power bus noise isolation with power islands, in Proc. 2001 IEEE Int. Symp. Electromagn.
Compat., Montreal, Canada, Aug. 2001, pp. 899903.
[6] H. Shi, F. Sha, J. L. Drewniak, T. P. Van Doren, and T. H. Hubing,
An experimental procedure for characterizing interconnects to the DC
power bus on a multilayer printed circuit board, IEEE Trans. Electromagn. Compat., vol. 39, no. 4, pp. 279285, Nov. 1997.
[7] T. H. Hubing, J. L. Drewniak, T. P. Van Doren, F. Sha, and M. Wilhelm,
An experimental investigation of 4-layer printed circuit board decoupling, in Proc. IEEE Int. Symp. Electromagn. Compat., Atlanta, GA,
Aug. 1995, pp. 308312.
[8] J. Fan, J. Knighten, A. Orlandi, N. Smith, and J. Drewniak, Quantifying
decoupling capacitor location, in Proc. 2000 IEEE Int. Symp. Electromagn. Compat., Washington, DC, Aug. 2000, pp. 757762.

Electromagnetic Interference Mitigation by Using a

Spread-Spectrum Approach
Yoonjae Lee and Raj Mittra

AbstractWe investigate a new technique, referred to as spread-spectrum clock generation (SSCG), for reducing the level of radiated emission
from devices with digital clock signals. To calculate the radiated emissions
from such devices, we model the radiating geometry and compute the radiated field at a multitude of frequencies by using NEC-4, which is an electromagnetic field solver based on the method of moments (MoM). We consider
a variety of modulating profiles for the spread spectrum clock and demonstrate that by using a frequency deviation of only 1%, we can achieve from
10 to 30 dB reduction in the radiated emission levels.
Index TermsElectromagnetic interference, metallic shield, modeling,
spread-spectrum clock.

I. INTRODUCTION
A novel technique involving the frequency modulation of the clock
and referred to as the spread-spectrum clock generation (SSCG)
method [1], [3] has recently been proposed [3][5] for reducing the
radiated emissions from digital electronic devices. This new technique,
which is analogous to the spread-spectrum technique widely used
in communications [2], effectively spreads the energy of discrete
frequency harmonics over a wider range of frequencies. In this paper,
we investigate the SSCG technique in some detail and show that the
amplitude of the harmonics of the clock signal can be reduced by
about 618 dB, depending on the clock frequency and frequency
deviation of the modulation. Then, we investigate the level of EMC
interference signals radiated by a digital device by multiplying the
frequency response of the device with the spectrum of its clock. The
frequency response is obtained by computing the radiated field of the
device with NEC by using a time-harmonic excitation of constant
phase and magnitude for various frequencies across the band of
interest. The spectrum of the digital clock is computed via the FFT of
the time waveform of the clock.
II. SPREAD SPECTRUM CLOCK
Modulation of the clock frequency creates side-bands, spreading
the emission spectrum in the process. Lin [6] has shown that the
frequency modulation is particularly effective for switching power
circuits in reducing the level of the fundamental frequency, especially
if the switching frequency is less than 150 kHz and the modulating
frequency is chosen to be somewhat greater than 200 Hz.
Consider a clock signal represented by f (t), shown in Fig. 1. The
pulse shape shown in this figure is exaggerated to convey the idea that
the pulse width of the clock signal varies over the period T of the modulating waveform.

Manuscript received May 25, 2000; revised August 31, 2001.

Y. Lee was with the Electromagnetic Communication Laboratory, Pennsylvania State University, University Park, PA 16802-2705. He is now with the
Center for Remote Sensing Inc., Fairfax, VA 22030 USA (e-mail: YXL176@
psu.edu).
R. Mittra is with the Electromagnetic Communication Laboratory, Pennsylvania State University, University Park, PA 16802-2705 USA (e-mail:
MITTRA@engr.psu.edu).
Publisher Item Identifier S 0018-9375(02)04554-4.
0018-9375/02$17.00 2002 IEEE

IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 44, NO. 2, MAY 2002

381

(a)

Fig. 1. Time-domain representation of the frequency modulated clock.

(b)
Fig. 3. (a) Attenuation versus peak frequency deviation for different harmonics. The clock is modulated by a triangular waveform. (b) Attenuation
versus nth harmonic for different frequency deviations. The clock is modulated
by a triangular waveform.

Fig. 2. Comparison of peak magnitude of harmonics for different modulation

profiles with 1% peak frequency deviation.

The Fourier coefficients of f (t) shown in Fig. 1 are given by [7]

an =
bn =

T =2

T 0T=2
T =2

T 0T=2

f (t) cos(n!0 t) dt

(1)

f (t) sin(n!0 t) dt

(2)

where n = 0, 1, 2, . . . and !0 = (2=T ) where T is the modulation

period. From (1) and (2), the magnitude of the nth harmonic can be
found as follows:
j

cn j =

a2n + bn2 :

(3)

In this work, the computation of the Fourier coefficients was carried out numerically by representing the modulated clock pulses as a
discrete sequence of pulse widths (T2k T1k ) (see Fig. 1), and taking
the Fast Fourier Transform with magnitude and frequency scaling. An
alternative method would be to compute (1) and (2) by numerical integration but that would be rather time consuming.
The frequency modulation introduces sidebands consisting of discrete frequencies spaced by !0 about every harmonic of the signal. A
comparison of the spectra of the modulated and unmodulated clocks
clearly shows the effect of the frequency modulation and the resulting

reduction of the peak level of the harmonics [1], [3]. The frequency
modulation of the clock reduces the maximum values of energy distribution in the frequency spectrum by increasing the bandwidth of the
harmonics. This suggests that we can attain a maximum reduction of
the clock harmonics by optimizing the modulating waveform.
To simulate different modulating waveforms, we chose the clock frequency to be 65 MHz, which is typical of system clocks in many digital
electronic devices such as laser printers. We also chose the modulating
waveform period to be 10 S and we restricted the maximum frequency
deviation of the modulated clock to be below a specified level in order
to avoid a system failure.
We computed the maximum attenuation of the harmonics peak
level relative to the unmodulated case for different types of modulating
waveforms. The sampled values at the maximum magnitudes for the
individual harmonics up to the 100th harmonic are presented in Fig. 2.
The comparison has been made for a peak frequency deviation of 1%.
As seen from Fig. 3, a 0.5% peak frequency deviation with triangular
modulating waveform results in a reduction of approximately 6 dB
at 65 MHz clock frequency, relative to that of the unmodulated
clock. We found that the triangular shape appears to provide the
best results among the three different modulation profiles. For this
profile, the attenuation starts from an initial value of 6.4 dB at the
clock frequency, and then increases to 16.7 dB at a frequency of 975
MHz. We could further reduce the peak magnitude by increasing the
peak frequency deviation as shown in Fig. 3, but we found that the
attenuation increases only slightly as the frequency deviation exceeds
10% for the lower harmonics. Furthermore, we found that at the 11th
or higher harmonics, the attenuation begins to decrease for a peak
frequency deviation exceeding 6% because the sidebands from the
adjacent harmonics begin to overlap.

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IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 44, NO. 2, MAY 2002

(a)

(c)

(b)

(d)

Fig. 4. Modeled geometry. (a) Wire trace model. (b) Wire-grid model of a box. (c) Wire-grid model of a box with a slit. (d) Wire-grid model of a box with a slit
and a protruding wire.

(a)

(b)

(c)

(d)

Fig. 5. Radiation profile of the wire-grid box at the two observation points
(d) Box with a slit and a protruding wire.

X and Z . (a) Single trace above a ground plane. (b) Closed box. (c) Box with a slit.

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383

III. EMI/EMC COMPUTATIONAL MODELING AND SYSTEM RESPONSE

We used a NEC-4 code [9] for our simulations of the EMI/EMC
problems with the objective of characterizing the radiating behavior
of electronic devices powered by spread spectrum clocks. The devices
that we analyzed were various configurations of wire traces on printed
circuit boards (PCB), and a metal shielding box with external wires,
such as ac power cables protruding from the metallic shield.
We begin the modeling by defining the dimensions of a metallic box
that contains the equipment that we wish to analyze. To represent the
typical digital devices that are used in offices or homes, we chose the
dimensions to be 0.36 m 2 0.6 m 2 0.18 m. In this work, we limit
the EMI/EMC analysis to radio frequencies. For Class B systems that
use digital clock frequencies falling in the range of 1.705108 MHz,
it is necessary to make the measurements up to 1000 MHz [11], [12],
which is the highest frequency of interest in this work. For numerical
calculations using MoM, it is acceptable to use a grid size that falls
within the range of =6 to =10. It is also desirable to keep the number
of unknowns to no more than 4000, so that the cpu time is reasonable. Our final simulation models, which utilize a =6 size grid for the
highest frequency of interest, consist of about 2000 unknowns. For the
purpose of estimating the EMI/EMC levels, we can model PCBs with
microstrip traces of width W above a conducting plane as wires with
equivalent radii W/4 above a wire-grid plane, as shown in Fig. 4(a).
Most electronic devices are enclosed in a metal box, which acts as a
shield and serves to suppress radiated emissions from the circuitry located inside. The shield itself may have some apertures for ventilation
or for cable connections to ac power lines. With this in mind, we investigated three different models for EMI calculations: 1) a closed box; 2)
a box with a narrow slit; 3) a box with a slit and a protruding cable [see
Fig. 4 (b)(d)]. The dimensions of the slit and the length of the protruding cable were chosen as 0.03 m 2 0.24 m and 1 m, respectively.
All three models were assumed to have circuitry inside.
To obtain the frequency response of the geometry, we excited the
trace at the center with a 1 V sinusoidal voltage source, with constant
magnitude and phase, in the frequency range of 30 MHz to 1400 MHz
with a 10 MHz step. For all simulations, we fixed the size of the wire
grid to be =6 of the highest frequency of interest, which is 1000 MHz,
and we scanned up to 1400 MHz to observe the effect of the sparse
wire-grid for the frequencies over 1000 MHz. Fig. 5 presents frequency
responses of a single trace above a wire-grid ground plane both with
and without a metallic shield modeled with a wire-grid. The results in
Fig. 5 are for two different observation points X and Z corresponding
to (x, y , z ) = (10 m, 0, 0) and (0, 0, 10 m), respectively.
The effect of the shield on the level of the radiated field is evident
from these figures. We note that the magnitude of the radiation is not
reduced significantly by the shield for frequencies above 1000 MHz.
However, this may be a numerical artifact since the grid is not dense
enough to generate accurate results for frequencies above 1000 MHz.
We also notice from these figures that a box with the slit mentioned
above leaks around 400 MHz, as shown by the radiation peak at that
frequency. Considering the length of the slit, which is 0.24 m, we may
expect that the leakage would occur around 625 MHz. However, the
frequency at which the slit resonates could be lower because the box
is not completely closed but modeled with a wire-grid which results in
some loading effects. For the box with the protruding wire mentioned
above, we observe leakage at lower frequencies caused by the resonance of the wire around 75 MHz, which arises from the fact that a
side of the box can act like a ground plane to the cable. Also, the simulations show that the resonance behavior of the box is complex owing
to the presence of higher order resonances in the cavity.
With the information of the source spectra and frequency response
of the radiating geometry, we compute the radiated emission levels
from the modeled digital devices with and without SSCG. To obtain

Fig. 6. Estimated radiation for the unmodulated clock at X . The horizontal

line represents the FCC limit for Class B devices. (A 1 V) (a) Standard box.
(b) Box with a slit. (c) Box with a slit and a protruding wire.

the system response, we multiply the spectrum of the excitation and

the frequency response of the geometry. Figs. 68 show the estimated
radiation levels for the unmodulated clock and for a clock modulated in
frequency by a triangular waveform and a frequency deviation of 1%.

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IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 44, NO. 2, MAY 2002

Fig. 7. Estimated radiation for a clock modulated in frequency by a triangular

waveform at X . The horizontal line represents the FCC limit for Class B
devices. (A 1 V, peak frequency deviation = 1%). (a) Standard box. (b) Box
with a slit. (c) Box with a slit and a protruding wire.

Fig. 8. Estimated radiation for a clock modulated in frequency by a triangular

waveform at Z . The horizontal line represents the FCC limit for Class B devices.
(A = 1 V, peak frequency deviation = 1%). (a) Standard box. (b) Box with a
slit. (c) Box with a slit and a protruding wire.

Comparing Figs. 6 and 7, we clearly see the significant reduction of

higher harmonics due to the frequency modulation. We plot the fields at
both the and observation points for the SSCG device simulations

in Figs. 7 and 8, and note that the radiation at the observation point
is higher than that at the
observation point for frequencies above
400 MHz. By using the SSCG technique with the parameters specified

IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 44, NO. 2, MAY 2002

in the previous section, we are able to obtain from 10 to 30 dB reduction

in the system response for the four frequency bands that fall within the
FCC limits.

385

Variability Studies on EMI Data for Electronic,

Telecommunication and Information Technology
Equipment
David Y. Wang, Ken-Huang Lin, and Mong-Na Lo Huang

IV. CONCLUSION
In this work, we have investigated the EMC performance of the
spread spectrum clock systems and have shown, via a number of simulations, that the radiated emissions from digital devices can be mitigated by using spread spectrum clocks whose pulse width is modulated.
We also have demonstrated that the level of reduction in the radiated
field from a system utilizing such clocks depends on the amount of frequency deviation of the modulation. For the case of a 65-MHz clock
frequency with a triangular modulation and a 1% frequency deviation,
we observed a 16.7 dB attenuation of the 15th harmonic. We found that
the optimal modulation profile is a triangular one. However, we point
out that the modulation profile may have an impact on some timing parameters and, hence, the optimal modulation profile could be different
depending on the applications of SSCG.
To model PC-type electronic systems, we used wire-grid representations of the conducting surfaces and analyzed them numerically by
using the NEC code. We found that the radiation characteristics of microstrip traces above a ground plane are considerably more complex
when enclosed in a metallic box than when they are not. We further
observed that boxes with apertures can generate higher levels of radiation at certain frequencies than those without them, and that external
cables can contribute significantly to the emission levels, especially at
the lower frequencies. By comparing the system response of the device with and without the SSCG technique, we demonstrated that it is
possible to obtain from 10 to 30 dB reduction for each harmonic in the
frequency band of interest.
REFERENCES
[1] Hardin et al., United States Patent 5 448 627, Jan. 1996.
[2] R. C. Dixon, Spread Spectrum Systems. New York, NY: Wiley, 1984.
[3] K. B. Hardin, J. T. Fessler, and D. R. Bush, Spread spectrum clock
generation for the reduction of radiated emissions, in Proc. IEEE Int.
Symp. Electromagnetic Compatibility, 1994, pp. 227231.
[4]
, A study of the interference potential of spread spectrum clock
generation techniques, in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1995, pp. 624629.
[5] H. Li, Y. Cheng, and D. Puar, Dual-loop spread-spectrum clock generator, in Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf., 1999,
pp. 184185.
[6] F. Lin and D. Chen, Reduction of power supply EMI emission by
switching frequency modulation, IEEE Trans. Power Electron., vol. 9,
pp. 132137, Jan. 1994.
[7] F. G. Streamler, Introduction to Communication Systems. Reading,
MA: Addison-Wesley, 1990.
[8] H. S. Black, Modulation Theory. Princeton, NJ: Van Nostrand, 1953.
[9] Numerical electromagnetics code, Lawrence Livermore National Laboratory, Livermore, CA, 1992.
[10] B. Archambeault, O. M. Ramahi, and C. Brench, EMI/EMC Computational Modeling Handbook. Norwell, MA: Kluwer, 1998.
[11] C. R. Paul, Introduction to Electromagnetic Compatibility. New York:
Wiley, 1992.
[12] R. Perez, Handbook of Electromagnetic Compatibility. San Diego,
CA: Academic, 1995.
[13] S. Radu, M. Li, J. Nuebel, D. Hockanson, Y. Ji, J. L. Drewniak, T. H.
Hubing, and T. P. Van Doren, Investigation of internal partitioning in
metallic enclosure for EMI control, in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1997, pp. 171176.
[14] K. B. Hardin, N. L. Webb, J. B. Berry, A. L. Cable, and M. J. Pulley,
Design considerations of phase-locked loop systems for spread spectrum clock generation compatibility, in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1997, pp. 302307.

AbstractData variability has long been a problem for radiated emission

testings of electronic, telecommunication and information technology
equipment. When a piece of electronic equipment undergoes electromagnetic interference (EMI) test, the inherent data variability is inevitable even
with known test facility uncertainties. This study presents a methodology
for analyzing this variability based on a modified analysis of variances
(ANOVA), with polynomial regression analyses. The data variability
is estimated after prototype has been built in a design laboratory. The
analytical analysis results can also be used to provide confidence limits for
internal in-process EMI control when the equipment is mass-produced.
Index TermsAnalysis of variances (ANOVA), confidence level, design
of statistical experiments, F distribution, factorial treatment designs, mixed
models, polynomial regression analyses, statistical significance.

GLOSSARY
ANOVA
BABT
BSMI
CISPR
CNLA
EMC
EMI
ETC
EUT
FCC
F -Statistic
NID
NVLAP
OATS
R&S
SAS
SS
SSE
TV
VCCI

Analysis of variance.
British Approvals Board of Telecommunications.
Bureau of Standards, Metrology and Inspection.
International Special Committee on Radio Interference.
Chinese National Laboratory Accreditation System.
Electromagnetic compatibility.
Electromagnetic interference.
Electronics Testing Center, Taiwan, R.O.C.
Equipment under test.
Federal Communications Commission.
Snedecor F -Statistic.
Normally independently distributed.
National Voluntary Laboratory Accreditation Program.
Open-area test site.
ROHDE & SCHWARZ GmbH & Company.
Statistical analysis system.
Sum of squares.
Error sum of squares.
Technischer berwachungsverein.
Voluntary Control Council for Interference by Information
Technology Equipment.
I. INTRODUCTION

A factorial treatment design of mixed model has been formulated

to investigate variability of EMI data for various electronic products.
The mixed model consists of four main factors (effects). They include
polarization of the broadband antenna, equipment-under-test table
height, antenna height and randomly selected test frequencies from 30
to 1000 MHz. These four factors have been chosen because they are
easily controllable and specified by CISPR Standards [1]. The factorial
experiments have been so designed that qualified electromagnetic
compatibility (EMC) test laboratories can repeat the experiments and
take advantage of the powerful statistical tools. In each experiment the
Manuscript received December 14, 1999; revised November 26, 2001.
D. Y. Wang and K.-H. Lin are with the Department of Electrical Engineering,
National Sun Yat-sen University, Taiwan, R. O. C.
M.-N. L. Huang is with the Department of Applied Mathematics, National
Sun Yat-sen University, Taiwan, R. O. C.
Publisher Item Identifier S 0018-9375(02)04553-2.

0018-9375/02$17.00 2002 IEEE