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The Bridge Rectifier.doc

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The Bridge Rectifier

Now consider this junction diode rectifier circuit:

Power
Line

D1
R

vS(t)

D2

- vO(t) +
D3

D4

We call this circuit the bridge rectifier. Lets analyze it and

see what it does!
First, we replace the junction diodes with the CVD model:

Power
Line

0.7 V

D1

vS(t)
D4
_

Jim Stiles

D2

0.7 V

0.7 V

The Univ. of Kansas

- vO(t) +
0.7 V

D3

Dept. of EECS

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Q: Four gul-durn ideal

diodes! That means 16 sets

of dad-gum assumptions!

A: True! However, there are only three of these sets of

assumptions are actually possible!
Consider the current i flowing through the rectifier. This
current of course can be positive, negative, or zero. It turns
out that there is only one set of diode assumptions that would
result in positive current i , one set of diode assumptions that
would lead to negative current i , and one set that would lead
to zero current i .

Q: But what about the

remaining 13 sets of dog

gone diode assumptions?

A: Regardless of the value of source vS, the remaining 13 sets

of diode assumptions simply cannot occur for this particular
circuit design!

Jim Stiles

The Univ. of Kansas

Dept. of EECS

9/24/2004

The Bridge Rectifier.doc

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Lets look at the three possible sets of assumptions:

i >0
The rectifier current i can be positive only if these
assumptions are true:

D1 and D3 are reverse biased.

D2 and D4 are forward biased.
i>0

0.7 V

Power
Line

D1

+vDi

iDi

0.7 V

- vO(t) +

vS(t)
D4

D2

iDi

i>0 0.7 V

R
+v

0.7 V

i
D

D3

Analyzing this circuit, we find that the output voltage is:

vO = vS 1.4 V
and the f.b. ideal diode currents are:

i = iDi =

Jim Stiles

v S 1 .4
R

The Univ. of Kansas

Dept. of EECS

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and, finally the r.b. ideal diode voltages are:

vDi = vS
Thus, iDi > 0 when:

and vDi < 0 when:

v S 1 .4
>0
R
v S 1 .4 > 0
v S > 1 .4 V
vS < 0

vS > 0

Therefore, we find that for this circuit:

vO = vS 1.4 V

when vS > 1.4V

i <0
The rectifier current i can be negative only if these
assumptions are true:

D1 and D3 are forward biased.

D2 and D4 are reverse biased.

Jim Stiles

The Univ. of Kansas

Dept. of EECS

9/24/2004

The Bridge Rectifier.doc

i<0

0.7 V

Power
Line

5/9

D1

i
D

vS(t)

D4
i<0

0.7 V

- vO(t) +

+ vDi

D2

+v
i
D

0.7 V

0.7 V

i
D

D3

Analyzing this circuit, we find that the output voltage is:

vO = vS 1.4 V
while the f.b. ideal diode currents are both
:
v 1.4
i = iDi = S

and the r.b. ideal diode voltages are both:

vDi = vS

Jim Stiles

The Univ. of Kansas

Dept. of EECS

9/24/2004

The Bridge Rectifier.doc

Thus, iDi > 0 when:

vS 1.4

6/9

>0

vS 1.4 > 0

vS > 1.4 V

and, vDi < 0 when:

v S < 1 . 4 V

vS < 0

Therefore, we likewise find for this circuit:

vO = vS 1.4 V

when vS < 1.4V

i =0
The rectifier current i can be zero only if these assumptions
are true:

All ideal diodes are reverse biased!

i=0

0.7 V

Power
Line

D1

+ vDi 1

vS(t)
+ vDi 4

+v

i
D2

D2

0.7 V

- vO(t) +
R

D4
_

Jim Stiles

i=0 0.7 V

The Univ. of Kansas

0.7 V
+ vDi 3

D3

Dept. of EECS

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Analyzing this circuit, we find that the output voltage is:

vO = R i = 0
while the ideal diode voltages of D2 and D4 are each:

vDi 2 =

vS 1.4
2

= vDi 4

and the ideal diode voltages of D1 and D3 are each:

vDi 1 =
Thus, vDi 2 < 0 when:

vS 1.4
= vDi 3
2

v S 1. 4

<0
2
v S 1 .4 < 0

v S < 1 .4

and, vDi 1 < 0 when:

vS 1.4
<0
2
vS 1.4 < 0

vS < 1.4

v S > 1 . 4

Therefore, we also find for this circuit that:

vO = 0
Jim Stiles

when both vS < 1.4 V and vS > 1.4 V (-1.4 < vS < 1.4V)
The Univ. of Kansas

Dept. of EECS

9/24/2004

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Q: You know, that dang Mizzou

grad said we only needed to

consider these three sets of
diode assumptions, yet I am still
concerned about the other 13.
How can we be sure that we
have analyzed every possible set
of valid diode assumptions?
A: We know that we have considered every possible case,
because when we combine the three results we find that we
have a piece-wise linear function! I.E.,:
vS 1.4 V if vS < 1.4 V

vO = 0
if -1.4 < vS < 1.4 V

vS 1.4 V if vS > 1.4V

vO
-1

vS

-1.4

Jim Stiles

1.4

The Univ. of Kansas

Dept. of EECS

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Note that the bridge rectifier is a full-wave rectifier!

If the input to this rectifier is a sine wave, we find that the

output is approximately that of an ideal full-wave rectifier:
A

vO(t)

1.4

-1.4
-A

vS(t)

We see that the junction diode bridge rectifier output is very

close to ideal. In fact, if A>>1.4 V, the DC component of this
junction diode bridge rectifier is approximately:

VO

2A

1.4 V

Just 1.4 V less than the ideal full-wave rectifier DC

component!

Jim Stiles

The Univ. of Kansas

Dept. of EECS