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SUBJECT : EIT
EXPT. NO. : 6
DATE :
TITLE
OBJECTIVE
APPARATUS
THEORY
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6.1
EIT
1. Input Circuitry:
It is mainly intended as a signal conditioner. It converts the analog input
signal into a form compatible with the logic circuitry in the rest of the
digital counter. Such an input channel consists of mainly of the following
stages.
a. AC/DC Coupling Circuitry
b. An input attenuator
c. A voltage limiter for circuit protection
d. An impedance converter with level adjustment
e. A Schmitt Trigger
2. Main Gate:
The signal conditioned in the input circuit is passed to the main gate
which is mostly a standard dual-input logic gate. One of the inputs is for
the information signal while the other receives the gate control signal.
When the gate is turened ON; the incoming pulses pass through the
gate to the next stage, the decimal counting unit.
3. Decimal counting unit and display:
It consists of a number of counter decades in cascade. Each decade
consists of five basic units
i. A decade counter
ii. A memory
iii. A BCD to decimal decoder,
iv. A numerical indicator driver
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6.2
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P:F:-LTL-UG/03/R1
6.3
EIT
6.4
EIT
6.5
EIT
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6.6
EIT
Freq 1
Freq 2
Ratio freq 1 to 2
Ratio freq 2 to 1
Period 1
POS width 1
NEG width 1
Rise time 1
Fall time 1
Duty cycle 1
Voltage peaks
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6.7
EIT
Input frequency
Gate time
Totalize
Conclusion:
Reference
1. Helfrick and Cooper, Modern Electronic Instrumentation and Measurement.
Tata Mcgraw Hill
2. http://www.used-line.com/c6889733s0-Agilent_HP_53132A.htm
3. http://www.4gte.com/EquipmentPages/53132Auniversalfrequencycounter.h
tm
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6.8
EIT