GEORGIA INSTITUTE OF TECHNOLOGY

SCHOOL OF ELECTRICAL AND COMPUTER ENGINEERING

ECE 3040B: Microelectronic Circuits
Spring Semester 2009, Test #3
SOLUTIONS

12 Short Questions (5 points each)

1.

Sketch the energy band diagram for an ideal MOS capacitor with M = S and an n-type
semiconductor. Do you have to apply a positive or a negative potential to the gate (assume
the semiconductor bulk is connected to GND) to achieve inversion at the semiconductor
surface? Justify your answer.
The inversion layer in an MOS capacitor
with n-type semiconductor consists of holes
(minority carriers). To attract holes to the
semiconductor surface, a NEGATIVE
potential must be applied to the gate.

2.

What is known as the work function of a semiconductor? What is known as the electron
affinity of a semiconductor?
The work function is the energy difference between the vacuum level E0 and the Fermi
energy EF. The electron affinity is the energy difference between the vacuum level E0 and the
conduction band energy EC.

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 1 of 7

3.

What is known as the Fermi potential of a semiconductor? Is the Fermi potential positive or
negative for a p-type semiconductor? How can you express the surface potential of the
semiconductor in an MOS capacitor biased at the onset of inversion as a function of the
Fermi potential?
The Fermi potential of a semiconductor is the energy difference between Ei and EF, divided
by q, i.e. F = q-1 (Ei EF). For a p-type semiconductor, the Fermi potential is POSITIVE
because Ei > EF. By definition, the surface potential of the semiconductor in an MOS
capacitor at the onset of inversion is two times the Fermi potential (S = 2 F).

4.

Sketch the ID-VDS characteristic of an n-channel MOSFET, and indicate the triode and
saturation region of operation? How does the drain voltage at the onset of inversion change
with increasing gate voltage?

Triode
Region

The drain voltage at the onset of inversion, i.e. VD,sat, increases with increasing gate voltage:
VD,sat = VGS - VT

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 2 of 7

5.

What is the key assumption made during the development of the square-law theory for the
MOSFET? Consider the charge added beyond the onset of inversion.
The key assumption made during the derivation of the square-law theory is that beyond the
onset of inversion all charge added to the channel region of the semiconductor (by changing
the gate voltage) will be added to the inversion layer, i.e. the width of the depletion region
remains unchanged. In reality, some charge is actually added to the depletion region; as a
result, the drain current calculated from the square-law theory overestimates the actual
drain current.

6.

Sketch a cross-section of an n-channel MOSFET biased at the pinch-off point, properly

labeling the key regions (and their doping type) and the terminals. Include the depletion
region and the inversion layer in your sketch.

7.

The small signal equivalent circuit of a MOSFET transistor includes a voltage controlled
current source generating the current gmvgs and an output resistor ro. Which physical effect in
the MOSFET transistor mandates a finite output resistance ro < ? Justify your answer.
The channel length modulation, i.e. > 0, affects the output resistance so that ro < . The
channel length modulation results in a finite slope of the ID-VDS characteristic in the
saturation region. In the small signal equivalent circuit, this finite slope is described by the
output resistance ro.

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 3 of 7

8.

How will a positive oxide charge Q located exactly at the interface between gate oxide and
gate metal affect the threshold voltage of an n-channel MOSFET transistor? Justify your
answer.
In general, a positive effective oxide charge yields a negative shift in threshold voltage (VT
= - Q Co-1). However, since the positive charge is exactly located at the interface between
gate oxide and gate metal, i.e. x = 0, the effective charge associated with it is zero and, thus,
the resulting change in threshold voltage is ZERO as well.

9.

What are current mirrors used for? Current mirrors rely on matched transistors; what are
matched transistors and how can you obtain matched transistors?
Current mirrors generate accurate current ratios from a reference current and are used in
integrated circuit design to bias circuit elements, such as transistors. Matched transistors
have almost identical parameters (e.g. VT, Kn, for a MOSFET) and can be obtained by
fabricating the transistors in close proximity on the same semiconductor substrate.

10. What are the characteristics of common-emitter/common-source amplifiers in terms of

voltage gain, input and output resistance? Dont just write down equations but put it in
words.
The C-E/C-S amplifiers are both inverting amplifiers. The C-E amplifier provides moderate
to high voltage gain, as well as moderate input resistance, output resistance and current
gain. The C-S amplifier provides moderate voltage gain and output resistance, as well as
high input resistance and current gain.
11. You need to design a single-transistor amplifier with a gain of +10 and an input resistance of
2 k. Which amplifier configuration would you choose and why?
Because a positive gain > 1 is required, only a non-inverting amplifier is suitable. Both, the
common-gate and common-base amplifiers can provide enough positive voltage gain (Avt =
gm RL) and the fairly low input resistance of 2 k. For both amplifier types, the input
resistance is approx. the inverse of the transconductance gm.
12. What circuit characteristic is affected by the capacitance values of coupling and bypass
capacitors?
The low-frequency gain is affected by the values of coupling and bypass capacitors.

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 4 of 7

Problem (40 points): The circuit for a singletransistor amplifier is shown on the right.
Given are
RI = 250 , RD = 43 k, RS = 68 k,
R3 = 200 k, VDD = VSS = 15 V, VT = -1 V,
Kp = 200 A/V2 and = 0.
a. (5 points) Which type of single-transistor
amplifier is represented by the circuit?
b. (5 points) Sketch the dc-equivalent circuit.
c. (20 points) Calculate the Q-point of the transistor assuming it is biased in saturation.
d. (5 points) Sketch the ac equivalent circuit (i) with transistor M1 and (ii) with the small signal
equivalent of M1.
e. (5 points) Calculate the transconductance gm and the output resistance ro.

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 5 of 7

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 6 of 7

ECE 3040B: Test #3, Solutions

April 13, 2009

Page 7 of 7