3 s2.0 B9780122653209500714 Main PDF

Chapter 4
HETEROJUNCTION BIPOLAR TRANSISTORS

Peter Asbeck
Department of Electrical and Computer Engineering, University of California, San Diego,
La Jolla, California, USA
Contents
4.1. HeterojunctionBipolar Transistor Structure and Properties. . . . . . . . . . . . . . . . . . . . . . .
4.2. HeterojunctionBipolar Transistor Materials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3. HeterojunctionBipolar Transistor Processing Techniques. . . . . . . . . . . . . . . . . . . . . . . .
4.4. HeterojunctionBipolar Transistor DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .
4.5. HeterojunctionBipolar Transistor RF Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .
4.6. HeterojunctionBipolar Transistor Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.7. HeterojunctionBipolar Transistor Research Directions . . . . . . . . . . . . . . . . . . . . . . . . .
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.
157
161
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171
178
182
188
191
HETEROJUNCTION BIPOLAR TRANSISTOR

STRUCTURE AND PROPERTIES
Bipolar transistors implemented in Si have for decades played an important role in high
performance electronic circuits. The advent of heterostructure technology, which allows
the juxtaposition of materials of different composition within a single device (and thus
allows the formation of heterojunction bipolar transistors, HBTs) has provided a major
new opportunity for device optimization, and has propelled bipolar technology to new
performance heights. The full exploration of heterojunction opportunities is still on-going,
and HBT research continues to be pursued very actively.
Development of HBT technology originated from improvements in thin film technology. Heterojunction Bipolar Transistors were made possible as a result of the ability to
produce epitaxial layers of multiple materials with low defect densities, reproducible film
thicknesses, and doping levels. This ability first emerged using the techniques of MBE and
MOCVD in the GaAs/GaA1As material system, the development of which was driven
largely by optoelectronic device research.
This chapter reviews the principles and practice of HBTs, with primary focus on
implementations in III-V materials and on recent research directions. Additional details of
III-V HBT characteristics and analysis are provided in several recent publications [1-3].
The HBT fabricated in SiGe technology are exciting new devices, whose characteristics
are presented in Chapter 6.
Handbook of Thin Film Devices, edited by Maurice H. Francombe

Volume 1: Hetero-Structuresfor High Performance Devices
Copyright 9 2000 by Academic Press
All fights of reproduction in any form reserved.
ISBN 0-12-762870-3/$35.00
157
ASBECK
Heteroepitaxial thin film technology provides numerous opportunities to improve the

performance of bipolar transistors, including the following areas.
1) Wide b a n d g a p emitter." A central concern in the design of bipolar transistors is the
minimization of base current. In particular, in an npn transistor it is necessary to reduce the
reverse injection of holes into the emitter that tends to accompany the forward injection of
electrons into the base. To obtain high emitter injection efficiency in homojunction
devices, emitter doping must be as high as possible (up to the limit imposed by bandgap
narrowing) and the base doping must not be too high. This critical limit can be avoided if
the bandgap of the emitter is suitably larger than that of the base, which can be
accomplished by changing the material composition of the emitter [4, 5], for example,
employing A1GaAs in the emitter if the base is GaAs (or SiGe in the base for an emitter of
Si). Figure 4.1 shows the band diagram of an HBT with wide bandgap emitter. The barrier
for hole injection from base to emitter is larger than the corresponding barrier for electron
flow by the difference in bandgaps, AEg. The emitter injection ratio is approximately
Te =" Jn/Jp =- O n / O p " ne/Pb " We/Wb " exp(-AEg/kT)
(4.1)
where Pb and n e are the base and emitter dopings, and D n and Dp the diffusion coefficients
for electrons and holes, respectively. High injection efficiency can be obtained, even with
high base doping, if the bandgap of the emitter is larger than that of the base; a difference
of 8 kT = 200mV can offset a doping ratio of x3000. The flexibility in base doping is
used in HBT technology to employ base regions doped up to 1020 cm -3, larger by x 102
than the doping in Si homojunction transistors. Figure 4.2 compares doping profiles for
npn transistors in traditional Si bipolar transistors, and in HBTs based on A1GaAs/GaAs.
For GaAs HBTs the base sheet resistance can be as low as 100 D/V-l, reducing base
resistance and increasing fmax. Similarly, the base punchthrough voltage can be extremely
high; the base width modulation is typically negligible (early voltages of above 300 V). An
additional crucial effect for high speed operation is the elimination of minority carrier
charge storage in the emitter, which increases f .
2) G r a d e d base: Minority cartier transport across the base of traditional bipolar
transistors occurs by diffusion, which is a relatively slow process. In Si homojunction
transistors, performance may be enhanced by the introduction of drift fields derived from
gradients in the majority cartier (hole) density across the base [6]. In such "drill
transistors," an electric field on the order of 60mV divided by the base thickness is
established, assuming an order of magnitude change in doping throughout the base. By
varying the alloy composition across the base of an HBT, it is straightforward to
incorporate drift fields that are substantially larger than this, without incurring any penalty
in the doping (and thus sheet resistance) of the base. The built-in fields are the result of
changing the bandgap of the p-type base along the direction of electron travel, as shown in
Fig. 4.3a. With reasonable variations in composition, fields on the order of 10 kV/cm or
above can easily be implemented. These fields increase f , as well as reduce neutral base
recombination, both in the intrinsic device and at the perimeter.
GaAIAs
GaAs
or
alnP
_
GaAs
!
Fig. 4.1. HBT band diagram showingwide bandgap emitter.
158
1021
1020 -
1019
"-
1018
I
E
z
0
I--,
1017
1016
IZ
ttl
1015
1021
'
'
"I
~....... I
'
I
0.2
~ .... I
0.6
'
"
I
0.8
0
0
1020
z
m
a.
0
Ca
1019
1018
1017
1016
1015
0
I
0.4
DEPTH
Fig. 4.2.
1.0
(/am)
Comparison of doping profiles of representative Si bipolar transistor and A1GaAs/GaAs HBT.
3) Hot electron injection: In an abrupt junction HBT, there are, in general, energy
discontinuities in both the conduction and valence bands. In an npn transistor, the
conduction band discontinuity provides an energy step that acts as a "launching ramp"
for the injection of energetic (hot) electrons into the base, with momentum directed
towards the collector [7], as illustrated in Fig. 4.3b. For very thin bases, the electrons can
maintain the added speed (above 5 x 107 cm/s) over much of the base. The energy that
can be usefully added to electrons is limited, however, by the need to avoid injecting
electrons into satellite valleys of the conduction band, where the effective mass and density
of states is higher. The conduction band energy step at abrupt junctions also tends partially
to cancel the increase in current gain from the wider emitter bandgap. It is possible to
reduce or eliminate the conduction band step by appropriate grading of the composition
159
ASBECK
(a)
t11
'
Ib)
Fig. 4.3. (a) Band diagram of HBT with graded bandgap in the base; (b) band diagram of HBT with
abrupt energy step at base emitter (B-E) junction to provide hot electron injection into the base.
between emitter and base. Then the entire bandgap difference shows up as an increase in
the barrier for hole injection into the emitter.
4) Wide bandgap collector." By employing a collector material with bandgap wider
than the base, it is possible to increase the base-collector (BC) breakdown voltage, as the
ionization coefficient at a given electric field tends to be lower for materials with wide
bandgaps. It is also possible to reduce charge storage significantly during transistor
saturation. In a manner analogous to the improvement in emitter injection efficiency, the
component of saturation charge due to holes injected into the collector may be eliminated
with a wide bandgap collector. In light of the doping ratio between base and collector that
is typically used, this charge component is the largest contributor to saturation charge
storage. Figure 4.4 shows the band diagram of such a wide gap collector HBT (or double
heterojunction HBT, DHBT). For proper transistor operation, it is critical to eliminate any
energy barriers to minority carrier flow. For example, conduction band discontinuities
reduce current gain significantly when they occur at the collector edge of the base. Thus,
they must be eliminated by an appropriate materials-engineering strategy, as will be
discussed in what follows.
5) Optimization of bandgap energy for high-temperature or high-voltage electronics: For operation at high temperatures (above 200 ~ it is necessary to reduce junction
leakage currents over that which is obtained in typical Si devices. The GaAs HBT benefit
nun
nm
f
0wl
noun
Fig. 4.4. Band diagram of HBT with wide bandgap collector.
160
from the large GaAs bandgap energy (and thus high barrier voltages to carrier leakage);
equivalently, the leakage processes are proportional to the intrinsic cartier concentration of
the semiconductor, which is very low for GaAs. Considerable benefits could be obtained
by employing materials with even larger bandgaps, such as GaN.
4.2.
HETEROJUNCTION BIPOLAR TRANSISTOR MATERIALS
The first material system extensively explored for HBTs was the A1GaAs/GaAs alloy
system. In this chapter, A1GaAs/GaAs materials will be used as an example for the
discussion of representative issues. Subsequently, the possibilities offered by different IIIV material systems will be summarized. Here, A1GaAs/GaAs provides a large number of
advantages for high-speed device operation, including the following:
1) Flexible bandgap choice: The bandgap can be varied from 1.42 eV to about 1.85 eV.
The bandgap varies at 12.5 meV per % aluminum, up to compositions on the order of 45%
aluminum (above which the conduction band minimum occurs at the X point, and the
bandgap becomes indirect). The majority of the bandgap change (62%) constitutes a
change in conduction band energy, with the remainder corresponding to the valence band.
Aluminum compositions have been limited to about 30% in most work on npn HBT,
because of the onset of deep levels known as DX centers in A1GaAs of higher aluminum
content. This composition variation can be attained while still providing excellent lattice
match (because the total mismatch amounts to only 0.14% at room temperature between
AlAs and GaAs). Lattice-matching simplifies enormously the burden of composition
control during epitaxial growth, thus avoiding problems of dislocation formation.
2) High carrier mobility: For GaAs, the low-field electron mobility ~tn reaches
8000 cmZ/Vs in undoped materials, and is approximately 7x larger than in Si. The
electron diffusion coefficient is correspondingly increased, leading to lower base transit
time, and thus lower diffusion capacitance and higher f . Other benefits include the
following: the high ratio of electron to hole diffusivity increases current gain of npn
transistors; the low resistance of the emitter allows reduction in emitter doping while still
supporting high current density; and the series resistance associated with the undepleted
region of the collector in an npn transistor is reduced considerably over that of Si
transistors, allowing more efficient power-transistor operation.
3) High transient carrier velocity overshoot." In III-V semiconductors, when electrons
first enter a region of high electric field, the average electron velocity can increase to very
high values (on the order of l0 s cm/s) on a transient basis. Although for long times or
large distances, the steady-state saturated velocity of about 0.8 x 107 cm/s is attained, for
short distances the electron velocity can be much higher [8], as illustrated in Fig. 4.5. In
many III-V materials, the duration of transient velocity overshoot is governed by the time
needed for electron scattering from the F minimum of the conduction band to the satellite
X and L band minima. The energy difference between lowest conduction band minimum
(at F) and the lowest satellite valleys (L minima) is 0.31 eV for GaAs, and 0.55 eV for
In0.sgGa0.47As (lattice-matched to InP). The high electron velocity can be utilized to obtain
extremely short transit times across the base (in conjunction with hot carrier injection as
described in Section 4.1), and across the base-collector depletion region as in the ballistic
collection transistor that will be discussed. This leads to high f , as well as to subsidiary
benefits of low sensitivity to base-pushout.
4) Semi-insulating substrates: High-resistivity (>108 flcm) GaAs substrates are
possible as a result of the large bandgap of GaAs (and correspondingly low intrinsic
cartier concentration, n i = 2 x 106 cm-3), as well as the availability of midgap traps that
can be readily produced in the material. Semi-insulating substrates lead to a dramatic
reduction of collector-substrate capacitance, an important parasitic in Si-based bipolar
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ASBECK
.......I"'
2 5 kV/cm
15 kV/cm
A
W
E
0
~I',,,
5 kV/cm
'It'-
>,,
I,,,.,,,,.
3 kVlcm
0. _ 1
"'
>
DISTANCE (gm)
Fig. 4.5. Simulatedvelocityof electrons in GaAs upon entering a region of high electric field illustrating
transient velocity overshoot. [8].
transistors. The substrates also permit making microwave integrated circuits (which
contain controlled-impedance microstrip lines together with transistors). Interconnect
capacitance in digital circuits is also lower with the semi-insulating substrates, but not
dramatically so, because with the small design rules currently in use, interlayer dielectrics
are important determinants of capacitance.
5) Incorporation of photon-absorbing or emitting regions: The direct bandgap of
many III-V semiconductors has been key to their importance in optoelectronics. The
integration of photonic processes along with electronic processes in HBT and integrated
circuits is key to future development. The GaAs-based HBTs are directly compatible with
sources and detectors in the 0.8-0.9 pm regime. In addition to absorption and emission of
light in the standard emitter, base and collector regions, it is possible to add quantum wells
or extra layers for this purpose, or to provide for light reflection or filtering.
6) Heterostructure contacts: To achieve high-performance transistors, parasitic series
resistances such as occur at metal-semiconductor contacts must be minimized. This is
particularly true with emitter contacts, because any resistance provides negative feedback,
which robs transconductance from the devices. With heterostructures it is possible to
smoothly change materials from the bulk emitter to others at the surface, for which contact
resistance is negligible (such as in InAs, where the surface Fermi level is pinned in the
conduction band).
7) Selective etching: To fabricate sophisticated transistor structures, it is often desirable to contact layers that are buffed below the surface of the original wafer. With
heterostructures, it is possible to find etches that chemically differentiate between the
different layers, so that etches automatically stop when the desired layer is uncovered. For
example, in reactive ion etching (RIE) of GaAs, stopping at A1GaAs or InGaAs can be
conveniently done.
Although there are many advantages to GaAs-based materials for bipolar transistors,
there are also a few disadvantages. These include the following:
162
9 Limited range of transient electron velocity overshoot (compared with several

other III-V materials) because the conduction band valley separation between F
and L is only 0.3 eV.
9 High surface recombination velocity, on the order of 106 cm/s at most exposed
surfaces. Various approaches have been suggested for dealing with this in HBTs
(as will be discussed).
9 As a result of the bandgap of GaAs, the turn-on voltage Vbe for current flow in
A1GaAs/GaAs HBTs is of the order of 1.35 V. For low-power digital circuits, it
would be desirable to have a lower value.
9 Presence of DX centers (deep levels) in A1GaAs of high aluminum content (above
about 30%), such that shallow donors in A1GaAs are unavoidably accompanied by
deep donors that can cause trap-induced hysteresis or increased capacitance and
decreased conductivity.
9 The thermal conductivity of GaAs substrates is relatively low (0.46 W/cm K),
leading to somewhat greater difficulties in heatsinking than for Si substrates.
9 For npn transistors, it would be desirable to have a smaller fraction of bandgap
difference between base and emitter in the conduction band. The conduction band
lineup between different semiconductors can cause conduction band barriers to
appear. While these barriers are central to the operation of heterostructure fieldeffect transistors (HFET), they typically impede current flow perpendicular to the
layers, as is required in an HBT. A controlled amount of offset voltage may be
useful for the injection of hot carriers, as described in Section 4.1. Most
frequently, however, it is desirable to eliminate the barriers, using techniques
such as: 1) grading of the composition change at the heterojunction over a suitable
distance; or 2) the introduction of doping dipoles (based on sheets of donor and
acceptor atoms introduced into the material near the heterojunction). The effects
of these strategies are on the material bandstructure, as illustrated in Fig. 4.6.
setback
(a)
in=
===,
N=,
Ej
doping dipole
j)L(b)
p(x)
|
a m
,,
m .
I
#(x)
Fig. 4.6. Strategiesfor control of AEc at base-emitterjunction.
163
ASBECK
A representative layer structure used for A1GaAs/GaAs HBTs is shown in Fig. 4.7.
Base doping in the range 1019-1020 cm -3 is used, with emitter doping at 5 x 1017 cm -3.
Pseudomorphically grown InGaAs can be used for base regions or (even with severe
lattice-mismatch) to form emitter contacts. Base thicknesses are in the range 400-1000 ,~
(70-180 lattice constants). Excellent control and reproducibility of composition (aluminum content), doping, and thickness are now attainable for these structures. In addition to
the techniques of MBE and MOCVD, chemical beam epitaxy (CBE), including gas-source
MBE (GSMBE) and metallorganic MBE (MOMBE) have been developed. Driven by the
need for high-yield, low-cost high-speed HBT and heterostructure FET (HFET) circuits,
materials technology has improved recently to the point where 10-cm and 15-cm diameter
wafers are available with good uniformity (layer thicknesses of within 10%). Surface
morphological defects have been brought under control, such that the density on
commercially available wafers can be routinely in the 10-30 cm -2 range. Substrates are
typically liquid-encapsulated Czochralski-grown undoped semi-insulating GaAs.
Other important issues for epitaxial growth include the following:
Dopant diffusion: Having a wide bandgap emitter region in principle allows use of base
doping levels of above 2 102o cm -3 with adequate current gain. Increasing base doping
levels can reduce base sheet resistance and contact resistance, as well as allow reductions
in base thickness to lower transit time. The fabrication of devices with such high doping
levels, however, is impeded by the increasing diffusion coefficient of the base acceptors
with increasing concentration [9]. If the p-dopant penetrates into the widegap emitter layer,
the benefits of the heterojunction are lost, and current gain drops rapidly. In MBE growth,
Be tends to diffuse rapidly at typical growth temperatures when incorporated at concentrations of above mid-1019 cm -3, and is also carried forward as a surface component at the
growth interface. In MOCVD growth, Zn diffusion is also enhanced with increasing
concentration, and growth systems tend to show a memory effect. More recently, carbon
has been used as an acceptor in MBE, MOMBE and MOCVD growth. The HBT with
carbon-doped base have demonstrated high gain, with base doping of above
5 1019 cm -3. The introduction of carbon doping is important because (a) it has the
potential of making possible higher base doping and flexible doping designs, such as
graded doping concentration in the base; (b) it allows higher-temperature processing
techniques to be implemented, such as high-temperature annealing of ion-implanted
samples; (c) it can increase reliability, because with ordinary growth conditions Be has
shown a tendency to diffuse during device operation; (d) it allows one to eliminate the
Fig. 4.7. Representativeepitaxial layer structure for A1GaAs/GaAsHBT.
164
undoped setback layer used to allow for Be or Zn diffusion in a standard MBE or MOCVD
structure, which tends to enhance current gain and reduce carrier storage; (e) it makes it
possible for higher-performance structures to be produced with MOCVD, because higher
base doping can be obtained than was previously possible. Carbon doping technology is
continuously improving. It is known that compensation of the acceptors with hydrogen
must be minimized during growth or subsequent anneals, that the reduction in latticeconstant from high carbon concentrations can be compensated with In additions to reduce
stress, and that with proper growth parameters the introduction of nonsubstitutional carbon
at very high doping densities may be minimized.
Recombination Centers: Deep-level recombination in the base-emitter depletion region
dominates the current gain characteristics of most A1GaAs/GaAs large area HBT.
Epitaxial growth at low substrate temperatures, as required to avoid dopant diffusion,
tends to increase the number of recombination centers, and thus worsens current gain. The
presence of a limited amount of dopant diffusion can lead to a situation in which the
depletion region is located in GaA1As of composition intermediate between that of the
emitter and base. For such junctions, the deep level recombination is suppressed by a
factor of niscl2/n2 _ exp 6 E / K T , where niscl is the intrinsic carrier concentration at the
plane of maximum recombination, n i is the corresponding value in the base, bE is the
bandgap difference between these two regions. A tradeoff may thus be required between
the needs for reproducible Vbe and high current gain, which dictate different relationships
between p-n junction and heterojunction.
Parameter control: The tolerances in most of the characteristic parameters (layer doping
and thickness) for HBT fabrication are on the order of 4-10% or greater, which is much
more forgiving than required for the case of heterostructure FET. For example, the turn-on
base-emitter voltage Vbe, for structures with graded composition at base-emitter junctions,
is given by
Vbe
K T / q ln(pbWbI~/qD,,nZA) + RbI~/fl + Relc( ~ --[- 1)/fl
(4.2)
Here, Pb and w b are the doping and thickness of the base region, respectively, and R e and
R b are parasitic (principally contact) resistances for emitter and base, respectively. As a
result of the slow dependence of Vbe on layer characteristics (2 mV change in Vbe produced
by a 10% change in Pb), excellent reproducibility is obtained. Experimental results of Vbe
uniformity are dominated by R e uniformity rather than epitaxial material characteristics.
Other III-V material systems that offer additional advantages over those offered by
GaAs/A1GaAs, and are receiving considerable research attention, include the following
ones.
1) Gao.5Ino.sP lattice-matched to GaAs is being investigated as a widegap material that
can replace A1GaAs [ 10, 11 ]. It features a wide bandgap and a more favorable distribution
of AEc and AE v for npn transistors than A1GaAs. The bandgap of GalnP is dependent on
the degree of Group III sublattice ordering, and is in a convenient range (1.85-1.89 eV) for
blocking minority cartier flow from GaAs bases. The conduction band offset with respect
to GaAs, although believed to be technology-dependent, is relatively small
(AEc = 0.17 eV for representative samples, about 38% of the bandgap difference). The
GalnP does not suffer from the DX problems of A1GaAs, and selective etches that
differentiate more readily between widegap and narrowgap semiconductors are available.
With carbon doping of p + GaAs bases, it is straightforward to achieve p-n junctions that
coincide with the position of the heterojunction, as carbon incorporated into GalnP is
donor-like or neutral (while it acts as an acceptor in the GaAs base). A disadvantage for
GalnP in comparison with A1GaAs is the requirement of exact lattice matching for the
avoidance of misfit dislocations in thick GalnP layers.
The GalnP has already been widely applied in the emitter, and shown to have
advantages due to wider valence band offset, lower deep-level densities, and better
165
ASBECK
selective etching than corresponding A1GaAs layers. High reliability of GalnP/GaAs HBT
has recently been demonstrated [12]. Devices fabricated with MOCVD-grown materials
including GalnP emitter and GaAs base (C-doped at 4 x 1019 cm -3) were shown to
remain unchanged alter 10,000h operation at 246 ~ junction temperature and
2.5 x 104 A/cm 2. An additional significant advantage of GalnP over A1GaAs as an
emitter derives from the improved ability to form passivating ledges in an HBT structm'e.
The use of GalnP in the collector can provide a variety of potential benefits, including
lower Veesat ("offset voltage"), higher breakdown voltage and optimized trade-off of
breakdown voltage with transit time or collector resistance, and reduced saturation charge
storage. A prominent problem is the potential barrier to electron flow arising from the
difference in conduction band energy AEc, as indicated in the band diagram of Fig. 4.8a.
Various strategies have been researched extensively for reduction of the barrier effects,
including:
1. Use of a "setback layer" of n-type or undoped GaAs at the start of the collector
region, as shown in Fig. 4.8b;
2. Use of a doping dipole, generated primarily by n + doping pulse a short distance
into the GalnP collector as shown in Fig. 4.8c;
3. Grading of the collector composition near the base-collector junction. This is
often accomplished with a chirped short-period superlattice, to emulate a graded
composition material without the complexity of maintaining lattice-match with
quartemary alloys, as shown in Fig. 4.8d. Current-voltage oscillations associated
with quantum mechanical tunneling through superlattice states have been
observed for this case.
4. Use of Ga0.89A10.11As in the base, such that the conduction band offset energy is
eliminated. This strategy has allowed device measurements (such as breakdown
voltage and Kirk effect) to be made in a situation in which offset is entirely
absent.
Frequently combinations of the preceding strategies are used. In a representative structure,
the conduction band offset is reduced by means of a setback layer 30-nm thick of GaAs
doped at 3 x 1016 cm -3, followed by a doping pulse 100 A of GalnP with 5 x 1017 cm -3
doping. The penalty for incomplete reduction of the potential barrier effects is typically a
reduction in the maximum Jc value before the onset of current saturation.
C
B
(c)
(a)
B
[C
Chargevs position
Ec(x)
(d)GaAs ~~~-GalnP
.- GaAs
EC(X)
Compositionvs position
Fig. 4.8. Illustrationof conduction band barrierat base-collectorjunction and methods of overcomingit.
(a) Conductionband diagram for GaAs/GalnP structurewithout modification; (b) use of GaAs setback layer; (c)
use of doping dipole; (d) use of chirped superlattice.
166
2) InGaAs/InP and InGaAls/InAlAs: HBTs lattice-matched to InP substrates have

many performance advantages [ 13, 14]. The In0.53Ga0.a7As is the material of choice for the
low bandgap base region. The InGaAs/InP system provides the following advantages for
HBT implementation:
9 Electron mobility is very high in InGaAs (higher than for GaAs, with
~t, = 13,000 cm2/V s in undoped layers). Similarly, the attainable values of
velocity overshoot are higher, and persist over larger voltage ranges, because the
energy separation of F and satellite valleys is higher (0.55 eV in InGaAs). This
leads to very high ft in InP-based HBTs, the highest of any bipolar transistor
technology.
9 To form emitter (and possibly collector) layers, the In0.52A10.a8As layer (with
bandgap 1.45 eV) or InP (with bandgap 1.35 eV) are available, which offer large
bandgap differences and can be doped controllably over a wide range.
9 The recombination velocity at free surfaces of InGaAs is lower than that in GaAs
(103 vs 106 cm/s), thus allowing easier scaling-down of device dimensions
without incurring problems with recombination at emitter edges. Most InPbased HBTs do not use passivating ledge structures, and as a result can benefit
from much smaller parasitic resistances and capacitances.
9 Layers ofln0.53Ga0.n7As are lattice-matched to InP substrates, and have a bandgap
of 0.75 eV, a convenient value for use in the base region, which can provide a low
Vbe value for digital circuit operation with lower power dissipation. The InP-based
HBT can use the same power supply voltages as Si-based bipolars. If necessary,
scaling down of power supply voltages should be possible.
9
Semi-insulating substrates of InP are available, and have higher thermal conductivity than those of GaAs (0.7 W/cmC for InP compared with 0.46 W/cmC for
GaAs).
InP-based devices are directly compatible with optical sources and detectors for
1.3 ~tm and 1.55-m radiation, which are widely used for long-distance communication systems.
Current disadvantages of InP-based HBTs include:

9 To achieve lattice match, it is necessary to grow alloys with a fixed composition.
This requires good control over the epitaxial growth process. The degree of
control required is dependent on the thickness of the layers involved, since it is
typically necessary to remain below the critical thickness of Matthews-Blakeslee
theory.
9 Breakdown voltage has been low for transistors that use the low bandgap material
InGaAs in the collector. To overcome this problem, a variety of structures that
incorporate InP or InA1As in the collector have been reported. To date, these have
not achieved the same high f that is shown by InGaAs collector devices.
9 The saturated electron velocity in InGaAs is low (below that of GaAs). Thus large
InGaAs collector thicknesses are avoided.
9 Hole mobility in InGaAs is lower than that of GaAs, primarily because of the alloy
scattering; thus base resistance is more of a problem.
9 In heavily doped base regions of InGaAs, the Auger recombination process is
expected to be much more significant than in GaAs, because of the smaller
bandgap. This can limit current gain in very heavily doped bases.
9 Carbon doping of InGaAs is more difficult than for GaAs, and the difficulties
167
ASBECK
associated with hydrogen compensation of the acceptors are greater.

9 It is difficult to produce high-resistivity regions by implantation in InP, and
impossible to do so in InGaAs. As a result, device isolation is exclusively carried
out by mesa etching. The Cbc reduction techniques have reduced scope compared
with the case of GaAs.
9 It is difficult to incorporate good Schottky barrier diodes along with HBT using
InGaAs or InP layers.
9 Substrate technology is not as advanced as for GaAs. At its melting point, for
example, InP has a very high phosphorus vapor pressure (>40 atm), which
significantly complicates the crystal growth process.
Despite these complications, InP HBT technology has steadily advanced, and very high
performance has been attained, including ft and fmax of well above 200 GHz [15].
3) InAs- and GaSb-based HBTs: The small bandgap of these materials leads to very
small turn-on voltage Vbe in HBT (as can be seen in Eq. (4.2). This can lead potentially to
power savings in digital circuits. Such transistors will permit many levels of series gating,
for example, in current-mode-logic circuits that use present standard power supply
voltages (3-5 V). Moreover, as power supply voltages are scaled to lower values in the
future to allow short gate length CMOS devices, these HBT may be the only usable bipolar
transistors. In the design of the low-voltage HBT, it is critical not to reduce the bandgap to
such an extent that there are significant leakage currents at room temperature. However,
wide bandgap emitters and collectors can mitigate the leakage current problems significantly. A current drawback is that no lattice-matched substrate is widely available.
4) GaP/AlGaP HBTs have particularly high bandgap. As a result, the junction leakage
currents can potentially remain small even at very high temperatures. This material system
is potentially important for high-temperature electronics (such as required in engine
controls, oil-well logging, etc).
5) GaN/AlGaN HBT are promising for high-voltage and high-temperature electronics.
The very high bandgap of GaN (3.4 eV), its high breakdown field, Ebk (>3 MV/cm), high
electron velocity (>2.5107 cm/s at an electric field of 100kV/cm), and high thermal
conductivity (1.3 W/cm K) are very favorable for high-voltage, high-power devices [ 16].
For example, the Johnson figure of merit, indicative of the maximum achievable breakdown voltage x f product (BV ft) is proportional to Ebk Vsat. For GaN, this figure of
merit is higher than for Si by a factor of more than 20. Research efforts to produce
heterojunction FET with A1GaN/GaN materials are well advanced. It would also be
desirable to make HBTs with this material system, in order to obtain the advantages of
higher power density, absence of surface and buffer layer effects, and ability to produce
velocity overshoot by appropriate bandgap engineering. However, HBT implementation in
the nitrides has been hampered by the difficulty of p-type doping in the nitrides, together
with low hole mobility. The conventional acceptor is Mg, and while it can be incorporated
at densities above 1019 cm -3, its ionization energy is very large (>0.15 eV), and as a result
only a small fraction of the acceptors incorporated are ionized at room temperature.
4.3.
HETEROJUNCTION BIPOLAR TRANSISTOR PROCESSING

TECHNIQUES
Processing approaches for Ill-V-based HBT differ considerably from those developed for
Si bipolar transistors. In fact, they are far simpler, inasmuch as the key structural features
of the HBT are produced by the epitaxial growth process. The objectives of the remaining
processing steps are to make contact with the different device layers and to isolate
individual devices. Technology for GaAs HBT has evolved rapidly because relatively
mature processes for GaAs ohmic contact formation, etching, and ion implantation have
168
been available. There is at present a great deal of commonality between the process
sequence employed for GaAs HBT fabrication and that for GaAs FET-based circuits (and a
single processing facility can accomplish both tasks).
Important processing issues for HBTs include the following items.
Emitter-base self-alignment: Key dimensions of HBT must be reduced to minimize
parasitics, particularly base resistance and base-collector capacitance. Overall minimization of the device dimensions is particularly important for digital applications because
scaling down device size leads to lower currents (and thus lower power) while keeping
constant the current density and, approximately, the speed. However, scaling down device
size must be done in a coordinated fashion. For example, a decrease in emitter area must be
accompanied by a corresponding reduction in base-collector junction area, in order to
avoid an increase in the parasitic capacitances. Device size reduction is most conveniently
carried out with self-aligned processing techniques that can accurately produce very smallgeometry HBT while employing high throughput optical lithography.
In an HBT structure, three patterns must be critically aligned with one another. These
are: 1) the active emitter area; 2) the emitter contact; and 3) the base contact. The lateral
extent of the base contact must also be limited. Several self-aligned processes have been
demonstrated to eliminate one or more mask registrations (or at least render the
registration noncritical). The simplest approach makes use of the shadowing effect of
the emitter metallization during evaporation of the base contact metal to define the base
contact area, as shown schematically in Fig. 4.9. For subsequent device fabrication, a key
process element is a planarization step, where a controlled depth etch through a dielectric
(typically polyimide) is carried out to uncover the topmost device feature, such as the
emitter contact, while leaving other device structures buried below the surface. Other
fabrication approaches make use of sidewall spacers at the edges of the emitter contact,
and use of refractory contacts based on InAs cap layers [17, 18]. Another alternative is the
dual-liftoff approach, in which the base metal and a dielectric layer coveting it are both
patterned simultaneously with a photoresist liftoff process [19]. This simple approach
requires the use of a low-temperature deposited dielectric. It has been used to produce
extremely high fmax devices (beyond 200 GHz).
Surface passivation: The recombination velocity at the GaAs surface is rather high (of the
order of 106 cm/s). A significant component of base current associated with electron-hole
recombination can be generated at emitter edges if HBT surface is not passivated
appropriately. This recombination component increases in importance as emitter size
shrinks and tends to limit current gain to values of the order of 10 for 1 gm emitter width if
special care is not exercised in device processing. Current gain can be increased by grading
the base composition to establish quasi-electric fields that drive electrons away from the
exposed surface, using extremely thin bases, by surface treatments with NaS.9H20
(although this has not been established as a permanent effect), or by covering the surface
Fig. 4.9. Cross section of representative HBT with emitter/base self-alignment.
169
ASBECK
by thin A1GaAs layers (termed ledges). The A1GaAs layer can be p-type or can be lightly
doped n-type, and thin enough so that the layer is depleted by surface Fermi level pinning
[20]. The structure of an A1GaAs/GaAs HBT with a depleted A1GaAs ledge for emitter
periphery passivation is shown in Fig. 4.10.
Isolation: The semi-insulating GaAs substrate directly provides a high degree of isolation
between neighboring devices (typically above 108 f~/D per square). It is necessary,
however, to eliminate the conductivity of the unused regions of the HBT epitaxial layers
(which are deposited across the wafer). This is accomplished by ion implantation of boron,
oxygen, helium or hydrogen, or by mesa etching, or trench etching. The first approach is
the simplest, provided the epilayers are not more than 2 ~tm thick. It allows device-todevice spacings down to 3 - 4 ~tm.
Etching control: In a representative structure, it is necessary to access the base, by etching
through 1500-2000 A of GaAs and GaA1As, and then stopping the etch within 100 nm
after reaching the base layer. The required control is marginally possible with standard
techniques. This fabrication task is greatly simplified due to the availability of composition-selective etches. Etching of GaAs, stopping at A1GaAs, is made with CC12F2 plasma.
The selectivity is typically greater than 200: 1. Etching of A1GaAs with respect to GaAs
may also be accomplished with selectivities of greater than 10:1 using wet chemical
etches. Wet chemical selective etching is even more straightforward if GalnP/GaAs layer
combinations are used. Similarly, InGaAs/InP layers can be etched with excellent
selectivity.
Parasitic capacitance reduction by proton implantation: The base/collector junction
capacitance can be greatly reduced by implanting oxygen or protons under the extrinsic
base areas. Implantation-induced damage compensates the n-doping in the collector
regions below the base contacts. Accordingly, the implanted regions constitute isolation
regions between the extrinsic base and the collector layers, decreasing their capacitive
coupling. Figure 4.11 shows the resulting HBT structure [19]. For the implanted sample
shown, the capacitance is almost independent of bias voltage, and two times lower than the
value obtained without proton at zero bias. For use in high-speed transistors, the proton
implantation should not perturb the resistivity of the p-type extrinsic regions. This is
feasible because: a) the doping of the base is 103 times greater than that of the collector; b)
the implant damage peaks well below the surface; and c) donors tend to be more
susceptible to compensation by implants than acceptors.
Reliability: It has been found in a number of cases that, without special care in processing,
the characteristics of A1GaAs/GaAs HBT changed when the devices were operated at high
temperatures, at high current density, and for long times. A prevalent mode of degradation
in MBE-grown wafers with Be-doped bases is a progressive increase in the value of Vbe
needed to achieve a given collector current, coupled with a decrease in current gain. This
phenomenon has been attributed to diffusion of Be during device operation (probably as a
result of recombination-enhanced defect motion). As Be becomes incorporated into the
Fig. 4.10. HBT structure containing A1GaAsledge passivating layer. The lateral currentJt is suppressed.
170
Fig. 4.11 HBT structure containingburied implant for reduction of base-collector capacitance.
emitter, a potential barrier for electron injection is set up and the advantages of the
heterojunction are lost. This phenomenon can be avoided by using special (As-rich)
growth conditions for the Be-doped layer, or by using carbon doping for the base.
Additional modes of degradation can be present, associated with emitter ohmic contacts
and with device periphery current. Accelerated lifetesting has recently shown that with
proper precautions the extrapolated lifetime of HBT at 125 ~ junction temperature is
above 108 h [21].
Collector-up structures: Most research efforts in A1GaAs/GaAs HBTs have focused on
structures for which the emitter layer is uppermost, and the collector layer is buffed below
the wafer surface. Structures in which the collector is uppermost on the wafer have also
been explored, however. Kroemer pointed out that collector-up devices potentially could
have low values of base-collector capacitance [6], if the extrinsic base-collector region is
etched away. As a result, they could potentially have very high microwave performance. A
key problem with the implementation of collector-up bipolar transistors is the severe
reduction of current gain associated with carriers injected from emitter into the base in
regions not covered by the collector ("extrinsic regions"). Heterostructures can provide a
unique method of suppressing this unwanted injection. If properly designed, the turn-on
voltage of the extrinsic base-emitter p-n junction can be greater than that of the intrinsic
device, so that current injection in these parasitic areas of the device is greatly decreased.
Experimental results demonstrating this effect have been obtained by various groups. A
separate application of collector-up HBTs has been devised by Yuan et al. at Texas
Instruments [22], for the implementation of heterojunction integrated injection logic
(HI2L). This structure makes clever use of numerous advantages of the A1GaAs/GaAs
system. The switching element is an N-p-n HBT with its collector on the top wafer surface
and its A1GaAs emitter buffed below. An n + substrate is used, connected to all the emitters
of the transistors. This provides a low inductance voltage source, and eliminates the need
to route around the power supply lines. Implanted p-regions in the extrinsic base area are
made; the implant is made deep enough that the p-n junction extends into the underlying
A1GaAs emitter layer, suppressing extrinsic injection. This overcomes one of the
significant problems in Si I2L, because charge injected into the extrinsic base regions
contributes both to a decrease in current gain and an increase in input capacitance. The I2L
approach permits very high packing density, and has been used to implement VLSI-level
digital circuits (with more than 10,000 gates on a chip).
4.4.
HETEROJUNCTION BIPOLAR TRANSISTOR DC

CHARACTERISTICS
Collector currem in HBTs can be controlled by: a) transport across the base (as in
homojunction transistors); b) if there is an energy barrier at the emitter-base junction, by
171
ASBECK
transport over the barrier; or c) exhaustion of carriers in the emitter (Fig. 4.12). For case a),
the simplest, collector current density Jc is given by
Jc - q exp(qVbe/kT)/ f P(x)/[n2(x)Dn]dx
(4.3)
(known as the Moll-Ross-Kroemer relation, a generalization of the standard result for

homojunction transistors). Here the integral is done over the quasi-neutral base. In the
more general case [23],
Jc-
l/J2 + l/J3) -1 exp(qVbe/kT)
(l/J1 +
(4.4)
where J1, J2, J3 are current expressions corresponding to the different limiting mechanisms
(possibly voltage dependent) .
Base current in HBT can be dominated by any of several mechanisms. Injection of
minority carriers into the emitter typically is eliminated as the principal source of base
current by appropriate choice of emitter energy gap. Recombination in the quasi-neutral
base is also typically small because thin bases are chosen to minimize transit time.
However, it can become an important issue if very heavy doping of the base is employed,
particularly for InGaAs bases (in which Auger processes may dominate). For most devices
reported to date, recombination in the emitter-base space charge region and at the emitter
edges are the dominant contributions to base current.
Representative dc Ic vs VCe characteristics are shown in Fig. 4.13 for a device with
2.2 ~tm 2.2 ~tm emitter. HBT dc characteristics differ from those ofhomojunction devices
in various ways, including the following:
9 Typically current gain decreases with increasing temperature because the energy
barrier for electrons (in Npn structures) is lower than that for holes, and thus the
activation energy for collector current is lower than that for base current. The
current gain in HBT tends to increase at low temperature. Below 77 K, it may drop
because diffusion is not an effective process at low temperature. However, this
decrease can be avoided if compositional grading of the base is used to establish
an appropriate quasi-drift field.
9 An offset voltage, Vcesat, on the order of 0.1-0.3 V appears because of different
turn-on voltages for the base-emitter and base-collector junctions, in devices with
asymmetric structures.
9 The HBT have very high Early voltage, because their base Gummel numbers are
very high. With representative base doping of 4 x 1019 cm -3 in 600-nm thick
layers, the aggregate number of base dopants (Gummel number) is higher by more
than 20x times the value in typical silicon bipolar transistors. The high base
doping effectively shields the base-emitter junction from the collector voltage.
9 Current density is virtually never limited by high injection effects in the base.
Base pushout (or Kirk effect) remains an important limit on collector current
C.
E ~
N~
\~
1
.
~////#####///////d
.
N w/#///a
n+
I--- 1
.
S-I.
i
Fig. 4 . 1 2 .
ii
|l
t
i
C o l l e c t o r - u p H B T structure.
172
_j
5,
il
.....
........
i .........
<
E 3
o
3
VCE IV)
IB: 5/~A/STEP
Fig. 4.13. RepresentativeI c VS Vce characteristicsof an A1GaAs/GaAs HBT.
density, but the effect is reduced due to electron velocity overshoot.

9 Current gain frequently decreases at low collector current. The predominant base
current component in large area devices is emitter-base space-charge region
recombination, characterized by an ideality factor of n = 2.
9 In small devices the recombination of electron-hole pairs at the edges of the
emitter is generally important, due to high surface recombination velocity. Unless
special considerations are taken, dc current gain is limited to values on the order
of 10 for devices with 1 ktm emitter width. As mentioned in Section 4.2, various
techniques have been developed to increase current gain.
The I-V characteristics of III-V HBT can be simulated with moderate accuracy using
conventional drift-diffusion approaches. Particularly if graded B-E junctions are employed,
the most important issue in the determination of the turn-on voltage Vbe is the degree of
bandgap narrowing that occurs in the heavily doped base. The mobility associated with the
minority cartier electrons in the base also must be carefully considered. This mobility is
enhanced dramatically over what would be expected for the large doping of the base,
due to the shielding effect of the holes. Beyond this, however, the drift-diffusion calculations fail to take into account important phenomena, including details of electron
transport across abrupt heterojunctions at the base-emitter (or base-collector) junction, and
transient velocity overshoot in the base, or more importantly, in the base-collector junction
region.
4.4.1. Transport in Abrupt Heterojunctions

The band diagram corresponding to HBT with abrupt heterojunctions exhibits sharp
changes in electron energy, and frequently exhibits high barriers to cartier flow, as
illustrated in the band diagram of Fig. 4.14. Carrier flow across the base-emitter
heterojunction in many circumstances resembles the transport across Schottky barriers
in metal/semiconductor structures. As is well known for Schottky barriers, there are a
173
ASBECK
Fig. 4.14. Schematic conduction band diagram of the base-emitter junction of an abrupt HBT,
illustrating mechanisms for current flow across the barrier.
variety of mechanisms that cause the effective barrier to be lower than that calculated on
the basis of simple band diagrams:
1. quantum mechanical tunneling through the barrier by carriers whose energy lies
near the n-type emitter Fermi level, or which are thermally excited partly over the
barrier;
2. Schottky barrier lowering; while this effect is not as pronounced as occurs with a
metal contact, there is nonetheless an image charge associated with an electron
crossing the base-emitter junction due to the holes in the HBT base region; and
3. local reduction in barrier height due to fluctuations in impurity concentrations
and alloy compositions.
4.4.2.
Emitter Edge Effects
The emitter-size effect, brought about by recombination at emitter edges, is detrimental for
current gain and reliability. A widespread method of dealing with this problem is to use
thin regions of emitter material outside the intrinsic emitter, as shown in Fig. 4.10. For the
condition of zero applied base-emitter bias, the thin ledge region is fully depleted and
nonconducting and thus it isolates the edges from the intrinsic device. The presence of the
ledge nonetheless has a subtle effect on the I-V characteristics. As the applied bias is
increased (during normal transistor operation), the potential drop across the depletion
region in the ledge is lowered, and for sufficiently thick and heavily doped ledges, the
ledge may begin to conduct. In doing so, the effective emitter area increases (leading to
increased collector current and base-emitter capacitance), the current gain drops and
reliability is compromised. Figure 4.15 illustrates, for example, computed I c vs Vbe curves
exhibited by an HBT with partially pinched off ledges, and for comparison a devices whose
ledges provide ideal isolation. The turn-on characteristics of the ledge resemble closely the
behavior of a junction FET, for which the base layer of the HBT acts as JFET gate. It has
been shown [24] that the conductivity of the ledge can be estimated to be of the form
a-
a o exp(qVbe/KT )
O" = O'th - l - K ( V b e - Vth)
for Vbe < V t

for Vbe >
(4.5)
Vt
Here Vt is an effective threshold voltage for the "ledge FET", given by

Wt - -
V b i - yqNdw2/e,
(4.6)
where ), is a constant of order 0.2, and N d and w are the doping and thickness of the ledge,
respectively. It is desirable to make Vt as large as possible, to avoid the detrimental effects
174
1 .E-02
-i
1 .E-03 -
1 .E-04
~"
I:
lira
,i
....
1.E-05
....
I.E-06
1E-07
9
I .E-08
1 .E-09
ledge)
Ib (with
ledge)
o '~
I,,,,
0=
-'
/r
. . . . . . . ,,
(intrinsic)
0.8
1.2
(intrinsic)
....
i ......
1.4 1.6
Vbe (V)
1.8
Fig. 4.15. Ir and I b vs Vbe(Gummelplot) for HBTs with ledges for emitter edge passivation. Curve (a)
corresponds to ideal ledge isolation, while curve (b) represents partially conducting ledges.
of ledge leakage. This implies thin, lightly doped emitter regions. If the emitter layer is too
thin, however, hole current injection into the emitter will not be suppressed. Figure 4.16
compares the base current (dominated by hole injection) computed for devices with
emitters of varying thickness, of either GalnP or Alo.25Ga0.75As, assuming emitter doping
3 x 1017 cm -3 (and A1GaAs composition graded over 150 A. near the junctions) under the
condition Jc = 104 A/cm 2. The results indicate that GalnP allows much thinner emitters,
which are conducive to more effective ledges. Experimental results have shown that
appreciable gain can be obtained with GalnP emitters down to 100 A in thickness.
4.4.3.
Self-Heating
As a result of the high current density supported by HBT and their high voltage-handling
capability, high-power density frequently must be dissipated. The thermal conductivity of
GaAs is 3 lower than that of Si, and that of InP is 2 lower, resulting in higher thermal
10000
1000
~
'
,.,
,
IGaAs
,.~
E 100
.a
---j
in
, , ,
....
n,,Inp
. . . . .
.~
20
40 60
80 100
Emitter Thickness (nm)
Fig. 4.16. Simulatedcurrent gain variation for HBT with various emitter thicknesses, with A1GaAsor
GalnP emitters.
175
ASBECK
resistance. Typical values ofRth x A e for GaAs devices are in the range 10,000-20,000 ~
pm2/W (depending strongly on device size and substrate thickness). Self-heating effects
can be significant, and may include the following items.
1) R e d u c e d current gain gm a n d f . The drop in current gain with increasing
temperature is a key difference between heterojunction emitters and homojunction emitters
(resulting from the different activation energies for hole current in the two cases). For
many GaAs devices, dc current gain drops by 0.25-0.5% ~ -1, although by balancing
different mechanisms for base current, the coefficient can be minimized. Transconductance
drops in inverse proportion to absolute temperature (leading to -0.3~176 -1 variation).
The ft is found to decrease approximately in accordance with - 0 . 2 % ~ -1.
2) Negative output conductance: I c v s Vce curves for HBT have a characteristic shape,
shown in Fig. 4.17. The drop in I c with increasing Vce at a fixed I b is due to progressive
increase in temperature as the power dissipation increases, coupled with dropping current
gain. The effect manifests itself only at frequencies below 1-10 MHz.
3) Thermal runaway: In a manner similar to Si homojunction transistors, I c increases
with temperature at a fixed Vbe. Thus in a transistor with multiple emitter fingers (which
share the same Vbe) the hottest finger will carry the most current. This situation can lead to
further heating of the hot fingers and a dynamic runaway condition. It is interesting to note
that the effect manifests itself as a sharp drop in the I Cv s Vce curves, as shown in Fig. 4.17
at Vce "- 5 V. This nonintuitive result stems from the dropping current gain with increasing
temperature in the hot emitter finger that hogs the current [3].
Thermal effects are frequently of sufficient importance that they must be taken into
account in circuit level modeling of the transistor characteristics. To lowest order, it is
possible within standard SPICE simulations to include a subcircuit that computes the
temperature rise of an individual transistor, and makes lowest-order (linear) corrections to
Vbe and to the base current, as shown in Fig. 4.18. For more accurate results, it is necessary
to account for the complete dependence of I c, I b, and TF on temperature, which requires a
different formulation of the bipolar device equations than is contained in the standard
device equations.
Heatsinking approaches have received much attention in the effort to combat the
negative effects of self-heating. As illustrated in Fig. 4.19, thinning the substrate (from the
typical value of 635 pm for the starting material) is beneficial. Monolithic microwave
integrated circuits oRen use 75-100 pm GaAs substrates. Aggressive thinning to 25 pm
0.12
0.1
0.08 ~mmmm
_o o.~ - - ~ ~
t
Illmmllllllll~nm l ~ l l n
0.114 ~
0.02
m,
IIIIIIIII
. .
10
12
Vce (V)
Fig. 4.17.
I c vs Vee curves for HBT with pronounced self-heating, exhibiting a region of thermal
runaway.
176
Rcx%
qcs
v
Rcl
|
bcx
cxx
Rbl
ex
Rbx
,b.l
I~--T-- .-Y-I Ibel
Re
O
Fig. 4.18. Circuit model of HBTs that includes self-heating effects.
has also been done. Gold-plated vias partially etched through the substrate underneath
HBT collectors have been demonstrated. Flip-chipping devices to a high thermal
conductivity material is an attractive possibility, as the thermal resistance of GaAs is
largely avoided. However, the small emitter dimensions make direct thermal connections
to the transistor topside difficult to produce. The geometry is more favorable for low
frequency (L-band) microwave HBT with large emitter areas (6-10 l.tm). An arrangement
_9~ -8
~......./..~.......~t '~
--
--"
~--2
5-10/~m
DH.:?'/////////////~'~
THIN SUBSTRATE
PARTIALVIA
C
5-10vm
i
DIAMOND/
OR M E T A L
FLIPCHIP
LIFTOFF
%'%-METALGROUND
AND HEATSINK
Fig. 4.19. Variousheatsinking approaches employedwith GaAs HBT.
177
ASBECK
where all the emitters are tied together to a common grounded heatsink layer has also been
demonstrated. In addition to these measures, the thermal runaway effect in multifinger
devices can be eliminated by resistive ballasting of the emitter or base of each device
finger.
4.5.
HETEROJUNCTION BIPOLAR TRANSISTOR RF

CHARACTERISTICS
High-speed characteristics of HBTs are dominated by the same delays as occur for
homojunction bipolar transistors (BJTs). In HBT, however, the various time constants tend
to be smaller. The current gain cutoff frequency f is given (as in the case of BJT) through
the relation
ft = 1/2~ZZec
(4.7)
Within the charge control framework, the effective transit time Zec is the ratio of the
incremental charge Q6 stored in the device to the corresponding increment in forward
current Jc.
"tee = d Q b / d J c
(4.8)
Zec has various components associated with the different device regions:
"/Tec -" "/Te -]- "Cb -]" Zsclc -~- ~ecap -~- ~ccap
(4.9)
1) Emitter delay "ce tends to be small, because with wide gap emitters, minority carrier
charge storage in the quasi-neutral emitter is negligible. Nonetheless, there may be some
nonnegligible contributions due to charges stored near the base-emitter junction, if the B-E
junction is graded over large distances.
2) Base transit time Zb is also generally minimized by design because thin base layers
can be chosen without excessive base resistance or low punchthrough voltages. For thin
base layers, the appropriate transit time does not scale as W~b,but rather as Wb; the effective
diffusion velocity of carriers is limited to the effusion velocity, of about 2 x 107 cm/s in
GaAs.
3) Base-collector depletion region transit time Zsclc frequently becomes the limiting
factor in the overall transit time. If the BC depletion width chosen is very short, the device
f may rise significantly, but the corresponding increase in Cbc may then limit circuit speed.
In III-V devices, the velocity of carriers tends to overshoot the steady-state saturation
velocity at the beginning of the base-collector depletion region. The average carrier
velocity decreases, however, with distance from the base. It has been shown that for the
case of a spatially varying cartier velocity, the effective delay to be included in "/Teccan be
approximated by x m [25]
Xm
Zsclc --
f(1
X/Xm)dx
1,'(X)
(4.10)
where x m is the extent of the collector depletion region. This weighted average tends to
favor the regions where the electron velocity is particularly high, increasing ft.
4) Emitter capacitance charging time Zecap is given by K T C b e / q J c. This is also
typically small, because of the low doping levels generally chosen for the emitters,
which minimizes emitter capacitance Cbe. This term, however, will dominate at low current
levels (because of the high value of base-emitter junction dynamic resistance).
5) Collector capacitance charging time Zceap is given by Cbe ( K T / q J c + R e + Rc) ,
where R e and R c are parasitic series resistances associated with an emitter and collector. As
for the case of emitter capacitance, this contribution becomes appreciable at low current
178
levels. With npn HBTs, the contribution of R c is typically much smaller than in Si devices
because of the high electron mobility.
Representative characteristics o f f vs Jc are shown in Fig. 4.20a.In HBTs, ft typically
reaches a peak at a high value of collector current density (> 105 A/cm2). Fall-off o f f at
low current densities is associated with the preceding terms (4) and (5). The fall-off o f f at
high current densities is associated with base push-out effects. Informative details o f f
behavior are exhibited in plots of Zec vs Jc, as shown in Fig. 4.20b. For Si bipolar
transistors, tec varies nearly linearly with Jc above the minimum (corresponding to nearly
constant values of Cbe, Cbc and base and collector transit times). For III-V HBT's the
behavior is more complex, as shown, for example, in Fig. 4.20b. This behavior has been
attributed to varying electron velocity in the collector as the electric field changes in the
collector depletion region, and is associated with the velocity-field characteristics of
electrons in GaAs [26].
Ballistic transport structure: The transient velocity overshoot experienced by electrons
entering the collector depletion region increases the ft of GaAs HBT [27]. Special designs
have been introduced to increase the distance over which the overshoot is experienced,
leading to the ballistic collection transistor [28]. By creating a region of low electric field,
so that carriers are not scattered from the gamma conduction band minimum to satellite (L
valley) minima until the electrons have traveled distances greater than 1000 A, Ishibashi
and Yamauchi have demonstrated a very short transit time within ballistic collection
transistors (BCT). The band diagram of a BCT is shown in Fig. 4.21. The velocity
overshoot can have a significant effect on theft of the device, which has reached as high as
170 GHz. The velocity overshoot also has a significant role in increasing the maximum
current density Jmax that can be carried by an HBT without incurring base pushout.
Velocity overshoot also contributes to reduced base-collector capacitance.
In addition to ft, a key figure-of-merit characterizing the high-frequency performance of
transistors in the microwave region is the maximum frequency of oscillation, fmax (defined
such that the high frequency power gain G follows G =f2max/f2 ). An approximate
expression for fmax of bipolar transistors is
fmax -- v/ft/8rcRbCbc
(4.11)
Improved expressions are given by Das [29] and others. The fmax of HBT can be markedly
high, as a result of their high base conductivity, low base-emitter capacitance, low base
transit time, and velocity overshoot at the base-collector junction. The highest values fmax
are obtained with structures that succeed in suppressing base-collector capacitance,
particularly the portion associated with extrinsic base regions.
60,
e,.'
50,
40
2:: 30.
(9
li
/
f
l
0
Ic (mA)
4
1/Ic (1/mA)
Fig. 4.20. Representativecurves of (a)f vs Jc, and (b) Zec vs Jc, for an AIGaAs/GaAs HBT.
179
ASBECK
"Launcher"
[Emitier
lcolleclor "l
9 !-:
;r
|=
--
;.,..i.
illlll
p+
n?
'
II
ii
Ey
: L..._
:i
i:; I
:,
I
Fig. 4.21. BCT structure to maximize electronvelocity overshoot in the collector. [28].
4.5.1.
Saturation Charge Storage
When the base-collector junction is forward-biased (corresponding to the condition of

transistor saturation), charge is stored in the B C depletion region. In conventional HBT, the
majority of the stored charge is associated with holes injected into the collector, as a result
of the very large ratio of doping density in the two sides of the junction. As shown in Fig.
4.22a, in a DHBT, the larger bandgap of the collector can suppress the injection of holes
into the collector with a forward-biased BC junction, just as the wide bandgap emitter
eliminates hole injection into the emitter. Accordingly, dramatic reduction in saturation
charge storage has been measured [30]. The presence of large negative transients for the
SHBT and their absence for the DHBT shown in Fig. 4.22b is evidence of saturation
charge storage suppression. A similar effect can be produced by Schottky clamping of the
collector, but this comes at a significant cost in terms of increased Vcesat (of order 0.7 V for
a GaAs Schottky diode).
4.5.2.
Linearity
For many analog and microwave applications, linearity of amplifier characteristics is a key
concern. The HBT amplifiers have been found to have exceptionally good linearity, in both
Class A biasing conditions (which are used to maximize linearity albeit at the cost of low
efficiency) and Class AB conditions (where linearity is partially sacrificed in order to
improve power-added efficiency). With respect to GaAs MESFET, HBTs benefit from
having much lower and more reproducible output conductance. With respect to Si bipolar
transistors, HBTs have less variation in base resistance (due to absence of current
crowding) and lower output conductance.
The linearity of HBTs is surprising in light of the highly nonlinear (exponential)
relationship between I c and Vbe. However, at the current levels used in most amplifiers, the
emitter and base parasitic resistances and inductances linearize the device by series
feedback. Additionally, amplifiers often are designed with nonzero source impedance.
Figure 4.23 shows the calculated variation of transconductance and input capacitance with
bias for a representative amplifier. These plots show relatively small change in the
equivalent small signal parameters over the range of output current conditions covered
by a representative power amplifier under large signal excitation.
180
Fig. 4.22. (a) Schematic storage of minority cartier charge in the transistor during saturation. (b) band
diagram of DHBT showing suppressionof hole storage in the collector.
The dominant factor in controlling the nonlinearity of HBT power amplifiers has been
found to be variation of Cbc with output voltage. This variation can be minimized by
design, for example, by providing the HBT with a punchthrough collector structure (where
the n-collector region is fully depleted over most of the voltage and current regime of the
amplifier).
The high linearity of HBT amplifiers in Class AB operation is a key feature that has
contributed to making HBT the devices of choice for power amplifiers in handsets for
wireless communications.
4.5.3.
Noise
The RF noise in HBTs has been shown to have sources similar to those in Si bipolar
transistors. Fundamental sources include shot noise for collector and base currents, as well
as Johnson noise associated with base and emitter resistors. For low-noise operation,
biasing at very low current is appropriate to avoid shot noise components. It is also
beneficial to choose device size as large as possible consistent with the needed value of rf
gain, so that parasitic resistance is as low as possible. The minimum noise figure measured
for GaAs HBT in the low microwave regime (2 GHz) is in the range 1.2-1.5dB. The values
are relatively higher than has been obtained in state-of-the-art pHEMT, because the best
FETs have lower value of gate resistance that the base resistance of HBTs and they have no
dc input current at all. Nonetheless, the bipolar rf noise figure is low enough that they are
worthwhile in a multitude of low-noise amplifier applications in which cost-effective
solutions are desired rather than ultimate state-of-the-art.
Flicker or 1/f noise is also of considerable significance in circuits ranging from
oscillators and mixers to A/D converters. In III-V FET technology, surface and interface
state densities adversely affect low-frequency noise (through generation-recombination
currents, and their associated effect on modulation of the output current). The HBT device
structure inherently minimizes the effects of interfaces and traps. However, defects
associated with the emitter edges and surfaces of the base layer can have an impact on
the low frequency noise. When careful attention is given to these contributions, low noise
comer frequencies (fc) have been measured. Values offc in the kilohertz range have been
achieved, although the results are dependent on device size. The excellent low frequency
181
ASBECK
0.01
A
--*-- 1GHz
-4_. 5GHz
..
_-.
.~
,,
.,
ml
L__
im
.i
- - ~ - 10GHz
o1
0.2
0.4
9,n~
0.6
0.8
--X-- 20GHz
1.2
Jc ( m A / u m 2 )
~
~'
-10
"-
~-~
l-x_
~-~0
"O
_- "40
9~
c
a
.60
-70
n_
-80
"
- ~
--~-IGHz
.....
-,d~10GItz
'
0.2
''
0.4
0.6
0.8
Jc (mA/um2)
Fig. 4.23. Variationof transconductance gm and C.a vs Jc for a representative HBT, illustrating the
linearization effect of emitter resistance and inductance.
noise performance has made HBT preferable to FET for use in a variety of circuits such as
microwave oscillators.
4.6.
HETEROJUNCTION BIPOLAR TRANSISTOR

APPLICATIONS
Application opportunities for III-V HBT roughly parallel those for Si bipolar transistors,
except that with III-V HBT the operating frequency can be considerably higher, breakdown voltage can be improved, output conductance can be decreased, and monolithic
microwave circuits can be easily implemented with semi-insulating substrates. The HBT
also have numerous advantages with respect to FET made in the same material system.
1) The HBTs with high ft can be fabricated reproducibly and with high yield. In HBT
the dimensions governing electron transit time are established by epitaxy, which is easy to
control. In FET, electrons traverse the device laterally, with a distance of travel determined
by the lithographically defined gate length. It is a major challenge for FET fabrication to
reproduce the small dimensions needed for high ft.
2) The HBT provide higher current drive capability than FET (as measured, for
example, on a per unit chip area basis).
3) The transconductance of HBT is higher than that of FET by a factor of 10-100,
because the output current varies exponentially with the input voltage. This variation is
substantially more rapid than that for FET (typically linear or quadratic).
4) The threshold voltage for turning on the output current is much better matched
among HBT than among FET. In the HBT case, the voltage is established by the built-in
potential of a p-n junction (primarily dependent on the semiconductor composition and
easy to reproduce). In the case of FET, the threshold voltage is governed by the thickness
182
and doping of the channel, and is relatively hard to control.

5) The HBT have little output conductance, because the control region of the device is
well shielded from the output voltage by the highly conducting base.
6) The HBT can have reproducibly high breakdown voltage, by appropriate design of
the collector region.
7) Because the intrinsic HBT is comparatively well-shielded form the wafer surface
and substrate, the HBT do not experience the trap-related frequency dispersion of device
characteristics, hysteresis, and back-gating effects ordinarily encountered in III-V FET.
There are also some natural advantages of the FET structure over the HBT in some
applications. These include the following:
1) FET, when appropriately biased, do not have dc input current (leading to effectively
infinite dc current gain). This is helpful for high-input impedance circuits and dynamic
circuits;
2) FET do not store charge when operated in saturation mode, as is the case with
bipolar transistors (including HBT); this simplifies circuit design in some logic contexts,
and allows pass gates; and
3) the microwave noise figure of FET has been lower than that obtained for most HBT,
at least at frequencies of 10 GHz and higher.
Digital, analog and microwave circuits all can benefit from HBTs. A brief summary of
recent demonstrations is provided in what follows.
4.6.1.
Digital Circuits
The highest performance digital HBT circuits are configured in nonsaturating topologies
with N-p-n HBT such as the emitter coupled logic (HECL) and current mode logic
(HCML). The integration level of HECL and HCML-type HBT approaches is currently in
the range of 1-5K devices. A high packing density A1GaAs/GaAs HBT I2L (HI2L)
technology has also been successfully developed to achieve LSI-VLSI capabilities.
The switching speed of HCML and HECL logic gates is a complex function of device
parameters, load capacitance and required voltage swing, for which no comprehensive
analytic expression is available. A simplified treatment of the gates (based on small signal
analysis), however, reveals the key issues for circuit optimization. For CML gates, the gate
propagation delay z d may be estimated by
z d -- (1 + gmRL)RbCbc + Rb(Cbe -Jr-Cd) -Jr-gml(eCbe -+- 0.5Cbe d- 0.5Cd)
(4.12)
where gm is the effective transconductance of the switching transistor, R b, Cbe, Cbc, and C d
are its base resistance, base-emitter, base-collector and diffusion capacitances, respectively,
and RL and CL are load resistance and load capacitance. The effective transconductance gm
in this large signal switching application is given by the maximum collector current Ic,
divided by the logic swing VL. With HBT technology, it is possible to obtain very small
values of R b and Cd (which is inversely proportional to ft), in comparison with
homojunction transistors. As a result, very low switching delay times can be obtained.
Experimentally, gate delays measured in HBT ring oscillators have been well below 10 ps,
and frequency dividers have operated to above 40 GHz. To obtain the highest speed
operation, high values of I c are required, and thus high power dissipation. To date, most
circuit development has focused on highest speed performance, without elaborate minimization of power. For levels of integration up to 2 K gates per circuit, it is typical to have
power dissipation of 1-4 mW/per gate. In future work, it is anticipated that aggressive
scaling of the device sizes will be carried out, which will reduce the device input
capacitance and allow power reduction at constant speed; attention will be given to
higher levels of integration.
Representative examples of HBT high-speed digital circuits include recently reported
multiplexer and demultiplexer circuits and decision circuits developed for optical fiber
183
ASBECK
communications at rates of 40 Gb/s or higher. Figure 4.24 shows a multiplexer circuit and
40 Gb/s eye diagram fabricated in A1GaAs/GaAs HBT technology. An example of larger
scale integration is provided by the 12 x 12 crosspoint switch IC [31] illustrated in Fig.
4.25. Each channel is capable of operation at 10 Gb/s; thus the aggregate throughput of the
IC is 120 Gb/s. The RMS jitter per channel has been measured to be less than 3 pS. The
chip incorporates more than 4500 HBTs.
4.6.2.
Microwave Circuits
The HBTs have significant advantages in power amplifiers, particularly for high power
density and for high power-added efficiency. To maximize the output power and efficiency,
it is desirable to have a large value of breakdown voltage. In HBT, the breakdown voltage
and f can be traded off against each other by selecting the collector doping and thickness.
This tradeoff is evident in Fig. 4.26, which shows breakdown voltage and f values of a
variety of recently reported Si bipolar transistors and III-V HBT. The product B V x f is
found to have significantly higher values for the III-V structures. At the same time, the
collector series resistance when the transistor is "on" can be quite low, as a result of the
high mobility of electrons in GaAs. In addition, there is an advantage of HBT over FET for
operation in high-efficiency modes of amplification (Class AB or B). The HBT are
advantageous because there is no leakage current when the input emitter-base junction is
reverse-biased during the "off" portion of the rf cycle, as can occur in FET. Efficiency of
class B and C amplifiers is also increased in HBT as a result of high transconductance. For
a sinusoidal input, the output current displays much sharper turn-on and turn-off
Fig. 4.24. Die photograph and eye diagram for 40Gb/s 4:1 multiplexer circuit fabricated with
A1GaAs/GaAs HBT.
184
Fig. 4.25. Die photograph and output eye diagram for 12 x 12 crosspoint switch with 10Gb/s per
channel operation, fabricated with A1GaAs/GaAsHBT. [31].
transitions, minimizing the time that the transistor spends in the high-power dissipation
states when both current and voltage are nonzero.
As a result of these advantages, III-V HBT have emerged as the devices of choice for
implementation for many microwave amplifiers [32, 33]. These include X-band amplifiers
for phase array radars, where high efficiency is of paramount importance (although
linearity is not of great concern because the radar signal has a constant envelope). An
example of such an amplifier [33] is shown in Fig. 4.27. A bandwidth of 7-11 GHz is
achieved, and the power-added efficiency is above 40%. A separate application involves
the power amplifiers for handsets for cellular communications at frequencies of 850 MHz
or 1.9 GHz. For operation with a 3 V power supply, a breakdown voltage of 10-12 V is
required to ensure device survival under conditions of severe output mismatch. The HBT
exhibit a combination of high efficiency, ruggedness, linearity, and low cost needed to
meet commercial application needs, and as a result, amplifiers for this application are in
widespread production (with annual volumes of the order of 100 million units).
185
ASBECK
il
fT
"
il '
BVcEo =
il
II
= ' '"
100
10
;>"~
0
'" '
\ i
oo' o
" lll-V HBT:
o
9
m
'
Implanted Base
Epi Si Base
Epi SiGe Base
'
I .'
'
.I.|
!1
i!
i
I
10
50
I..,. I
100
f T (GHz)
Fig. 4.26. Plot of breakdown voltage BVee o andft for a variety of recently reported Si bipolar transistors
and III-V HBT, demonstrating tradeoff of BV and ft-
Oscillators and mixers are other circuits where HBT are advantageous. In these
nonlinear circuits, the prime concern is often noise at low frequencies near dc (the 1/f
regime), because the nonlinearity of the circuit causes the intermixing of the noise spectral
components. Noise near dc gives rise to phase noise of the rf output. For FET high 1/f
noise are common, as a result of temporal variations in channel conductance due to
trapping and detrapping of electrons at sites along the channel surface and the channelsubstrate interface. The HBT are relatively free from such effects because the intrinsic
device is shielded from such surfaces. Studies of 1/f noise in HBT indicate a noise comer
frequency of below 1 MHz.
4.6.3.
Analog Circuits
The HBT have notable advantages for use in broadband dc-coupled analog circuits,
including dc-coupled linear amplifiers, variable-gain amplifiers, and logarithmic amplifiers, as required for fiber-optics communications, radar signal processing, and instrumentation [34]. The GaAs-based HBTs have higher voltage handling capability than
advanced Si bipolar transistors, and can reach higher frequencies. The GaAs FET-based
amplifiers face a difficulty in this regime stemming from frequency dependent output
resistance (in the range of 1-100 MHz) due to the influence of traps and substrate
conduction on the substrate/channel interface. The HBT are free from these trapping
effects, as the device is well shielded from traps in the bulk and surface regions. At the
same time, HBT have significantly improved maximum voltage gain Ix. This quantity is
given by the product Ofgmr0, where r 0 is the output resistance of the transistor. The output
resistance of HBT is very high by virtue of the shielding of the base-emitter junction
afforded by the high base doping (high Early voltage). Values of Ix in excess of 200 have
been demonstrated. Broadband feedback amplifiers can be readily configured with HBT;
Darlington-connected resistive feedback amplifiers have been demonstrated with gain
extending from dc to 30 GHz. Also of importance for analog amplifiers is the ability to
match input Vbe voltages, which allows differential pairs to achieve low offset voltage. The
HBT are ideal for linear, wide dynamic range, and low-phase noise functions from
186
Fig. 4.27. Die photographand measuredperformance for 3-W, 8-14GHz power amplifier. [33].
baseband to at least 20GHz. Nonlinear circuits, such as logarithmic amplifiers, are

possible by utilizing the exponential input-output characteristic of a bipolar transistor.
The HBT technology has great potential for application to high-speed and highaccuracy A/D conversion. For HBT, the threshold voltage for current flow is extremely
uniform, which leads to well-matched transistors for use in voltage comparators. Observed
offset voltages have a standard deviation over 7.6cm wafers of 1.3-2mV. These
characteristics together with high f and fma~, high gin, and high linearity (high current
gain-Early voltage product) have made HBT ideal for A/D applications. The HBT have
been used to demonstrate 6-bit ADC converters with sampling rates above 4 Gigasamples/s [35], as shown in Fig. 4.28. An 8-bit converter has been demonstrated with
2.5 GSps operation. Initial work has employed flash architecture; future work will no doubt
include more sophisticated approaches in order to obtain higher resolution. The AZ ADC,
which employ the high-speed capability of HBT to oversample signals substantially, and
thus provide higher resolution, are currently under development [36].
187
ASBECK
Fig. 4.28. Die photograph of 6 bit, 4GSample/s flash analog-to-digital converter, fabricated with
A1GaAs/GaAs HBT. [35].
4.6.4.
Monolithically Combined Microwave/Digital Functions
Processing of high-speed digital signals or digitally modulated microwave signals often

requires both digital and microwave circuits. Monolithic integration of both circuit types
can permit substantial reduction of size, weight, cost of bonding and assembly, and
improved reliability. The HBT are ideal for multifunction integration because circuits with
microwave, analog and digital functions can be fabricated with the same process, and
semi-insulating substrates permit interconnection of all of them. Demonstrations of each of
the components of an integrated receiver, for example, have already been done with a fixed
HBT process. Monolithically integrated receivers are expected in the future.
4.7.
HETEROJUNCTION BIPOLAR TRANSISTOR RESEARCH

DIRECTIONS
The HBT development efforts continue to be among the most active and fruitful areas of
semiconductor device research. The most significant research themes include the following.
4.7.1.
Device Scaling
The Si-based devices are evolving towards tighter design rules at a steady rate. The
improvements in lithographic technology brought about by this development effort will
directly benefit HBT technology, by allowing smaller devices, with lower power dissipation in digital circuits, and with lower base resistance (and higher fmax) in a microwave
context. Vertical scaling must be done in a coordinated fashion with lateral scaling, and
this can be carried out conveniently using heterojunctions and epitaxial technology. For
operation at smaller dimensions and over smaller voltage ranges, velocity overshoot
188
becomes more prominent. Thus it can be thus expected that HBT will maintain their
advantage over homojunction transistors as technology evolves towards smaller dimensions. There are several problem areas for HBT technology (and, more generally, bipolar
technology), however.
a) Vbe Invariance. One major issue for bipolar scaling is the constancy of Vbe required to
achieve a given collector current density as the device dimensions change, as it is
determined almost entirely by material properties. For CMOS it is mandatory to scale
down the power supply voltage as the device dimensions shrink in order to avoid
breakdown, short channel effects, and hot electron effects. The behavior of bipolar
breakdown voltage shows the same trend. With a constant value of Vbe, however, it is
increasingly difficult to design circuits that provide sufficient input voltage swing (or
sufficiently high bias voltage). The BiCMOS circuits have already been rendered less
attractive at 3 V power supply voltages than previously. More severe problems for bipolar
logic will result in the future. Different material choices for HBT may alleviate the problem
in the future. Use of efficient dc-dc converters may be warranted in critical circumstances.
b) Ledge dimensions. The GaAs-based HBT frequently employ ledges to provide surface
passivation, as was described here. If the ledge lateral dimensions are reduced below a
minimum value of order 0.2-0.4 ~tm, the ledge loses its effectiveness. Thus the ledge is a
barrier to coordinated scaling of the device. For GaAs HBT, alternative geometries with
different passivation approaches are being pursued. The InP HBT experience much less
surface recombination, and appear to be free of this problem.
c) Extrinsic base-collector capacitance. The Cbc is one of the most important limits on
the high-frequency performance of HBT. It is a major determinant of thefmax value and the
output impedance of microwave transistors; it also determines the stability of the device
and contributes to the input capacitance (amplified by the Miller multiplication factor). A
major part of Cbc in conventional structure HBT is given by the capacitance in the regions
under the base contacts (the extrinsic areas of the device), which is not inherently needed
for device operation. For a conventional HBT, to minimize Cbc it is of key importance to
minimize the area associated with the base contacts. Unfortunately, when scaling down
device dimensions, it is increasingly difficult to keep the value of extrinsic Cbc to a fixed
fraction of the overall Cbc value (or almost equivalently, to keep the ratio of emitter area to
base-collector junction area fixed). Various strategies have been pursued to reduce the
extrinsic base-collector junction area. The use of ion implantation into the extrinsic
collector regions was already mentioned here. Another approach is to use a compositionselective etch to undercut the collector under the base contacts, as shown schematically in
Fig. 4.29. A highly innovative and successful approach has been pursued recently based on
transferring the HBT from the substrate wafer on which it is grown to a separate support
wafer. As a result of this transfer, processing can be done on both emitter and collector
Fig. 4.29. Schematic structure of HBT with undercut collector to reduce extrinsic base-collector
capacitance.
189
ASBECK
Fig. 4.30. Schematiccross section of transferred substrate HBT, illustrating its inverted geometry,and
the mechanical and thermal contact to the emitter. [37,38].
sides of the device, and small dimensions for both contacts can be made photolithographically. This approach, termed the transferred substrate HBT, has led to dramatic
advances in fmax for InP-based HBT. A cross section of the HBT developed by
Bhattacharya et al. [37] and Agarwal et al. [38] is shown in Fig. 4.30. The structure
provides for good mechanical support of the transferred InP films, as well as provides low
emitter inductance and good heatsinking. Figure 4.31 illustrates representative microwave
gain characteristics vs frequency. This approach has advanced to the point where circuits
of moderate complexity have been demonstrated, including a feedback amplifier and a
distributed amplifier with an 80-GHz bandwidth.
4.7.2.
Improvement in Manufacturability and Reduced Cost
For commercial application (which frequently determines research vitality), cost is always
significant. Manufactmfng processes for III-V HBT have inherent costs comparable to
30 - r ' - ~
25~
"
~
",
~'S
gain, U
f.=3,oa.
_:i
A.=0.75pmx25pm \
10-~ VcS=1 1 V, Ir 24 mA
5
hal\
1"
| "1 9 i
'I
'i ....
',
f= 160 GHz
1
h'~
",
"
10
100
h'm:tuency,Gl'tz
Fig. 4.31. Representativemeasured values of current and power gain vs frequency for a transferred
substrate InP HBT.
190
those of silicon, apart from substrate and epitaxy issues. Substrate size is an important
consideration both because of inherent scaling of manufacturing costs with substrate area
and because it is important to maintain compatibility with Si processing equipment. The
GaAs substrates are now available in 15.2-cm diameters. The InP substrates are available
in 10-cm diameters. It would be advantageous to scale to 20-cm, and to reduce the cost of
substrates. The possibility of depositing GaAs HBT layers on Si, or InP-like HBT layers
on GaAs substrates is a topic of ongoing research, although to date the dislocation
densities achieved have reduced current gain and reliability of the resulting transistors.
4.7.3.
Integration with Other Devices
Most HBT work has been carried out with npn transistors. For improved circuit flexibility,
it is desirable to combine these monolithically with other structures, for example, HFET,
p n p transistors, resonant tunnel diodes, lasers, photodetectors, optical modulators, etc.
There have already been significant efforts in cointegration. Such integration will be
fostered with fabrication processes using multiple epitaxial growths. There are good
prospects for the implementation of high-performance p n p transistors along with npn's.
This will make possible a variety of analog circuit design approaches that use Si
technology; beyond this, there is the prospect of both complementary logic circuits that
minimize static power dissipation and complementary push-pull microwave power
amplifiers that have excellent efficiency and good linearity.
4.7.4.
New Materials
The selection of material will be determined by speed performance, cost, process

compatibility, reliability and power dissipation considerations, and will not necessarily
be the same for all applications. For example, the choice ofbandgap within the base region
determines the turn-on Vbe, which is a key factor in determining power dissipation in LSI
and VLSI circuits. As already mentioned, in future microelectronics the power supply
voltage will be decreased continuously. A choice of narrow bandgap semiconductor, such
as InAs, GaSb or InSb for the base may become attractive for logic. The collector material
can have a wider bandgap and thus in principle breakdown voltage and junction reverse
leakage current need not be excessive at room temperature. For power applications and
high-temperature electronics, other material choices are attractive. A wide bandgap
collector is of critical importance. The combination of material characteristics of SiC
and GaN make them attractive candidates for the implementation of HBT for microwave
power amplifiers, as well as high-temperature (>400 ~ electronics and high-voltage
switching devices. Microwave power devices will derive considerable benefit from the
ability to use high collector voltages and very high voltage swings with these high
breakdown materials. For a given output power, the output impedance will be much higher
than with conventional materials, and it should be much easier to achieve impedance
matching to 50 f~ loads. The implementation of HBT in SiC and GaN systems is
hampered, however, by the difficulty of achieving high hole conductivity (for the p-type
base layer), because acceptors are hard to incorporate, have large ionization energies, and
hole mobility is low.
References
1.
2.
3.
4.
5.
6.
7.
Tiwari, S. (1992). Compound Semiconductor Device Physics, San Diego: Academic Press, Inc.
Chang,M. E (ed.) (1996). Current Trends in Heterojunction Bipolar Transistors, Singapore:WorldScientific.
Liu, W. (1998). Handbook oflII-V Heterojunction Bipolar Transistors, New York: John Wiley & Sons.
Kroemer,H. (1957). Proc. IRE 45: 1535.
Kroemer,H. (1982). Proc. IEEE 70: 13.
Sze, S. M. (1981). Physics of Semiconductor Devices, 2nd edition, New York: Wiley.
Ankri, D. and Eastman, L. F. (1982). Electron Lett. 18: 750.
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ASBECK
8. Maloney, T. and Fry, J. (1977). J. Appl. Phys. 48:781.

9. Miller, D. L. and Asbeck, P. (1985). J. Appl. Phys. 57: 1816.
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Chapter 4

HETEROJUNCTION BIPOLAR TRANSISTORS

HETEROJUNCTION BIPOLAR TRANSISTOR

Handbook of Thin Film Devices, edited by Maurice H. Francombe

Heteroepitaxial thin film technology provides numerous opportunities to improve the

HETEROJUNCTION BIPOLAR TRANSISTORS

Comparison of doping profiles of representative Si bipolar transistor and A1GaAs/GaAs HBT.

Fig. 4.4. Band diagram of HBT with wide bandgap collector.

HETEROJUNCTION BIPOLAR TRANSISTORS

HETEROJUNCTION BIPOLAR TRANSISTOR MATERIALS

HETEROJUNCTION BIPOLAR TRANSISTORS

9 Limited range of transient electron velocity overshoot (compared with several

Fig. 4.6. Strategiesfor control of AEc at base-emitterjunction.

Fig. 4.7. Representativeepitaxial layer structure for A1GaAs/GaAsHBT.

HETEROJUNCTION BIPOLAR TRANSISTORS

K T / q ln(pbWbI~/qD,,nZA) + RbI~/fl + Relc( ~ --[- 1)/fl

HETEROJUNCTION BIPOLAR TRANSISTORS

2) InGaAs/InP and InGaAls/InAlAs: HBTs lattice-matched to InP substrates have

Current disadvantages of InP-based HBTs include:

associated with hydrogen compensation of the acceptors are greater.

HETEROJUNCTION BIPOLAR TRANSISTOR PROCESSING

HETEROJUNCTION BIPOLAR TRANSISTORS

Fig. 4.9. Cross section of representative HBT with emitter/base self-alignment.

HETEROJUNCTION BIPOLAR TRANSISTORS

HETEROJUNCTION BIPOLAR TRANSISTOR DC

(known as the Moll-Ross-Kroemer relation, a generalization of the standard result for

l/J2 + l/J3) -1 exp(qVbe/kT)

HETEROJUNCTION BIPOLAR TRANSISTORS

Fig. 4.13. RepresentativeI c VS Vce characteristicsof an A1GaAs/GaAs HBT.

density, but the effect is reduced due to electron velocity overshoot.

4.4.1. Transport in Abrupt Heterojunctions

Emitter Edge Effects

O" = O'th - l - K ( V b e - Vth)

for Vbe < V t

Here Vt is an effective threshold voltage for the "ledge FET", given by

HETEROJUNCTION BIPOLAR TRANSISTORS

HETEROJUNCTION BIPOLAR TRANSISTORS

I~--T-- .-Y-I Ibel

Fig. 4.19. Variousheatsinking approaches employedwith GaAs HBT.

HETEROJUNCTION BIPOLAR TRANSISTOR RF

HETEROJUNCTION BIPOLAR TRANSISTORS

Saturation Charge Storage

When the base-collector junction is forward-biased (corresponding to the condition of

HETEROJUNCTION BIPOLAR TRANSISTORS

HETEROJUNCTION BIPOLAR TRANSISTOR

HETEROJUNCTION BIPOLAR TRANSISTORS

and doping of the channel, and is relatively hard to control.

HETEROJUNCTION BIPOLAR TRANSISTORS

" lll-V HBT:

HETEROJUNCTION BIPOLAR TRANSISTORS

baseband to at least 20GHz. Nonlinear circuits, such as logarithmic amplifiers, are

Monolithically Combined Microwave/Digital Functions

Processing of high-speed digital signals or digitally modulated microwave signals often

HETEROJUNCTION BIPOLAR TRANSISTOR RESEARCH

HETEROJUNCTION BIPOLAR TRANSISTORS

Improvement in Manufacturability and Reduced Cost

HETEROJUNCTION BIPOLAR TRANSISTORS

Integration with Other Devices

The selection of material will be determined by speed performance, cost, process

8. Maloney, T. and Fry, J. (1977). J. Appl. Phys. 48:781.

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