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Design Specifications
Synthesis Phase
Analysis Phase
SP
Mnemonic
Opcode
Length
ADD
01
SUB
02
Analysis
Phase
Mnemonic Table
Synthesis
Phase
Symbol
Address
AGAIN
104
113
Symbol Table
TP
SP
TP
Pass I
Pass II
Intermediate Code
ORIGIN
ORIGIN
<address spec>
Where <address spec> is an <operand spec> or
<constant>
This directive indicates that LC should be set to the
address given by <address spec>.
It is useful when the target program does not consist of
consecutive memory words.
EQU
<symbol>
LTORG
It
Literals
Pass II
Synthesis
Pass I of an assembler
Variant I
Variant II
Pass II of an assembler
Pass II of an assembler
Tables
Pass II of an assembler