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http://www.tuto rialspo int.co m/co mpute r_lo g ical_o rg aniz atio n/cpu_archite cture .htm
Microprocessing unit is synonymous to central processing unit, CPU used in traditional computer.
Microprocessor (MPU) acts as a device or a g roup of devices which do the following tasks.
communicate with peripherals devices
provide timing sig nal
direct data flow
perform computer tasks as specified by the instructions in memory
8085 Microprocessor
T he 8085 microprocessor is an 8-bit g eneral purpose microprocessor which is capable to address 64k of
memory. T his processor has forty pins, requires +5 V sing le power supply and a 3-MHz sing le-phase clock.
ALU
T he ALU perform the computing function of microprocessor.It includes the accumulator, temporary reg ister,
arithmetic & log ic circuit & and five flag s. Result is stored in accumulator & flag s.
Accumulator
It is an 8-bit reg ister that is part of ALU. T his reg ister is used to store 8-bit data & in performing arithmetic &
log ic operation. T he result of operation is stored in accumulator.
Diag ram
Flag s
T he reg ister are prog rammable. It can be used to store and transfer the data from the reg isters by using
instruction. T he ALU includes five flip-flops that are set & reset acc. to data condition in accumulator and other
reg isters.
S (Sig n) flag - After the execution of an arithmetic operation, if bit D 7 of the result is 1, the sig n flag is
set. It is used to sig ned number. In a g iven byte, if D 7 is 1 means neg ative number. If it is zero means it is a
positive number.
Z (Z ero) flag - T he zero flag is set if ALU operation result is 0.
AC (Auxiliary Carry) flag - In arithmetic operation, when carry is g enerated by dig it D3 and passed
on to dig it D 4, the AC flag is set. T his flag is used only internally BCD operation.
P (Parity) flag - After arithmetic or log ic operation, if result has even no. of 1s, the flag is set. If it has
odd no. of 1s , flag is reset.
C (Carry) flag - If arithmetic operation result in a carry, the carry flag is set, otherwise it is reset.
Storag e reg isters -- T hes reg isters store 8-bit data during a prog ram execution. T hese reg ister are
identified as B,C,D,E,H,L. T hey can be combined as reg ister pair BC, DE and HL to perform some 16 bit
operations.
S.N.
Group
Address bus
Data bus
Desc ription
T he 8085 microprocessor has 8 sig nal line, A15 - A8 which are
unidirectional & used as a hig h order address bus.
T he sig nal line AD7 - AD0 are bidirectional for dual purpose. T hey are
used as low order address bus as well as data bus.
WR bar - It is write control sig nal (active low). It is active when written
into selected memory.
Status sig nal
ALU (Address Latc h Enable) - When ALU is hig h. 8085
microprocessor is use address bus. When ALU is low. 8085
microprocessor is use data bus.
IO /M bar - T his is a status sig nal used to differentiate between i/o and
memory operation. When it is hig h, it indicate an i/o operation and low, it
indicate memory operation.
S 1 and S 0 - T hese status sig nal, similar to i/o and memory bar, can
identify various operation, but they are rarely used in small system.
4
Power supply
and frequenc y
sig nal
Externally
initiated sig nal
Serial I/O
ports
Instruction Format
Each instruction is represented by a sequence of bits within the computer. T he instruction is divided into g roup of
bits called field. T he way of instruction is expressed is known as instruction format. It is usually represented in the
form of rectang ular box. T he instruction format may be of the following types.
Format
Advantag e
T hese formats have g ood code density.
Drawback
T hese instruction formats are very difficult to decode & pipeline.
Format
Advantag e
T hey are easy to decode & pipeline.
Drawback
T hey don't have as g ood code density.
Format
Advantag e
T hese compromise between code density & instruction of these type are very easy to decode.
Addressing Modes
Addressing mode provide different ways for access an address to g iven data to a processor. Operated data is
stored in the memory location, each instruction required certain data on which it has operate. T here are various
techniques to specify address of data. T hese technique are called Addressing Modes.
Direc t addressing mode - In the direct addressing mode, address of the operand is g iven in the
instruction and data is available in the memory location which is provided in instruction. We will move this
data in desired location.
Indirec t addressing mode - In the indirect addressing mode, the instruction specifies a reg ister
which contain the address of the operand. Both internal RAM and external RAM can be access via indirect
addressing mode.
Immediate addressing mode - In the immediate addressing mode, direct data is g iven in the
operand which move the data in accumulator. It is very fast.
Relative addressing mode - In the relative address mode, the effective address is determined by the
index mode by using the prog ram counter in stead of g eneral purpose processor reg ister. T his mode is
called relative address mode.
Index addressing mode - In the index address mode, the effective address of the operand is
g enerated by adding a content value to the contents of the reg ister. T his mode is called index address
mode.