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Company Description :
Qualcomm Incorporated is the world leader in next generation mobile technologies. The company delivers
innovative digital wireless communications products and services based on CDMA and other advanced
technologies.
http://en.wikipedia.org/wiki/Qualcomm (http://en.wikipedia.org/wiki/Qualcomm)
Job Profile (A student can opt for any of the three profiles) :
1. Software Profile
2. Communication Profile (DSP, etc)
3. VLSI Design Profile
Job location
Hyderabad(Sotware) / Bangalore(Hardware)
Year
2008-12
2009-13
2010-14

Package
CPI cutoff
10.75(B.Tech)
8.0
14.0(B.Tech)
7.0
15.2(B.Tech)
7.5

Eligible Branches
ECE/IT/EE/CSE
ECE/IT/EE/CSE
ECE/IT/EE/CSE

Company Visit Date

27-09-2011
28-07-2012
31-07-2013

Students Selected
1(Comm)
17 (3 Btech ECE)
8(5 B.tech ECE)

Selection Procedure
1.There will be an ONLINE written test in which you have to choose profiles like
a). SOFTWARE
b). ECE (COMMUNICATION).
c). VLSI
You can choose either VLSI or ECE as per your interest
2. Interviews (2 Technical Rounds + 1 HR Round)

Feedback
2014 Batch
ONLINE WRITTEN TEST:
VLSI profile:
1. Basic C (Easy, but good speed is necessary)
2. Verilog (2 basic questions)
3. Digital Electronics (Counters and other basics)
4. Computer Architecture (Memory related)
5. Microprocessor(8085 and basic 8086)
6. Aptitude (Logical only)
Note: Portions of C, Verilog, aptitude and DE were relatively easy. So the
deciding factor was knowledge of microprocessor (both 8085 and 8086) and
speed of solving questions.

Personal Interviews:
VLSI Profile: (2 tech interviews, 1 HR)
In first interview, he started with introduction, then moved on to projects and shortly discussed one. Then he asked easy but conceptual DE questions.
He also asked about Set up and hold time violations and how to remove it. Then he asked me if I have studied DSP and asked me 2-3 Communication
related questions like sampling, PCM, quantization noise etc. Then he asked about Cache memory concepts. There were some Op-Amp differentiator
related questions also.In second interview he started with introduction and then he asked famous bulb and XOR gate puzzle. Then he asked some gate
conversions. (Try to look involved in the questions even if you know the answer.) Then he asked questions about Op-Amp Integrator. These questions
were relatively difficult. He also asked to write an ALP for multiplying a number by 4 by three methods. Besides area of interest, questions from DE,
Op-Amp and Communication were also asked. Note: All interviews were one-to-one. Interviewers were friendly and helping. In all the interviews I was

asked about higher studies. You have to convince them that you will not leave the company in any circumstances (especially HR).You will have to tell a
lot of lies during HR interview, be prepared for that.Interviewers will give you chance to ask them some questions, you can ask them about their future
projects, work environment, your personal growth etc.
Be confident in your AOI.
Strengthen your basics.
Have some nice projects and prepare them thoroughly.
Show your interest in the company.

2013 Batch
Student selected (B.Tech) : Arnab Halder(PPO),Shashank Nishad,Tarun Srivastava
ONLINE WRITTEN TEST:
VLSI profile:
Basic C
Verilog.
Aptitude
DE (counters, and other basic concepts).
COMMUNICATION profile:
Basic C.
Aptitude.
DSP.
Transform (Wavelet, Hamiltonian theorem) etc
Communication concept.(frequency bandwidth for AM, FM etc)

What to study:
VLSI Profile Interview: Number of interviewer = 1
BASIC MEMORY CONCEPT like CACHE memory and its types, pipelining and a little bit microprocessor.
You must have good knowledge in DIGITAL ELECTRONICS.
SET-UP & HOLD time, potential timing violation,
important),COUNTERS(Johnsons ,ring etc).

stability problem in sequencial circuits,

LATCHs,

FFs,

FSM(very

BASIC SOLID STATE DEVICE.

C-MOS and other LOGIC FAMILY, inversion layer concept etc.
GOOD knowledge in OP-AMP (Virtual ground concept), block diagram, frequency response.
Basic Oscillators (ring, phase shift, crystal).
COMMUNICATION Profile Interview: Number of interviewer = 1
They can ask any question from ANLOG or DIGITAL COMM.
TV transmissions block diagram and concept(full transceiver system).
BASIC MEMORY CONCEPT like CACHE memory and its types, pipelining and a little bit microprocessor.
You must have good knowledge in DIGITAL ELECTRONICS.
GOOD knowledge in OP-AMP (Virtual ground concept), block diagram, frequency response, transfer function, integrator, differentiator etc.
Basic Oscillators (ring, phase shift, crystal).
PREFERRED AOI
For VLSI Profile:
1.

DIGITAL ELECTRONICS.

2.

OP-AMPs & CIRCUITS (EDC)

3.

LOGIC FAMILY.

4. MICROPROCESSORS (8085 + 8086 and OTHER BASIC KNOWLEDGE).

For COMMUNICATION Profile
1.

DIGITAL ELECTRONICS.

2. OP-AMPs & CIRCUITS (EDC).

3. COMMUNICATION SYSTEM.
QUESTIONS ASKED:
VLSI profile:
What is chache memory and its types .
What is pipelining, what are the problems in pipelining and how to correct them, throughput etc.
Combinational circuit from MUX (full subtractor) with explanation.
Advantage of johnson counter and ring counter.
Set-up & hold time (the whole pdf).
Op-amp circuit solving,virtual ground and basic properties.

Sequence Detector of nine bits (MEALEY and how to convert it in to MOORE).

Sequential circuit stability problem and how to correct it.
Race around condition and how to correct it.
Working of C-MOS inverter.
What is inversion layer.
What is phase shift oscilattors and its working.
Verilog program for latch and ff,blocking & non blocking statements
NOTE:
In beginning they asked few questions apart from my AOI which made me nervous but when they came into my AOI then it was me all the way. I gave
my interview with good confidence and entangled them in SET-UP & HOLD time (1st interview) for at least 25 minutes for which he complimented me.
You have to assure them that you are good in your AOI.
In 2nd interview they started with my AOI which increased my confidence. In this interview I explained them my TWO projects for more than 20
minutes and then faced some ANALOG basic questions like what is inversion layer and C-MOS etc.
TIPS:
Be competent in you AOI.
Must have at least one good project associated with your AOI.
Be confident and have good communication skills.
Apart from these above things they seek students having Basic VERILOG and C knowledge.

2012 Batch
1. Online Test feedback (for Communication Profile)
Consisted of General aptitude, C questions and technical part
Aptitude questions were not difficult. Technical questions consisted of Signals and Systems, Digital Signal Processing, etc.
2. Interview Rounds
Three rounds of interviews1) Analog round- Diode characteristics, BJT amplifier diagram and biasing, Thyristor characteristics
2) Digital round- Counters,puzzles and asked from projects and area of interest
3) HR round- They asked general questions like about yourself, strength, weakness, motivation, backup plans, hobbies.
All rounds were of qualifying nature. Most candidates were eliminated from analog round. Both technical rounds were of 30 minutes to 1 hour duration.
Only 4 candidates qualified for the HR round. Give answers to the point and be clear.
Interview Questions:
1. For a given D-Flip Flop how do you compute set up time and hold time, what are set up time violations and hold time violations?
2. How the power, Area and frequency scale when the technology scales?
3. About Pipeline mechanism
4. How do you connect two blocks if different blocks of different voltages 1.05V and 0.9V are given in VLSI circuit?
5. How the NMOS width vary for a given PMOS width and what you do yo make rise time and fall time equal,,,and WHY?
6. In VLSI circuit, if for a particular combinational circuit actual delay exceeds the desired delay, then what are the techniques we implement to
overcome that effect and impact on set-up time and hold time?
7. Explain about CDMA, TDMA, FDMA with diagrams
8. Write verilog code for D-FF?
9. Implementation of digital circuits using Multiplexer
10. What changes you will make for set up time violations and hold time violations?
11. How the buffer reduces delay in a wire?
12. How the clock skew effects data rate?
13. Explain about parity checks and error correcting codes.
14. What is the difference in clock periods if clock in send to FF directly or through some delay elements?
15. About Miller capacitance in interconnect wire capacitance
16. What is the difference between auto,static,extern and register data variables in C?
17. What can you say about power reduction techniques?
18. Make a transistor level NAND gate implementation
19. Which will have maximum delay in NAND gate? (Hint: He meant to ask me the input which is nearer to the output, or farther away from it)
20. Overview about MTP
21. Overview about Btech Project
22. Draw IdVd characteristics of MOSFET
23. Write MOSFET drain current equations for all the cases. (Hint : was expecting for saturation, and linear, the interviewer asked What about cut
off? When I answered no current, or rather subthreshold current flows, he asked how and why does it flow)
24. Draw the gate level (or transistor level) implementation of DF/F
25. What is the difference between Register and Latch, also FIFO and Latch?
26. VHDL/ Verilog implementation of Latch and a Flip Flop/
27. What do you know about Cache?

28. What do you know about one human architecture?

29. If you have 27 balls and 26 balls weigh 1Kg and 27th ball weighs 0.9kg, and you have a weighing machine how many steps you will require in
worst case to find that ball. (Hint : 4 steps if we divide the balls in group of 2 and 3 steps if we device the balls in group of 3)
30. You and your friend are playing a game, the game consists of a keeping coins in a circle. The one putting the last coin wins. (Interviewer gave me
a hint that if we start near the edge of the circle and keep coins across the circumference of the circle there will be odd number of coins placed,
similarly in inside circles. So basically interviewer wanted to tell that there will be total odd number of coins in the circle, so the person playing first
will win)

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