SLA7022 Driver Unipolar-Bipolar

K DIC218
Bulletin No
I02 EB0
(Jul,2000)
SANKEN ELECTRIC COMPANY LTD.

1-11-1 Nishi -Ikebukuro,Toshima-ku, Tokyo
PHONE: 03-3986-6164
FAX: 03-3986-8637
TELEX: 0272-2323(SANKEN J)
Overseas Sales Offices

Asia
SANKEN ELECTRIC SINGAPORE PTE LTD.
150 Beach Road #14-03,
The Gateway, West Singapore 0718, Singapore
PHONE: 291-4755
FAX: 297-1744
Motor Driver ICs
SANKEN ELECTRIC HONG KONG COMPANY LTD.

1018 Ocean Centre, Canton Road,
Kowloon, Hong Kong
PHONE: 2735-5262
FAX: 2735-5494
TELEX: 45498 (SANKEN HX)
SANKEN ELECTRIC KOREA COMPANY LTD.

SK Life B/D 6F,
168 Kongduk-dong, Mapo-ku, Seoul, 121-705, Korea
PHONE: 82-2-714-3700
FAX: 82-2-3272-2145
North America
ALLEGRO MICROSYSTEMS, INC.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615, U.S.A.
PHONE: (508)853-5000
FAX: (508)853-7861
Europe
ALLEGRO MICROSYSTEMS EUROPE LTD.
Balfour House, Churchfield Road,
Walton-on-Thames, Surrey KT12 2TD, U.K.
PHONE: 01932-253355
FAX: 01932-246622
PRINTED in JAPAN H1-I02EB0-0007020ND
Motor Driver ICs
Contents
Selection Guide ........................................................................................................................................ 2
Product Index by Part Number ..................................................................................... 3
Notes on SLA7000/SMA7000 Series
Features/Applications/Handling Precautions/Constant Current Chopper Method .............................. 4
2-Phase Stepper Motor Unipolar Driver ICs

2-Phase Excitation
SLA7022MU/SLA7029M/SMA7022MU/SMA7029M ............................................................................... 5
SMA7036M ............................................................................................................................................. 12
2-Phase/1-2 Phase Excitation
SLA7027MU/SLA7024M/SLA7026M .................................................................................................... 20
SLA7032M/SLA7033M .......................................................................................................................... 28
SDK03M ................................................................................................................................................. 36
UCN5804B ............................................................................................................................................. 42
2W1-2 Phase Excitation/Micro-step Support
SLA7042M/SLA7044M .......................................................................................................................... 44
Serial Signal Generator IC for SLA7042M and SLA7044M
PG001M ................................................................................................................................................. 48
2-Phase Stepper Motor Bipolar Driver ICs

A3966SA/SLB ........................................................................................................................................ 54
A3964SLB .............................................................................................................................................. 58
A3953SB/SLB ........................................................................................................................................ 60
A2918SW ............................................................................................................................................... 68
A3952SB/SLB/SW ................................................................................................................................. 70
2-Phase/1-2 Phase/W1-2 Phase Excitation
UDN2916B/LB ....................................................................................................................................... 78
UDN2917EB ........................................................................................................................................... 84
A3955SB/SLB ........................................................................................................................................ 88
A3957SLB .............................................................................................................................................. 94
3-Phase Stepper Motor Driver ICs

Star Connection/Delta Connection
SI-7600/SI-7600D ................................................................................................................................... 98

Pentagon Connection
SI-7502 (SLA5011/SLA6503) ................................................................................................................... 104
List of Discontinued Products ....................................................................................................... 110
Contents
Motor Driver ICs
Selection Guide
Excitation
method
1
SLA7022MU
SMA7022MU
2-phase
excitation
1.2
Output current (A)

1.25
1.5
SLA7029M
SMA7029M
SMA7036M
SDK03M
SLA7027MU
UCN5804B
2-phase/
1-2 phase
excitation
SLA7024M
SLA7032M
2W1-2 phase
Micro-step support
SLA7042M
Motor supply
Package
Remarks
voltage (V)
to 46
ZIP15Pin
to 46
ZIP15Pin
to 46
ZIP15Pin
to 46
ZIP15Pin
to 46
ZIP15Pin
to 46
SMD16Pin 1 motor driven by 2 packages
to 46
ZIP18Pin
Internal sequencer,
to 35
DIP16Pin
constant voltage driver
to 46
ZIP18Pin
to 46
ZIP18Pin
SLA7026M
to 46
ZIP18Pin
SLA7033M
to 46
ZIP18Pin
to 46
ZIP18Pin
SLA7044M
to 46
ZIP18Pin
3
Page
5
5
5
5
12
36
20
42
20
28
20
28
44
44
Serial Signal Generator IC for SLA704xM

PG001M
Supply voltage (V)

4.5 to 5.5
Package
DIP16Pin
page
48

Excitation
method
0.65
A3966SA
A3966SLB
Output current (A)

0.8
1.3
0.75
UDN2917EB
Motor supply
voltage (V)
Vcc to 30
Vcc to 30
Vcc to 30
Vcc to 50
Vcc to 50
10 to 45
Vcc to 50
Vcc to 50
Vcc to 50
10 to 45
10 to 45
10 to 45
DIP16Pin
SOP16Pin
SOP20Pin
DIP16Pin
SOP16Pin
ZIP18Pin
DIP16Pin
SOP16Pin
SIP12Pin
DIP24Pin
SOP24Pin
PLCC44Pin
A3955SB
Vcc to 50
DIP16Pin
One motor driven by 2 ICs
88
A3955SLB
Vcc to 50
SOP16Pin One motor driven by 2 ICs
88
A3957SLB
Vcc to 50
SOP24Pin One motor driven by 2 ICs
94
1.5
A3964SLB
A3953SB
A3953SLB
2-phase/
1-2 phase
excitation
2-phase/1-2
phase/W1-2
phase excitation
A2918SW
A3952SB
A3952SLB
A3952SW
UDN2916B
UDN2916LB
2W1-2 phase
excitation/
micro-step
support
4W1-2 phase
excitation/microstep support
3-Phase Stepper Motor Driver Control ICs

Excitation method
Part No.
2-phase/
2-3 phase excitation
SI-7600
SI-7600D
Motor supply
voltage (V)
15 to 45
Package
SOP20Pin
DIP20Pin
Remarks
Use with SLA5017 or others
Page
98
5-Phase Stepper Motor Driver Control ICs
Drive method
Part No.
Pentagon
connection
SI-7502
Selection Guide
Motor supply
voltage (V)
15 to 42
Package
Remarks
Powder
Use with SLA6503 and SLA5011
coating 27 pin
Page
104
Package
Remarks

Page
54
54
58
60
60
68
70
70
70
78
78
84
Motor Driver ICs
Product Index by Part Number

Part No.
A2918SW
A3952SB
A3952SLB
A3952SW
A3953SB
A3953SLB
A3955SB
A3955SLB
A3957SLB
A3964SLB
A3966SA
A3966SLB
Output current Supply voltage

(A)
(V)
1.5
10 to 45
2
VCC to 50
2
VCC to 50
2
VCC to 50
1.3
VCC to 50
1.3
VCC to 50
1.5
VCC to 50
1.5
VCC to 50
1.5
VCC to 50
0.8
VCC to 30
0.65
VCC to 30
0.65
VCC to 30
PG001M
4.5 to 5.5
SDK03M
to 46
SI-7502
15 to 42
SI-7600
15 to 45
SI-7600D
15 to 45
SLA7022MU
SLA7024M
SLA7026M
SLA7027MU
SLA7029M
SLA7032M
SLA7033M
SLA7042M
SLA7044M
SMA7022MU
SMA7029M
SMA7036M
1
1.5
3
1
1.5
1.5
3
1.2
3
1
1.5
1.5
UCN5804B
Drive method
Excitation method
Package
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
Bipolar
2-phase/1-2 phase excitation

2W/1-2 phase micro-step support
ZIP18pin
DIP16pin
SOP16pin
SIP12pin
DIP16pin
SOP16pin
DIP16pin
SOP16pin
SOP24pin
SOP20pin
DIP16pin
SOP16pin
DIP16pin
Unipolar
Pentagon connection
5-phase excitation
to 46
to 46
to 46
to 46
to 46
to 46
to 46
to 46
to 46
to 46
to 46
to 46
Star connection/
delta connection
Star connection/
delta connection
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
Unipolar
1.25
to 35
Unipolar
UDN2916B
0.75
10 to 45
Bipolar
UDN2916LB
0.75
10 to 45
Bipolar
UDN2917EB
1.5
10 to 45
Bipolar
Remarks

Serial signal generator IC for

SLA704xM
SMD16pin
Powder coat
Control IC
27pin
Page
68
70
70
70
60
60
88
88
94
58
54
54
48
36
104
SOP20pin
Control IC
98
DIP20pin
Control IC
98
2-phase excitation
2-phase excitation
2-phase excitation
2-phase excitation
2-phase excitation
ZIP15pin
ZIP18pin
ZIP18pin
ZIP18pin
ZIP15pin
ZIP18pin
ZIP18pin
ZIP18pin
ZIP18pin
ZIP15pin
ZIP15pin
ZIP15pin
SLA7024M equivalent
SLA7026M equivalent
5
20
20
20
5
28
28
44
44
5
5
12
DIP16pin
2-phase/1-2 phase/W1-2 phase

excitation
excitation
excitation
SMA7029M equivalent
Internal sequencer, constant
voltage driver
42
DIP24pin
78
SOP24pin
78
PLCC44pin
84
Product Index by Part Number
Motor Driver ICs

Features
Constant Current Chopper Method
Employs a constant-current chopper control method.
In the constant current chopper method, a voltage higher than
Integrates power MOSFETs and monolithic chip control cir-
the rated voltage of the motor is applied and when the current
cuitry in a single package.
rises, the chopper transistor is switched on thereby shortening
One-fifth the size and one-fourth the power dissipation compared with conventional SANKEN ICs
the current rise time. After the current rises, the coil current is
held by the PWM chopper to a constant current level determined by the current sense resistor. This method has the advantage of improving the motor's high frequency response and
the efficiency response and efficiency of the driver circuitry.
Comparison of power dissipation.
Basic constant current chopper circuitry
Transient-suppression diode
Power dissipation PH (W)
Motor coil
6
5
Sanken product: SI-7300A
IO=1A
Motor : 23LM-C202
IO: Output current
2-phase excitation, holding mode
VCC
3
SLA7024M, SLA7029M
SMA7029M
IO=1A
1
0
10
20
30
40
50
Supply voltage VCC (V)
Eliminates the need for heatsink thereby decreasing part-insertion workload and increasing flexibility in mounting.
Reduces the size of power supplies required.
Lineup: 2-phase excitation, 2-phase/1-2 phase excitation,
2W1-2 phase micro-step support ICs
Applications
The SLA7000 and SMA7000 series are ideal for the following
applications.
Sheet feeders and carriage drivers in printers.
Sheet feeders for PPC and facsimile machines.
Numeric control equipment.
Industrial robots.
Handling Precautions
Recommended screw torque
0.588 to 0.784 [Nm](6.0 to 8.0 [kgfcm])
Recommended silicon grease
Shin-Etsu Chemical Co., Ltd.: G746
GE Toshiba Silicone Co., Ltd.: YG-6260
Dow Corning Toray Silicone Co., Ltd.: SC102
Please be careful when selecting silicone grease since the oil
in some grease may penetrate the product, which will result
in an extremely short product life.
Current sense resistor
PWM control
and phase
switching Used as both chopper
control
MOSFET and phase
switching MOSFET
SLA7022MU/SLA7029M/SMA7022MU/SMA7029M
2-Phase Excitation

Absolute Maximum Ratings
Parameter
Symbol
Motor supply voltage

FET Drain-Source voltage
Control supply voltage
TTL input voltage
Reference voltage
Output current
VCC
VDSS
VS
V IN
V REF
IO
P D1
P D2
Tch
Tstg
Power dissipation
Channel temperature
Storage temperature
(Ta =25C)
Ratings
SLA7022MU
SLA7029M
SMA7022MU
SMA7029M
46
100
46
7
2
1
1.5
4.5 (Without Heatsink)
35 (TC=25C)
1
1.5
28(TC=25C)
+150
40 to +150
Units
V
V
V
V
V
A
W
W
C
C
Electrical Characteristics
(Ta =25C)
Ratings
Parameter
Symbol
SLA7022MU
typ
max
10
15
V S=44V
10
24
44
100
VS =44V, IDSS=250 A
0.85
ID=1A, VS =14V
4
VDSS=100V, VS=44V
1.2
ID=1A
40
VIH=2.4V, VS =44V
0.8
VIL=0.4V, V S=44V
2
ID=1A
0.8
VDSS=100V
2
VDSS=100V
0.8
ID=1A
0.5
VS =24V, ID=0.8A
0.7
VS =24V, ID=0.8A
0.1
VS =24V, ID=0.8A
min
Control supply current
FET Drain-Source
voltage
FET ON voltage
DC characteristics
FET drain leakage current

FET diode forward
voltage
TTL input current
TTL input voltage

(Active High)
AC characteristics
TTL input voltage

(Active Low)
Switching time
IS
Condition
VS
VDSS
Condition
V DS
Condition
IDSS
Condition
V SD
Condition
IIH
Condition
IIL
Condition
VIH
Condition
VIL
Condition
VIH
Condition
VIL
Condition
Tr
Condition
T stg
Condition
Tf
Condition
min
SLA7029M
typ
max
10
15
V S=44V
24
44
10
100
VS =44V, IDSS=250 A
0.6
ID=1A, VS =14V
4
VDSS=100V, VS=44V
1.1
ID=1A
40
VIH=2.4V, VS =44V
0.8
VIL=0.4V, VS=44V
2
ID=1A
0.8
VDSS=100V
2
VDSS=100V
0.8
ID=1A
0.5
VS=24V, ID=1A
0.7
VS=24V, ID=1A
0.1
VS=24V, ID=1A
SMA7022MU
typ
max
10
15
VS =44V
10
24
44
100
VS=44V, IDSS=250 A
0.85
ID=1A, VS=14V
4
VDSS=100V, VS =44V
1.2
ID=1A
40
VIH=2.4V, VS=44V
0.8
V IL=0.4V, VS =44V
2
ID=1A
0.8
VDSS=100V
2
VDSS=100V
0.8
ID=1A
0.5
VS=24V, ID=0.8A
0.7
VS=24V, ID=0.8A
0.1
VS=24V, ID=0.8A
min
SMA7029M
typ
max
10
15
V S=44V
10
24
44
100
VS=44V, IDSS=250 A
0.6
ID=1A, VS =14V
4
VDSS=100V, V S=44V
1.1
ID=1A
40
VIH=2.4V, VS =44V
0.8
V IL=0.4V, VS =44V
2
ID=1A
0.8
VDSS=100V
2
VDSS=100V
0.8
ID=1A
0.5
V S=24V, ID=1A
0.7
V S=24V, ID=1A
0.1
V S=24V, ID=1A
Units
min
mA
V
V
V
mA
V
A
mA
2-Phase Stepper Motor Unipolar Driver ICs (2-Phase Excitation)
Internal Block Diagram
INB
5
VS
INA
10
14
15
1, 6, 10, 15pin
Description of pins
12
TDB
REFB
GNDB
1pin
6pin
10pin
15pin
GNDA
REFA
TDA
RSA
Excitation input
Active H
Active L
OUT A
OUT A
OUT A
OUT A
OUT B
OUT B
OUT B
OUT B
Reg
RSB
Reg
13
11
Diagram of Standard External Circuit (Recommended Circuit Constants)
Excitation signal time chart

2-phase excitation
VCC (46V max)

+
clock
IN A
IN B
H
L
H
H
L
H
L
L
H
L
H
H

Vb (5V)
8
VS
r3
10
15
r1
r4
INA
2
11
C1
TdA
TdB
INB
C2
r2
Rs
r5
GA
4
C4
r6
Rs
Open
collector
14
INA
INB
0
H
L
L
L
1
H
L
L
H
2
H
L
H
L
3
H
H
H
L
4
L
L
H
L
5
L
L
H
H
6
L
L
L
L
7
L
H
L
L
0
H
L
L
L
1
H
L
L
H
2 3
H H
L H
H H
L L
tdA and tdB are signals before the inverter stage.

RSA REFA REFB RSB
7
3 13
9
C3
tdA
clock
IN A
td A
IN B
td B
tdB
GB
12
r1 :
r2 :
r3 :
r4 :
r5 :
r6 :
C1 :
C2 :
C3 :
C4 :
Rs :
510
100 (VR)
47k
47k
2.4k
2.4k
330 to 500pF
330 to 500pF
2200pF
2200pF
1.8 typ(7022MU)
(1 to 2W)
1 typ(7029M)
External Dimensions SLA7022MU/SLA7029M
+1
9.7 0.5
+0.2
+0.2
0.65 0.1
+0.2
1.15 0.1
+0.2
1.15 0.1
0.55 0.1
40.7
14P2.030.7=28.421.0
14P2.030.4=28.420.8
1.60.6
+0.2
0.65 0.1
(3)
R-End
30.6
2.450.2
2.20.4
6.30.6
7.50.6
+0.2
Part No.
Lot No.
4.60.6
Epoxy resin package
4.80.2
1.70.1
6.70.5
9.9 0.2
16 0.2
13 0.2
3.20.153.8
0.55 0.1
310.2
24.40.2
16.40.2
3.20.15
(Unit: mm)
31.30.2
1 2 3 15
12 3 15
Forming No. No.853
Forming No. No.855
External Dimensions SMA7022MU/SMA7029MA
(Unit: mm)
Epoxy resin package

40.2
40.7
P2.030.114=28.42
1.20.1
(5.9)
(7.5)
(4.6)
+0.2
0.55 0.1
3 0.6
+0.2
0.65 0.1
1.16 +0.2
0.1
+0.2
0.55 0.1
0.620.1
1.160.15
(3)
6.7 0.5
1.450.15
(9.7)
Lot No.
Part No.
1.6 0.6
2.50.2
30
8.5max
10.20.2
310.2
P2.030.114=28.42
31.3 +0.2
12 3 15
1 2 3 15
Forming No. No.1054
Forming No. No.1055
Application Notes
Determining the Output Current
Fig. 1 Waveform of coil current (Phase A excitation ON)
Fig. 1 shows the waveform of the output current (motor coil curIO
rent). The method of determining the peak value of the output

current (IO) based on this waveform is shown below.
(Parameters for determining the output current IO)
Phase A
0
Vb: Reference supply voltage

r1,r 2: Voltage-divider resistors for the reference supply voltage
Phase A
RS: Current sense resistor

(1) Normal rotation mode
IO is determined as follows when current flows at the maximum
level during motor rotation. (See Fig.2.)
V b ................................................................
r2
(1)
IO
r1+r2 RS
Fig. 2 Normal mode

Vb(5V)
r6
(2) Power down mode

r1
The circuit in Fig.3 (rx and Tr) is added in order to decrease the
r5
3,(13)
coil current. IO is then determined as follows.

1
IOPD
r1(r2+rX)
1+
r2
V
b
.........................................................
(2)
RS
C3
7,(9)
r2 rX
RS
Equation (2) can be modified to obtain equation to determine rx.

1
rX=
1
1
Vb
1
r1 Rs IOPD
r2
Fig. 3 Power down mode

Vb(5V)
Fig. 4 and 5 show the graphs of equations (1) and (2) respec-
r6
tively.
r1
r5
rx
Power down
signal
3,(13)
r2
7,(9)
C3
Tr
RS
Fig. 4 Output current IO vs. Current sense resistor RS
Fig. 5 Output current IOPD vs. Variable current sense resistor rx

2.0
3
r2 V b
r1+r2 RS
r1=510
r2=100
rx=
Vb=5V
IO=
Current sense resistor RS ()
(NOTE)
Ringing noise is produced in the current sense resistor RS when
the MOSFET is switched ON and OFF by chopping. This noise
is also generated in feedback signals from RS which may therefore cause the comparator to malfunction. To prevent chopping
malfunctions, r 5(r6) and C3(C4) are added to act as a noise filter.
Output current IOPD (A)
Output current IO (A)
RS =0.5
1.5
1
Vb
r1(r2+rX) RS
1+
r2 rX
r1=510
r2=100
Vb=5V
IOPD=
RS =0.8
1.0
RS =1
0.5
00
200
400
600
800
1000 1200
Variable current sense resistor rX ()
However, when the values of these constants are increased,

the response from RS to the comparator becomes slow. Hence
the value of the output current IO is somewhat higher than the
calculated value.
Determining the chopper frequency
Fig. 6 Chopper frequency vs. Motor coil resistance
Determining T OFF
The SLA7000M and SMA7000M series are self-excited choppers. The chopping OFF time T OFF is fixed by r 3/C1 and r4/C 2
60
connected to terminal Td.
50
ommended.
20
30
VC
20
Chopper frequency vs. Supply voltage
=2
VCC
25
V
=36
30
35
40
40
40
Motor : 23LM-C202
IO = 0.8A at VCC=24V
RS=1
20
f (kHz)
50
30
r3 = r4 = 47k
500pF
C1
C2
TOFF =12s
RS =1
Lm
=1~3ms
Rm
4 6
8 10 12 14 16
Motor coil resistance Rm ()
Chopper frequency vs. Output current
50
30
Motor : 23LM-C202
VCC=24V
RS=1
20
10
10
4V
10
T OFF = 12s at r3=47k, C1=500pF, Vb=5V
f (kHz)
40
Chopping frequency f (kHz)
The circuit constants and the T OFF value shown below are rec-
ON time TON ( s)
T OFF can be calculated using the following formula:

2
2
TOFFr3 C1rn (1
=r4 C2rn (1
)
Vb
Vb
15
10
20
30
VCC (V)
40
50
0.2
0.4
0.6
0.8
1.0
IO (A)
Thermal Design
(2) The power dissipation Pdiss is obtained using the following formula.
An outline of the method for calculating heat dissipation is shown below.
2-phase excitation: Pdiss 2PH+0.015VS (W)

1-2 phase excitation: Pdiss 3 P H+0.015VS (W)
2
(3) Obtain the temperature rise that corresponds to the calcu-
(1)Obtain the value of P H that corresponds to the motor coil

current IO from Fig. 7 "Heat dissipation per phase PH vs. Output current IO."
lated value of Pdiss from Fig. 8 "Temperature rise."
Fig. 7 Heat dissipation per phase PH vs. Output current IO

SLA7022MU, ASMA7022MU
SLA7029M, SMA7029M
1.2
Heat dissipation per phase PH (W)
1.2
4V
0.8
VC
=4
36
0.6
Motor : 23LM-C202
Holding mode
24
5V
1
0.4
0.2
0.2
0.4
0.6
0.8
1.0
0.8
36
0.6
VCC
V
=44
Motor : 23LM-C004
V Holding mode
15
24V
0.4
0.2
0
1.0
0.2
0.4
0.6
0.8
1.0
Fig. 8 Temperature rise

SMA7000M series
SLA7000M series
150
150
Tja
TCa (C)
Natural cooling
Without heatsink
50
100
C
T
Tja
(C)
TCa
100
C
T Natural cooling
Without heatsink
50
2
3
Total Power (W)
2
3
Total Power (W)
Thermal characteristics
SLA7022MU
30
Without heatsink
Natural cooling
30
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Motor current IO=0.8A
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
Case temperature rise TCa (C)
35
SLA7029M
Without heatsink
Natural cooling
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
1K
SMA7022MU
Without heatsink
Natural cooling
30
25
TC ( 4 pin)
20
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
500
1K
30
Response frequency (pps)
10
1K
SMA7029MU
35
0
200
500
Without heatsink
Natural cooling
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
1K
Supply Voltage VCC vs. Supply Current ICC
SLA7029M, SMA7029M
500
400
400
Motor : 23LM-C202
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
100
Supply current ICC (mA)
SLA7022MU, SMA7022MU
500
0.4A
0.2A
0
10
20
30
40
200
IO=1A
100
50
Motor : 23LM-C004
1-phase excitation
Holding mode
IO : Output current
300
0.5A
0.2A
0
10
20
30
40
50
Torque Characteristics
SLA7022MU, SMA7022MU
2.0
1.5
Motor : PX244-02
Output current IO =0.6A
Motor supply voltage VCC =24V
2-phase excitation
1.0
0.5
0
100
500
1K
5K
Pull-out torque (kg-cm)
2.0
SLA7029M, SMA7029M
1.5
Motor : 23LM-C202
2-phase excitation
1.0
0.5
100
500
1K
5K
11
SMA7036M
2-Phase Excitation
2-Phase Stepper Motor Unipolar Driver IC

Parameter
TTL input voltage
SYNC terminal voltage
Reference voltage
Sense voltage
Output current
Power dissipation
Channel temperature
Storage temperature
Ambient operating temperature
Symbol
V CC
VS
VDSS
VIN
VSYNC
VREF
V RS
IO
PD1
PD2
Tch
Tstg
Ta
Ratings
46
46
100
0.3 to +7
0.3 to +7
0.3 to +7
5 to +7
1.5
4.0 (Ta =25C)
28 (Tc=25C)
150
40 to +150
20 to +85
Units
V
V
V
V
V
V
V
A
W
W
C
C
C
Parameter
Symbol
IS
Condition
VS
FET Drain-Source
VDSS
voltage
Condition
VDS
FET ON voltage
Condition
VSD
FET diode forward voltage
Condition
IDSS
Condition
V IH
Condition
Active H
VIL
Condition
V IH
IN terminal
Condition
Active L
VIL
Condition
II
Input
current
Condition
VSYNCH
Condition
Input
voltage
V SYNCL
Condition
SYNC terminal
ISYNCH
Condition
Input
current
ISYNCL
Condition
V REF
Input
Condition
voltage
V REF
Condition
REF terminal
IREF
Input
Condition
current
RREF
Internal
resistance Condition
Ton
Condition
Tr
Condition
Switching time
Tstg
min
AC characteristics
DC characteristics
Chopping OFF time
12
SMA7036M
Condition
Tf
Condition
TOFF
Condition
10
100
Ratings
typ
10
VS =44V
24
max
15
44
Units
mA
V
V
VS =44V, IDSS=250 A
0.6
ID=1A, V S=10V
1.1
ISD=1A
250
VDSS=100V, VS =44V
V
V
2
ID=1A
0.8
V DSS=100V
2
V DSS=100V
0.8
ID=1A
1
V S=44V, VI=0 or 5V
4.0
Synchronous chopping mode
0.8
Asynchronous chopping mode

0.1
VS =44V, VYS=5V
0.1
mA
VS =44V, VYS=0V
0
2.0
Reference voltage input
4.0
5.5
Output FET OFF

1
No synchronous trigger
40
Resistance between GND and REF terminal at synchronous trigger
1.5
VS =24V, ID=1A
0.5
VS =24V, ID=1A
0.9
VS =24V, ID=1A
0.1
VS =24V, ID=1A
12
VS =24V
2-Phase Stepper Motor Unipolar Driver IC (2-Phase Excitation)
SMA7036M
14
10
15
Vs
IN B
IN A
1, 6, 10, 15pin
Description of pins
Reg.
Oscillator
MOSFET
gate drive
circuit
Reg.
Chopping
blanking timer
(5 s typ)
Chopping
OFF timer
(12 s typ)
Chopping
blanking timer
(5 s typ)
12
11
Rs B
SYNC B
13
GND B
REF B
REF A
GND A
Synchronous
chopping
circuit
SYNC A
Rs A
MOSFET
gate drive
circuit
Chopping
OFF timer
(12 s typ)
Synchronous
chopping
circuit
1pin
6pin
10pin
15pin
Oscillator
Excitation input
Active H
Active L
OUT A
OUT A
OUT A
OUT A
OUT B
OUT B
OUT B
OUT B

Vcc (46V max)

8
10
2-phase excitation
15
VS
2
SyncA
INA
INB
14
INA
SMA7036M
Vb (5V)
11
PchMOS
SyncB
r1
RsA
7
r2
Rs
RefA RefB
3
13
RsB
9
GA
4
GB
INB
clock
IN A
IN B
0
H
L
:
r1
:
r2
RS (1 to 2W) :
PchMOS :
Inv
:
1
H
H
2
L
H
3
L
L
0
H
L
1
H
H
8k
2k (VR)
1 typ
HN1J02FU (Toshiba)
7404
12
Rs
Inv
Disable (High Active)
SMA7036M
13
SMA7036M
External Dimensions
(Unit: mm)
Epoxy resin package

40.2
+0.2
0.65 0.1
1.16 +0.2
0.1
3 0.6
+0.2
0.55 0.1
40.7
P2.030.114=28.42
1.20.1
(5.9)
(7.5)
P2.030.114=28.42
31.3 +0.2
12 3 15
1 2 3 15
Forming No. No.1054
14
SMA7036M
Forming No. No.1055
+0.2
(3)
0.620.1
1.160.15
1.6 0.6
(9.7)
6.7 0.5
1.450.15
0.55 0.1
Lot No.
Part No.
(4.6)
2.50.2
30
8.5max
10.20.2
310.2
SMA7036M
Application Notes
Outline
Connect TTL or similar to the SYNC terminals and switch the
SMA7036M is a stepper motor driver IC developed to reduce

the number of external parts required by the conventional
SYNC terminal level high or low.

When the motor is not running, set the TTL signal high (SYNC
SMA7029M. This IC successfully eliminates the need for some
terminal voltage: 4 V or more) to make chopping synchronous.
external parts without sacrificing the features of SMA7029M.

The basic function pins are compatible with those of SMA7029M.
When the motor is running, set the TTL signal low (SYNC terminal
voltage: 0.8 V or less) to make chopping asynchronous. If chop-
Notes on Replacing SMA7029M
ping is set to synchronous when the motor is running, the motor

torque deteriorates before the coil current reaches the set value.
SMA7036M is pin-compatible with SMA7029M. When using
If no abnormal noise occurs when the motor is not running,
the IC on an existing board, the following preparations are necessary:
ground the SYNC terminals (TTL not necessary).
(1) Remove the resistors and capacitors attached for setting

the chopping OFF time. (r3, r4, C1, and C2 in the catalog)
(2) Remove the resistors and capacitors attached for preventing
noise in the detection voltage VRS from causing malfunctioning and short the sections from which the resistors were re-
SYNC_A
TTL, etc.
SYNC_B
moved using jumper wires. (r5, r6, C3, and C4 in the catalog)
(3) Normally, keep pins 2 and 11 grounded because their functions have changed to synchronous and asynchronous
SMA7036M
switching (SYNC terminals). For details, see "Circuit for Preventing Abnormal Noise When the Motor Is Not Running (SynSYNC voltage : Low Chopping asynchronous
SYNC voltage : High Chopping synchronous
chronous circuit)." (Low: asynchronous, High: synchronous)
Circuit for Preventing Abnormal Noise When the

Motor Is Not Running (Synchronous Circuit)
A motor may generate abnormal noise when it is not running.
The built-in synchronous chopping circuit superimposes a trigger

signal on the REF terminal for synchronization between the two
This phenomenon is attributable to asynchronous chopping be-
phases. The figure below shows the internal circuit of the REF
tween phases A and B. To prevent the phenomenon, SMA7036M

contains a synchronous chopping circuit. Do not leave the SYNC
terminal. Since the VREF varies depending on the values of R1

and R2, determine these values for when the motor is not run-
terminals open because they are for CMOS input.
ning within the range where the two phases are synchronized.
5V
SMA7036M
R1
VREF
R2
REF_A
14
REF_B
To comparator
(high impedance)
40
(typ.)
40
(typ.)
Sync/async
switching signal
ONE SHOT
(tw=2 S)
FET A/A
gate drive signal
ONE SHOT
(tw=2 S)
FET B/B
gate drive signal
VREF waveform
VREF
0
Synchronous circuit operating waveform

VREF
Phase A
0
VRS
VREF
Phase B
0
VRS
Synchronous circuit OFF
Synchronous circuit ON
SMA7036M
15
SMA7036M

(Parameters for determining the output current I O)
Phase A
0

r1,r2: Voltage-divider resistors for the reference supply voltage
Phase A

r2
Vb ................................................................
(1)
IO
r1+r2 RS
Fig. 2 Normal mode

Vb(5V)
(2) Power down mode

r1
The circuit in Fig.3 (r x and Tr) is added in order to decrease the
3,(13)
coil current. I O is then determined as follows.

1
IOPD
r1(r 2+rX)
1+
r2
V
b
.........................................................
(2)
RS
7,(9)
r2 rX
RS

rX=
1
1
Vb
r1
Rs IOPD
1
r2
Vb(5V)
Fig. 4 and 5 show the graphs of equations (1) and (2) respectively.
r1
3,(13)
rx
Power down
signal
r2
7,(9)
Tr
RS
2.0
3
r2 Vb
IO=
r1+r2 RS
r1=510
r2=100
rx=
Vb=5V
16
SMA7036M
RS =0.5
1.5
1
Vb
r1(r2+rX) RS
1+
r2 rX
r1=510
r2=100
Vb=5V
IOPD=
RS =0.8
1.0
RS =1
0.5
00
200
400
600
800
1000 1200
Thermal Design
(2) The power dissipation Pdiss is obtained using the following
An outline of the method for calculating heat dissipation is

shown below.
(1) Obtain the value of P H that corresponds to the motor coil
current IO from Fig. 6 "Heat dissipation per phase PH vs. Output current IO."
formula.
2-phase excitation: Pdiss 2PH +0.015V S (W)
3
PH +0.015V S (W)
2
(3) Obtain the temperature rise that corresponds to the calcu1-2 phase excitation: Pdiss
1.2
150
1.0
0.8
0.6
VCC
=44
V
24V
0.4
100
36
Motor : 23LM-C004
Holding mode
V
15
Tja
(C)
TCa
SMA7036M
Natural cooling
Without heatsink
50
0.2
0
0.2
0.4
0.6
0.8
1.0
2
3
Total Power (W)
30
Without heatsink
Natural cooling
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
1K
SMA7036M
17
SMA7036M
2.0
400
Motor : 23LM-C004
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
100
500
1.5
0.5
0.5A
0.2A
0
10
20
30
40
Motor : 23LM-C202
2-phase excitation
1.0
50
100
50
50
40
40
Motor : 23LM-C202
RS=1
20
10
1K
5K
f (kHz)
f (kHz)
30
500
30
Motor : 23LM-C202
VCC=24V
RS=1
20
10
10
20
30
40
50
0.2
VCC (V)
0.4
0.6
0.8
1.0
IO (A)
The input terminals of this product use C-MOS circuits. Observe the following precautions.
Carefully control the humidity of the room to prevent the buildup of static electricity. Since static electricity is particularly a problem
during the winter, be sure to take sufficient precautions.
Take care to make sure that static electricity is not applied to the IC during wiring and assembly. Take precautions such as shorting
the terminals of the printed wiring board to ensure that they are at the same electrical potential.
18
SMA7036M
SMA7036M
19
SLA7027MU/SLA7024M/SLA7026M

Parameter
Symbol

TTL input voltage
Reference voltage
Output current
VCC
V DSS
VS
VIN
VREF
IO
PD1
PD2
Tch
Tstg
Power dissipation
Channel temperature
Storage temperature
(Ta=25C)
Ratings
SLA7024M
46
100
46
7
2
1.5
35 (TC=25C)
+150
40 to +150
SLA7027MU
Units
SLA7026M
V
V
V
V
V
A
W
W
C
C
Parameter
Symbol
min
IS
Condition
VS
VDSS
Condition
VDS
FET ON voltage
Condition
IDSS
Condition
VSD
Condition
IIH
Condition
TTL input current
IIL
Condition
V IH
TTL input voltage
Condition
(Active High)
VIL
Condition
V IH
TTL input voltage
Condition
(Active Low)
VIL
Condition
Tr
Condition
Tstg
Switching time
Condition
Tf
Condition
AC characteristics
DC characteristics
20
10
100
SLA7027MU
typ
10
VS =44V
24
max
15
min
44
10
100
VS =44V, IDSS=250 A
Ratings
SLA7024M
typ
10
VS=44V
24
max
15
min
44
10
100
VS=44V, IDSS=250A
0.85
4
1.2
1.1
40
2.3
ID=3A
40
VIH=2.4V, VS=44V
40
VIH =2.4V, VS =44V

0.8
VIH=2.4V, VS=44V
0.8
V IL=0.4V, VS =44V
0.8
VIL=0.4V, VS=44V
V IL=0.4V, VS =44V
2
ID=1A
ID=3A
0.8
VDSS=100V
0.8
VDSS=100V
V
mA
V
A
mA
VDSS=100V
2
VDSS=100V
2
ID=1A
0.8
2
VDSS=100V
0.8
ID=1A
0.5
VS=24V, ID=0.8A
0.7
VS=24V, ID=0.8A
0.1
VS=24V, ID=0.8A
4
V DSS=100V, VS =44V
ID=1A
mA
ID=3A, VS=14V
VDSS=100V, VS=44V
ID=1A
44
0.85
ID=1A, VS =14V
V DSS=100V, VS =44V
Units
max
15
VS =44V, IDSS=250 A
0.6
ID=1A, AV S=14V
SLA7026M
typ
10
VS =44V
24
VDSS=100V
0.8
ID=1A
0.5
VS =24V, ID=1A
0.7
VS =24V, ID=1A
0.1
VS =24V, ID=1A
0.8
ID=3A
0.5
V S=24V, ID=1A
0.7
V S=24V, ID=1A
0.1
V S=24V, ID=1A
2-Phase Stepper Motor Unipolar Driver ICs (2-Phase/1-2 Phase Excitation)
12
Reg
Reg
17
16
18
IN B
VSB
VSA
IN A
IN A
IN B

11
1, 8, 11, 18pin
Description of pins
3 14
13
1
8
11
18
input
Active L
OUTA
OUTA
OUT B
OUT B
RSB
GB
TDB
REFB
Pin
Pin
Pin
Pin
REFA
TDA
GA
RSA
Excitation
Active H
OUTA
OUTA
OUT B
OUT B
15
10
Diagram of Standard External Circuit(Recommended Circuit Constants)

Active High
VCC (46V max)

2-phase excitation
Vb (5V)
r3
7 12
8
VSA VSB OUTA
11
OUTB
r1
r4
2
C1
1
18
OUTA OUTB
13
C2
TdA
TdB
INA
SLA7024M
7026M
7027MU
RSA REFA REFB RSB

9
3 14
10
r2
C3
INA
INB
INB
GB
15
GA
4
6
5
17
16
r6
0
H
L
H
L
1
L
H
H
L
2
L
H
L
H
3
H
L
L
H
0
H
L
H
L
r1 :
r2 :
r3 :
r4 :
r5 :
r6 :
C1 :
C2 :
C3 :
C4 :
Rs :
510
100 (VR)
47k
47k
2.4k
2.4k
470pF
470pF
2200pF
2200pF
1 typ(7024M)
(1 to 2W) 0.68 typ(7026M)
1.8 typ(7027MU)
1
L
H
H
L
INA
INA
INB
Active
High
INB

clock
IN A
IN A
IN B
IN B
C4
r5
Rs
clock
IN A
IN A
IN B
IN B
Rs
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L
3
L
H
H
L
4
L
H
L
L
5
L
H
L
H
6
L
L
L
H
7
H
L
L
H
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L
3
L
H
H
L
Active Low
VCC (46V max)

2-phase excitation
Vb (5V)
r3
C1
7 12
8
1
18
VSA VSB OUTA OUTA OUTB
11
OUTB
r1
r4
C2
r2
2 TdA
TdB
13
C3
Rs
INA
SLA7024M
7026M
7027MU
RSA REFA REFB RSB

9
3 14
10
C4
r5
r6
Rs
clock
IN A
IN A
IN B
IN B
INA
INB
GA
4
INB
GB
15
6
5
17
16
0
L
H
L
H
1
H
L
L
H
2
H
L
H
L
3
L
H
H
L
0
L
H
L
H
r1
r2
r3
r4
r5
r6
C1
C2
C3
C4
Rs
510
100(VR)
47k
47k
2.4k
2.4k
470pF
470pF
2200pF
2200pF
1 typ(7024M)
(1 to 2W) 0.68 typ(7026M)
1.8 typ(7027MU)
1
H
L
L
H
INA
INA
INB
Active
Low
INB

clock
IN A
IN A
IN B
IN B
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
3
H
L
L
H
4
H
L
H
H
5
H
L
H
L
6
H
H
H
L
7
L
H
H
L
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
:
:
:
:
:
:
:
:
:
:
:
3
H
L
L
H
21
External Dimensions
+0.2
+0.2
0.65 0.1
1 0.1
17P1.680.4=28.561
+0.2
+0.2
0.65 0.1
1 0.1
+0.2
0.55 0.1
40.7
2.20.6
60.6
7.50.6
17P1.680.4=28.561
31.30.2
1 2 3 18
Forming No. No.871
22
123 18
Forming No. No.872
+0.2
4.6 0.6
+1
(3)
R-End
3 0.6
2.450.2
0.55 0.1
1.6 0.6
3.
4.
5.
Part No.
Lot No.
4.80.2
1.70.1
6.70.5
9.9 0.2
16 0.2
3.20.153.8
9.7 0.5
310.2
24.40.2
16.40.2
3.20.15
13 0.2
(Unit: mm)
Application Notes

Phase A
0

Phase A

Vb ................................................................
r2
(1)
IO
r1+r2 RS
Fig. 2 Normal mode

Vb(5V)
(2) Power down mode
r6
r1
r5
3,(14)

1
IOPD
r1(r 2+rX)
1+
r2
V
b
.........................................................
(2)
RS
C3
9,(10)
r2 rX
RS

rX=
1
1
Vb
r1
R s I OPD
1
r2
Vb(5V)
Fig. 4 and 5 show the graphs of equations (1) and (2) respectively.
r6
r5
r1
rX
Power down
signal
Fig. 4 Output current IO vs. Current sense resistor R S
C3
Tr
2.0
3
r2 V b
r1+r2 RS
r1=510
r2=100
rx=
Vb=5V
IO=
9,(10)
r2
3,(14)
RS =0.5
1.5
1
Vb
r1(r2+rX) RS
1+
r2 rX
r1=510
r2=100
Vb=5V
IOPD=
RS =0.8
1.0
RS =1
0.5
00
200
400
600
800
1000 1200
(NOTE)

is also generated in feedback signals from RS which may there-

fore cause the comparator to malfunction. To prevent chopping
calculated value.
malfunctions, r 5(r 6) and C3(C4) are added to act as a noise filter.

23
Determining T OFF
The SLA7000M series are self-excited choppers. The chopping
OFF time T OFF is fixed by r3/C1 and r4/C2 connected to terminal
60
Td.
50
TOFFr3 C1rn (1
=r4 C2rn (1
Vb
Vb
The circuit constants and the T OFF value shown below are recommended.
40
30
VC
40
10
4V
25
30
35
40
10
20
30
40
50
VCC (V)
47k
r4
500pF
C1 = C2 =
TOFF =12s
RS =1
Lm
=1~3ms
Rm
4
6
8 10 12 14 16
30
Motor : 23LM-C202
VCC=24V
RS=1
20
10
r3
f (kHz)
f (kHz)
40
20
24
50
Motor : 23LM-C202
RS=1
=2
10
50
30
=36
VCC
20
20
ON time TON ( s)
15
0.2
0.4
0.6
IO (A)
0.8
1.0
Thermal Design
An outline of the method for calculating heat dissipation is shown be(1) Obtain the value of PH that corresponds to the motor coil current

3
PH+0.015VS (W)
1-2 phase excitation: Pdiss
2
IO from Fig. 7 "Heat dissipation per phase PH vs. Output current IO."
low.
Fig. 7 Heat dissipation per phase P H vs. Output current IO

SLA7027MU
SLA7026M
4.0
Motor : 23LM-C202
Holding mode
24
15
0.4
0.2
0.2
0.4
0.6
0.8
2.0
Motor : 23PM-C503
Holding mode
1.0
0
0
1.0
15
V
36
=4
4V
V
0.6
3.0
=4
24
V
CC
VC
4V
0.8
36
1.2
1.0
2.0
3.0

150
1.0
T
0.8
100
V
36
0.6
VCC
V
=44
Motor : 23LM-C004
Holding mode
5V
24V
0.4
C
T
Tja
TCa (C)
1.2
SLA7024M
Natural cooling
Without heatsink
50
0.2
0
0.2
0.4
0.6
0.8
1.0
2
3
Total Power (W)
SLA7027MU
SLA7026M
50
Without heatsink
Natural cooling
30
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
1K
30
35
Without heatsink
Natural cooling
40
30
TC( 4 pin)
Motor : 23PM-C705
Ta=25C
VCC=24V, VS=24V
2-phase excitation
20
10
0
100
500
1K
5K
SLA7024M
Without heatsink
Natural cooling
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
1K
25

SLA7027MU
SLA7026M
1.5
400
Motor : 23LM-C202
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
100
Supply current ICC (A)
500
1.0
Motor : 23PM-C503
1-phase excitation
Holding mode
IO : Output current
IO=3A
0.5
IO=2A
0.4A
0.2A
0
10
20
30
40
IO=1A
50
10
20
30
40
50
SLA7024M
500
400
Motor : 23LM-C004
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
100
0.5A
0.2A
0
10
20
30
40
50
Note
The excitation input signals of the SLA7027MU, SLA7024M and SLA7026M can be used as either Active High or Active Low. Note,
however, that the corresponding output (OUT) changes depending on the input (IN).
Active Low
Active High
26
Input
Corresponding output
Input
INA (pin6)
OUTA (pin1)
INA (pin6)
OUTA (pin8)
INA (pin5)
OUTA (pin8)
INA (pin5)
OUTA (pin1)
INB (pin17)
OUTB (pin11)
INB (pin17)
OUTB (pin18)
INB (pin16)
OUTB (pin18)
INB (pin16)
OUTB (pin11)
27
SLA7032M/SLA7033M

Parameter
(Ta=25C)
Ratings
Symbol

TTL input voltage
SYNC terminal voltage
Reference voltage
Sense voltage
Output current
SLA7032M
VCC
VS
V DSS
VIN
V SYNC
V REF
VRS
IO
P D1
P D2
Tch
Tstg
Power dissipation
Channel temperature
Storage temperature
Units
SLA7033M
46
46
100
0.3 to +7
0.3 to +7
0.3 to +7
5 to +7
V
V
V
V
1.5
V
V
A
W
W
C
C
3
35 (Tc = 25C)
+150
40 to +150
Ratings
Parameter
Symbol
min

FET Drain-Source
voltage
FET ON voltage
DC characteristics
OUT
IN terminal
OUT
Input
current
Input
voltage
SYNC terminal
Input
current
Input
current
REF terminal
Input
current
AC characteristics
Internal
resistance
28
Switching time
Chopping OFF time
SLA7032M/SLA7033M
IS
Condition
VS
VDSS
Condition
VDS
Condition
VSD
Condition
10
100
SLA7032M
typ
10
VS=44V
24
max
15
min
44
10
100
V S=44V, IDSS=250A
SLA7033M
typ
10
V S=44V
24
Units
max
15
44
0.6
0.85
ID=3A, VS =14V
1.1
2.3
ISD =1A
ISD=3A
IDSS
250
Condition
VDSS=100V, VS=44V
VIH
2.0
Condition
ID=1A
VIL
0.8
Condition
VDSS=100V
VIH
2.0
Condition
VDSS=100V
VIL
0.8
Condition
ID=1A
II
1
Condition
VS =44V, V I=0 or 5V
VSYNC
4.0
Condition
VSYNC
0.8
Condition
ISYNC
0.1
Condition
VS=44V, VYS=5V
ISYNC
0.1
Condition
VS=44V, VYS=0V
VREF
0
2.0
Condition
VREF
4.0
5.5
Condition
Output FET OFF
IREF
1
Condition
RREF
40
Condition Resistance between GND and REF terminal at synchronous trigger
Tr
0.5
Condition
VS =24V, ID=1A
Tstg
0.7
Condition
VS =24V, ID=1A
Tf
0.1
Condition
VS =24V, ID=1A
TOFF
12
Condition
VS=24V
V
V
VS =44V, IDSS=250 A
ID=1A, VS =14V
mA
250
V DSS=100V, VS =44V
V
V
2.0
ID=3A
0.8
VDSS=100V
2.0
VDSS=100V
0.8
ID=3A
1
VS=44V, VI =0 or 5V
4.0
0.8

0.1
V S=44V, VYS=5V
0.1
mA
V S=44V, VYS=0V
0
2.0
4.0
5.5
Output FET OFF

1
40
Resistance between GND and REF terminal at synchronous trigger
0.5
V S=24V, ID=1A
0.7
V S=24V, ID=1A
0.1
V S=24V, ID=1A
12
V S=24V
2-Phase Stepper Motor Unipolar Driver IC (2-Phase/1-2 Phase Excitation)
SLA7032M/SLA7033M

17
16
11
IN B
12
IN B
Vs B
Vs A
IN A
IN A
18
1, 8, 11, 18pin
Description of pins
Reg.
Chopping
blanking timer
(5 s typ)
Oscillator
MOSFET
gate drive
circuit
Chopping
OFF timer
(12 s typ)
Chopping
blanking timer
(5 s typ)
MOSFET
gate drive
circuit
Chopping
OFF timer
(12 s typ)
14
13
Rs B
GB
15
SYNC B
REF B
GA
REF A
Synchronous
chopping
circuit
SYNC A
Rs A
1pin
8pin
11pin
18pin
Oscillator
Synchronous
chopping
circuit
Excitation input
Active H
Active L
OUT A
OUT A
OUT A
OUT A
OUT B
OUT B
OUT B
OUT B
Reg.
10

Active High
2-phase excitation
Vcc (46Vmax)
clock
IN A
IN A
IN B
IN B
12
VsA
2
Vb (5V)
VsB
18
11
OUTA OUTA OUTB OUTB
SYNC A
SLA7032M
SLA7033M
13
SYNC B
INA 6
INA
INA 5
INA
INB 17
INB
INB 16
INB
0
H
L
H
L
1
L
H
H
L
2
L
H
L
H
3
H
L
L
H
0
H
L
H
L
r1 : 4k
r2 : 1k(VR)
R s : 1 typ(7032M)
(1 to 2W)
0.68 typ(7033M)
1
L
H
H
L
Active
High

RsA
r1
REFA REFB RsB

3
14
GA
10
Rs
GB
clock
IN A
IN A
IN B
IN B
15
Rs
r2
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L
3
L
H
H
L
4
L
H
L
L
5
L
H
L
H
6
L
L
L
H
7
H
L
L
H
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L
3
L
H
H
L
Active Low
2-phase excitation
Vcc (46Vmax)
clock
IN A
IN A
IN B
IN B
7
VsA
2
Vb (5V)
13
VsB
18
11
OUTA OUTA OUTB OUTB
SYNC A
SLA7032M
SLA7033M
SYNC B
RsA
r1
9
Rs
r2
12
REFA REFB RsB

3
14
GA
10
4
Rs
INA 6
INA
INA 5
INA
INB 17
INB
INB 16
INB
GB
15
0
L
H
L
H
1
H
L
L
H
2
H
L
H
L
3
L
H
H
L
0
L
H
L
H
r1 : 4k
r2 : 1k(VR)
R s : 1 typ(7032M)
(1 to 2W) 0.68 typ(7033M)
1
H
L
L
H
Active
Low

clock
IN A
IN A
IN B
IN B
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
3
H
L
L
H
4
H
L
H
H
5
H
L
H
L
6
H
H
H
L
7
L
H
H
L
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
3
H
L
L
H
SLA7032M/SLA7033M
29
SLA7032M/SLA7033M
External Dimensions
+0.2
+0.2
0.65 0.1
1 0.1
17P1.680.4=28.561
+0.2
+0.2
0.65 0.1
1 0.1
+0.2
0.55 0.1
40.7
2.20.6
60.6
7.50.6
17P1.680.4=28.561
31.30.2
1 2 3 18
Forming No. No.871
30
SLA7032M/SLA7033M
123 18
Forming No. No.872
+0.2
4.6 0.6
+1
(3)
R-End
3 0.6
2.450.2
0.55 0.1
1.6 0.6
3.
4.
5.
Part No.
Lot No.
4.80.2
1.70.1
6.70.5
9.9 0.2
16 0.2
3.20.153.8
9.7 0.5
310.2
24.40.2
16.40.2
3.20.15
13 0.2
(Unit: mm)
SLA7032M/SLA7033M
Application Notes
Outline
SLA7032M (SLA7033M) is a stepper motor driver IC developed
to reduce the number of external parts required by the conventional SLA7024M (SLA7026M). This IC successfully eliminates
the need for some external parts without sacrificing the features
of SLA7024M (SLA7026M). The basic function pins are compatible with those of SLA7024M (SLA7026M).
Notes on Replacing SLA7024M (SLA7026M)

SLA7032M (SLA7033M) is pin-compatible with SLA7024M
(SLA7026M). When using the IC on an existing board, the following preparations are necessary:
the SYNC terminals open because they are for CMOS input.
Connect TTL or similar to the SYNC terminals and switch the
SYNC terminal level high or low.
When the motor is not running, set the TTL signal high (SYNC
terminal voltage: 4 V or more) to make chopping synchronous.
When the motor is running, set the TTL signal low (SYNC terminal
voltage: 0.8 V or less) to make chopping asynchronous. If chopping is set to synchronous at when the motor is running, the motor
torque deteriorates before the coil current reaches the set value.
If no abnormal noise occurs when the motor is not running,
ground the SYNC terminals (TTL not necessary).
(1) Remove the resistors and capacitors attached for setting

the chopping OFF time. (r3, r4, C1, and C2 in the catalog)
(2) Remove the resistors and capacitors attached for preventing
noise in the detection voltage VRS from causing malfunctioning and short the sections from which the resistors were re-
SYNC_A
TTL, etc.
SYNC_B
moved using jumper wires. (r5, r6, C3, and C4 in the catalog)
(3) Normally, keep pins 2 and 13 grounded because their funcSLA7032M
SLA7033M
tions have changed to synchronous and asynchronous

switching (SYNC terminals). For details, see "Circuit for Preventing Abnormal Noise When the Motor Is Not Running (Syn-
SYNC voltage : Low Chopping asynchronous

SYNC voltage : High Chopping synchronous
chronous circuit)." (Low: asynchronous, High: synchronous)
Circuit for Preventing Abnormal Noise When the

Motor Is Not Running (Synchronous Circuit)
A motor may generate abnormal noise when it is not running. This
phenomenon is attributable to asynchronous chopping between
phases A and B. To prevent the phenomenon, SLA7032M
(SLA7033M) contains a synchronous chopping circuit. Do not leave
The built-in synchronous chopping circuit superimposes a trigger

signal on the REF terminal for synchronization between the two
phases. The figure below shows the internal circuit of the REF
terminal. Since the VREF varies depending on the values of R1
and R2, determine these values for when the motor is not running within the range where the two phases are synchronized.
5V
R1
VREF
R2
REF_A
14
REF_B
To comparator
(high impedance)
40
(typ.)
40
(typ.)
SLA7032M
SLA7033M
Sync/async switching
signal
ONE SHOT
(tw=2 S)
FET A/A
gate drive signal
ONE SHOT
(tw=2 S)
FET B/B
gate drive signal
VREF waveform
VREF
0
Synchronous circuit operating waveform

VREF
Phase A
0
VRS
VREF
Phase B
0
VRS
Synchronous circuit OFF
Synchronous circuit ON
SLA7032M/SLA7033M
31
SLA7032M/SLA7033M

(Parameters for determining the output current I O)
Phase A
0

Phase A

IO
r2
r1+r2
Vb ................................................................
(1)
RS
Fig. 2 Normal mode

Vb(5V)
(2) Power down mode
r1
3,(14)
coil current. I O is then determined as follows.

1
IOPD
r1(r 2+rX)
1+
r2
V
b
.........................................................
(2)
RS
9,(10)
r2 rX
RS

rX=
1
1
r1
Vb
R s IOPD
1
r2
Vb(5V)
Fig. 4 and 5 show th e graphs of equations (1) and (2) respectively.
r1
rX
Power down
signal
3
r2 V b
r1+r2 RS
r1=510
r2=100
rx=
Vb=5V
IO=
SLA7032M/SLA7033M
Tr
2.0
32
9,(10)
r2
Fig. 5 Output current IOPD vs. Variable current sense resistor r x
3,(14)
RS =0.5
1.5
1
Vb
r1(r2+rX) RS
1+
r2 rX
r1=510
r2=100
Vb=5V
IOPD=
RS =0.8
1.0
RS =1
0.5
00
200
400
600
800
1000 1200
SLA7032M/SLA7033M
Thermal Design
An outline of the method for calculated heat dissipation is shown below.
(1) Obtain the value of PH that corresponds to the motor coil current IO from Fig. 6 "Heat dissipation per phase PH vs. Output current IO."
3
P H+0.015VS (W)
2
(3) Obtain the temperature rise that corresponds to the computed value of Pdiss from Fig. 7 "Temperature rise."
SLA7033M
SLA7032M
4.0
VC
Motor : 23LM-C004
Holding mode
5V
24V
0.4
0.2
0
0.2
0.4
0.6
0.8
2.0
15
Motor : 23PM-C503
Holding mode
1.0
0
0
1.0
=4
4
C
44
C=
24
0.6
3.0
VC
V
36
0.8
36
1.0
1.2
1.0
2.0
3.0
150
100
Tja
TCa (C)
C
T
Natural cooling
Without heatsink
50
2
3
Total Power (W)
SLA7032M
SLA7033M
50
Without heatsink
Natural cooling
25
20
TC ( 4 pin)
15
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
10
5
0
200
500
1K
30
Without heatsink
Natural cooling
40
30
TC( 4 pin)
Motor : 23PM-C705
Ta=25C
VCC=24V, VS=24V
2-phase excitation
20
10
0
100
500
1K
5K
SLA7032M/SLA7033M
33
SLA7032M/SLA7033M
Supply Voltage VCC vs. Supply Current I CC
SLA7033M
SLA7032M
1.5
400
Motor : 23LM-C004
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
Supply current ICC (A)
500
1.0
Motor : 23PM-C503
1-phase excitation
Holding mode
IO : Output current
IO=3A
0.5
IO=2A
100
0.5A
0.2A
0
10
20
30
40
IO=1A
0
50
10
20
30
40
50
SLA7032M
2.0
6.0
SLA7033M
Motor : 23LM-C202
2-phase excitation
1.0
0.5
5.0
1.5
4.0
Motor : 23PM-C705
2-phase excitation
3.0
2.0
1.0
100
500
1K
34
SLA7032M/SLA7033M
5K
100
500
1K
5K
10K
50
50
40
40
30
Motor : 23LM-C202
RS=1
20
30
Motor : 23LM-C202
VCC=24V
RS=1
20
10
10
f (kHz)
f (kHz)
SLA7032M/SLA7033M
10
20
30
40
50
0.2
0.4
0.6
0.8
1.0
IO (A)
VCC (V)
Note
The excitation input signals of the SLA7032M, SLA7033M can be used as either Active High or Active Low. Note, however, that the
corresponding output (OUT) changes depending on the input (IN).
Active Low
Active High
Input
INA (pin6)
OUTA (pin1)
INA (pin6)
OUTA (pin8)
INA (pin5)
OUTA (pin8)
INA (pin5)
OUTA (pin1)
INB (pin17)
OUTB (pin11)
INB (pin17)
OUTB (pin18)
INB (pin16)
OUTB (pin18)
INB (pin16)
OUTB (pin11)
Input
The input terminals of this product use C-MOS circuits. Observe the following precautions.
Carefully control the humidity of the room to prevent the buildup of static electricity. Since static electricity is particularly a problem
during the winter, be sure to take sufficient precautions.
Take care to make sure that static electricity is not applied to the IC during wiring and assembly. Take precautions such as shorting
the terminals of the printed wiring board to ensure that they are at the same electrical potential.
SLA7032M/SLA7033M
35
SDK03M

Parameter
TTL input voltage
Reference voltage
Output current
Power dissipation
Channel temperature
Storage temperature
Symbol
V CC
VDSS
VS
V IN
VREF
IO
PD
Tch
Tstg
Ratings
46
100
46
7
2
1
+150
40 to +150
Units
V
V
V
V
V
A
W
C
C
Parameter
FET Drain-Source
voltage
FET ON voltage
DC characteristics

FET diode forward
voltage
TTL input current
TTL input voltage

(Active High)
AC characteristics
TTL input voltage

(Active Low)
36
Switching time
SDK03M
Symbol
min
IS
Condition
VS
VDSS
Condition
VDS
Condition
IDSS
Condition
VSD
Condition
IIH
Condition
IIL
Condition
VIH
Condition
VIL
Condition
VIH
Condition
VIL
Condition
Tr
Condition
Tstg
Condition
Tf
Condition
10
100
Ratings
typ
5
VS =44V
24
max
7.5
44
Units
mA
V
V
VS =44V, IDSS=250 A
0.85
ID=1A, V S=14V
4
VDSS=100V, VS=44V
1.2
ID=1A
40
V IH=2.4V, VS=44V
0.8
VIL=0.4V, VS=44V
V
mA
V
A
mA
2
ID=1A
0.8
V DSS=100V
2
V DSS=100V
0.8
ID=1A
0.5
V S=24V, ID=0.8A
0.7
V S=24V, ID=0.8A
0.1
V S=24V, ID=0.8A
SDK03M
6
IN1
16
5
IN2
7
VS
1, 8, 9, 16pin Description of pins

Excitation input
Active H Active L
Reg.
14 NC
Pin 1
Pin 16
OUT1
OUT2
11 NC
Pin 8
Pin 9
OUT2
OUT1
RS
15
RS
10
RS
13
GND
4
GND
12
TD
2
REF
3

Active High
2-phase excitation
VCC (46V max)
+
Motor coil
Phase A
Active
High
IN1
Motor coil
Phase B
Vb (5V)
OUT1 OUT2
IN1
16 8
VS
r 3 r1 r 4
SDK03M
5
IN2
12
RS
TD
13
REF
IN2
GND
RS
13
15
10
10
r5
C3
RS
r2
C1
Active Low
r6
Active
Low
IN1
IN2
OUT2 OUT1
IN1
16 8
VS
Motor coil
Phase B
16 8
SDK03M
Phase B
RS
TD
TD
REF
13
REF
10
15
10
C3
RS
r5
r2
C1
r6
C2
IN2
GND
RS
13
C4
RS
0
H
L
H
L
1
L
H
H
L
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L
3
L
H
H
L
4
L
H
L
L
5
L
H
L
H
6
L
L
L
H
7
H
L
L
H
0
H
L
L
L
1
H
L
H
L
2
L
L
H
L

2-phase excitation
Phase clock
0
1
2
3
0
IN 1
L
H
H
L
L
Phase A
IN 2
H
L
L
H
H
IN 1
L
L
H
H
L
Phase B
H H
L
L
H
IN 2
IN1
510
100 (VR)
47k
47k
2.4k
2.4k
470pF
470pF
2200pF
2200pF
1.8 typ
r1 :
r2 :
r3 :
r4 :
r5 :
r6 :
C1 :
C2 :
C3 :
C4 :
RS :
510
100 (VR)
47k
47k
2.4k
2.4k
470pF
470pF
2200pF
2200pF
1.8 typ
3
L
H
H
L
1
H
L
L
H
Active
Low
IN2
(1 to 2W)
1-2-phase excitation
12
r1 :
r2 :
r3 :
r4 :
r5 :
r6 :
C1 :
C2 :
C3 :
C4 :
RS :
(1 to 2W)
OUT2 OUT1 6
IN1
Phase A
15
VS
SDK03M
IN2
GND
12
r 3 r1 r 4
3
H
L
L
H
IN2
Phase clock
IN 1
IN 2
IN 1
Phase B
IN 2
RS
Vb (5V)
2
L
H
L
H
Active
High
Phase A
+
Motor coil
Phase A
1
L
H
H
L
1-2-phase excitation
VCC (46V max)
IN1
12
C4
C2
0
H
L
H
L
Phase B
TD
REF
15
16 8
OUT1 OUT2 6
IN1
SDK03M
Phase A
IN2
GND
VS
Phase clock
IN 1
IN 2
IN 1
Phase B
IN 2
Phase A
Phase clock
IN 1
IN 2
IN 1
Phase B
IN 2
Phase A
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
3
H
L
L
H
4
H
L
H
H
5
H
L
H
L
6
H
H
H
L
7
L
H
H
L
0
L
H
H
H
1
L
H
L
H
2
H
H
L
H
3
H
L
L
H
SDK03M
37
SDK03M
External Dimensions
(Unit: mm)
0.890.15
2.540.25
+0.15
0.75 0.05
9
16
6.8max.
Part No.
Lot No.
8.00.5
19.560.2
0~0.1
3.00.2
9.80.3
38
SDK03M
4.0max.
3.6 0.2
1.4 0.2
0.25
0.3 0.05
+0.15
6.30.2
1.00.3
20.0max.
SDK03M
Application Notes

Phase A
0

Phase A

Vb
r2
................................................................ (1)
IO
r1+r2 RS
Fig. 2 Normal mode

Vb(5V)
(2) Power down mode
r6
r1
r5
The circuit in Fig.3 (rx and Tr ) is added in order to decrease the

1
IOPD
r1(r 2+rX)
1+
r2
Vb
......................................................... (2)
RS
C3
10 13 15
r2 rX
RS

1
rX=
1
1
Vb
1
r1 R s IOPD
r2

Vb(5V)
Fig. 4 and 5 show the graphs of equations (1) and (2) respec-
r6
tively.
r1
r5
rX
r2
10 13 15
C3
Power down
signal
Tr
RS
2.0
3
r2 Vb
r1+r2 RS
r1=510
r2=100
rx=
Vb=5V
IO=
(NOTE)
RS =0.5
1.5
1
Vb
r1(r2+rX) RS
1+
r2 rX
r1=510
r2=100
Vb=5V
IOPD=
RS =0.8
1.0
RS =1
0.5
00
200
400
600
800
1000 1200
is also generated in feedback signals from RS which may therefore cause the comparator to malfunction. To prevent chopping

calculated value.
malfunctions, r 5(r 6) and C3(C4) are added to act as a noise filter.

SDK03M
39
SDK03M
Determining T OFF
SDK03M is self-excited choppers. The chopping OFF time TOFF
is fixed by r3/C1 and r4/C2 connected to terminal Td.
60
2
Vb
=r4 C2 rn (1
2
Vb
The circuit constants and the T OFF value shown below are recommended.
ON time TON ( s)
TOFFr3 C1rn (1
50
40
20
30
VC
20
=2
4V
25
V
VCC
=36
30
35
40
10
0
4 6
8 10 12 14 16
50
50
40
40
30
Motor : 23LM-C202
RS=1
20
10
30
Motor : 23LM-C202
VCC=24V
RS=1
20
10
10
20
30
VCC (V)
40
SDK03M
40
50
r3 = r4 = 47k
500pF
C1
C2
TOFF =12s
RS =1
Lm
=1~3ms
Rm
f (kHz)
f (kHz)
15
0.2
0.4
0.6
IO (A)
0.8
1.0
SDK03M
Thermal Design
An outline of the method for computing heat dissipation is shown below.
2-phase excitation: Pdiss PH+0.0075VS (W)

3
P H+0.0075VS (W)
4
(1) Obtain the value of PH that corresponds to the motor coil current
IO from Fig. 7 "Heat dissipation per phase PH vs. Output current
IO."

150
1.2
4V
=4
100
36
0.6
Motor : 23LM-C202
Holding mode
24
15
Glass epoxy board

(mounted on level surface)
(95691.2mm)
Natural cooling
T
j
VC
Tja (C)
TCa
0.8
50
0.4
0.2
0.2
0.4
0.6
0.8
0
0
1.0
1
2
Total power (W)
50
40
TC
( 9 pin)
30
Natural cooling
Glass epoxy board
(mounted on level surface)
(95691.2mm)
Motor : PH265-01B
Ta=25C
VCC=24V, VS=24V
2-phase excitation
20
10
0
200
1K
500
Supply Voltage VCC vs. Supply Current I CC
2.0
400
Motor : 23LM-C202
1-phase excitation
Holding mode
IO : Output current
300
200
IO=1A
100
500
1.5
Motor : PX244-02
2-phase excitation
1.0
0.5
0.4A
0.2A
0
10
20
30
40
50
0
100
500
1K
5K
Note
The excitation input signals of the SDK03M can be used as either Active High or Active Low. Note, However, that the corresponding
output (OUT) changes depending on the input (IN).
Active High
Active Low
Input
Input
IN1 (pin6)
OUT1 (pin1, 16)
IN1 (pin6)
OUT1 (pin8, 9)
IN2 (pin5)
OUT2 (pin8, 9)
IN2 (pin5)
OUT2 (pin1, 16)

SDK03M
41
UCN5804B
2-Phase Stepper Motor Unipolar Driver IC

Allegro MicroSystems product
Features
Internal 1-phase/1-2 phase/2-phase excita-
Parameter
Output voltage
Output sustaining voltage
Output current (1 circuit)
Logic supply voltage
Input voltage
Package power dissipation
Operating temperature
Junction temperature
Storage temperature
tion pattern generator

Output enable and direction control
Power-on reset
Internal thermal shutdown circuitry
Internal transient-suppression diodes
Low thermal resistance 16-pin DIP
(Ta =+25C)
Symbol
V CE
VCE (SUS)
IO
VDD
VIN
PD (Note1)
Ta
T j (Note2)
T stg
Ratings
50
35
1.5
7.0
7.0
2.90
20 to +85
+150
55 to +150
Units
V
V
A/unit
V
V
W/pkg
C
C
C
Note 1: When ambient temperature is 25C or over, derate using 23.3mW/C.

Note 2: Fault conditions where junction temperature (Tj) exceeds 150C will activate the device's thermal
shutdown circuitry. These conditions can be tolerated but should be avoided.
(Unless specified otherwise, Ta =25C, VDD=4.5V to 5.5V)

Limits
Parameter
Symbol
Conditions
Output drivers
Output leakage current
ICEX
VCE (SUS)
Output saturation voltage
VCE (SAT)
V O=50V
IO =1.25A, L=3mH
IO =700mA
IO=1A
IO=1.25A
V R=50V
IF=1.25A
50% step inputs to 50% output
50% step inputs to 50% output
Clamp diode leakage current

Clamp diode forward voltage
Turn-on delay
Turn-off delay
Thermal shutdown temperature
Control logic
IR
VF
tON
tOFF
Tj
IIH
Input current
VIL
IDD
Supply current
Data setup time
Data hold time
Clock pulse width
"typ" values are for reference.
Timing Conditions
max
Units
A
V
1.0
1.2
V
1.1
1.4
V
1.2
1.5
V
10
50
A
1.5
3.0
V
10
s
10
s
165
C
(Unless specified otherwise, VIN=V DD or GND)
0.5
5.0
A
0.5
5.0
A
3.5
5.3
V
0.3
0.8
V
20
30
mA
100
ns
100
ns
500
ns
10
2 outputs ON
Inter-clock
Inter-clock
ts DAT (A)
th DAT (B)
tw CLK (C)
typ
50
3.5
V IN=VDD
V IN=0.8V
V DD=5V
IIL
VIH
Input voltage
min
Terminal Connection Diagram
CLOCK
OUTPUTB
VDD
16
SUPPLY
KBD
OE
15
OUTPUT
ENABLE
OUTPUTD
14
DIRECTION
GROUND
13
GROUND
C
ONE PHASE
HALF-STEP
A
OUTPUT
ENABLE
LOGIC
OUTPUTA
OUTPUTB
GROUND
12
GROUND
OUTPUTC
OUTPUTC
11
STEP INPUT
KAC
10
HALF-STEP
OUTPUTA
ONE-PHASE
OUTPUTD
TWO-PHASE
42
UCN5804B
HALF-STEP
WAVE DRIVE
OUTPUT
DISABLED
Allowable package power dissipationPD (W)
Derating
UCN5804B
Application Circuit
5V
4
28V
43
C
/
VDD
16
OE
15
14
13
DIRECTION
CONTROL
LOGIC
0
20
25
50
75 85
100
12
11
10
STEP INPUT
Ambient temperature Ta (C)
VDD
16
OE
15
OR
Truth Table
Drive Format
14
13
LOGIC
12
11
10
I/O Equivalent Circuit

Pin 9
Pin 10
Two-Phase
One-Phase
Half-Step
Step-Inhibit
Input circuit
Output driver
VDD
OUT
IN
SUB
External Dimensions
ICs per stick
(Unit: mm)
25
0.508
0.204
16
7.11
6.10
INDEX AREA
7.62BSC
8
0.127MIN
1.77
1.15
2.54BSC
21.33
18.93
Note 1
SEATING PLANE
5.33MAX
0.558
0.356
0.39MIN
4.06
2.93
Thickness of lead is measured below seating plane.

Allowable variation in distance between leads is not cumulative.
Note 1: Lead width of pin 1,8, 9, 16 may be half the value shown here.
UCN5804B
43
SLA7042M/SLA7044M

Parameter
Input voltage
Output current
Power dissipation
Channel temperature
Storage temperature
Ratings
Symbol
SLA7042M
VCC
V DSS
VDD
VIN
IO
PD
Tch
Tstg
Units
SLA7044M
46
100
7
0.5 to VDD+0.5
1.2
V
V
V
V
A
W
C
C
3
+150
40 to +150
Ratings
Parameter
Symbol
min

Input
Terminals
voltage
DATA,
CLOCK
Input hysteresis
and
voltage
STROBE
Input
current
DC characteristics
REF
terminal
Input
voltage
Input
current
Reference voltage
selection output voltage
FET ON voltage
FET Drain-Source
voltage
AC characteristics
Chopper off time
Switching time
Data setup time "A"

Data hold time "B"
Data pulse time "C"
Clock pulse width "D"
Stabilization time
before strobe "E"
Strobe pulse H width "F"
44
SLA7042M/SLA7044M
IDD
Conditions
VDD
VIH
Conditions
VIL
Conditions
VH
Conditions
II
Conditions
VREF
Conditions
VDISABLE
Conditions
IREF
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V ref
Conditions
V DS
Conditions
VDSS
Conditions
IDSS
Conditions
V SD
Conditions
T OFF
Conditions
T OFF
Conditions
T OFF
Conditions
Tr
Conditions
Tstg
Conditions
Tf
Conditions
tsDAT
Conditions
thDAT
Conditions
twDAT
Conditions
twhCLK
Conditions
tpsSTB
Conditions
twhSTB
Conditions
4.5
3.5
SLA7042M
typ
V DD=5.5V
5
max
7
min
5.5
5
4.5
3.5
1.5
V DD=5V
0
V DD=5V
1
V DD=5V
5.5
5
1.5
VDD=5V
1
VDD=5V
1
2.5
0.4
VDD
V DD1
VDD
VDD=5V
1
VDD=5V, VI=0 or 5V
0
MODE 0
20
MODE 1
40
MODE 2
55.5
MODE 3
71.4
MODE 4
83
MODE 5
91
MODE 6
100
MODE 7
V DD=5V, VI=0 or 5V
0
MODE 0
20
MODE 1
40
MODE 2
55.5
MODE 3
71.4
MODE 4
83
MODE 5
91
MODE 6
100
MODE 7
0.8
ID=3A, VDD=4.75V
100
100
IDSS=4mA, VDD=5V
VDSS=100V, VDD=5V
V DSS=100V, VDD=5V
1.2
2.3
ID=1.2A
7
MODE 1, 2
9
MODE 3, 4, 5
11
MODE 6, 7
0.5
VDD=5V, ID=1A
0.7
VDD=5V, ID=1A
0.1
VDD=5V, ID=1A
ID=3A
7
MODE 1, 2
9
MODE 3, 4, 5
11
MODE 6, 7
0.5
V DD=5V, ID=1A
0.7
V DD=5V, ID=1A
0.1
V DD=5V, ID=1A
V
V
IDSS=4mA, VDD=5V
4
1.4
ID=1.2A, VDD=4.75V
75
2.5
VDD=5V
V DD=5V
mA
V
1
V DD=5V, VI=0 or 5V
V DD=5V
VDD1
VDD=5.5V
5
Units
max
7
VDD=5V
VDD=5V, VI=0 or 5V
0.4
SLA7044M
typ
mA
V
75
Inter-clock
75
Inter-clock
75
Inter-clock
Inter-clock
150
150
100
100
ns
100
100
Strobe=L from clock
100
Strobe=L from clock

100
2-Phase Stepper Motor Unipolar Driver ICs (2W1-2 Phase Excitation/Micro-step Support)
SLA7042M/SLA7044M
OFF time timer

(TOFF 3-step switching)
Reference voltage
Vref
b
a
c
0%
0
0
0
20%
0
1
0
40%
1
0
0
55.5%
1
1
0
71.4%
0
0
1
83%
0
1
1
91%
1
0
1
100%
1
1
1
Reference voltage
c
b
a
Vref
0
0
0
0%
0
0
1
20%
0
1
0
40%
0
1
1
55.5%
1
0
0
71.4%
1
0
1
83%
1
1
0
91%
1
1
1
100%
Chopper ON
Noise filter
(2 s)
Chopper ON
Noise filter
(2 s)
Phase
COMP
Latch
a
Ph.
Ph.
Reset
Shift register
b
COMP
Reset
Latch
Shift register
Ph.
Ph.
Enable
GND B
Ref B
CLOCK B
DATA B
STROBE B
STROBE A
DATA A
Ref A
CLOCK A
Enable
GND A
Rs A
PWM
Phase
Reset
Reset
OUT B
OFF time timer

(TOFF 3-step switching)
Rs B
PWM
OUT B
VDD B
VDD A
OUT A
OUT A
Output Current Formula

IO =
K VREF
3 RS
K: Reference voltage setting rate by serial signal

(See the internal block diagram)
Diagram of Standard External Circuit

VCC
5V
4
VDDA
R1
15
1
8
11
18
VDDB OUT A OUT A OUT B OUT B
CLOCK A 5
ENABLE
VREF
3
14
R2
CLOCK B
REF A
REF B
SLA7042M
SLA7044M
STROBE A
STROBE B
16
2
13
DATA A
C1
GND A GND B
7
12
RS A
9
RS
6
DATA B
17
RS B
10
RS
C1 : 500 to 10000pF
SLA7042M/SLA7044M
45
SLA7042M/SLA7044M
External Dimensions
310.2
24.40.2
16.40.2
3.20.15x3.8
4.80.2
1.70.1
+0.2
1 0.1
+0.2
1 0.1
0.55 0.1
17xP1.680.4=28.561
40.7
17xP1.680.4=28.561
2.20.1
60.6
7.50.6
0.6
+0.2
+0.2
0.65 0.1
1.6
+0.2
+0.2
0.65 0.1
9.7 0.1
R-End
3 0.6
0.6
4.6
2.450.2
Lot No.
0.55 +0.2
0.1
Part No.
(3) 6.70.5
9.90.2
130.2
3.20.15
160.2
(Unit: mm)
31.30.2
1 2 3 16 17 18
1 2 3 16 17 18
Forming No. No.871
Forming No. No.872
Serial Data Pattern

OUT excitation (MODE )
Phase
OUT excitation (MODE )
Phase
CLOCK
STROBE
(0%)
MODE1
(20%)
MODE2
(40%)
MODE3
(55.5%)
MODE4
(71.4%)
MODE0
DATA
MODE5
(83%)
MODE6
(91%)
MODE7
(100%)
Successively output this serial data and set any current. Then, determine the step
time of the reference voltage Vref at STROBE signal intervals.
46
SLA7042M/SLA7044M
See page 48 for details of

PG001M serial signal generator IC for SLA7042M and
SLA7044M.
SLA7042M/SLA7044M
Current Vector Locus (One step of stepper motor normalized to 90 degrees)

A
100
10
1
Combined
Current A Current B
vector
To rotate the motor, enter serial data as follows:

2W1-2 phase excitation : Vector 123456789 ...
W1-2 phase excitation : Vector 13579....
: Vector 159
: Vector 5 or 10
4
5
6
7
20
8
B
20
40
55.5
9
B
71.4 83 91 100
100%
0%
100%
20%
91%
40%
83%
55.5%
71.4%
71.4%
55.5%
83%
40%
91%
20%
100%
0%
100%
10
100%
100%
Serial Data Sequence Example (2W 1-2 Phase Excitation for CW)
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Sequence
DATA-A
MODE
DATA-B
MODE
A malfunction may occur just after the power (VDD ) is turned on because the internal logic is unstable. Therefore, set
the RESET state (REF terminal voltage: V DD1V to VDD ) after the power is turned on.)
Operation Current Waveform Examples

Stationary waveform
A
0
A
B
0
B
Time
Start
Torque-up waveform at start

A
0
A
B
0
B
Time
Leading phase waveform at acceleration

A
0
A
B
0
B
Time
These three types of waveforms can all be set with a serial signal.
SLA7042M/SLA7044M
47
PG001M

Parameter
Supply voltage
Input voltage
Input current
Output voltage
Output current
Power dissipation
Storage temperature
(Ta=25C)
Symbol
VDD
VI
II
VO
IO
PD
T OP
Tstg
Ratings
0.5 to 7
0.5 to VDD+0.5
10
0.5 to VDD+0.5
15
200
20 to +85
40 to +150
Units
V
V
mA
V
mA
mW
C
C
DC characteristics
Parameter
Symbol
Supply voltage
Supply current
Conditions
V DD
IDD
VOH
VOL
II
VIH
VIL
VH
CI
F
T CS
Output voltage
Input current
Input voltage
Input hysteresis voltage
Input capacity
Internal oscillation frequency
Propagation delay time
AC characteristics
(Ta=25C)
tps
min
4.5
V DD=5.5V
max
5.5
0.45
0.35
4.5
V DD=5V, IO =3mA
3.5
0.4
1
5
0.3
1.5
V DD=5V, VI=0 or 5V
VDD=5V
VDD=5V
VDD=5V
1
5
1.5
50
VDD=5V
See Fig. 1.
TCC
Tr
Tf
V CIH
VCIL
tsR
tpsR
tsS
Output voltage
Rise and fall time
CLOCK IN terminal
Input clock time
Reset setting time (A)
Stabilization time after reset (B)
Signal setting time (C)
Stabilization time after
signal input (D)
Ratings
typ
V DD=5V, CL=15pF
See Fig. 2.
H level time, VDD=5V
L level time, VDD=5V
Inter-clock
See Fig. 3.
Inter-clock
See Fig. 3.
100
550
ns
100
ns
CLOCK_OUT
DATA
10%
STROBE
TCC
Tr
TCS
Tf
Fig. 3 Timing conditions

Excitation switching point
B
A
RESET
MO
D
MS1
MS2
CW/CCW
VC
C
D
VC switching occurs only while CLOCK-IN level is L.
48
PG001M
ns
100
90%
CLOCK_IN
CLOCK_OUT
DATA
STROBE
1/F
4.5
0.5
CLOCK_IN
1/F
ns
Fig.2
Fig. 1
V
mA
V
pF
MHz
10
430
20
20
Units
PG001M

VDD
16
... Input
... Output
MS1
MS1
(A)
Excitation mode setting section
Number inside shape indicates pin number.
SET
2h
VC 15
MO
a
(B)
Parallel signal
generator
14 CLOCK_OUT
(C)
Parallel-serial
signal converter
11 DATA_A
10 DATA_B
13 STROBE
Phase
Q1 Q2 Q3 Q4
CLOCK_IN
CW/CCW
RESET
(E)
Oscillator
(D)
Up/Down counter
5
CP1
8
GND
4
CP2
12
NC
Fix all open input pins to H or L (Apart from CP1, CP2 and NC pins)
5V
16
1
2
MPU
3
6
7
15
9
VDD
RESET
CLOCK
_OUT
CLOCK_IN
CW/CCW
MS1
MS2
P
G
0
0
1
M
14
CLOCK_A
CLOCK_B
STROBE
13
STROBE_A
STROBE_B
DATA_A
VC
DATA_B
11
10
SLA7042M
SLA7044M
DATA_A
DATA_B
MO
NC
12
GND
CP1
CP2
4
Rs
NC
NC
Rs
NC
PG001M
49
PG001M
External Dimensions
(Unit: mm)
19.2
20.0max
9
6.3
6.65max
16
Lot No.
Part No.
0.89
7.62
0.51min
1.3
2.54min 5.08max
+0.11
2.540.25
0.25 0.05
0.480.10
0 to 15C
Output Mode Vs Output Pulse

Output pulse
Output pulse
OUT excitation
Phase
STROBE
0
1
Output mode
5
6
50
PG001M
OUT excitation
Phase
CLOCK
_OUT
STROBE
Output mode
CLOCK
_OUT
5
6
PG001M
Input and Output Function Correlation Table

Input
Mode
CLOCK
_IN
: Don't care
Output
CW
/CCW
RESET
MO
CLOCK STROBE
_OUT
DATA
-A
DATA
-B
CW
CW
is H level when output mode is 4:4

(7:7), 4:4 (7:7), 4:4 (7:7),or 4:4 (7:7).
CW
L
: MO outputs L level while CLOCK_IN
Modes in brackets ( ) are for 2-2

phase VC: H.
CCW
CCW
CCW
Output Mode Input Mode

4 or 7
4 or 7
Output
Output
Mode
Mode
RESET
Excitation Selection Table

Input
Output current mode of SLA7042M/7044M
Excitation method Excitation mode

selection
VC MS1 MS2
7
Torque vector
0% 20% 40% 55.5% 71.4% 83% 91% 100%
1-2 Phase
Half Step
W1-2 Phase
1/4 Step
2W1-2 Phase
1/8 Step
2-2 Phase
Full Step
141%
100%
100%
100%
100%
Output Mode Sequence

Excitation
method
2-2 Phase
Full Step (1)
(VC: H)
2-2 Phase
Full Step (2)
(VC: L)
CW/CCW
CW
CCW
CW
CCW
CW
1-2 Phase
Half Step
CCW
CW
W1-2 Phase
1/4 Step
CCW
2W1-2 Phase
1/8 Step
CW
CCW
CLOCK
RESET
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
MO
H H H H H H H L H H H H H H H L H H H H H H H L H H H H H H H L
DATA_A
= = = = = = = 7 = = = = = = = 7 = = = = = = = 7 = = = = = = = 7
DATA_B
= = = = = = = 7 = = = = = = = 7 = = = = = = = 7 = = = = = = = 7
DATA_A
= = = = = = = 7 = = = = = = = 7 = = = = = = = 7 = = = = = = = 7
DATA_B
= = = = = = = 7 = = = = = = = 7 = = = = = = = 7 = = = = = = = 7
DATA_A
= = = = = = = 4 = = = = = = = 4 = = = = = = = 4 = = = = = = = 4
DATA_B
= = = = = = = 4 = = = = = = = 4 = = = = = = = 4 = = = = = = = 4
DATA_A
= = = = = = = 4 = = = = = = = 4 = = = = = = = 4 = = = = = = = 4
DATA_B
= = = = = = = 4 = = = = = = = 4 = = = = = = = 4 = = = = = = = 4
DATA_A
= = = 0 = = = 4 = = = 7 = = = 4 = = = 0 = = = 4 = = = 7 = = = 4
DATA_B
= = = 7 = = = 4 = = = 0 = = = 4 = = = 7 = = = 4 = = = 0 = = = 4
DATA_A
= = = 7 = = = 4 = = = 0 = = = 4 = = = 7 = = = 4 = = = 0 = = = 4
DATA_B
= = = 0 = = = 4 = = = 7 = = = 4 = = = 0 = = = 4 = = = 7 = = = 4
DATA_A
= 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4
DATA_B
= 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4
DATA_A
= 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4
DATA_B
= 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4 = 2 = 0 = 2 = 4 = 6 = 7 = 6 = 4
DATA_A
3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4
DATA_B
5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4
DATA_A
5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4
DATA_B
3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 7 7 6 5 4
= : No output
PG001M
51
PG001M
Output Timing Chart (CW) Excitation Current of SLA7042M/7044M

RESET
CLOCK_IN
MO
7
A
2-2 Phase
Full Step
(VC: H)
7
7
B
7
MO
7
4
0
0
4
1-2 Phase
Half Step
4
7
4
0
0
4
MO
4
2
2
4
4
2
0
2
2
4
MO
3
0
0
1
2
2W1-2 Phase
1/8 Step
4
W1-2 Phase
1/4 Step
7
6
6
7
1
0
1
2
6
7
For 2-2 phase VC : L, output mode is 74.
52
PG001M
PG001M
Output Timing Chart (CCW) Excitation Current of SLA7042M/7044M

RESET
CLOCK_IN
MO
7
A
2-2 Phase
Full Step
(VC: H)
7
7
B
7
MO
7
4
0
0
4
1-2 Phase
Half Step
4
0
0
4
7
MO
7
2
4
W1-2 Phase
1/4 Step
7
4
4
4
7
6
1
0
2W1-2 Phase
1/8 Step
4
6
7
0
0
0
2
6
4
MO
6
6
7
4
For 2-2 phase VC:L, output mode is 74.
PG001M
53
A3966SA/SLB
2-Phase Stepper Motor Bipolar Driver IC

Features
Maximum output ratings: 30V, 650mA

Internal fixed-frequency PWM current control
Internal ground-clamp & flyback diodes
Internal thermal shutdown, crossover-current protection and UVLO protection circuitry
Employs copper batwing lead frame with
low thermal resistance
Parameter
Symbol
Load supply voltage

Output current (peak)
Output current (continuous)
Logic input voltage range
Sense voltage
Storage temperature
VBB
IO (Peak)
IO
VCC
VIN
VS
PD (Note1)
Ta
T j (Note2)
T stg
Ratings
A3966SA
2.08
Units
A3966SLB
30
750
650
7.0
0.3 to V CC+0.3
1.0
1.86
20 to +85
+150
55 to +150
V
mA
mA
V
V
V
W
C
C
C
Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified current rating or a junction temperature of 150C.
Note 1: When ambient temperature is 25C or over, derate using 16.67mW/C (SA), 14.93mW/C (SLB).
Parameter
Power outputs (OUTA or OUTB )
Load supply voltage range
(Unless specified otherwise, Ta =25C, VBB=30V, V CC=4.75V to 5.5V, VREF =2V, V S= 0V, 56k & 680pF RC to ground)
Symbol
Conditions
V BB
Operating, IO=650mA, L=3mH

VO =30V
VO =0V
Source Driver, IO =400mA
Source Driver, IO =650mA
Sink Driver, IO=+400mA, VSENSE=0.5V
Sink Driver, IO=+650mA, VSENSE=0.5V
IS IO, IO=50~650mA
IF=400mA
IF=650mA
VENABLE1=VENABLE2=0.8V
V CC
Operating
4.75
2.4
ICEX
VCE (sat)
Sense-current offset
ISO
VF
Motor supply current (No load)

Control logic
Logic supply voltage range
Logic input voltage
Logic input current
IBB (ON)
IBB (OFF)
VCC
VIH
V IL
IIH
IIL
Reference input voltage range
VREF
Reference input current
IREF
Reference divider ratio
VREF/V TRIP
Current-sense comparator input offset voltage
V IO
Current-sense comparator input voltage range
VS
PWM RC frequency
fOSC
PWM propagation delay time
tPWM
Cross-over dead time
tcodt
tpd

Thermal shutdown hysteresis
UVLO enable threshold
UVLO hysteresis
Logic supply current
54
A3966SA/SLB
VIN =2.4V
VIN =0.8V
Operating
VREF =0V
Operating
CT=680pF, RT=56k
Comparator Trip to Source OFF
Cycle Reset to Source ON
1k Load to 25V
IO =650mA, 50% to 90% : ENABLE ON to Source ON
IO =650mA, 50% to 90% : ENABLE OFF to Source OFF
IO=650mA, 50% to 90% : ENABLE ON to Sink ON
IO=650mA, 50% to 90% : ENABLE OFF to Sink OFF
IO=650mA, 50% to 90% : PHASE Change to Sink ON
IO=650mA, 50% to 90% : PHASE Change to Sink OFF
IO=650mA, 50% to 90% : PHASE Change to Source ON
IO=650mA, 50% to 90% : PHASE Change to Source OFF
min
12
ICC (OFF)
0.1
2.5
3.8
6.0
0.3
22.9
0.2
Increasing VCC
0.1
max
< 1.0
< 1.0
1.7
1.8
0.3
0.4
18
1.1
1.4
3.0
< 1.0
30
50
50
2.0
2.1
0.5
1.3
24
1.4
1.6
5.0
200
V
A
A
V
V
V
V
mA
V
V
mA
A
5.50
V
V
V
A
A
V
A
< 1.0
< 20
Tj
Tj
VUVLO en
VUVLO hys
ICC (ON)
Ratings
typ
0
4.0
0
25.4
1.0
0.8
1.8
100
500
200
200
2200
200
2200
200
165
15
4.1
0.6
0.8
20
200
2.0
1.0
4.2
6.0
1.0
27.9
1.4
1.2
3.0
4.6
50
9
Units
mV
V
kHz
S
S
S
ns
ns
ns
ns
ns
ns
ns
ns
C
C
V
V
mA
mA
2-Phase Stepper Motor Bipolar Driver IC (2-Phase/1-2 Phase Excitation)
LOAD
SUPPLY
OUTA
VCC
2.5
+
VBB
A3
96
6S
A3
96
60
6S
1.5
LB
67
UVLO
& TSD
/W
ENABLE
(ACTIVE LOW)
/W
PWM LATCH
BLANKING
GATE
CURRENT-SENSE
COMPARATOR
0.5
SENSE
R
Q
TO OTHER
BRIDGE
TO OTHER
BRIDGE
+4
GROUND
0
20
25
50
OSC
RC
75 85 100
TO OTHER
BRIDGE

CT
RT
RS
REFERENCE
Allowable package power dissipation PD [W]
PHASE
OUTB
Internal Block Diagram (1/2 circuit)

LOGIC
SUPPLY
Derating
A3966SA/SLB
Load-Current Paths
Truth Table
PHASE
ENABLE
OUTA
OUTB
X
H
Z
Z
H
L
H
L
L
L
L
H
X: Don't care (either L or H)
Z: High impedance (source and sink both OFF)
VBB
BRIDGE ON
SOURCE OFF
ALL OFF
RS

A3966SA
1
OUT1B
LOAD
SUPPLY
16
LOGIC
SENSE1
A3966SLB
REFERENCE
VREF
VBB
ENABLE1
15
PHASE1
14
OUT1A
PHASE1
ENABLE1
GROUND
GROUND
SENSE1
OUT1B
LOAD
SUPPLY
REFERENCE
RC
RC
12
GROUND
VCC
11
OUT2A
OUT2B
10
PHASE2
SENSE2
ENABLE2
16
OUT2A
15
PHASE2
14
ENABLE2
13
GROUND
12
SENSE2
11
OUT2B
VCC
10
LOGIC
SUPPLY
RC
RC
13
LOGIC
SUPPLY
LOGIC
OUT1A
VBB
LOGIC
LOGIC
VBB
VREF
A3966SA/SLB
55
A3966SA/SLB
Typical Application
(A3966SLB)
Example of stepper motor drive
1
PHASEA
ENABLEA
3
4
16
VBB
LOGIC
LOGIC
15
PHASEB
14
ENABLEB
13
0.5
0.5
5
12
+5V
6
11
VBB
7
8
VREF
VCC
10
RC
56 k
10 k
47 F +
+5 V
680 pF
39 k
+24 V
ITRIPIOUT+ISOVREF /(4 RS)

tblank1,900 CT
fOSC1/ (R T CT+tblank)
RT=56k (20k to 100k)
CT=680pF(470pF to 1,000pF)
External Dimensions
(Unit: mm)
A3966SA
A3966SLB
16
16
10.92
7.62 MAX
BSC
7.11
6.10
1
1.77
1.15
19.68
18.67
2.54
BSC
7.60
7.40
10.65
10.00
1.27
0.40
0.13
MIN
0.51
0.33
3
10.50
10.10
5.33
MAX
3.81
2.93
0.39
MIN
0.558
0.356
2.65
2.35
0.10 MIN.
56
A3966SA/SLB
0.32
0.23
0.355
0.204
1.27
BSC
0 to 8
A3966SA/SLB
57
A3964SLB

Features
Fixed off-time PWM current control
Parameter
Load supply voltage
Continuous output emitter voltage
Reference output current
Storage temperature
Internally generated, precision 2.5V reference

External filter for sense terminal not required
Internal crossover-current protection circuitry
Internal UVLO protection
Parameter
Power outputs (OUTA or OUT B)
Symbol
Conditions
VBB
Operating
Sink driver, VO =VBB
Source driver, V O=0V
Sink driver, IO=+500mA
Source driver, IO =500mA
IO=800mA, L=3mH
V R=30V
IF=800mA
VEN1=VEN2=0.8V, no load
VCE (SAT)

VCE (SUS)
IR
VF
IBB (ON)
IBB (OFF)
VIH
VIL
IIH
IIL
Logic input current
Reference output voltage

VREF OUT1
Current-sense comparator input current
IREF IN
Current-sense comparator input voltage range VREF IN
Current-sense comparator input offset voltage
VTH
Timer blanking charge current (RC off)
IRC
VBLTH(1)
Timer blanking threshold (RC off)
VBLTH(0)
Timer blanking OFF voltage (RC off)
VRCOFF
Tj
Tj
ICC (ON)
ICC (OFF)
Logic supply current/temperature coefficient ICC (ON)
Ratings
typ
min
max
30
50
50
0.6
1.2
1.5
1.2
1.5
1.7
V IN=2.4V
V IN=0.8V
VCC=5.0V, IREF OUT =90~900 A
VREF IN=1V
Operating
VREF IN=0V
VRC=2.0V
RT=20k

Note) Logic input: En1, En2, Ph1, Ph2
OUT1B
20 OUT2B
SENSE1
19 SENSE2
OUT1A
18 OUT2A
VBB
17 VCC
GROUND
16 GROUND
GROUND
15 GROUND
VREF IN
14 VREF OUT
RC1
13 RC2
PHASE1
12 PHASE2
ENABLE1 10
11 ENABLE2
Derating
Allowable package power dissipation PD (W)
2.5
2.0
60
C
/W
1.5
1.0
0.5
0
20
25
50
75 85
58
A3964SLB
Units
V
A
A
V
V
V
1.0
V
1.1
V
V
30
V
< 1.0
50
A
1.6
2.0
V
10
mA
10
mA
(Unless specified otherwise, VIN=V DD or GND)
2.4
V
0.8
V
< 1.0
20
A
< 20
200
A
2.45
2.50
2.55
V
5.0
5.0
A
0.3
1.0
V
6
6
mV
1.0
mA
3.0
V
1.0
V
3.0
V
165
C
15
C
65
85
mA
17
mA
0.18
mA/C
< 1.0
< 1.0
0.3
0.5
Control logic
Logic input voltage
Units
V
A
V
V
V
mA
W
C
C
C
(Unless specified otherwise, T a =25C, VBB=30V, VCC=4.75V to 5.25V, VREF=2V, VSENSE= 0V)
ICEX
Motor supply current
Ratings
30
0.80
7.0
0.3 to V CC+0.3
1.0
1.0
2.08
20 to +85
+150
55 to +150
Low thermal resistance 20-pin SOP
Symbol
VBB
IO
VCC
VIN
VE
IREF-OUT
PD (Note1)
Ta
T j (Note2)
T stg
100
A3964SLB
Internal Block Diagram(Dotted Line)/

VBB (5~30V)
VCC (5V)
17 VCC
VBB 4
Reference voltage
power supply
TSD
OUT1A
3
1
OUT1B
9
10
Phase 1
OUT2B
20
18
Phase 2
Enable 1
Enable 2
Source off
Source off
Blanking time &

one shot multi
2 7 14 5
Sen1 VREF VREF
RC1 8
IN
OUT
R1
CT1
RT1
OUT2A
12
11
Blanking time &

one shot multi
15 16 19
Sen2
13 RC2
GND
RS1
RS2
RT2
CT2
R2
R1=20k
R2=5k (VR)
RT=30k
CT=1000pF
RS=0.68 to 1.5
(1 to 2W)
Excitation Sequence
Truth Table
[2-phase excitation]
Phase
Enable
Out A
Phase 1
Enable 1
Phase 2
Enable 2
Out B
X = Don't care, Z = High impedance
[1-2 phase excitation]

Phase 1
External Dimensions
Enable 1
Phase 2
Enable 2
Wide body plastic SOP (300mil)
(Unit: mm)
ICs per stick 37

20
11
0.32
0.23
*1
10.65
10.00
7.60
7.40
1.27
0.40
0.51
0.33
10
13.00
12.60
2.65
2.35
1.27
BSC
0 TO 8
SEATING PLANE
Note) [Pin] material : copper

Surface treatment : solder plating
Note) Package index may be *1.
0.10 MIN
A3964SLB
59
A3953SB/SLB

Features
Parameter
Switching between power supply regenera-
Load supply voltage

Logic/reference input
voltage range
tion mode and loop regeneration mode in

order to improve motor current response in
microstepping
Sense voltage
3.3V and 5V logic supply voltage

Storage temperature
Sleep (low current consumption) mode

Brake operation with PWM current limiting
Ratings
Symbol
A3953SB
A3953SLB
Units
VBB
IO
VCC
50
1.3
7.0
V
A/unit
V
V IN
0.3 to VCC+0.3
1.0 (V CC=5.0V)
VSENSE D.C.
0.4 (V CC=3.3V)
P
Ta
Tj (Note2)
Tstg
2.90
D (Note1)
1.86
20 to +85
+150
55 to +150
W/pkg
C
C
C
Internal crossover-current protection cir- Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any
Note 1: When ambient temperature is 25C or over, derate using 23.26mW/C(SB) or 14.93mW/C(SLB).
Note 2: Fault conditions where junction temperature (Tj) exceeds 150C will activate the devices thermal
cuitry
Low thermal resistance package

A3953SB
BRAKE
VBB
A3953SLB
16
LOAD
SUPPLY
OUTB
BRAKE
VBB
16
LOAD
SUPPLY
REF
15
OUTB
RC
14
MODE
GROUND
13
GROUND
GROUND
GROUND
12
GROUND
SENSE
LOGIC
SUPPLY
11
SENSE
PHASE
ENABLE
REF
15
RC
14
MODE
GROUND
13
GROUND
12
LOGIC
GROUND
60
LOGIC
SUPPLY
PHASE
ENABLE
A3953SB/SLB
VCC
11
VBB
10
OUTA
LOAD
SUPPLY
VCC
VBB
10
OUTA
LOAD
SUPPLY
2-Phase Stepper Motor Bipolar Driver ICs (2-Phase/1-2 Phase Excitation)
Parameter
(Unless specified otherwise, T a=25C, V BB=5V to 50V, VCC=3.0V to 5.5V)

Symbol
Conditions
VBB
Operating, IO =1.3A, L=3mH

VO=V BB
V O=0V
ISENSEIO , IO =850mA, VSENSE=0V, VCC=5V
VSENSE=0.4V, V CC=3.0V, BRAKE=H:Source driver, IO=0.85A
VSENSE =0.4V, VCC=3.0V, BRAKE=H:Source driver, IO=1.3A
VSENSE=0.4V, VCC=3.0V, BRAKE=H:Sink driver, IO=0.85A
VSENSE=0.4V, VCC=3.0V, BRAKE=H:Sink driver, IO=1.3A
VSENSE=0.4V, VCC=3.0V, BRAKE=L:Sink driver, IO=0.85A
VSENSE=0.4V, VCC=3.0V, BRAKE=L:Sink driver, IO=1.3A
IF=0.85A
IF=1.3A
VENABLE =0.8V, VBRAKE=2.0V
VENABLE =VBRAKE=2.0V, VMODE=0.8V
VBRAKE=0.8V
VENABLE=V BRAKE=VMODE=2.0V
ICEX
Sense current offset
ISO

(Forward/reverse mode)
VCE (SAT)

(Brake mode)
VCE (SAT)

(No load)
Control logic
UVLO hysteresis

Logic input voltage
Logic input current
Sense voltage range
Comparator input offset voltage
AC timing
PWM RC fixed off-time
VF
IBB (ON)
IBB (OFF)
IBB (BRAKE)
IBB (SLEEP)
Tj
T j
VUVLO
V UVLO
ICC (ON)
ICC (OFF)
ICC (BRAKE)
ICC (SLEEP)
V CC
Operating
VIH
VIL
IIH
IIL
VSENSE (3.3)
VSENSE (5.0)
IREF
VIO
tOFF RC
tPWM (OFF)
PWM turn-on time
tPWM (ON)
PWM minimum on-time
tPWM (ON)
tpd
tCODT
Limits
min
18
3.0
max
<1.0
<1.0
33
1.0
1.7
0.4
1.1
1.2
1.4
1.2
1.4
2.5
1.0
1.0
1.0
50
50
50
50
1.1
1.9
0.9
1.3
1.4
1.8
1.4
1.8
4.0
50
50
50
V
A
A
mA
V
V
V
V
V
V
V
V
mA
A
A
A
3.0
0.25
50
15
50
800
C
C
V
V
mA
mA
mA
A
165
8
2.75
0.17
42
12
42
500
3.3
5.0
5.5
2.0
VIN=2.0V
VIN=0.8V
VCC=3.0V to 3.6V
VCC=4.5V to 5.5V
VREF =0V to 1V
V REF=0V
C T=680pF, RT=30k, VCC=3.3V
Comparator Trip to Source OFF, Io=25mA
Comparator Trip to Source OFF, Io=1.3A
IRC Charge ON to Source ON, Io=25mA
IRC Charge ON to Source ON, Io=1.3A
V CC=3.3V, RT12k, CT=680pF
V CC=5.0V, RT12k, CT=470pF
IO =1.3A, 50% to 90% ENABLE ON to Source ON
IO =1.3A, 50% to 90% ENABLE OFF to Source OFF
IO=1.3A, 50% to 90% ENABLE ON to Sink ON
IO =1.3A, 50% to 90% ENABLE OFF to Sink OFF (MODE=L)
IO=1.3A, 50% to 90% PHASE Change to Sink ON
IO =1.3A, 50% to 90% PHASE Change to Sink OFF
IO=1.3A, 50% to 90% PHASE Change to Source ON
IO=1.3A, 50% to 90% PHASE Change to Source OFF
1k Load to 25V, VBB=50V
<1.0
<2.0
0
0
2.0
18.3
0.8
0.8
0.3
Units
typ
VCC
2.5
0.12
VENABLE =0.8V, VBRAKE=2.0V
VENABLE =VBRAKE=2.0V, VMODE=0.8V
VBRAKE=0.8V
VENABLE=V BRAKE=VMODE=2.0V
PWM turn-off time
Crossover dead time

typ values are for reference.
A3953SB/SLB
20.4
1.0
1.8
0.4
0.55
1.4
1.6
1.0
1.0
1.0
0.8
2.4
0.8
2.0
1.7
1.5
0.8
20
200
0.4
1.0
5.0
5.0
22.5
1.5
2.6
0.7
0.85
1.9
2.0
3.0
V
V
V
A
A
V
V
A
mV
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
A3953SB/SLB
61
Derating
95
A3
95
1.5
3S
43
LB
PHASE
15
LOAD
SUPPLY
16
VBB
/W
67
C
ENABLE
/W
1.0
UVLO
& TSD
INPUT LOGIC
2.0
10
MODE 14
3S
2.5
SLEEP &
STANDBY MODES
A3
OUTB
VCC
3.0
OUTA
LOAD
SUPPLY

LOGIC
6
SUPPLY
BRAKE 1
R
Q
25
50
75 85
100
GROUND
VCC
11
SENSE
RS
BLANKING
0
20
PWM LATCH
0.5
A3953SB/SLB
RC
3
12
2
REF
CT
13
GROUND
VTH
RT
Truth Table
BRAKE
ENABLE
PHASE
MODE
OUTA
OUTB
Sleep mode
Operating Mode
X
H
H
L
L
X
X
Standby
Forward, fast current-decay mode
Forward, slow current-decay mode
Reverse, fast current-decay mode
Reverse, slow current-decay mode
Brake, fast current-decay mode
Brake, no current control
X : Don't Care
Z : High impedance
Application Circuit
(DC motor drive)
+5 V
VBB
REF
15
14
13
30 k
680 pF
VBB
16
BRAKE
47 F
MODE
LOGIC
12
5
6
PHASE
ENABLE
0.5
(A3953SB)
VCC
11
Off-time setting
t OFFR TCT
RT=12k to 100k
CT=470 to 1500pF (Operating at VCC=5V)
CT=680 to 1500pF (Operating at VCC=3.3V)
10
VBB
External Dimensions
(Unit: mm)
A3953SB
Plastic DIP (300mil)
A3953SLB
ICs per stick
25
(16-pin wide SOIC)
0.381
0.204
16
ICs per stick
16
47
0.32
0.23
*1
7.11
6.10
7.62BSC
INDEX AREA
1.27
0.40
0.127MIN
1.77
1.15
2.54BSC
21.33
18.93
5.33MAX
0.51
0.33
8
10.50
10.10
SEATING PLANE
0.558
0.356
0.39MIN
62
10.65
10.00
7.60
7.40
A3953SB/SLB
4.06
2.93
Thickness of lead is measured

below seating plane.
Allowable variation in distance between
leads is not cumulative.
Note 1: Lead width of pin 1, 8, 9, 16 may be
2: half the value shown here.
Maximum thickness of lead is 0.508mm.
2.65
2.35
SEATING PLANE
0.10 MIN.
1.27
BSC
0 TO 8
Pin material: copper,
pin surface treatment: solder plating
Package index may be *1.
Web (batwing) type lead frames are used for
pin 4, 5, 12, 13. The pins are connected to GND.
A3953SB/SLB
Application Notes
Outline
decay mode, the selected sink and source driver pair are dis-
Designed for bidirectional pulse-width modulated (PWM) cur-
abled; the load inductance causes the current to flow from ground
rent control of inductive loads, the A3953S- is capable of con-
to the load supply via the ground clamp and flyback diodes.
tinuous output currents to 1.3A and operating voltages to 50V.

Internal fixed off-time PWM current-control circuitry can be used
Fig. 1 Load-current Paths

VBB
to regulate the mximum load current to a desired value. The

peak load current limit is set by the users selection of an input
reference voltage and external sensing resistor. The fixed offtime pulse duration is set by a userselected external RC timing
DRIVE CURRENT
network. Internal circuit protection includes thermal shutdown
RECIRCULATION (SLOW-DECAY MODE)
with hysteresis, transient-suppression diodes, and crossover cur-
RECIRCULATION (FAST-DECAY MODE)
rent protection. Special power-up sequencing is not required.

With the ENABLE input held low, the PHASE input controls load
current polarity by selecting the appropriate source and sink
RS
driver pair. The MODE input determines whether the PWM current-control circuitry operates in a slow current-decay mode (only
the selected source driver switching) or in a fast current-decay
mode (selected source and sink switching). A user-selectable
The user selects an external resistor (RT) and capacitor (CT) to
blanking window prevents false triggering of the PWM current-
determine the time period (tOFF=RTC T) during which the drivers
control circuitry. With the ENABLE input held high, all output
remain disabled (see RC Fixed Off-time below). At the end of
drivers are disabled. A sleep mode is provided to reduce power
the RC interval, the drivers are enabled allowing the load cur-
consumption.
rent to increase again. The PWM cycle repeats, maintaing the
When a logic low is applied to the Brake input, the braking func-
peak load current at the desired value (see figure 2).
tion is enabled. This overrides ENABLE and PHASE to turn OFF

both source drivers and turn ON both sink drivers. The brake
function can be used to dynamically brake brush dc motors.
Fig. 2 Fast and Slow Current-Decay Waveforms

ENABLE
FUNCTIONAL DESCRIPTION
(A) Internal PWM Current Control During Forward and Re-
MODE
verse Operation.
ITRIP
The A3953S-contains a fixed off-time pulse-width modulated

(PWM) current-control circuit that can be used to limit the load
RC
LOAD
CURRENT
RC
current to a desired value. The peak value of the current limiting

(I TRIP) is set by the selection of an external current sensing resistor (R S) and reference input voltage (VREF). The internal circuitry compares the voltage across the external sense resistor
to the voltage on the reference input terminal (REF) resulting in
a transconductance function approximated by:
I TRIP
VREF
I SO
R SENSE
(B)INTERNAL PWM CURRENT CONTROL DURING BRAKEMODE OPERATION

(1) Brake Operation-MODE Input High.
The brake circuit turns OFF both source drivers and turns ON
both sink drivers. For dc motor applications, this has the effect
of shoring the motors back-EMF voltage resulting in current
where ISO is the offset due to base drive current.
flow that dynamically brakes the motor. If the back-EMF voltage is large, and there is no PWM current limiting, the load cur-
In forward or reverse mode the current-control circuitry limits
rent can increase to a value that approaches that of a locked
the load current as follows: when the load current reaches I TRIP,
rotor condition. To limit the current, when the ITRIP level is reaced,
the comparator resets a latch that turns off the selected source
the PWM circuit disables the conducting sink drivers. The en-
driver or selected sink and source driver pair depending on
ergy stored in the motors inductance is discharged into the load
whether the device is operating in slow or fast current-decay
supply causing the motor current to decay.
mode, respectively.
As in the case of forward/reverse operation, the drivers are en-
In slow current-decay mode, the selected source driver is dis-
abled after a time given by tOFF=RTCT (see RC Fixed Off-time
abled; the load inductance causes the current to recirculate
below). Depending on the back-EMF voltage (proportional to
through the sink driver and ground clamp diode. In fast current-
the motors decreasing speed), the load current again may inA3953SB/SLB
63
A3953SB/SLB
crease to I TRIP. If so, the PWM cycle will repeat, limiting the peak
comparators output is blanked and C T begins to be charged
load current to the desired value.
from approximately 0.22 VCC by an internal current source of
During braking, when the MODE input is high, the peak current
approximately 1 mA. The comparator output remains blanked
limit can be approximated by:
until the voltage on CT reaches approximately 0.60 V CC.
I TRIP BRAKE MH
VREF
RSENSE
When a transition of the PHASE input occurs, CT is discharged

to near ground during the crossover delay time (the crossover
delay time is present to prevent simultaneous conduction of the
CAUTION: Because the kinetic energy stored in the motor and
source and sink drivers). After the crossover delay, CT is charged
load inertia is being converted into current, which charges the
by an internal current source of approximately 1 mA. The com-
V BB supply bulk capacitance (power supply output and
parator output remains blanked until the voltage on CT reaches
decoupling capacitance), care must be taken to ensure the ca-
approximately 0.60VCC.
pacitance is sufficient to absorb the energy without exceeding
When the device is disabled, via the ENABLE input, CT is dis-
the voltage rating of any devices connected to the motor sup-
charged to near ground. When the device is reenabled, CT is
ply.
charged by an internal current source of approximately 1 mA.
(2) Brake Operation-MODE Input Low.
The comparator output remains blanked until the voltage on CT
During braking, with the MODE input low, the internal current-
reaches approximately 0.60 VCC.
control circuitry is disabled. Therefore, care should be taken to

ensure that the motors current does not exceed the ratings of
the device. The braking current can be measured by using an
For 3.3 V operation,

the minimum recommended value for CT is 680pF5%.
For 5.0V operation,
oscilloscope with a current probe connected to one of the motors
the minimum recommended value for CT is 470pF5%.
leads, or if the back-EMF voltage of the motor is known, ap-
These values ensure that the blanking time is sufficient to avoid
proximated by:
false trips of the comparator under normal operating conditions.
I PEAK BRAKE ML
VBEMF1V
R LOAD
For optimal regulation of the load current, the ablove values for
CT are recommended and the value of RT can be sized to determine tOFF. For more information regarding load current regulation, see below.
(C) RC Fixed Off-Time.

The internal PWM current-control circuitry uses a one shot to
control the time the driver (s) remain (s) off. The one-shot time,
(E) LOAD CURRENT REGULATION WITH INTERNAL PWM

CURRENT-CONTROL CIRCUITRY
tOFF (fixed off-time), is determined by the selection of an exter-
When the device is operating in slow current-decay mode, there
nal resistor (RT ) and capacitor (CT) connected in parallel from
is a limit to the lowest level that the PWM current-control cir-
the RC timing terminal to ground. The fixed off-time, over a range
cuitry can regulate load current. The limitation is the minimum
of values of C T=470pF to 1500pF and RT=12k to 100k, is
duty cycle, which is a function of the user-selected value of tOFF
approximated by:
t off
R T CT
and the minimum on-time pulse tON (min) max that occurs each
time the PWM latch is reset. If the motor is not rotating (as in the
case of a stepper motor in hold/detent mode, a brush dc motor
The operation of the circuit is as follows: when the PWM latch is
when stalled, or at startup), the worst case value of current regu-
reset by the current comparator, the voltage on the RC terminal
lation can be approximated by:
will begin to decay from approximately 0.60VCC . When the voltage on the RC terminal reaches approximately 0.22 V CC, the
I AVE
[(VBBVSAT (source + sink)) t on (min) max][1.05 (VSAT (sink) + VF) t off]

1.05 (t on (min) max + t off) R LOAD
PWM latch is set, thereby enabling the driver (s).

where tOFF=RTCT, RLOAD is the series resistance of the load, VBB
64
(D) RC Blanking.
is the motor supply voltage and tON (min) max is specified in the
In addition to determining the fixed off-time of the PWM control
electrical characteristics table. When the motor is rotating, the
circuit, the CT component sets the comparator blanking time.
back EMF generated will influence the above relationship. For
This function blanks the output of the comparator when the out-
brush dc motor applications, the current regulation is improved.
puts are switched by the internal current-control circuitry (or by
For stepper motor applications, when the motor is rotating, the
the PHASE, BRAKE, or ENABLE inputs). The comparator out-
effect is more complex. A discussion of this subject is included
put is blanked to prevent false over-current detections due to
in the section on stepper motors below.
reverse recovery currents of the clamp diodes, and/or switching
The following procedure can be used to evaluate the worst-case
transients related to distributed capacitance in the load.
slow current-decay internal PWM load current regulation in the
During internal PWM operation, at the end of the tOFF time, the
system:
A3953SB/SLB
A3953SB/SLB
Set VREF to 0 volts. With the load connected and the PWM cur-
omitted. The PHASE and ENABLE inputs should not be PWM
rent control operating in slow current-decay mode, use and os-
with this circuit configuration due to the absence of a blanking
cilloscope to measure the time the output is low (sink ON) for
function synchronous with their transitions.
the output that is chopping. This is the typical minimum ON

time (t ON (min) typ) for the device.
Fig. 3 Synchronous Fixed-Frequency Control Circuit
The C T then should be increased until the measured value of tON
VCC
is equal to tON (min) max as specified in the electrical charac20 k
teristics table. When the new value of CT has been set, the value
t2
of RT should be decreased so the value for t OFF=RTC T (with the
100 k
(min)
artificially increased value of CT ) is equal to the nominal design
RC1
value. The worst-case load-current regulation then can be mea-
1N4001
2N2222
sured in the system under operating conditions.
RCN
t1
(F) PWM of the PHASE and ENABLE Inputs.

The PHASE and ENABLE inputs can be pulse-width modulated
(G)Miscellaneous Information.
to regulate load current. Typical propagation delays from the
A logic high applied to both the ENABLE and MODE terminals
PHASE and ENABLE inputs to transitions of the power outputs
puts the device into a sleep mode to minimize current consump-
are specified in the electrical characteristics table. If the internal
tion when not in use.
PWM current control is used, the comparator blanking function
An internally generated dead time prevents crossover currents
is active during phase and enable transitions. This eliminates
that can occur when switching phase or braking.
false tripping of the over-current comparator caused by switch-
Thermal protection circuitry turns OFF all drivers should the junc-
ing transients (see RC Blanking above).
tion termperature reach 165C (typical). This is intended only to
(1) Enable PWM.
protect the device from failures due to excessive junction tem-
With the MODE input low, toggling the ENABLE input turns ON
peratures and should not imply that output short circuits are
and OFF the selected source and sink drivers. The correspond-
permitted. The hysteresis of the thermal shutdown circuit is ap-
ing pair of flyback and ground-clamp diodes conduct after the
proximately 8C.
drivers are disabled, resulting in fast current decay. When the

device is enabled the internal current-control curcuitry will be
APPLICATION NOTES
active and can be used to limit the load current in a slow cur-
(A)Current Sensing.
rent-decay mode.
The actual peak load current (IPEAK) will be above the calculated
For applications that PWM the ENABLE input and desire the
value of ITRIP due to delays in the turn off of the drivers. The
internal current-limiting circuit to function in the fast decay mode,
amount of overshoot can be approximated by:
the ENABLE input signal should be inverted and connected to

the MODE input. This prevents the device from being switched
I OS
(VBB-[(ITRIP RLOAD) + VBEMF]) t PWM (OFF)

LLOAD
into sleep mode when the ENABLE input is low.

(2) Phase PWM.
where VBB is the motor supply voltage, VBEMF is the back-EMF
Toggling the PHASE terminal selects which sink/source pair is
voltage of the load, RLOAD and L LOAD are the resistance and in-
enabled, producing a load current that varies with the duty cycle
ductance of the load respectively, and tPWM (OFF) is specified in
and remains continuous at all times. This can have added ben-
the electrical characteristics table.
efits in bidirectional brush dc servo motor applications as the
The reference terminal has a maximum input bias current of
transfer function between the duty cycle on the PHASE input
5 A. This current should be taken into account when deter-
and the average voltage applied to the motor is more linear
mining the impedance of the external circuit that sets the refer-
than in the case of ENABLE PWM control (withch produces a
ence voltage value.
discontinuous current at low current levels). For more informa-
To minimize current-sensing inaccuracies caused by ground
tion see DC Motor Applications below.
trace IR drops, the current-sensing resistor should have a sepa-
(3) Synchronous Fixed-Frequency PWM.
rate return to the ground terminal of the device. For low-value
The internal PWM current-control circuitry of multiple A3953S-
sense resistors, the IR drops in the printed wiring board can be
devices can be synchronized by using the simple circuit shown
significant and should be taken into account. The use of sock-
in figure 3. A 555IC can be used to generate the reset pulse/
ets should be avoided as their contact resistance can cause
blanking signal (t1) for the device and the period of the PWM
variations in the effective value of RS.
cycle (t 2). The value of t1 should be a minimum of 1.5ms. When
Generally, larger values of RS reduce the aforementioned ef-
used in this configuration, the RT and CT components should be
fects but can result in excessive heating and power loss in the
A3953SB/SLB
65
A3953SB/SLB
sense resistor. The selected value of RS should not cause the
(C)PCB Layout.
absolute maximum voltage rating of 1.0V (0.4V for
The load supply terminal, VBB should be decoupled with an elec-
V CC=3.3Voperation), for the SENSE terminal, to be exceeded.
trolytic capacitor (>47F is recommeded) placed as close to the
The current-sensing comparator functions down to ground al-
device as is physically practical. To minimize the elffect of sys-
lowing the device to be used in microstepping, sinusoidal, and
tem ground IR drops on the logic and reference input signals,
other varying current-profile applications.
the system ground should have a low-resistance return to the

motor supply voltage.
See also Current Sensing and Thermal Considerations above.
(B) Thermal Considerations.

For reliable operation it is recommended that the maximum junction termperature be kept below 110C to 125C. The junction
(D)Fixed Off-Time Selection.
termperature can be measured best by attaching a thermocouple
With increasing values of t OFF, switching losses will decrease,
to the power tab/batwing of the device and measuring the tab
low-level load-current regulation will improve, EMI will be re-
temperature, TTAB. Tthe junction temperature can then be ap-
duced, the PWM frequency will decrease, and ripple current will
proximated by using the formula:

TJ
increase. The value of tOFF can be chosen for optimization of

these parameters. For applications where audible noise is a
TTAB + (ILOAD 2 V F R JT)
concern, typical values of tOFF are chosen to be in the range of

15 ms to 35 ms.
where V F may be chosen from the electrical specification table

for the given level of ILOAD. The value for RJT is given in the
package thermal resistance table for the appropriate package.
(E) Stepper Motor Applications.
The power dissipation of the batwing packages can be improved
The MODE terminal can be used to optimize the performance
by 20% to 30% by adding a section of printed circuit board cop-
of the device in microstepping/sinusoidal stepper-motor drive
per (typically 6 to 18 square centimeters) connected to the
applications. When the load current is increasing, slow decay
batwing terminals of the device.
mode is used to limit the switching losses in the device and iron
The thermal performance in applications that run at high load
losses in the motor. This also improves the maximum rate at
currents and/or high duty cycles can be improved by adding
which the load current can increase (as compared to fast de-
external diodes in parallel with the internal diodes. In internal
cay) due to the slow rate of decay during t OFF.
PWM slow-decay applications, only the two ground clamp di-
When the load current is decreasing, fast-decay mode is used
odes need be added. For internal fast-decay PWM, or external
to regulate the load current to the desired level. This prevents
PHASE or ENABLE input PWM applications, all four external
tailing of the current profile caused by the back-EMF voltage of
diodes should be added for maximum junction temperature re-
the stepper motor.
duction.
Fig. 4 Example of Circuit (including GND) and GND Wiring Pattern
OUTB
OUTA
VBB
+
A3953SLB
Vref
REF
Rt
Phase
GND
+
SENSE
4, 5,
12, 13
VCCGND
A3953SLB
VBB
RC
1Pin
Ct
Enable
VCC
Mode
RS
Vref
VBBGND
VCCGND
66
A3953SB/SLB
Rt
Ct
Use jumper wiring

for dotted line.
A3953SB/SLB
In stepper-motor applications applying a constant current to the

load, slow-decay mode PWM is typically used to limit the switching lossess in the device and iron losses in the motor.
(F) DC Motor Applications.
In closed-loop systems, the speed of a dc motor can be controlled by PWM of the PHASE or ENABLE inputs, or by varying
the reference input voltage (REF). In digital systems (microprocessor controlled), PWM of the PHASE or ENABLE input is used
typically thus avoiding the need to generate a variable analog
voltage reference. In this case, a dc voltage on the REF input is
used typically to limit the maximum load current.
In dc servo applications, which require accurate positioning at
low or zero speed, PWM of the PHASE input is selected typically. This simplifies the servo control loop because the transfer
function between the duty cycle on the PHASE input and the
average voltage applied to the motor is more linear than in the
case of ENABLE PWM comtrol (which produces a discontinuous current at low current levels).
With bidirectional dc servo motors, the PHASE terminal can be
used for mechanical direction control. Similar to when branking
the motor dynamically, abrupt changes in the direction of a rotating motor produces a current generated by the back-EMF.
The current generated will depend on the mode of operation. If
the internal current control circuitry is not being used, then the
maximum load current generated can be approximated by
ILOAD=(VBEMF+VBB)/RLOAD where VBEMF is proportional to the motors
speed. If the internal slow current-decay control circuitry is used,
then the maximum load current generated can be approximated
by I LOAD=VBEMF/RLOAD. For both cases care must be taken to ensure that the maximum ratings of the device are not exceeded.
If the internal fast current-decay control circuitry is used, then
the load current will regulate to a value given by:
I LOAD
VREF
RS
CAUTION: In fast current-decay mode, when the direction of

the motor is changed abruptly, the kinetic energy stored in the
motor and load inertia will be converted into current that charges
the VBB supply bulk capacitance (power supply output and
decoupling capacitance). Care must be taken to ensure that the
capacitance is sufficient to absorb the energy without exceeding the voltage rating of any devices connected to the motor
supply.
See also Brake Operation above.
A3953SB/SLB
67
A2918SW

Features

Low saturation voltage (Sink transistor)
Low thermal resistance 18-pin SIP
Parameter
Output emitter voltage
Storage temperature
Symbol
VBB
IO (peak)
IO
VCC
VIN
VE
PD (Note1)
Ta
T j (Note2)
T stg
Conditions
Ratings
45
1.75
1.5
7.0
0.3 to +7.0
1.5
4.0
20 to +85
+150
55 to +150
tw20 s
Units
V
A
A
V
V
V
W
C
C
C
Parameter
(Unless specified otherwise, Ta =25C, VBB=45V, VCC=4.75V to 5.25V, VREF =5V)

Symbol

Motor supply voltage range
Limits
Conditions
min
VBB
ICEX
VCE (SUS)
VCE (SAT)

IR
VF
IBB (ON)
IBB (OFF)
typ
max
10
VO=V BB
VO =0V
IO=1.5A, L=3.5mH
Sink driver, IO =+1.0A
Source driver, IO =1.0A
V R=45V
IF=1.5A
Both bridges ON, no load
Both bridges OFF
45
50
50
45
0.8
1.1
2.0
2.2
50
2.0
15
10
Units
V
A
A
V
V
V
V
V
A
V
mA
mA
Control logic
IIH
IIL
VREF
V REF/VSENSE
Tj
ICC
Input current
Reference voltage range
Current control threshold
E2
3
4
5
SENSE2
ENABLE2
7
8
RC2
9
10
11
RC1
12
REFERENCE
15
SENSE1
16
OUT1B
17
E1
18
TSD
14
VREF
13
PWM1
PHASE1
ENABLE1
GROUND
LOGIC SUPPLY
VBB
PHASE2
OUT2B
LOAD SUPPLY
VCC
A2918SW
OUT2A
PWM2
68
OUT1A
All inputs
All inputs
V IN=2.4V
V IN=0.8V
Operating
VREF =5V
2.4
1.5
9.5
0.8
20
200
V CC
10.5
10
170
VEN=0.8V, no load
140
Derating
VIH
VIL
Input voltage
31
.2
5C
/
0
20
25
50
75 85
100
V
V
A
A
V
C
mA
A2918SW
Truth Table
ENABLE
PHASE
OUTA
H
X=Don't Care
OUTB
Z=High impedance
17
LOAD
SUPPLY
OUT2B
OUT2A
11
OUT1B
OUT1A
LOGIC
SUPPLY
VCC
TSD
VBB
ENABLE1 14
PHASE2
ENABLE2
SOURCE
DISABLE
SOURCE
DISABLE
10
RT
RS
CC
CT
6
RC
SENSE2
10
E2
15
GROUND
18
RC
REFERENCE
16
E1
SENSE1
12
ONE SHOT
RC2
VREF
10
ONE SHOT
RC1
8
PWM2
PWM1
PHASE1 13
RS
RT
CC
CT
External Dimensions Plastic SIP

18
+ 0.2
--- 0.1
+ 0.2
0.7
17 P1.68
= 28.561
0.55
4
+1
9.7 --- 0.5
(3) 6.7
0.5
R-End
+ 0.2
--- 0.1
0.15
3.2
3.8
4.8 0.2
1.7 0.1
0.2
16.4 0.2
2.450.2
9.9
16 0.2
130.2
9.9 0.2
2.450.2
0.65 ---0.1
310.2
24.4 0.2
3.20.15
1.7 0.1
16.4 0.2
16 0.2
130.2
4.8 0.2
+ 0.2
+ 0.2
0.65 ---0.1
1--- 0.1
0.4
17 P1.68
2.2 0.1
6.0 0.6
= 28.561
7.5 0.6
0.7
4.6 0.6
3.8
3.0 0.6
1.6
0.15
3.2
+ 0.2
310.2
24.4 0.2
3.20.15
A2918SWH
0.6
A2918SWV
0.55 --- 0.1
ICs per stick
(Unit: mm)
31.30.2
31.30.2
12 3
18
123
18
A2918SW
69
A3952SB/SLB/SW

Features
Parameter
Switching between power supply regeneration mode and loop regeneration mode in
order to improve motor current response in
microstepping
Sleep (low current consumption) mode
Brake operation with PWM current limiting
Parameter
Power outputs

(Source or sink)
Load supply current
(No load)
Control logic
Logic input voltage
Logic input current
Reference voltage divider ratio
Comparator input offset voltage
PWM minimum on-time

UVLO hysteresis
(No load)
70
A3952SB/SLB/SW
VBB
IO (Peak)
IO
VCC
VIN
VSENSE
VREF
PD (Note1)
Ta
T j (Note2)
T stg
Conditions
tw20 s
Ratings
A3952SB A3952SLB A3952SW
50
3.5
2.0
7.0
0.3 to VCC+0.3
1.5
15
2.90
1.86
3.47
20 to +85
+150
55 to +150
Units
V
A
A
V
V
V
V
W
C
C
C
Note 1: When ambient temperature is 25C or over, derate using 23.26mW/C(SB), 14.93mW/C(SLB)
or 27.78mW/C(SW).
Load supply voltage

Logic input voltage
Sense voltage
Reference voltage
Storage temperature
Symbol
(Unless specified otherwise, Ta =25C, VBB=50V, VCC=5.0V, VBRAKE=2.0V, VSENSE= 0V, 20k & 1000pF RC to ground)
Limits
Symbol
Conditions
VBB
Operating, IO =2.0A, L=3mH

VO =VBB
V O=0V
Sink driver, IO=+0.5A
IF=0.5A
IF=1.0A
IF=2.0A
V ENABLE=0.8V, VBRAKE=2.0V
VENABLE=2.0V, VMODE=0.8V, VBRAKE=2.0V
VBRAKE=2.0V
VENABLE =VMODE=VBRAKE=2.0V
VCC
Operating
4.5
2.0
ICEX
VCE (SAT)
VF
IBB (ON)
IBB (OFF)
IBB (BRAKE)
IBB (SLEEP)
V CC
VIH
VIL
IIH
IIL
VREF
IREF
VIO
toff
ton (min)
tpd
tpd (PWM)
Tj
T j
V CC (UVLO)
VCC (UVLO)
ICC (ON)
ICC (OFF)
ICC (BRAKE)
ICC (SLEEP)
VIH=2.0V
V IL=0.8V
Operating
VREF=2.0V
VREF=15V
V REF=0V
CT=1000pF, RT=20k
CT=820pF, RT12k
CT=1200pF, RT12k
IOUT=2.0A, 50% EIN to 90% Eout Transition:
ENABLE ON to SOURCE ON
ENABLE OFF to SOURCE OFF
ENABLE ON to SINK ON
ENABLE OFF to SINK OFF
PHASE CHANGE to SOURCE ON
PHASE CHANGE to SOURCE OFF
PHASE CHANGE to SINK ON
PHASE CHANGE to SINK OFF
Comparator Trip to SINK OFF
min
18
3.15
300
V ENABLE=0.8V, VBRAKE=2.0V
VENABLE=2.0V, VMODE=0.8V, VBRAKE=2.0V
VBRAKE=0.8V
VENABLE =VMODE=VBRAKE=2.0V
max
<1.0
< 1.0
0.9
1.0
1.2
0.9
1.0
1.3
1.0
1.1
1.4
2.9
3.1
3.1
<1.0
50
50
50
1.2
1.4
1.8
1.2
1.4
1.8
1.4
1.6
2.0
6.0
6.5
6.5
50
V
A
A
V
V
V
V
V
V
V
V
V
mA
mA
mA
A
5.0
5.5
V
V
V
A
A
V
A
<1.0
< 2.0
0
25
9.5
Units
typ
40
10.0
1.0
20
1.7
2.5
2.9
0.7
2.4
0.7
2.9
0.7
2.4
0.7
0.8
165
15
3.50
400
20
12
26
3.0
0.8
20
200
15
55
10.5
10
22
3.0
3.8
1.5
3.85
500
30
18
40
5.0
mV
s
s
s
s
s
s
s
s
s
s
s
s
C
C
V
mV
mA
mA
mA
mA
SLEEP &
STANDBY MODES
OUTB
VBB
LOAD
SUPPLY
OUTA
Derating
A3952SB/SLB/SW
MODE
4
PHASE
A3
95
95
2S
2S
B4
3 C
A39
5
36
C
/W /W
2SL
ENABLE
BRAKE
B6
7C
/
LOGIC
SUPPLY
25
50
75 85
+
Q
BLANKING
1.5V
PWM LATCH
Ambient temperatureTa (C)

GROUND
SENSE
"B", "LB" , & "W"
PACKAGES
RC RS
VCC
9R
100
EMITTERS
"EB" ONLY
VCC
REF
0
20
UVLO
& TSD
INPUT LOGIC
A3
VTH
RT
CT
Truth Table
BRAKE
ENABLE
PHASE
MODE
OUTA
OUTB
Sleep mode
Operating Mode
X
H
H
L
L
X
X
Standby (Note 1)
Brake, fast current-decay mode
Brake, no current control (Note 2)
X : Don't Care
Z : High impedance
Note 1: Includes active pull-offs for power outputs
Note 2: Includes internal default
VSENSE level for overcurrent protection
A3952SLB
A3952SW
16
BRAKE
16
REF
15
OUTB
REF
15
OUTB
RC
14
MODE
RC
14
MODE
GROUND
13
GROUND
GROUND
13
GROUND
GROUND
12
GROUND
GROUND
12
GROUND
LOGIC
SUPPLY
11
SENSE
LOGIC
SUPPLY
11
SENSE
PHASE
10
OUTA
PHASE
10
OUTA
ENABLE
ENABLE
VBB
VBB
10
MODE
ENABLE
VCC
2
PHASE
LOAD
SUPPLY
RC
LOGIC
SUPPLY
VBB
REF
LOAD
SUPPLY
BRAKE
OUTB
VBB
VCC
LOAD
SUPPLY
VCC
VBB
LOGIC
GROUND
LOGIC
External Dimensions
A3952SLB
ICs per stick
16
25
0.381
0.204
Wide body plastic SOP

(300mil)
16
A3952SW
ICs per stick
47
Plastic power SIP
0.32
0.23
32.00
31.50
0.51
7.11
6.10
7.62BSC
INDEX AREA
5.33MAX
8
10.50
10.10
SEATING PLANE
2.65
2.35
0.558
0.356
4.57MAX
19.69
19.43
6.22
5.71
1.27
0.40
2.54BSC
0.51
0.33
15
1.40
1.14
3.94
3.68
3.56
0.127MIN
21.33
18.93
ICs per stick
10.65
10.00
7.60
7.40
1.77
1.15
12
(Unit: mm)
A3952SB
Plastic DIP
(300mil)
11
OUTA
LOAD
SUPPLY
SENSE
BRAKE
LOAD
SUPPLY
LOGIC
A3952SB
SEATING PLANE
9.27
14.48
13.72
INDEX
AREA
1.27
BSC
0 TO 8
7.37MIN
1
1.65
0.89
0.59
0.46
4.06
2.93
0.39MIN
SEATING
PLANE
12
0.76
0.51
2.540.25

Note 1: Lead width of pin 1, 8, 9, 16 may be half the value shown here.
2: Maximum thickness of lead is 0.508mm.
3.43
2.54
2.03
1.78
0.10 MIN.

Lead is measured 0.762mm below seating plane.
A3952SB/SLB/SW
71
A3952SB/SLB/SW
Application Notes
Outline
Fig. 1 Load-Current Paths
Designed for bidirectional pulse-width modulated current con-
VBB
trol of inductive loads, the A3952S- is capable of continuous

output currents to 2A and operating voltages to 50V. Internal
fixed off-time PWM current-control circuitry can be used to regu-
DRIVE CURRENT
late the maximum load current to a desired value. The peak
RECIRCULATION (SLOW-DECAY MODE)
load current limit is set by the users selection of an input refer-
RECIRCULATION (FAST-DECAY MODE)
ence voltage and external sensing resistor. The fixed OFF-time

pulse duration is set by a user-selected external RC timing network. Internal circuit protection includes thermal shutdown with
hysteresis, transient suppression diodes, and crossover-current
RS
protection. Special power-up sequencing is not required.

With the ENABLE input held low, the PHASE input controls load
current polarity by selecting the appropriate source and sink
The user selects an external resistor (RT) and capacitor (CT) to
driver pair. The MODE input determines whether the PWM cur-
determine the time period (toff=RT CT) during which the drivers
rent-control circuitry operates in a slow current-decay mode (only
remain disabled (see RC Fixed OFF Time below). At the end
the selected sink driver switching) or in a fast current-decay
of the RTCT interval, the drivers are re-enabled allowing the load
mode (selected source and sink switching). A user-selectable
current to increase again. The PWM cycle repeats, maintaining
blanking window prevents false triggering of the PWM current
the load current at the desired value (see figure 2).
control circuitry. With the ENABLE input held high, all output
drivers are disabled. A sleep mode is provided to reduce power
Fig. 2 Fast and Slow Current-Decay Waveforms
consumption when inactive.

When a logic low is applied to the BRAKE input, the braking
ENABLE
function is enabled. This overrides ENABLE and PHASE to turn

OFF both source drivers and turn ON both sink drivers. The
MODE
brake function can be safely used to dynamically brake brush

ITRIP
dc motors.
RC
FUNCTIONAL DESCRIPTION
LOAD
CURRENT
RC
(A) INTERNAL PWM CURRENT CONTROL DURING FORWARD AND REVERSE OPERATION
The A3952S- contains a fixed OFF-time pulse-width modulated
(PWM) current-control circuit that can be used to limit the load
MODE OPERATION
current to a desired value. The value of the current limiting (ITRIP)
The brake circuit turns OFF both source drivers and turns ON
is set by the selection of an external current sensing resistor
both sink drivers. For dc motor applications, this has the effect
(R S) and reference input voltage (VREF). The internal circuitry
of shorting the motors back-EMF voltage, resulting in current
compares the voltage across the external sense resistor to one
flow that brakes the motor dynamically. However, if the back-
tenth the voltage on the REF input terminal, resulting in a func-
EMF voltage is large, and there is no PWM current limiting, then
tion approximated by
the load current can increase to a value that approaches a locked
VREF
10 R S
rotor condition. To limit the current, when the ITRIP level is reached,
I TRIP
72
(B)INTERNAL PWM CURRENT CONTROL DURING BRAKE
the PWM circuit disables the conducting sink driver. The energy
In forward or reverse mode the current-control circuitry limits
stored in the motors inductance is then discharged into the load
the load current. When the load current reaches I TRIP, the com-
supply causing the motor current to decay.
parator resets a latch to turn OFF the selected sink driver (in the
As in the case of forward/reverse operation, the drivers are re-
slow-decay mode) or selected sink and source driver pair (in
enabled after a time given by toff=RTCT (seeRC Fixed OFF Time
the fast-decay mode). In slow-decay mode, the selected sink
below). Depending on the back-EMF voltage (proportional to
driver is disabled; the load inductance causes the current to
the motors decreasing speed), the load current again may in-
recirculate through the source driver and flyback diode (see fig-
crease to ITRIP. If so, the PWM cycle will repeat, limiting the load
ure 1). In fast-decay mode, the selected sink and source driver
current to the desired value.
pair are disabled; the load inductance causes the current to flow
(1) Brake Operation-MODE Input High
from ground to the load supply via the ground clamp and flyback
During braking, when the MODE input is high, the current limit
diodes.
can be approximated by
A3952SB/SLB/SW
VREF
10 R S
I TRIP
A3952SB/SLB/SW
proximately 1mA. The comparator output remains blanked until

the voltage on CT reaches approximately 3.0 volts.
CAUTION: Because the kinetic energy stored in the motor and
Similarly, when a transition of the PHASE input occurs, CT is
load inertia is being converted into current, which charges the
discharged to near ground during the crossover delay time (the
V BB supply bulk capacitance (power supply output and
crossover delay time is present to prevent simultaneous con-
decoupling capacitance), care must be taken to ensure the ca-
duction of the source and sink drivers). After the crossover de-
pacitance is sufficient to absorb the energy without exceed-
lay, CT is charged by an internal current source of approximately
ing the voltage rating of any devices connected to the motor
1mA. The comparator output remains blanked until the voltage
supply.
on CT reaches approximately 3.0 volts.
(2) Brake Operation-MODE Input Low
Similarly, when the device is disabled via the ENABLE input, CT
During braking,with the MODE input low, the peak current limit
is discharged to near ground. When the device is re-enabled,
defaults internally to a value approximated by
CT is charged by the internal current source. The comparator
1.5V
RS
I TRIP
output remains blanked until the voltage on CT reaches approximately 3.0V.
In this mode, the value of R S determines the ITRIP value indepen-
For applications that use the internal fast-decay mode PWM
dent of V REF. This is useful in applicaions with differing run and
operation, the minimum recommended value is CT=1200pF5%.
brake currents and no practical method of varying V REF.
For all other applications, the minimum recommended value is
Choosing a small value for R S essentially disables the current
CT=820pF5%. These values ensure that the blanking time is
limiting during braking. Therefore, care should be taken to en-
sufficient to avoid false trips of the comparator under normal
sure that the motors current does not exceed the absolute
operating conditions. For optimal regulation of the load current,
maximum ratings of the device. The braking current can be
the above values for CT are recommended and the value of R T
measured by using an oscilloscope with a current probe con-
can be sized to determine toff. For more information regarding
nected to one of the motors leads.
load current regulation, see below.
(C) RC Fixed OFF Time
(E) LOAD CURRENT REGULATION WITH THE INTERNAL
The internal PWM current control circuitry uses a one shot to
PWM CURRENT-CONTROL CIRCUITRY
control the time the driver (s) remain (s) OFF. The one shot
When the device is operating in slow-decay mode, there is a
time, toff (fixed OFF time), is determined by the selection of an
limit to the lowest level that the PWM current-control circuitry
external resistor (RT ) and capacitor (CT) connected in parallel
can regulate load current. The limitation is the minimum duty
from the RC terminal to ground. The fixed OFF time, over a
cycle, which is a function of the user-selected value of toff and
range of values of CT=820pF to 1500pF and RT=12k to 100k,
the maxuimum value of the minimum ON-time pulse, ton (min), that
is approximated by
occurs each time the PWM latch is reset. If the motor is not
t OFF
RT CT
rotating, as in the case of a stepper motor in hold/detent mode,

or a brush dc motor when stalled or at startup, the worst-case
When the PWM latch is reset by the current comparator, the
value of current regulation can be approximated by
voltage on the RC terminal will begin to decay from approximately 3 volts. When the voltage on the RC terminal reaches
I(AV)
[(VBBVSAT (source + sink)) t on (min) max][1.05 (VSAT (sink) + VD) t off]

1.05 (t on (min) max + t off) R LOAD
approximately 1.1 volt, the PWM latch is set, thereby re-enabling

the driver (s).
where toff=RTC T, RLOAD is the series resistance of the load, VBB is

the load/motor supply voltage, and ton (min) max is specified in the
(D) RC Blanking
electrical characteristics table. When the motor is rotating, the
In addition to determining the fixed OFF-time of the PWM con-
back EMF generated will influence the above relationship. For
trol circuit, the C T component sets the comparator blanking time.
brush dc motor applications, the current regulation is improved.
This function blanks the output of the comparator when the out-
For stepper motor applications when the motor is rotating, the
puts are switched by the internal current control circuitry (or by
effect is more complex. A discussion of this subject is included
the PHASE, BRAKE, or ENABLE inputs). The comparator out-
in the section on stepper motors under Applications.
put is blanked to prevent false over-current detections due to
The following procedure can be used to evaluate the worst-case
reverse recovery currents of the clamp diodes, and/or switching
slow-decay internal PWM load current regulation in the system:
transients related to distributed capacitance in the load.
Set VREF to 0 volts. With the load connected and the PWM current
During internal PWM operation, at the end of the t off time, the
control operating in slow-decay mode, use an oscilloscope to
comparators output is blanked and CT begins to be charged
measure the time the output is low (sink ON) for the output that is
from approximately 1.1V by an internal current source of ap-
chopping. This is the typical minimum ON time (ton (min) typ) for the
A3952SB/SLB/SW
73
A3952SB/SLB/SW
device. CT then should be increased until the measured value
blanking signal (t1) and the period of the PWM cycle (t2). The
of ton (min) is equal to ton (min) max)=3.0s as specified in the electri-
value of t1 should be a minimum of 1.5s in slow-decay mode
cal characteristics table. When the new value of C T has been
and 2s in fast-decay mode. When used in this configuration,
set, the value of R T should be decreased so the value for
the RT and CT components should be omitted. The PHASE and
toff=RTCT (with the artificially increased value of C T) is equal to
ENABLE inputs should not be PWMed with this circuit configu-
105% of the nominal design value. The worst-case load current
ration due to the absence of a blanking function synchronous
regulation then can be measured in the system under operating
with their transitions.
conditions.
In applications utilizing both fast-and slow-decay internal PWM
Fig. 3 Synchronous Fixed-Frequency Control Circuit
modes, the performance of the slow-decay current regulation
t2
20 k
of 3.8 s. This corresponds to a CT value of 1200pF, which is

required to ensure sufficient blanking during fast-decay internal
100 k
VCC
should be evaluated per the above procedure and a ton (min) max
PWM.
RC1
1N4001
(F) LOAD CURRENT REGULATION WITH EXTERNAL PWM

OF THE PHASE AND ENABLE INPUTS
2N2222
t1
RCN
The PHASE and ENABLE inputs can be pulse-width modulated

to regulate load current. Typical propagation delays from the
PHASE and ENABLE inputs to transitions of the power outputs
(G)MISCELLANEOUS INFORMATION
are specified in the electrical characteristics table. If the internal
A logic high applied to both the ENABLE and MODE terminals
PWM current control is used, then the comparator blanking func-
puts the device into a sleep mode to minimize current consump-
tion is active during phase and enable transitions. This elimi-
tion when not in use.
nates false tripping of the over-current comparator caused by
An internally generated dead time prevents crossover currents
switching transients (see RC Blanking above).
that can occur when switching phase or braking.
(1) ENABLE Pulse-Width Modulation
Thermal protection circuitry turns OFF all drivers should the junc-
With the MODE input low, toggling the ENABLE input turns ON
tion temperature reach 165C (typical). This is intended only to
and OFF the selected source and sink drivers. The correspond-
protect the device from failures due to excessive junction tem-
ing pair of flyback and ground clamp diodes conduct after the
peratures and should not imply that output short circuits are
drivers are disabled, resulting in fast current decay. When the
permitted. The hysteresis of the thermal shutdown circuit is ap-
device is enabled, the internal current control circuitry will be
proximately 15C.
active and can be used to limit the load current in a slow-decay
If the internal current-control circuitry is not used; the VREF ter-
mode.
minal should be connected to VCC , the SENSE terminal should
For applications that PWM the ENABLE input, and desire that
be connected to ground, and the RC terminal should be left
the internal current limiting circuit function in the fast-decay mode,
floating (no connection).
the ENABLE input signal should be inverted and connected to
An internal under-voltage lockout circuit prevents simultaneous
the MODE input. This prevents the device from being switched
conduction of the outputs when the device is powered up or
into sleep mode when the ENABLE input is low.
powered down.
(2) PHASE Pulse-Width Modulation

Toggling the PHASE terminal determines/controls which sink/
source pair is enabled, producing a load current that varies with
the duty cycle and remains continuous at all times. This can
have added benefits in bidrectional brush dc servo motor applications as the transfer function between the duty cycle on the
phase input and the average voltage applied to the motor is
more linear than in the case of ENABLE PWM control (which
produces a discontinuous current at low current levels). See
also, DC Motor Applications below.
(3) SYNCHRONOUS FIXED-FREQUENCY PWM
The internal PWM current-control circuitry of multiple A3952Sdevices can be synchronized by using the simple circuit shown
in figure 3. A555IC can be used to generate the reset pulse/
74
A3952SB/SLB/SW
A3952SB/SLB/SW
APPLICATION NOTES
The thermal performance in applications with high load currents
(A) Current Sensing
and/or high duty cycles can be improved by adding external
The actual peak load current (I OUTP) will be greater than the cal-
diodes in parallel with the internal diodes. In internal PWM slow-
culated value of I TRIP due to delays in the turn OFF of the driv-
decay applications, only the tow top-side (flyback) diodes need
ers. The amount of overshoot can be approximated as
be added. For internal fast-decay PWM, or external PHASE or
(VBB [(I TRIP RLOAD)+VBEMF]) t pd (pwm)

LLOAD
I OUTP
ENABLE input PWM applications, all four external diodes should

be added for maximum junction temperature reduction.
where V BB is the load/motor supply voltage, V BEMF is the back-
(C)PCB Layout
EMF voltage of the load, RLOAD and LLOAD are the resistance and
The load supply terminal, VBB, should be decoupled (>47F elec-
inductance of the load respectively, and tpd (pwm) is the propaga-
trolytic and 0.1F ceramic capacitors are recommended) as
tion delay as specified in the electrical characteristics table.
close to the device as is physically practical. To minimize the
The reference terminal has an equivalent input resistance of
effect of system ground IR drops on the logic and reference
50k30%. This should be taken into account when determin-
input signals, the system ground should have a low-resistance
ing the impedance of the external circuit that sets the reference
return to the load supply voltage.
voltage value.
See also Current Sensing and Thermal Considerations above.
To minimize current-sensing inaccuracies caused by ground

trace IR drops, the current-sensing resistor should have a sepa-
(D)Fixed Off-Time Selection
rate return to the ground terminal of the device. For low-value
With increasing values of toff, switching losses decrease, low-
sense resistors, the IR drops in the PCB can be significant and
level load-current regulation improves, EMI is reduced, the PWM
should be taken into account. The use of sockets should be
frequency will decrease, and ripple current will increase. The
avoided as their contact resistance can cause variations in the
value of toff can be chosen for optimization of these parameters.
effective value of R S.
For applications where audible noise is a concern, typical val-
Larger values of RS reduce the aforementioned effects but can
ues of toff are chosen to be in the range of 15 to 35s.
result in excessive heating and power loss in the sense resistor.

The selected value of R S must not cause the SENSE terminal
(E) Stepper Motor Applications
absolute maximum voltage rating to be exceeded. The recom-
The MODE terminal can be used to optimize the performance
mended value of RS is in the range of
of the device in microstepping/sinusoidal stepper motor drive

applications. When the average load current is increasing, slow-
RS
(0.375 to 1.125)
I TRIP
decay mode is used to limit the switching losses in the device

and iron losses in the motor.
The current-sensing comparator functions down to ground al-
This also improves the maximum rate at which the load current
lowing the device to be used in microstepping, sinusoidal, and
can increase (as compared to fast decay) due to the slow rate
other varying current profile applications.
of decay during toff. When the average load current is decreasing, fast-decay mode is used to regulate the load current to the
(B) Thermal Considerations
desired level. This prevents tailing of the current profile caused
For reliable operation, it is recommended that the maximum
by the back-EMF voltage of the stepper motor.
junction temperature be kept as low as possible, typically 90C
In stepper motor applications applying a constant current to the
to 125C. The junction temperature can be measured by at-
load, slow-decay mode PWM is used typically to limit the switch-
taching a thermocouple to the power tab/batwing of the device
ing losses in the device and iron losses in the motor.
and measuring the tab temperature, T T. The junction temperature can then be approximated by using the formula
TJ
TT + (2VF IOUT R JT)
where V F is the clamp diode forward voltage and can be determined from the electrical specification table for the given level
of I OUT. The value for RJT is given in the package thermal resistance table for the appropriate package.
The power dissipation of the batwing packages can be improved
by 20 to 30% by adding a section of printed circuit board copper
(typically 6 to 18 square centimeters) connected to the batwing
terminals of the device.
A3952SB/SLB/SW
75
A3952SB/SLB/SW
(F) Application circuit (Bipolar stepper motor drive)

Fig. 4 Example of stepper motor drive
VBB
+5V
47 F
0.5
10
9
8
0.5
VREF2
6
7
PHASE1
ENABLE1
VBB
VCC
MODE1
LOGIC
11
12
VCC
LOGIC
VREF1
CT=
820pF/1200pF
5
4
2
11
RT=
17k/25k
MODE2
10
ENABLE2
VBB
PHASE2
12
RT=
17k/25k
CT=
820pF/1200pF
toff RT CT (Chopping off-time setting)

RT = 12k~100k
CT = 820~1500pF (When using slow current-decay mode only)
1200~1500pF (When using fast current-decay mode only)
(G)DC Motor Applications

In closed-loop systems, the speed of a dc motor can be con-
regulate to a value given by
trolled by PWM of the PHASE or ENABLE inputs, or by varying

the REF input voltage (VREF). In digital systems (microproces-
I LOAD
VREF
(10 R S)
sor controlled), PWM of the PHASE or ENABLE input is used

typically thus avoiding the need to generate a variable analog
CAUTION: In fast-decay mode, when the direction of the motor
voltage reference. In this case, a dc voltage on the REF input is
is changed abruptly, the kinetic energy stored in the motor and
used typically to limit the maximum load current.
load inertia will be converted into current that charges the VBB
In dc servo applications that require accurate positioning at low
supply bulk capacitance (power supply output and decoupling
or zero speed, PWM of the PHASE input is selected typically.
capacitance). Care must be taken to ensure the capacitance is
This simplifies the servo-control loop because the transfer func-
sufficient to absorb the energy without exceeding the voltage
tion between the duty cycle on the PHASE input and the aver-
rating of any devices connected to the motor supply.
age voltage applied to the motor is more linear than in the case
See also, the sections on brake operation under Functional
of ENABLE PWM control (which produces a discontinuous cur-
Description, above.
rent at low-current levels).

With bidirectional dc servo motors, the PHASE terminal can be
used for mechanical direction control. Similar to when braking
the motor dynamically, abrupt changes in the direction of a rotating motor produce a currrent generated by the back EMF.
The current generated will depend on the mode of operation. If
the internal current-control circuitry is not being used, then the
maximum load current generated can be approximated by
ILOAD
(VBEMF + VBB)
RLOAD
where V BEMF is proportional to the motors speed. If the internal

slow-decay current-control circuitry is used, then the maximum
load current generated can be approximated by I LOAD=VBEMF/
R LOAD. For both cases, care must be taken to ensure the maximum ratings of the device are not exceeded. If the internal fastdecay current-control circuitry is used, then the load current will
76
A3952SB/SLB/SW
A3952SB/SLB/SW
(H) Application circuit (DC motor drive)

Fig. 5 Example of DC motor drive
+5 V
RT=
17k/25k
VBB
16
15
14
BRAKE
VBB
47 F
MODE
13
12
CT=
820pF/1200pF
PHASE
ENABLE
VCC
11
7
8
0.5
LOGIC
10
VBB
toff RT CT (Chopping off-time setting)

RT = 12k to 100k
CT = 820 to 1500pF (When using slow current-decay mode only)
1200 to 1500pF (When using fast current-decay mode only)
A3952SB/SLB/SW
77
UDN2916B/LB

Features
Parameter
Internal 1/3 and 2/3 reference divider

Storage temperature
1-phase/2-phase/W1-2 phase excitation

mode with digital input
Microstepping with reference input
Symbol
Ratings
Conditions
VBB
IO (peak)
IO
VCC
VIN
VE
PD (Note1)
Ta
T j (Note2)
T stg
UDN2916B
Units
UDN2916LB
45
1.0
0.75
7.0
0.3 to +7.0
1.5
tw20 s
3.12
V
A
A
V
V
V
W
C
C
C
2.27
20 to +85
+150
55 to +150
Note 1: When ambient temperature is 25C or over, derate using 25mW/C (UDN2916B) or 18.2mW/
C (UDN2916LB).

(Unless specified otherwise, T a=25C, VBB=45V, VCC=4.75V to 5.25V, VREF=5.0V)
Parameter
Symbol

Limits
Conditions
min
VBB
VCE (SUS)
VCE (SAT)

IR
VF
IBB (ON)
max
<1.0
<1.0
45
50
50
0.4
1.0
1.0
1.3
<1.0
1.6
20
5.0
0.6
1.2
1.2
1.5
50
2.0
25
10
10
IO=750mA, L=3.0mH
V R=45V
IF=750mA
Both bridges OFF
ICEX
typ
IBB (OFF)
45
Units
V
A
A
V
V
V
V
V
A
V
mA
mA
Control logic
VIH
Input voltage
VIL
IIH
Input current
IIL
VREF
V REF/VSENSE
Tj
ICC (ON)
All inputs
All inputs
V IH=2.4V
VIL=0.8V
Operating
I0 =I1 =0.8V
I0=2.4V, I1=0.8V
I0=0.8V, I1=2.4V
2.4
<1.0
3.0
1.5
9.5
13.5
25.5
10.0
15.0
30.0
170
40
10
I0 =I1=0.8V, no load
ICC (OFF)
UDN2916LB
UDN2916B
E2
SENSE2
LOAD SUPPLY
23
E1
22
24
21
I02
I12
PHASE2
VREF 2
24
LOAD SUPPLY
23
OUT2B
22
SENSE2
21
E2
RC2
20
OUT2A
19
GROUND
18
GROUND
17
OUT1B
OUT1A
16
E1
15
SENSE1
14
OUT1B
13
I01
20
I01
19
GROUND
GROUND
GROUND
18
GROUND
GROUND
I02
17
I11
LOGIC SUPPLY
RC1
VREF2 11
RC2 12
PWM 2
PHASE2 10
PWM 1
OUT2B
16
15
14
VCC 13
UDN2916B/LB
VCC
PHASE1
VREF1
RC1
LOGIC SUPPLY
1
VREF1
PHASE1
I11
78
SENSE1
GROUND
I12
PWM 2
OUT2A
VBB
VBB
10
11 1
12
PWM 1
OUT1A
0.8
20
200
7.5
10.5
16.5
34.5
50
12
V
V
A
A
V
C
mA
mA
2-Phase Stepper Motor Bipolar Driver ICs (2-Phase/1-2 Phase/W1-2 Phase Excitation)
UDN2916B/LB
Internal Block Diagram (1/2 Circuit)
Derating
OUTB
OUTA
UD
N2
91
6B
UD
40
N2
C
916
/W
LB
55
C/ W
VREF
20 k
E
10
10 k
25
50
75 85
ONE
SHOT
SOURCE
DISABLE
RC
CC
RS
100
RT
I1
CT
Application Circuit (UDN2916LB)
Truth Table
OUTA
OUTB
VBB
*1 From P
*2 VREF
CBB
*1 2
I0
I1
VREF / (10RS)=I TRIP
VREF / (15RS)=I TRIP2/3
*1 3 2
*2 4
Output Current
RT
CT
VCC
+5V
VBB
*1 1
RT
24
23
PWM 2
PHASE
RC
I0
0
20
SENSE
40 k
22
2
21
20
19
18
8 VCC
17
16
RC
CC
RS
CT
*2 10
*1 11 1
15
PWM 1
VBB
*1 12
13
Off-time setting
t offCTRT
RC
RS
14
CC
*1
RS :
VREF :
RT :
CT :
RC :
CC :
CBB :
1.5, 1/2W (1.0 to 2.0, 1 to 1/2W)

5.0V (1.5 to 7.5V)
56k (20k to 100k)
470pF (100 to 1,000pF)
1k
4,700pF (470 to 10,000pF)
100 F
External Dimensions
(Unit: mm)
UDN2916B
ICs per stick
UDN2916LB
15
Plastic DIP (300mil)

24
ICs per stick
31
Wide body plastic SOP (300mil)
0.381
0.204
24
13
13
0.32
0.23
*1
7.11
6.10
7.62BSC
INDEX AREA
10.65
10.00
7.60
7.40
12
0.127MIN
1.77
1.15
1.27
0.40
2.54BSC
32.30
28.60
0.51
0.33
12
15.60
15.20
5.33MAX
SEATING PLANE
0.558
0.356
2.65
2.35
4.06
2.93
0.39MIN
1.27
BSC
0 TO 8
SEATING PLANE
0.10 MIN
Pin material: copper, pin surface treatment: solder plating

Web (batwing) type lead frames are used for pin 6, 7, 18, 19.
The pins are connected to GND.
UDN2916B/LB
79
UDN2916B/LB
Application Notes
PWM CURRENT CONTROL
Load-Current Paths
The UDN2916B/LB dual bridges are designed to drive both wind-
VBB
ings of a bipolar stepper motor. Output current is sensed and

controlled independently in each bridge by an external sense
resistor (RS), internal comparator, and monostable multivibrator.
PWM OUTPUT CURRENT WAVE FORM
Load
VPHASE
+
IOUT 0
ITRIP
td
RSENSE
BRIDGE ON
SOURCE OFF
ALL OFF
t off
When the bridge is turned ON, current increases in the motor
LOGIC CONTROL OF OUTPUT CURRENT
winding and it is sensed by the external sense resistor until the
Two logic level inptus (I0 and I1) allow digital selection of the
sense voltage (V SENSE) reaches the level set at the comparators
motor winding current at 100%, 67%, 33%, or 0% of the maxi-
input:
mum level per the table. The 0% output current condition turns
I TRIP=VREF / 10RS
OFF all drivers in the bridge and can be used as an OUTPUT

ENABLE function.
The comparator then triggers the monostable which turns OFF
These logic level inputs greatly enhance the implementation of
the source driver of the bridge. The actual load current peak
P-controlled drive formats.
will be slightly higher than the trip point (especially for low-in-
During half-step operations, the I0 and I1 allow the P to control
ductance loads) because of the internal logic and switching de-
the motor at a constant torque between all positions in an eight-
lays. This delay (td) is typically 2s. After turn-off, the motor
step sequence. This is accomplished by digitally selecting 100%
current decays, circulating through the ground-clamp diode and
drive current when only one phase is ON and 67% drive current
sink transistor. The source drivers OFF time (and therefore the
when two phases are ON. Logic highs on both I0 and I1 turn
magnitude of the current decrease) is determined by the
OFF all drivers to allow rapid current decay when switching
monostables external RC timing components, where toff=RT CT
phases. This helps to ensure proper motor operation at high
wihtin the range of 20k to 100k and 100pF to 1000 pF.
step rates.
When the source driver is re-enabled, the winding current (the
The logic control inputs can also be used to select a reduced
sense voltage) is again allowed to rise to the comparator s
current level (and reduced power dissipation) for hold condi-
threshold. This cycle repeats itself, maintaining the average
tions and/or increased current (and available torque) for start-
motor winding current at the desired level.
up conditions.
Loads with high distributed capacitances may result in high turnON current peaks. This peak (appearing across RS) will attempt
SWITCHING THE EXCITATION CURRENT DIRECTION
to trip the comparator, resulting in erroneous current control or
The PHASE input to each bridge determines the direction moter
high-frequency oscillations. An external RC CC time delay should
winding current flows. An internally generated deadtime (ap-
be used to further delay the action of the comparator. Depend-
proximately 2s) prevents crossover currents that can occur
ing on load type, many applications will not require these exter-
when switching the PHASE input.
nal components (SENSE connected to E.)
80
UDN2916B/LB
REDUCTION AND DISPERSION OF POWER LOSS
UDN2916B/LB
1/2 step : 1-2 excitation

About 1/4 step : W1-2 excitation
The thermal performance can be improved by adding four external Schottky barrier diodes (AK03 or other) between each
The control sequence is as shown below. (This sequence uses
output terminal and ground. In most applications, the chopping
threshold signal terminals Io and I1 for PWM current control.)
ON time is shorter than the chopping OFF time (small ON duty).

Therefore, a great part of the power loss of the driver IC is attributable to the motor regenerative current during the chopping
OUT1A
OUT1B
OUT2A
OUT2B
GND
OFF period. The regenerative current from the motor flows

through the current sensing resistor and ground clamp diode
and returns to the motor. The voltage drop across this path
causes the power loss. On this path, the forward voltage VF of
To motor
Schottky barrier
diode
ground clamp diode shows the greatest drop. This means that
adding Schottky barrier diodes will improve the thermal performance if their V F characteristic is smaller than that of the internal ground clamp diode.
Combined vector (1/4 cycle)
The external diodes also disperse the loss (a source of heat)
(4)
and reduce the package power dissipation PD of the driver IC.
(3)
Phase B
Consequently, a greater output current can be obtained.
(2)
CONTROL SEQUENCE OF 1-2 OR W1-2 PHASE EXCITATION

To reduce vibration when the stepper motor is rotating, the
(1)
UDN2916B/LB can provide 1-2 or W1-2 phase excitation for

the control sequence without varying the VREF terminal voltage.
(0)
Phase A
The step angle is
Control sequence (1-2/W1-2 phase)

(NABLE1= ENABLE 2= 0)
Phase A
I 11
I 01
Sequence
No.
PH1
Phase B
I 02
I 12
1-2 phase
Current ratio excitation
Current ratio
PH2
1/3
2/3
2/3
1/3
1/3
2/3
2/3
1/3
1/3
10
2/3
2/3
11
1/3
12
13
1/3
14
2/3
2/3
15
1/3
W1-2 phase
excitation
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Note: When the sequence no. is 0, 4, 8, or 12, power-down can be set as follows
I11=1, I01=0: Sequence No. 0 or 8
If power-down is necessary for a sequence other than 0, 4, 8, or 12, lower the VREF
terminal voltage. However, do not set the voltage lower than the lower limit of the setting range.
UDN2916B/LB
81
UDN2916B/LB
MICROSTEPPING (1/8 STEP) CONTROL SEQUENCE
microstepping and reduces motor vibration greatly. The
Varying the V REF terminal voltage in steps provides 1/8
microstepping control sequence is as follows:
Control sequence (microstepping)

Sequence
No.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
PH1
0
0
0
0
0
0
0
0
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
0
0
0
0
0
0
V REF1 (V)
7.5
7.4
6.9
6.2
5.3
4.2
2.9
1.5
1.5
1.5
2.9
4.2
5.3
6.2
6.9
7.4
7.5
7.4
6.9
6.2
5.3
4.2
2.9
1.5
1.5
1.5
2.9
4.2
5.3
6.2
6.9
7.4
Phase A
I 11
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
I 01
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Current ratio (%)
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
PH2
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
V REF2 (V)
1.5
1.5
2.9
4.2
5.3
6.2
6.9
7.4
7.5
7.4
6.9
6.2
5.3
4.2
2.9
1.5
1.5
1.5
2.9
4.2
5.3
6.2
6.9
7.4
7.5
7.4
6.9
6.2
5.3
4.2
2.9
1.5
Phase B
I 12
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I 02
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Current ratio (%)
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
Note: The VREF terminal voltage cannot be set to 0 V. To make the output current ratio 0%, set I0X=I1X=1.
When the sequence is 0, 8, 16, or 24, power-down can be set as follows:
VREF terminal
Thermal protection
V REF is the reference voltage input terminal for PWM constant
Thermal protection circuitry turns OFF all drivers when the junc-
current control. To realize stable ensure a stable signal, make
tion temperature reaches +170C. It is only intended to protect
sure noise is not applied to the terminal.
the device from failures due to excessive junction temperature

and should not imply that output short circuits are permitted.
VBB terminal
The output drivers are re-enabled when the junction tempera-
To prevent voltage spikes on the load power supply terminal
ture cools to +145C.
(VBB), connect a large capacitor (22F) between the VBB terminal and ground as close to the device as possible. Make sure
the load supply voltage does not exceed 45 V.
82
UDN2916B/LB
UDN2916B/LB
Around the ground
the power system and the small signal (analog) system. Pro-
Since the UDN2916B/LB is a chopping type power driver IC,
vide a single-point connection to the GND terminal or a solid
take great care around the ground when mounting. Separate
pattern of low enough impedance.
Example of Circuit (including GND) and GND Wiring Pattern (UDN2916LB)
OUT2B OUT2A OUT1A OUT1B
RC
RC
CC
UDN2916B
UDN2916LB
6, 7,
18, 19
CC
RS
RC
RS
VBB
VBB
+
RS
RC
RS
CC
CT
CT
CC
VCC
GND
VBB
GND
I02
RT
RT
I12
VBB GND
VCC GND
RT
RT
Ph2
VCC
I01
I11
Ph1
VREF2
VREF1
CT
CT
UDN2916B/LB
83
UDN2917EB

Features
Parameter
Storage temperature
Internal 1/3 and 2/3 reference divider

1-phase/2-phase/W1-2 phase excitation
mode with digital input
Microstepping with reference input
Symbol
VBB
IO (peak)
IO
VCC
VIN
VE
PD (Note1)
Ta
T j (Note2)
T stg
Conditions
Ratings
45
1.75
1.5
7.0
0.3 to +7.0
1.0
4.16
20 to +85
+150
55 to +150
tw20 s
Units
V
A
A
V
V
V
W
C
C
C

Low thermal resistance 44-pin PLCC
(Unless specified otherwise, Ta =25C, VBB=45V, VCC=5.0V, VREF=5.0V)
Parameter
Symbol

Conditions
min
VBB
ICEX
VCE (SUS)
VCE (SAT)

IR
VF
IBB (ON)
IBB (OFF)

Control logic
VCC
VIH
VIL
Input voltage
IIH
IIL
VREF
V REF/VSENSE
Input current

max
<1.0
< 1.0
45
50
50
0.5
0.8
1.8
1.9
<1.0
1.6
9.0
4.0
0.7
1.0
1.9
2.1
50
2.0
12
6.0
5.0
5.25
10
IO=1.5A, L=3.5mH
V R=45V
IF=1.5A
Both bridges OFF
45
Operating
All inputs
All inputs
V IH=2.4V
VIL=0.8V
Operating
I0 =I1 =0.8V
I0=2.4V, I1=0.8V
I0=0.8V, I1=2.4V
4.75
2.4
0.8
20
200
7.5
10.5
16.5
34.5
<1.0
3.0
1.5
9.5
13.5
25.5
10.0
15.0
30.0
170
90
10
Tj
ICC (ON)
ICC (OFF)
Limits
typ
I0=I1 =VEN =0.8V, no load

105
12
PWM 1
9
10
36
35
12
34
VBB
11
14
33
32
15
84
UDN2917EB
GROUND
37
13
31
PWM 2
EN2
19
20
21
22
23
24
25
26
27
28
SENSE2
OUT2B
LOAD SUPPLY
I20
I21
VREF2
PHASE2
ENABLE2
RC2
29
18
30
17
E2
16
OUT2A
GROUND
39
38
GROUND
Derating
LOGIC SUPPLY
40
RC1
VCC
VREF1
ENABLE1
I11
44
41
I10
PHASE1
OUT1B
42
SENSE1
EN1
E1
43
OUT1A
1
GROUND
30
/W
0
20
25
50
75 85
100
Units
V
A
A
V
V
V
V
V
A
V
mA
mA
V
V
V
A
A
V
C
mA
mA
2-Phase Stepper Motor Bipolar Driver IC (2-Phase/1-2 Phase/W1-2 Phase Excitation)
Internal Block Diagram (1/2 Circuit)
UDN2917EB
Truth Table
ENABLE
PHASE
OUTA
VBB
OUTB
X=Don't Care
OUTB
Z=High impedance
OUTA
VREF
20 k
10
SENSE
ONE
SHOT
40 k
10 k
I0
RC
SOURCE
DISABLE
RC
I0
I1
Output Current
VREF / (10RS)=I TRIP
CC
RS
CT
RT
I1
Application Circuit
29
30
31
32
33
34
35
36
37
38
Ct
Rt
Ct
40
Rt
28
VCC
EN1
PHASE1
43
VREF1
EN2 27
PWM 2
42
PWM 1
ENABLE1
24
23
I01
I12
I02
RC
RS
Off-time setting t offCTRT
17
16
15
14
13
12
11
18
10
19
CC
20
VBB
CVBB
+
21
RC
VREF2
22
VBB
RS
PHASE2
25
44
CC
ENABLE2
26
I11
Digital control signal
41
Digital control signal
39
VCC
STEPPER
MOTOR
External Dimensions Plastic PLCC

ICs per stick
RS :
VREF :
RT :
CT :
RC :
CC :
CVBB :
0.82, 1W (0.5 to 1.0, 2 to 1W)

5.0V (1.5 to 7.5V)
56k (20k to 100k)
470pF (200 to 500pF)
1k
3,300pF (470 to 10,000pF)
100 F
(Unit: mm)
27
0.812
0.661
0.533
0.331
17.65
17.40
16.66
16.51
INDEX AREA
1.27
BSC
44
0.51
MIN
4.57
4.19
16.66
16.51
17.65
17.40

Note 1: Web type leads are internally connected together.
UDN2917EB
85
UDN2917EB
Application Notes
REDUCTION AND DISPERSION OF POWER LOSS
1/2 step : 1-2 excitation
The thermal performance can be improved by adding four ex-
About 1/4 step : W1-2 excitation
ternal Schottky barrier diodes (EK13 or other) between each
The control sequence is as shown below. (This sequence uses
output terminal and ground. In most applications, the chopping
threshold signal terminals Io and I1 for PWM current control.)
ON time is shorter than the chopping OFF time (small ON duty).

Therefore, a great part of the power loss of the driver IC is attributable to the motor regenerative current during the chopping
OUT1A
OUT1B
OUT2A
OUT2B
GND
OFF period. The regenerative current from the motor flows

through the current sensing resistor and ground clamp diode
and returns to the motor. The voltage drop across this path
causes the power loss. On this path, the forward voltage VF of
To motor
Schottky barrier
diode
ground clamp diode shows the greatest drop. This means that
adding Schottky barrier diodes will improve the thermal performance if their V F characteristic is smaller than that of the interCombined vector (1/4 cycle)
nal ground clamp diode.

The external diodes also disperse the loss (a source of heat)
(4)
(3)
Phase B
and reduce the package power dissipation PD of the driver IC.

Consequently, a greater output current can be obtained.
(2)
CONTROL SEQUENCE OF 1-2 OR W1-2 PHASE EXCITATION

To reduce vibration when the stepper motor is rotating, the
(1)
UDN2917EB can provide 1-2 or W1-2 phase excitation for the

control sequence without varying the VREF terminal voltage.
(0)
Phase A
The step angle is
Control sequence (1-2/W1-2 phase)

(ENABLE1= ENABLE2=0)
Phase A
I 11
I 01
Sequence
No.
PH1
Phase B
I 02
I 12
1-2 phase
Current ratio excitation
Current ratio
PH2
1/3
2/3
2/3
1/3
1/3
2/3
2/3
1/3
1/3
10
2/3
2/3
11
1/3
12
13
1/3
14
2/3
2/3
15
1/3
W1-2 phase
excitation
*
*
UDN2917EB
*
*
*
*
*
*
*
*
Note: When the sequence no. is 0, 4, 8, or 12, power-down can be set as follows
If power-down is necessary for a sequence other than 0, 4, 8, or 12, lower the
VREF terminal voltage. However, do not set the voltage lower than the lower limit of the setting range.
86
*
*
UDN2917EB
MICROSTEPPING (1/8 STEP) CONTROL SEQUENCE
microstepping and reduces motor vibration greatly. The
Varying the V REF terminal voltage in steps provides 1/8
microstepping control sequence is as follows:
Control sequence (microstepping)

(ENABLE1= ENABLE 2=0)
Sequence
No.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
PH1
0
0
0
0
0
0
0
0
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
0
0
0
0
0
0
Phase A
V REF1 (V)
I 11
7.5
0
7.4
0
6.9
0
6.2
0
5.3
0
4.2
0
2.9
0
1.5
0
1.5
1
1.5
0
2.9
0
4.2
0
5.3
0
6.2
0
6.9
0
7.4
0
7.5
0
7.4
0
6.9
0
6.2
0
5.3
0
4.2
0
2.9
0
1.5
0
1.5
1
1.5
0
2.9
0
4.2
0
5.3
0
6.2
0
6.9
0
7.4
0
I 01
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Current ratio (%)
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
PH2
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Phase B
V REF2 (V)
I 12
1.5
1
1.5
0
2.9
0
4.2
0
5.3
0
6.2
0
6.9
0
7.4
0
7.5
0
7.4
0
6.9
0
6.2
0
5.3
0
4.2
0
2.9
0
1.5
0
1.5
1
1.5
0
2.9
0
4.2
0
5.3
0
6.2
0
6.9
0
7.4
0
7.5
0
7.4
0
6.9
0
6.2
0
5.3
0
4.2
0
2.9
0
1.5
0
I 02
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Current ratio (%)
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
0
20
38
56
71
83
92
98
100
98
92
83
71
56
38
20
Note: The VREF terminal voltage cannot be set to 0 V. To make the output current ratio 0%, set I0X=I1X=1.
When the sequence is 0, 8, 16, or 24, power-down can be set as follows:
VREF terminal
Thermal protection
V REF is the reference voltage input terminal for PWM constant
Thermal protection circuitry turns OFF all drivers when the junc-
current control. To realize stable ensure a stable signal, make
tion temperature reaches +170C. It is only intended to protect
sure noise is not applied to the terminal.
the device from failures due to excessive junction temperature

and should not imply that output short circuits are permitted.
VBB terminal
The output drivers are re-enabled when the junction tempera-
To prevent voltage spikes on the load power supply terminal
ture cools to +145C.
(VBB ), connect a large capacitor (47F) between the VBB terminal and ground as close to the device as possible. Make sure
Around the ground
the load supply voltage does not exceed 45V.
Since the UDN2917EB is a chopping type power driver IC, take

great care around the ground when mounting. Separate the
power system and the small signal (analog) system. Provide a
single-point connection to the GND terminal or a solid pattern of
low enough impedance.
UDN2917EB
87
A3955SB/SLB

Features
Maximum output ratings: 50V, 1.5A
Parameter
Internal 3-bit non-linear DAC for 8-division
Load supply voltage

voltage range
Sense voltage
Storage temperature
microstepping enables 2W1-2,W1-2, 1-2,

2-phase excitation drive without external
sine wave generator
Internal PWM current control in Mixed Decay mode (can also be used in Fast Decay
and Slow Decay mode), which improves
motor current response and stability without deterioration of motor iron loss
External RC filter for sense terminal not
required thanks to internal blanking circuitry
Internal thermal shutdown, crossover-cur-
Ratings
Symbol
A3955SB
Units
A3955SLB
VBB
IO
VCC
50
1.5
7.0
V
A
V
VIN
0.3 to VCC+0.3
VS
P D (Note1)
Ta
T j (Note2)
Tstg
1.0
2.90
V
W
C
C
C
1.86
20 to +85
+150
55 to +150
Note 1: When ambient temperature is 25C or over, derate using 23.26mW/C(SB) or 14.93mW/C(SLB).
rent protection and transient-suppression

diodes
Special power-up and power-down sequencing for motor supply and logic supply not required
Derating
(TOP VIEW)
88
PFD
16
LOAD
SUPPLY
REF
15
OUTB
RC
14
D0
GROUND
13
GROUND
GROUND
12
GROUND
LOGIC
SUPPLY
11
SENSE
PHASE
10
OUTA
D2
D1
A3955SB/SLB
A3955SB/SLB
3.0
A3
95
5S
2.5
43
C
/W
A3
95
5S
1.5
LB
67
/W
1
0.5
0
20
20
40
60
80
100
2-Phase Stepper Motor Bipolar Driver ICs (2W1-2 Phase Excitation/Micro-step Support)
Parameter
(Unless specified otherwise, T a =25C, VBB=5V to 50V, VCC=4.5V to 5.5V)

Symbol
Conditions
VBB
Operating, IO=1.5A, L=3mH

V O=V BB
VO =0V
VSENSE=1.0V : Source Driver, IO =0.85A
VSENSE=1.0V : Source Driver, IO=1.5A
V SENSE=1.0V : Sink Driver, IO =0.85A
VSENSE=1.0V : Sink Driver, IO =1.5A
IS -IO , IO =0.85A, VS=0V, VCC=5V
IF=0.85A
IF=1.5A
ICEX
VCE (sat)
ISO
VF

Control logic
UVLO hysteresis
IBB (ON)
IBB (OFF)
VCC
V REF
VUVLOen
VUVLOhys
ICC (ON)
ICC (OFF)
Logic input voltage
V IH
VIL
Logic input current
IIH
IIL
Mixed Decay comparator trip points
V PFD
Mixed Decay comparator input offset voltage
VIO (PFD)
Mixed Decay compartor hysteresis

V IO (PFD)
IREF
VREF /VS
DAC accuracy *1
DACERR
Current-sense comparator input offset voltage *1
Step reference current ratio

AC timing
PWM turn-off time
VIO (S)
SRCR
Limits
typ
max
<1.0
< 1.0
1.0
1.3
0.5
1.3
33
1.2
1.4
2.0
1.0
50
50
50
1.2
1.5
0.6
1.5
40
1.4
1.7
4.0
50
V
A
A
V
V
V
V
mA
V
V
mA
A
3.70
0.45
42
12
5.5
2.5
4.05
0.60
50
16
<1.0
< 2.0
0.8
20
200
3.1
0.8
20
V
V
V
V
mA
mA
V
V
A
A
V
V
V
mV
55
5.0
mV
A
3.0
4.0
5.0
%
%
mV
%
%
%
%
%
%
%
%
C
C
20.2
22.3
1.0
1.5
1.4
2.5
0.4
0.55
0.7
0.85
S
S
1.0
1.6
2.2
0.3
1.5
3.0
min
Vcc
20
D0=D 1=D 2=0.8V

Operating
Operating
V CC=05V
4.5
0.5
3.35
0.30
D0=D 1=D 2=0.8V
tOFFRC
tPWM (OFF)
tPWM (ON)
PWM minimum on-time
tON (min)
tCODT
5.0
2.0
VIN =2.0V
VIN =0.8V
Slow Decay Mode
Mixed Decay Mode
Fast Decay Mode
3.5
1.1
5
V REF=0V~2.5V
at trip, D0 =D1 =D2=2V
VREF=1.0V~2.5V
VREF=0.5V~1.0V
VREF =0V
D0=D 1=D 2=0.8V
D0 =2.0V, D1 =D2 =0.8V
D0 =0.8V, D1=2V, D2 =0.8V
D0 =D1=2V, D2 =0.8V
D0 =D1=0.8V, D2 =2V
D0 =2V, D1=0.8V, D2=2V
D0 =0.8V, D1 =D2 =2V
D0=D 1=D2 =2V
CT=470pF, RT=43k
Current-Sense Comparator Trip to Source OFF,
IO=0.1A
IO=1.5A
IRC Charge ON to Source ON, IO =0.1A
IRC Charge ON to Source ON, IO =1.5A
VCC=5.0V, RT43k, CT=470pF,
IO=0.1A
1k Load to 25V
25
Units
3.0
0
19.5
38.2
55.5
70.7
83.1
92.4
100
165
15
Tj
T j
PWM turn-on time
Crossover dead time
A3955SB/SLB
18.2
*1: The total error for the VREF/V SENSE function is the sum of the D/A error and the current-sense comparator input offset voltage.
A3955SB/SLB
89
A3955SB/SLB
PHASE
LOAD
SUPPLY
OUTB
OUTA
LOGIC
SUPPLY
10
15
16
VCC
VBB
GROUND
4
5
UVLO
& TSD
12
13
MIXED-DECAY
COMPARATOR
BLANKING
GATE
CURRENT-SENSE
COMPARATOR
SENSE
11
Q
S
+3
BLANKING
D/A
DISABLE
RS
CT
14
D0
VTH
D1
RC
D2
VCC
REF
PFD
PWM LATCH
RT
Truth Table
PHASE
PHASE
H
L
DAC
OUTA
H
L
OUTB
L
H
D2
H
H
H
H
L
L
L
L
PFD
VPFD
3.5V
1.1V to 3.1V
0.8V
Operating Mode
Slow current-decay mode
Mixed current-decay mode
Fast current-decay mode
DAC DATA
D1
H
H
L
L
H
H
L
L
DAC [%]
D0
H
L
H
L
H
L
H
L
V REF/VS
100
3.00
92.4
3.25
83.1
3.61
70.7
4.24
55.5
5.41
38.2
7.85
19.5
15.38
All Outputs Disabled
where VS ITRIP*RS
Application Circuit
VBB
BRIDGE B
BRIDGE A
15
47 F
CBB1
D0A
RT1
36 k
560 pF
13
LOGIC
12
6 VCC
11
10
10
11
RS1
D2B
PHASEB
CCC2
RS2
14
+5V
D1B
12
5
LOGIC
D0B
+5 V
VCC 6
13
14
RT2
36 k
16
560 pF
VREF
VBB
0.5
0.5
CT1
VPFD
CCC1
PHASEA
D2A
47 F
D1A
15
+
VBB
16
CBB2
90
A3955SB/SLB
VREF
VPFD
VBB
CT2
Off-time setting : tOFFRT CT

RT=12k to 100k
CT=470pF to 1500pF
RS=0.39 to 0.62
CBB=47 F+0.1 F
CCC=0.1 F
VREF=0.5V to 2.5V
VPFD=1.1V to 3.1V (Mixed current-decay mode)
3.5V (Slow current-decay mode)
0.8V (Fast current-decay mode)
A3955SB/SLB
Step Sequence
Bridge A
Full
Step
1
Half
Step
1
Quarter
Step
1
Eigth
Step
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PHASE A
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
H
H
H
H
H
H
H
H
H
D2A
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
D1A
L
H
H
L
L
L
H
H
L
L
H
H
H
H
H
L
L
H
H
L
L
L
H
H
L
L
H
H
H
H
H
L
Bridge B
D0A
L
H
L
H
L
H
L
H
L
H
L
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
L
H
ILOADA
70.7%
55.5%
38.2%
19.5%
0%
19.5%
38.2%
55.5%
70.7%
83.1%
92.4%
100%
100%
100%
92.4%
83.1%
70.7%
55.5%
38.2%
19.5%
0%
19.5%
38.2%
55.5%
70.7%
83.1%
92.4%
100%
100%
100%
92.4%
83.1%
PHASE B
H
H
H
H
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
H
D2B
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
D1B
L
L
H
H
H
H
H
L
L
H
H
L
L
L
H
H
L
L
H
H
H
H
H
L
L
H
H
L
L
L
H
H
D0B
L
H
L
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
L
H
L
H
L
H
L
H
L
H
ILOADB
70.7%
83.1%
92.4%
100%
100%
100%
92.4%
83.1%
70.7%
55.5%
38.2%
19.5%
0%
19.5%
38.2%
55.5%
70.7%
83.1%
92.4%
100%
100%
100%
92.4%
83.1%
70.7%
55.5%
38.2%
19.5%
0%
19.5%
38.2%
55.5%
Current Vector Locus

A
MAXIMUM FULL-STEP
TORQUE (141%)
100
92.4
EP
C
O
N
ST
AN
T
8
3/
CURRENT IN PERCENT
70.7
ST
1/4
STE
P
TEP
10
0%
1/8 S
83.1
2
1/
55.5
EP
ST
TO
R
Q
U
E
EP
5/8
ST
38.2
3/4
EP
ST
TEP
19.5
7/8 S
FULL STEP
B
19.5
A
38.2
55.5
70.7
83.1 92.4
B
100
CURRENT IN PERCENT
A3955SB/SLB
91
A3955SB/SLB
External Dimensions
(Unit: mm)
A3955SB
A3955SLB
16
16
10.92
7.62 MAX
BSC
7.11
6.10
1
1.77
1.15
19.68
18.67
2.54
BSC
7.60
7.40
10.65
10.00
1.27
0.40
0.13
MIN
0.51
0.33
3
10.50
10.10
5.33
MAX
3.81
2.93
0.39
MIN
0.558
0.356
2.65
2.35
0.10 MIN.
92
A3955SB/SLB
0.32
0.23
0.508
0.204
1.27
BSC
0 to 8
A3955SB/SLB
93
A3957SLB

Features
Maximum output ratings: 50V, 1.5A
Parameter
Load supply voltage
voltage range
Sense voltage
Storage temperature
Internal 4-bit non-linear DAC for 16-division

microstepping enables 4W1-2, 2W1-2, W12, 2-phase excitation drive without external sine wave generator
Internal PWM current control in Mixed Decay mode (can also be used in Fast Decay
and Slow Decay mode), which improves
motor current response and stability without deterioration of motor iron loss
External RC filter for sense terminal not
required thanks to internal blanking circuitry
Symbol
VBB
IO
VCC
Ratings
50
1.5
7.0
Units
V
A
V
VIN
0.3 to VCC+0.3
1.0
2.23
20 to +85
+150
55 to +150
V
W
C
C
C
VS
PD (Note1)
Ta
T j (Note2)
Tstg
Internal thermal shutdown, crossover-current protection and transient-suppression

diodes
Special power-up and power-down sequencing for motor supply and logic supply not required
Derating
N.C.
24
PFD
23
VBB
REF
22
OUTB
N.C.
21
N.C.
RC
20
D0
N.C.
GROUND
19
GROUND
GROUND
18
GROUND
D3
17
SENSE
VCC
16
N.C.
PHASE
10
15
OUTA
D2
11
14
N.C.
N.C.
12
13
D1
(TOP VIEW)
3
2.5
A3
95
7S
2
1.5
LB
56
/W
1
0.5
0
20
20
40
60
80
94
A3957SLB
100
2-Phase Stepper Motor Bipolar Driver IC (4W1-2 Phase Excitation/Micro-step Support)
Parameter
Power outputs (OUTA or OUTB)
(Unless specified otherwise, T a=25C, VBB=5V to 50V, VCC=4.5V to 5.5V)

Symbol
Conditions
VBB
Operating, IO=1.5A, L=3mH

V O=VBB
VO =0V
ISIO, IO=0.85A, VS =0V, VCC=5V
IF=0.85A
IF=1.5A
ICEX
V CE (sat)
ISO
VF

Control logic
UVLO hysteresis
IBB (ON)
IBB (OFF)
VCC
V REF
VUVLOen
VUVLOhys
ICC (ON)
ICC (OFF)
Logic input voltage
V IH
VIL
Logic input current
IIH
IIL
Mixed Decay comparator trip point
V PFD
Mixed Decay comparator input offset voltage
VIO (PFD)
Mixed Decay compartor hysteresis

V IO (PFD)
IREF
VREF /VS
DAC accuracy *1
DACERR
Current-sense comparator input offset voltage *1
Step reference current ratio

AC timing
PWM turn-off time
VIO (S)
SRCR
Limits
typ
max
<1.0
< 1.0
1.0
1.4
0.5
1.2
30
1.2
1.5
2.0
1.0
50
50
50
1.2
1.5
0.7
1.5
40
1.4
1.7
4.0
50
V
A
A
V
V
V
V
mA
V
V
mA
A
3.70
0.40
42
14
5.5
2.5
4.05
0.55
50
17
<1.0
< 2.0
0.8
20
200
2.9
0.8
20
V
V
V
V
mA
mA
V
V
A
A
V
V
V
mV
55
5.0
mV
A
3.0
4.0
%
%
mV
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
C
C
20.2
22.3
1.0
1.5
1.4
2.5
0.4
0.55
0.7
0.85
S
S
1.0
1.6
2.2
0.3
1.5
3.0
min
Vcc
20
D0 =D1 =D2 =D3 =0.8V

Operating
Operating
V CC=05V
4.5
0.5
3.35
0.25
D0 =D1 =D2 =D3 =0.8V
tOFFRC
tPWM (OFF)
tPWM (ON)
PWM minimum on-time
tON (min)
tCODT
5.0
2.0
VIN =2.0V
VIN =0.8V
Slow Decay Mode
Mixed Decay Mode
Fast Decay Mode
3.5
1.2
5
VREF=0V to 2.5V
at trip, D0=D1 =D2 =D3 =2V
VREF =1.0V to 2.5V
VREF =0.5V to 1.0V
VREF =0V
D1=D 2=D3 =0.8V
D0 =0.8V, D1 =2.0V, D2 =D3 =0.8V
D 0=D1 =2.0V, D2=D 3=0.8V
D0=D 1=0.8V, D2=2V, D3 =0.8V
D0 =2.0V, D1 =0.8V, D2=2.0V, D3=0.8V
D0 =0.8V, D1 =D2 =2.0V, D3 =0.8V
D 0=D1 =D2 =2.0V, D3=0.8V
D 0=D1 =D2 =0.8V, D3=2.0V
D0 =2.0V, D1 =D2 =0.8V, D3 =2.0V
D0=0.8V ,D1 =2.0V, D2 =0.8V, D3=2.0V
D0 =D1=2.0V, D2 =0.8V, D3 =2.0V
D 0=D1 =0.8V, D2=D 3=2.0V
D0 =2.0V, D1 =0.8V, D2 =D3 =2.0V
D 0=0.8V, D1=D 2=D 3=2.0V
D0 =D1 =D2 =D3 =2.0V
C T=470pF, RT=43k
IO=0.1A
IO=1.5A
IRC Charge ON to Source ON, IO=0.1A
IRC Charge ON to Source ON, IO=1.5A
VCC=5.0V, RT43k, CT=470pF,
IO=0.1A
1k Load to 25V
25
Units
3.0
16
0
17.4
26.1
34.8
43.5
52.2
60.9
69.6
73.9
78.3
82.6
87.0
91.3
95.7
100
165
15
Tj
T j
PWM turn-on time
Crossover dead time
A3957SLB
18.2
*1: The total error for the VREF/V SENSE function is the sum of the D/A error and the current-sense comparator input offset voltage.
A3957SLB
95
A3957SLB

MOTOR
SUPPLY
VBB
UVLO
AND
TSD
CBB
OUTA
OUTB
PHASE
CONTROL
LOGIC
AND
LEVEL
SHIFT
VCC
BLANKING
TIME AND
DRIVER
TOFF
CONTROL
DECAY MODE
CONTROL
PFD
(000X)
GND
RC
RT
SENSE
RS
REF
16
LEVEL
DAC
D0
D3
D2
D1
CT
Truth Table
Power Outputs
D3, D2, D1, D0
0000 or 0001
PHASE OUTA
X
Z
1XXX
or
X1XX
or
XX1X
OUTB
Z
PFD
X
3.5V
1.2V to 2.9V
0.8V
3.5V
1.2V to 2.9V
0.8V
Power Output Operating Mode

Disable
Forward, mixed current-decay mode
Reverse, mixed current-decay mode
X: Dont care
High impedance (source and sink both OFF)
DAC
D3
1
1
1
1
1
1
1
1
D2
1
1
1
1
0
0
0
0
D1
1
1
0
0
1
1
0
0
D0
1
0
1
0
1
0
1
0
DAC [%]
100
95.7
91.3
87.0
82.6
78.3
73.9
69.6
D3
0
0
0
0
0
0
0
0
D2
1
1
1
1
0
0
0
0
D1
1
1
0
0
1
1
0
0
D0
1
0
1
0
1
0
1
0
DAC [%]
60.9
52.2
43.5
34.8
26.1
17.4
0
0
Application Circuit
VBB
Vcc
+
Phase1
10
D10
20
D11
13
D12
11
D13
REF1
PFD1
23
CBB
15
+
CCC
23
15
A3957SLB
A3957SLB
22
22
6,7,
18,19
5
6,7,
18,19
17
17
10
Phase2
20
D20
13
D21
11
D22
D23
REF2
PFD2
CT1
CT2
RT1
96
A3957SLB
Rs
Rs
RT2
Off-time setting : tOFF R T CT

RT=36 (12k to 100k)
CT=560pF (470pF to 1500pF)
RS =0.51 (0.39 to 0.62)
CBB=100 F+0.1 F
CCC=0.1 F
VREF =0.5V to 2.5V
VPFD =1.2V to 2.9V (Mixed current-decay mode)
3.5V (Slow current-decay mode)
0.8V (Fast current-decay mode)
A3957SLB
External Dimensions
24
0.40/1.27
1
0.33/0.51
15.2/15.6
1.27
BSC
0/ 8
0.23/0.32
SEATING
PLANE
2.35/2.65
0.33/0.51
19
7.40/7.60
7.40/7.60
24
10.0/10.65
*1
(Unit: mm)
0.10MIN
Pin material: copper, pin surface treatment: solder plating
Web (batwing) type lead frames are used for pin
6, 7, 18, 19. The pins are connected to GND.
A3957SLB
97
SI-7600/SI-7600D
Star Connection/Delta Connection

Parameter
Load supply voltage
Input voltage
Reference input voltage
Sense voltage
Storage temperature
Symbol
V BB
VCC
VIN
V REF
Vsense
PD
Tj
Top
Tstg
Ratings
50
7
0.3 to VCC
0.3 to VCC
1.5
1
20 to +85
+125
55 to +125
Units
V
V
V
V
V
W
C
C
C
Ratings
15 to 45
3 to 5.5
0.2 to Vcc2
Units
V
V
V
Recommended Operating Voltage Ranges

Parameter
Load supply voltage
(Ta=25C)
Symbol
V BB
VCC
V REF
Parameter
Load supply voltage
Output voltage
Load supply current

Logic input voltage
Logic input current
Maximum clock frequency
PFD input voltage

PFD input current
Sense voltage
RC source current
Off time
98
SI-7600/SI-7600D
Symbol
VBB
V CC
VOL1
VOL2
VOH1
VOH2
IBB
ICC
VIH
Ratings
min
15
3.0
8
0
VBB15
VBB1
typ
3.75
VIL
IIH
IIL
F
V Slow
VMix
V Fast
IPFD
VREF
IREF
V S1
V S2
IRC
Toff
max
45
5.5
15
1
VBB8
VBB
25
10
1.25
20
20
200
100
1.7
0.7
Units
V
V
V
V
V
V
mA
mA
V
V
A
A
kHz
VCC
1.3
0.3
50
V CC2
0
10
V REF0.2
VREF0.17
220
1.1Rt Ct
V
V
V
A
V
A
V
V
A
Sec.
Conditions
VCC=5.5V
VCC=5.5V
VIN=V CC0.75
VIN=V CC0.25
Edge=0V
Edge=VCC
VREF=0~Vcc2V
Mode=VCC, VREF =0~VCC2V
Mode=0V, AVREF =0~VCC2V
3-Phase Stepper Motor Driver ICs (Star Connection/Delta Connection)
SI-7600/SI-7600D
Internal Block Diagram/Diagram of Standard External Circuit

+
C1
Vcc
C3
C2 +
C4
VBB
Clock
OHA
CW/CCW
OHB
Control signal
C7
Reset
OHC
Control
Logic
PriBuffer
OLA
Ena
OLB
Edge
OLC
F/H
R5
Mode
Vcc
R1
C5
REF
Current
Control
1/5
Buffer
Sense
MOS Array
R2
Rs
PFD
Vcc
RC
GND
R3
C6 R4 Ct Rt
Reference constants
Rs:0.1 to 1
(1 to 5W)
Rt:15k to 75k
Ct:420p to 1100pF
C1:10 F/10V
C2:100 F/63V
C3 to C6:0.01 to 1 F
C7:1000pF
ex. SLA5017 at 4A max

SLA5059 at 4A max
SLA5060 at 6A max
Io
SLA5061 at 10A max
(Sanken)
R1+R210k
(VREF:0.2 to VCC2-2V)
R3+R410k
(VPFD:0 to VCC2)
R5:10k
Terminal Connection
The package shapes of SI-7600 and SI-7600D are different, however the terminal connection is the same.
PFD
RC
VBB
Vcc
OHA
Reset
CW/CCW
EDGE
OLA
CK
OLB
F/H
OLC
Ena
GND
Mode
REF
Pin No.
Name
Pin No.
Name
Pin No.
Name
Pin1
PFD
Pin8
Full/Half
Pin15
OLA
OHB
Pin2
Sense
Pin9
Enable
Pin16
OHC
OHA
Pin3
Vcc
Pin10
Mode
Pin17
OHB
Pin4
Reset
Pin11
REF
Pin18
OHA
Pin5
CW/CCW
Pin12
GND
Pin19
V BB
Pin6
Edge
Pin13
OLC
Pin20
RC
Pin7
Clock
Pin14
OLB
External Dimensions (Unless specified otherwise, all values are typical)

SI-7600
(Units: mm)
SI-7600D
12.6
24.50
10
0.8 max
1.27
0.4
10
1.30
1.27 max
7.62
7.8
0.51 min
2.2
max
0.89
0.7
2.54
2.54 min 5.08 max
11
5.5
20
11
6.30
20
0.25
0.48
0 to 15
SI-7600/SI-7600D
99
SI-7600/SI-7600D
Application Notes
1. Outline
counter is reset. Output remains disabled as long as the
The SI-7600/SI-7600D is a control IC used with a power MOS
Reset terminal level is high.
FET array to drive a 3-phase stepper motor. Select the outputstage MOS FET according to the rated current of the motor.
4. Determining the control current
The full step is 2-phase excitation when this IC is in a star con-
The control current Io can be calculated as follows:
nection but 3-phase excitation when it is in a delta connection.
When the Mode terminal level is low
2. Features
When the Mode terminal level is high
IOVREF/(5RS)
Suitable for both star connection drive and delta connection drive
IOVREF/(5RS) 3-phase excitation

IOVREF/(5.88RS) 2-phase excitation
Maximum load supply voltage VBB =45V

Control logic supply voltage Vcc=3 to 5.5V
The reference voltage can be set within the range of 0.2V to Vcc 2V.
Supports star connection (2/2-3phase excitation) and delta
(When the voltage is less than 0.2V, the accuracy of the refer-
connection (3/2-3phase excitation)
ence voltage divider ratio deteriorates.)
Step switching timing by clock signal input

Forward/reverse, hold, and motor-free control
Step switching at the positive edge or positive/negative edge
5. About the Current Control System (Setting the

Constant Ct/Rt)
The SI-7600 uses a current control system of the self-excitation
of the clock signal

Control current automatic switching function for 2-3phase ex-
type with a fixed chopping OFF time.
citation (effective for star connection)
The chopping OFF time is determined by the constant Ct/Rt.
(Current control: 86% for 2-phase excitation, 100% for 3-phase
The constant Ct/Rt is calculated by the formula

TOFF1.1CtRt (1)
excitation)
Self-excitation constant-current chopping by external C/R
The recommended range of constant Ct/Rt is as follows:
Slow Decay, Mixed Decay, or Fast Decay selectable
Ct: 420 to 1100pF
Two package lineup: SOP (surface mounting) and DIP (lead
Rt: 15 to 75k
(Slow Decay or Mixed Decay 560pF/47k, Fast Decay
insertion)
SOPSI-7600, DIP SI-7600D
470pF/20k)
Maximum output current depends on the ratings of the MOS
Usually, set T OFF to a value where the chopping frequency becomes about 30 to 40kHz.
FET array used
The mode can be set to Slow Decay, Fast Decay, or Mixed De-
3. Input Logic Truth Table

Input terminal
CW/CCW
Full/Half
Enable
Mode
Low level
High level
CW
CCW
Disable
Always 100%
Decay mode
0 to 0.3V
Fast Decay
Enable
0.7V to 1.3V
Mixed Decay
2-phase excitation: 85%
1.7V to Vcc
Slow Decay
3-phase excitation: 100%

Positive
Positive/negative
In Mixed Decay mode, the Fast/Slow time ratio can be set using
the voltage applied to the PFD terminal. The calculated values
(Note 2)
Reset
PFD applied voltage and decay mode

PFD applied voltage
2-3phase excitation 2-phase excitation
(Note 1)
Edge
cay depending on the PFD terminal input potential.
Enable
(Note 3)
Internal logic reset

output disable
are summarized below.

In this mode, the point of switching from Fast Decay to Slow
Decay is determined by the RC terminal voltage that determines
Select CW/CCW, Full/Half, or Edge when the clock level is low.
the chopping OFF time and by the PFD input voltage VPFD.
Note 1: The control current is always 85% for the full step (2-
Formula (1) is used to determine the chopping OFF time.
phase excitation) when the Mode terminal level is high.
The Fast Decay time is then determined by the RC discharge
The value of 100% control current is calculated at the
time from the RC voltage (about 1.5V) to the PFD input voltage
V REF/(5Rs) terminal because a 1/5 buffer is built into
(VPFD) when chopping is turned from ON to OFF.
the reference section.

counter increments both at the rising and falling edges.
The Fast Decay time is

V PFD
(2)
tOFFf R TCT ln (
)
1.5
Therefore, the duty ratio of the input clock should be set
The Slow Decay time (tOFFs) is calculated by subtracting the value
at 50%.
of (2) from that of (1).

tOFFSTOFFtOFFf (3)
Note 2: When the Edge terminal level is set high, the internal
Note 3: When the Reset terminal level is set high, the internal
100
SI-7600/SI-7600D
Relationship between RC terminal voltage and output current

Ton
SI-7600/SI-7600D
Power loss of Nch MOS FETs

The power loss of Nch MOS FETs is caused by the ON resis-
Toff
ITrip
tance or by the chopping-OFF regenerative current flowing

through the body diodes.
IOUT
(This loss is not related to the current control method, Slow,
1.5V
VPFD
VRC
Mixed, or Fast Decay.)

The losses are
ON resistance loss N1: N1=IM2RDS(ON)
0.5V
Fast
Decay
Slow Decay
Body diode loss N2: N2=IMVSD

With these parameters, the loss PN per MOS FET is calculated
depending on the actual excitation method as follows:
6. Method of Calculating Power Loss of Output

MOS FET
a) 2-phase excitation (T=TON+T OFF)
The SI-7600 uses a MOS-FET array for output. The power loss
b) 2-3 phase excitation (T=TON+TOFF)
of this MOS FET array can be calculated as summarized below.
PN=(N1+N2T OFF/T)(1/4)+(0.5N1+N2TOFF/T)(1/12)
Determining power loss and heatsink when SLA5017 is
This is an approximate value that does not reflect parameter

variations or other factors during use in the actual application.
PN=(N1+N2T OFF/T) (1/3)
used
Therefore, heat from the MOS FET array should actually be
If the SLA5017 is used in an output section, the power losses of
measured.
a Pch MOS FET and an Nch MOS FET should be multiplied by
Parameters for calculating power loss
three and added to determine the total loss P of SLA5017.
To calculate the power loss of the MOS FET array, the following
In other words, P=3PP+3PN
parameters are needed:
The allowable losses of SLA5017 are
(1) Control current Io (max)

(2) Excitation method
(3) Chopping ON-OFF time at current control: TON, T OFF, tOFFf
(TON: ON time, TOFF: OFF time, tOFFf: Fast Decay time at OFF)
Without heatsink: 5W j-a=25C/W

Infinite heatsink: 35W j-c=3.57C/W
Select a heatsink by considering the calculated losses, allowable losses, and following ratings:
(4) ON resistance of MOS FET: RDS (ON)

(5) Forward voltage of MOS FET body diode: VSD
(W)
15
For (4) and (5), use the maximum values of the MOS FET specifications.
Al
he
at
does not flow the body diodes.)
Wit
hou
t he
ats
ink
sin
Power dissipation P
(In Slow Decay mode, the chopping-OFF regenerative current
2m
through the body diodes in Fast Decay mode.
tance and by the chopping-OFF regenerative current flowing
10
10
The power loss of Pch MOS FETs is caused by the ON resis-
Power loss of Pch MOS FETs
10
(3) should be confirmed on the actual application.
The losses are

ON resistance loss P1: P1=I M2RDS (ON)
Body diode loss P2: P2=I MV SD
0
0
25
50
75
100 125
150
With these parameters, the loss Pp per MOS FET is calculated

depending on the actual excitation method as follows:
a) 2-phase excitation (T=T ON +TOFF)
PP= (P1TON/T+P2tOFFf/T) (1/3)
b) 2-3 phase excitation (T=TON +TOFF)
PP= (P1T ON/T+P2tOFFf/T)(1/4)+(0.5P1T ON/T+P2tOFFf/
T)(1/12)
When selecting a heatsink for SLA5017, be sure to check the

product temperature when in use in an actual applicaiton.
The calculated loss is an approximate value and therefore contains a degree of error.
Select a heatsink so that the surface Al fin temperature of
SLA5017 will not exceed 100C under the worst conditions.
SI-7600/SI-7600D
101
SI-7600/SI-7600D
7. I/O Timing Chart

2-phase excitation
Positive edge
Positive edge
Positive/negative edge
CCW
CW
CK
Reset
Full/Half
EDGE
CW/CCW
Ena
OHA
OHB
OHC
OLA
OLB
OLC

Positive edge
Positive/negative edge
CW
CK
Reset
Full/Half
ED
CW/CCW
Ena
OHA
OHB
OHC
OLA
OLB
OLC
102
SI-7600/SI-7600D
Disable
CCW
SI-7600/SI-7600D
103
SI-7502 (SLA5011/SLA6503)
Pentagon Connection

Part No.
SI-7502
SLA5011
SLA6503
(Ta=25C)
Parameter
Auxiliary supply voltage
Control voltage
Reference voltage
Detection voltage
Power dissipation
Drain -Source voltage
Drain current
Avalanche energy capability (Single pulse)
Symbol
V CC
VS
Vb
Vref
V RS
PD
TOP
VDSS
ID
EAS
Power dissipation
Channel temperature
Storage temperature
Collector-Base voltage
Collector-Emitter voltage
Emitter-Base voltage
Collector current
Collector current (Pulse)
Base current
Power dissipation
Storage temperature
Ratings
44
15
7
1.5
5
1
0 to +65
60
5
2
35
150
40 to +150
60
60
6
3
6
1
35
150
40 to +150
PT
Tch
Tstg
V CBO
V CEO
VEBO
IC
IC (pulse)
IB
PT
Tj
Tstg
Units
V
V
V
V
V
W
C
V
A
mJ
W
C
C
V
V
V
A
A
A
W
C
C
Part No.
Parameter
Oscillation frequency
Detection voltage
Gate threshold voltage
Forward Transconductance
DC ON-resistance
Input capacitance
Output capacitance
Di forward voltage between source and drain
Di reverse recovery time between source and drain
Collector cut-off current
Collector-emitter voltage
DC current gain
Collector emitter saturation voltage
hFE
VCE (sat)
Input current
Upper drive circuit drive current
Lower drive circuit voltage
SLA5011
SLA6503
104
Symbol
ICC
IS
Ib
IIU-L , IIL-L
IOU -on
IOU-off
VOL-on
VOL-off
F
V RS
VTH
Re (yts)
RDS (ON)
CISS
COSS
V SD
trr
ICBO
VCEO
Supply current
SI-7502
(Ta=25C)
SI-7502 (SLA5011/SLA6503)
min
Limits
typ
max
40
12.5
50
1.6
11
10
VS 1.5
20
0.8
2.0
2.2
1.5
30
1.05
4.0
3.3
0.17
300
160
1.1
150
0.22
1.5
10
60
2000
1.5
Units
mA
mA
mA
mA
mA
A
V
V
kHz
V
V
S
pF
pF
V
ns
A
V
V
Conditions
VCC=42V, Vb=5.5V
VS =12.5V
Vb =5.5V
VIU=V IL=0.4V
Vb =5V, AIU to EIU pin open
Vb =5V
Vb =5V, AIL to EIL pin open
Vb =5V
Vb =5V
Vb =5V, VREF pin open
VDS =10V, ID=250 A
VDS =10V, ID=5A
VGS=10V, ID=5A
VDS =25V, f=1.0MHz,V GS=0V
ISD=5A
ISD=100mA
VCB =60V
IC=10mA
VCE =4V, IC=3A
IC=3A, IB =6mA
5-Phase Stepper Motor Driver ICs (Pentagon Connection)
SI-7502 (SLA5011/SLA6503)
Internal Block Diagram (Dotted Line)

Auxiliary power
supply
Control power supply
Vb
SLA6503
SI-7502
Trigger pulse
generator circuit
Reference
voltage
Variable current
resistor RX
Main power supply

VCC
VS
Motor
Level shift
current control
unit
Excitation signal
Comparator
amplifier
SLA5011
Current sense
resistor Rs
Equivalent Circuit Diagram

SI-7502
24
20
23
19
16
12
15
11
8
27
R17
R18
R19
R20
R21
1
R7
R1
R8
Trigger pulse
generator circuit
R4
R9
Tr3
Tr2
R3
R10
R11
Tr4
Tr5
Tr6
R6
R12
R13
R22
R23
R14
R24
R15
R25
R16
R26
2
R2
26
R27
R5
R28
R29
R30
R31
Tr1
5
3
25
SLA6503
21
22
18
17
13
14
10
1
R1
12
R2
10
11
R12k Typ
SLA5011
R250 Typ
11
10
12
SI-7502 (SLA5011/SLA6503)
105
SI-7502 (SLA5011/SLA6503)
VS (12V)
VB (5V)
VCC (15~42V)
C 1 + C2 +
Ail
Bil
Cil
Dil
Eil
7407
26
27
25
22
17
14
6
SI-7502
7406
21
18
13
10
9
2 3 5
Active High
24
23
2
4
16
15
7
6
8
10
20
19
12
11
8
6
8
10
3
5
B0
7
9
11
C0
Stepper Motor
3
5
7
9
11
D0
E0
1 12
IO
RX
IO (typ) = 0.92/RS
IOPD (typ) = (1.3a0.01) / Rs
a = VbR' / (30000+R')
R' = 5100Rx / (5100+Rx)
R1
C4
PD
External Dimensions
(Unit: mm)
SI-7502
RS
: 100 F/63V
: 50 F/25V
: 10 F/10V
: 470pF
: 1k
: RK-34 (Sanken)
A0
1 12
SLA6503
Excitation signal input
Aiu
Biu
Ciu
Diu
Eiu
SLA5011
C3 +
C1
C2
C3
C4
R1
Di
Di
External Dimensions
8(max)
3.2
0.15
31.00.2
24.40.2
16.40.2
3.20.15 3.8
4.8
0.2
1.70.1
R
3.5 +1
0.5
Lot No.
27pin
0.5 +0.15
0.05
0.3 +0.15
0.05
P1.270.7 26=33.02
1pin
26pin
27pin
2.540.6
Part No.
Lot No.
Pin 1
1.20.15
12
0.85+0.2
0.1
1.450.15
0.7
11P2.54 =27.941.0
31.5max.
R : 0.3mm
(Note) Dimensions marked with a # indicate dimensions of

lead tip.
SI-7502 (SLA5011/SLA6503)
0.8 max
9.90.2
8.5max.
30 (max)
Part No.
9.5min (10.4) 16.00.2

2.7
13.00.2
41 (max)
Pin-1 marking
(White dots)
106
(Unit: mm)
SLA6503/SLA5011
1 2 3 4 5 6 7 8 9 10 11 12
0.55+0.2
0.1
2.20.7
SI-7502 (SLA5011/SLA6503)
Application Notes
Determining the Output Current IO

(Control Current)
Fig. A
The main factors that determine the output current are current
IOH
sense resistor RS, supply voltage Vb, and variable current resisO
tor RX.
Waveform of output current
(1) Normal mode

To operate a motor at the maximum current level, set RX to
Fig. B Output current vs. Current sense resistor
infinity (open).
(A)
From Fig. A, when the maximum current ripple is designated

as IOH, its value will be,
VRSH
...................................................................... (1)
RS
VRSH can be calculated as follows:

VRSH=0.19Vb0.03 (center value) ............................... (2)
From equations (1) and (2), the output current IOH can be
Output current IOH
IOH=
calculated as follows:
IOH=
1
RS
IOH(max)=
0.212Vb0.01
Rs
IOH(min)=
0.169Vb0.03
Rs
IOH(max) (Vb=5V)
0.5
IOH(min)
(Vb=5V)
0.2
(0.19Vb-0.03)
1
The relationship between IOH and RS is shown in Fig. B.
()
Sense resistor Rs
(2) Power down mode

When an external resistor RX is connected, VRSH changes as
Fig. C Sense voltage vs. Variable current resistor
shown in Fig. C even when RS is retained. Obtain a power
(V)
Relation between Output Current I O (Control

Current) and Motor Winding Current IOM
The SI-7502 uses the total current control system; therefore,
the output current IO is different from the motor winding current.
In a general pentagonal driving system, the current flows as
Sense voltage VRSH
down output current IOHPD from Fig. C and equation (1).
1.0
VRSH (max)=
7.2RX
Vb0.01
152.6+33.8RX
0.8
VRSH (min)=
6.1RX
Vb0.03
152.6+33.8RX
V)
=5
Vb
0.6
SH
)(
ax
(m
VR
RS
(m
in
b
(V
V)
=5
0.4
shown in Figure D. The relation between IO and IOM is as follows:

IO=4IOM
0.2
With some driving systems, the relation can also be as follows:

IO=2IOM
0.5
10
20 (K)
Variable current resistor Rx
Fig. D Coil current flow at pentagonal driving
IOM
IOM
IOM
IOM
2IOM
2IOM
VCC
to SI-7502
Sense resistor Rs
4IOM
SI-7502 (SLA5011/SLA6503)
107
Motor Connection
The 5-phase stepper motor supports various driving systems
and the motor connection varies depending on the driving system used.
Use of the motor with some driving systems may be restricted
by patents. Therefore, be sure to ask the motor manufacturer
about the motor connection and driving system to be used.
Thermal design
The driver (SLA5011/SLA6503) dissipation varies depending on
a driving system used even if the output currents (control current) are the same. Therefore, measure the temperature rise of
the driver under the actual operating conditions to determine
the size of the heatsink.
Figure E shows an SLA5011/SLA6503 derating curve. This derating curve indicates Tj =150C; however, when using this device, allow sufficient margin when selecting a heatsink so that
T C100C (AI FIN temperature on the back of the SLA) is obtained.
Fig. E SLA5011/SLA6503 Derating curve
(W)
15
50
0
40
2m
N0
m
AI
FIN
50
FI
AI
Power dissipation PT
mm
2
00
1
0
10
10
FI
100
150 (C)
Ambient temperature Ta
SI-7502
Refer to the product specifications.
Solvents- Do not use the following solvents:
Substances that can dissolve
the package
Substances that can weaken
the package
108
SI-7502 (SLA5011/SLA6503)
Chlorine-based solvents: Trichloroethylene, Trichloroethane, etc.

Aromatic hydrogen compounds: Benzene, Toluene, Xylene, etc.
Keton and Acetone group solvents
Gasoline, Benzine, Kerosene, etc.
SI-7502 (SLA5011/SLA6503)
SI-7502 (SLA5011/SLA6503)
109
Stepper Motor Driver ICs
List of Discontinued Products

Discontinued Products
Part No.
SI-7200E
SI-7201A
SI-7202A
SI-7230E
SI-7235E
SDK01M
SMA7022M
SLA7022M
SLA7027M
110
List of Discontinued Products
Not for new design

Substitute
SDK03M
SMA7022MU
SLA7022MU
SLA7027MU
Part No.
SI-7115B
SI-7300A
SI-7330A
SI-7200M
SI-7230M
SI-7500A
Substitute
SLA7032M
SLA7032M
SLA7033M
A2918SW
111
112
K DIC218
Bulletin No
I02 EB0
(Jul,2000)
SANKEN ELECTRIC COMPANY LTD.

1-11-1 Nishi -Ikebukuro,Toshima-ku, Tokyo
PHONE: 03-3986-6164
FAX: 03-3986-8637
TELEX: 0272-2323(SANKEN J)
Overseas Sales Offices

Asia
SANKEN ELECTRIC SINGAPORE PTE LTD.
150 Beach Road #14-03,
The Gateway, West Singapore 0718, Singapore
PHONE: 291-4755
FAX: 297-1744
Motor Driver ICs
SANKEN ELECTRIC HONG KONG COMPANY LTD.

1018 Ocean Centre, Canton Road,
Kowloon, Hong Kong
PHONE: 2735-5262
FAX: 2735-5494
TELEX: 45498 (SANKEN HX)
SANKEN ELECTRIC KOREA COMPANY LTD.

SK Life B/D 6F,
168 Kongduk-dong, Mapo-ku, Seoul, 121-705, Korea
PHONE: 82-2-714-3700
FAX: 82-2-3272-2145
North America
ALLEGRO MICROSYSTEMS, INC.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615, U.S.A.
PHONE: (508)853-5000
FAX: (508)853-7861
Europe
ALLEGRO MICROSYSTEMS EUROPE LTD.
Balfour House, Churchfield Road,
Walton-on-Thames, Surrey KT12 2TD, U.K.
PHONE: 01932-253355
FAX: 01932-246622
PRINTED in JAPAN H1-I02EB0-0007020ND

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K DIC218

SANKEN ELECTRIC COMPANY LTD.

Overseas Sales Offices

Motor Driver ICs

SANKEN ELECTRIC HONG KONG COMPANY LTD.

SANKEN ELECTRIC KOREA COMPANY LTD.

PRINTED in JAPAN H1-I02EB0-0007020ND

Motor Driver ICs

2-Phase Stepper Motor Unipolar Driver ICs

2-Phase Stepper Motor Bipolar Driver ICs

3-Phase Stepper Motor Driver ICs

5-Phase Stepper Motor Driver ICs

List of Discontinued Products ....................................................................................................... 110

Motor Driver ICs

Output current (A)

Serial Signal Generator IC for SLA704xM

Supply voltage (V)

2-Phase Stepper Motor Bipolar Driver ICs

Output current (A)

One motor driven by 2 ICs

SOP16Pin One motor driven by 2 ICs

SOP24Pin One motor driven by 2 ICs

3-Phase Stepper Motor Driver Control ICs

5-Phase Stepper Motor Driver Control ICs

One motor driven by 2 ICs

Motor Driver ICs

Product Index by Part Number

Output current Supply voltage

2-phase/1-2 phase excitation

2-phase/1-2 phase excitation

One motor driven by 2 ICs

Serial signal generator IC for

2-phase/2-3 phase excitation

2-phase/2-3 phase excitation

2-phase/1-2 phase excitation

2-phase/1-2 phase/W1-2 phase

Product Index by Part Number

Motor Driver ICs

Notes on SLA7000/SMA7000 Series

Constant Current Chopper Method

Employs a constant-current chopper control method.

In the constant current chopper method, a voltage higher than

Integrates power MOSFETs and monolithic chip control cir-

cuitry in a single package.

rises, the chopper transistor is switched on thereby shortening

Comparison of power dissipation.

Basic constant current chopper circuitry

Sanken product: SI-7300A

Supply voltage VCC (V)

Current sense resistor

Notes on SLA7000/SMA7000 Series

2-Phase Stepper Motor Unipolar Driver ICs

Motor supply voltage

FET drain leakage current

TTL input current

TTL input voltage

TTL input voltage

2-Phase Stepper Motor Unipolar Driver ICs (2-Phase Excitation)

Internal Block Diagram

Diagram of Standard External Circuit (Recommended Circuit Constants)

Excitation signal time chart

VCC (46V max)

1-2 phase excitation

tdA and tdB are signals before the inverter stage.