GATE Questions on Diodes

Diode - 1 includes Diode under open circuit, built in potential barrier, electric field,
width of potential barrier etc.
1.

In a uniformly doped abrupt PN junction, the doping level of the N-side is four times the
doping level of the P-side. The ratio of the depletion layer widths is
[G90]

a. 0.25
b. 0.50
c. 1.0
d. 2.0

2.
a.
b.
c.
d.

The built in potential (Diffusion Potential) in a PN junction

[G93]

Is equal to the difference in the Fermi level of the two sides, expressed in volts.
Increases with the increase in the doping levels of the two sides
Increases with the increase in temperature
Is equal to the average of the Fermi levels of the two sides

3.

In a P+N junction diode under reverse bias, the magnitude of electric field is maximum
at [G07]

a. The edge of the depletion region on the p side

b. The edge of the depletion region on the n-side
c. The P+N junction
d. The centre of the depletion region on the n-side

4.

Consider a silicon P-N junction at room temperature having the following parameters :
[G09]
Doping on the n-side = 1 x 1017 cm-3
Depletion width on the n-side = 0.1 um
Depletion width on the p-side = 1.0 um
Intrinsic carrier concentration = 1.4 x 1010 cm-3
Thermal voltage = 26 mV
Permittivity of free space = 8.85 x 10-14 F.cm-1
Dielectric constant of silicon = 12
The built in potential of the junction is

(A) 0.70 V

(B) 0.76 V

(C) 0.82 V

(D) cannot be estimated from the given data

The peak electric field in the device is

(A)
(B)
(C)
(D)

0.15 MV . cm-1, directed from p-region to n-region

0.15 MV . cm-1, directed from n-region to p-region
1.80 MV . cm-1, directed from p-region to n-region
1.80 MV . cm-1, directed from n-region to p-region

5.

In a Forward Biased PN junction diode, the sequence of events that best

describes the mechanism of current flow is

a.
b.
c.
d.

Injection and subsequent diffusion and recombination of minority carriers

Injection and subsequent drift and generation of minority carriers
Extraction and subsequent diffusion and generation of minority carriers
Extraction and subsequent drift and recombination of minority carriers

[G13]

Diode - 2 includes forward bias, reverse bias, V-I characteristics, static

and dynamic resistance, effect of temperature on Io and diode
voltage.

1.

(a) Two ideal and identical (ideality factor = 1) junction diodes are connected in series
as shown in figure.
[GATE'90]

Show that
exp (eV1/KT) + exp (-eV2/KT) = 2
where V1 and V2 are the voltage drops across the diodes D1 and D2.
(b) Assuming that the current through the reverse biased diode is saturated at Io,
calculate the Voltage drop across the forward biased diode. Assume KT = 26meV.

2.

Consider the circuit shown in figure (a). If the diode used here has the V-I characteristic
as in figure (b), then the output waveform VO is
[G93]

Two identical silicon junction diodes, D1 and D2 are connected back to back as shown
figure. The reverse saturation current , IS of each diode is 10-8 amps and the breakdown
voltage is 50 volts. Evaluate the voltage VD1 and VD2 across the diode D1 and D2 by
assuming KT/q to be 25mV.
[GATE95]

4.

The static characteristic of an adequately forward biased PN junction is a straight line, if

the plot is of
[GATE98]

a.
b.
c.
d.

3.

Log I vs. log V

Log I vs. V
I vs. log V
I vs. V

5.

For the circuit shown in figure, D1 and D2 are identical diodes with ideality factor of
unity. The thermal voltage VT = 25mV.
[GATE'01]
a. Calculate VF and VR
b. If the reverse saturation current , IS , for the diode is 1pA, then compute the current
I through the circuit.

In the figure, a silicon diode is carrying a constant current of 1 mA. When the
temperature of the diode is 200C, VD is found to be 700 mV. If the temperature rises to
400C, VD becomes approximately equal to
[GATE02]

7.

At 300oK, for a diode current of 1 mA, a certain germanium diode requires a forward
bias of 0.1435 volts, where as a certain silicon diode requires a forward bias of 0.718 volts.
Under the conditions stated above, the closest approximation of the ratio of reverse
saturation current in germanium diode to that of silicon diode is
[GATE03]

a.
b.
c.
d.

6.

1
5
4 x 103
8 x 103

8. In abrupt PN junction, the doping concentrations on the p-side and n-side are NA = 9 x 1016
/cm3 and ND = 1 x 1016 /cm3 respectively. The PN junction is reverse biased and the total
depletion width is 3 m. The depletion width on the p-side is
[GATE04]

a.
b.
c.
d.

2.7 m
0.3 m
2.25 m
0.75 m

9.

a.
b.
c.
d.

A silicon PN junction at a temperature of 20oC has a reverse saturation current of 10

pico Amp. The reverse saturation current at 40oC for the same bias is approximately
[GATE05]

30 pico Amp
40 pico Amp
50 pico Amp
60 pico Amp

10. A P+N junction has a built in potential of 0.8 volts. The depletion layer width at a reverse
bias of 1.2 volts is 2 m. For a reverse bias of 7.2 volts , the depletion layer width will be :
[GATE07]

a.
b.
c.
d.

4 m
4.9 m
8 m
12 m

11. A silicon PN junction is forward biased with a constant current at room temperature.
When the temperature is increased by 10oC, the forward bias voltage across the PN
junction
[GATE11]

a.
b.
c.
d.

Increases by 60 mV
decreases by 60 mV
Increases by 25 mV
decreases by 25 mV

12. The forward dynamic resistance of a junction diode varies __________________ as the forward
current.
[GATE'94]

This set of questions include Ideal diode model, Simplified diode model,
and piece wise linear diode model.

1.

In the circuit shown, the current ID flowing through the ideal diode equal to [GATE97]

2. For the circuit shown in figure, the voltage Vo is

a.
b.
c.
d.

[GATE00]

2 volts
1 volts
-1 volts
None of the above

3.

In the circuit below, the diode is ideal. The voltage V is given by

[GATE09]

(A) Min (Vi,1)

Vi,1)

(B) max (Vi,1)

(C) min(-Vi,1)

(D) max (-

4.

The i-v characteristics of the diode in the circuit given below are [GATE'12]

The current in the circuit is

A. 10mA
B. 9.3 mA

5.

C. 6.67 mA

D. 6.2 mA

The diodes and capacitors in the circuit shown are ideal. The voltage v(t) across the
diode D1 is
[GATE12]

a. Cos(wt) - 1
b. Sin(wt)
c. 1 cos(wt)
d. 1 sin(wt)

Previous GATE Questions on Diode Capacitances (Diffusion and Transition

Capacitance)

1.
a.
b.
c.
d.

In a junction diode [GATE'90]

The depletion capacitance increases with increase in the reverse bias
The depletion capacitance increases with decrease in the reverse bias
The diffusion capacitance increases with increase in the forward bias
The diffusion capacitance is much higher than the depletion capacitance, when its is forward
biased

2.

The small signal capacitance of an abrupt P+N junction is 1 nF/cm2 at zero bias. If the
built in voltage is 1 volt, the capacitance at a reverse bias voltage of 99 volts is equal to ..
[GATE91]

3.

The depletion capacitance, CJ, of an abrupt PN junction with constant doping on either
side varies with reverse bias, VR as
[GATE'95]
CJ VR
CJ VR-1
CJ VR -1/2
CJ VR -1/3

a.
b.
c.
d.

4.

a.
b.
c.
d.

Consider an abrupt PN junction. Let Vbi be the built in potential of this junction and VR
be the applied reverse bias. If the junction capacitance (Cj) is 1 pF for Vbi + VR = 1 volt,
then for Vbi + VR = 4 volts, Cj will be
[GATE04]
4 pF
2 pF
0.25 pF
0.5 pF

5.

A silicon PN junction diode under reverse bias has depletion region of width 10m. the
relative permittivity of silicon r is 11.7 and the permittivity of free space o = 8.85x10-12
F/m. the depletion capacitance of the diode per square meter is
[GATE05]

a.
b.
c.
d.

100 F
10 F
1 F
20 F

6.

Which of the following is NOT associated with a P-N junction ?

[GATE'08]
(A) Junction capacitance
(C) Depletion Capacitance

(B) Charge Storage Capacitance

(D) Channel Length Modulation