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85 visualizzazioni59 pagineFront End RF Trasceiver design at 2.4 GHz

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Front End RF Trasceiver design at 2.4 GHz

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Front End RF Trasceiver design at 2.4 GHz

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B.Tech Project submitted in partial fulfillment

of the requirements for the degree of

Bachelors of Technology

in

ECE

by

R SAI VISHNU TEJA

201130075

rekapallisaivishnu.teja@students.iiit.ac.in

Hyderabad 500 032, INDIA

November, 2014

All Rights Reserved

Hyderabad, India

CERTIFICATE

It is certified that the work contained in this project, titled Front-End Design

of RF Transceiver by R. Sai Vishnu Teja with Roll No. 201130075, has been

carried out under my supervision for a partial fulfillment of degree.

Signature

(Adviser: Prof. Dr. Syed Azeemuddin)

Abstract

This project report describes the complete design of all the discrete sub-components of an RF

Transceiver designed at a centre frequency of 2.4GHz. Different LNA topologies have been

investigated. Circuit simulation is done in AWR Microwave Office. Good agreements between

measurements and simulations have been achieved. A single stage narrowband low noise amplifier is

designed. The amplifier is centred at 2.4 GHz with a noise figure (NF) less than 0.7 dB over a band

width of 100 MHz with 13.6 dB gain using E-PHEMT ATF-53189 by Avago technologies.

A single stage power amplifier is simulated at 2.4GHz with a gain of is 13.79 dB with a return loss of

5.91dB over a band width of 100 MHz. Amplifier has been shown to be stable through theoretical

and simulated results. The transistor used here is the Freescale Semiconductor Transistor,

MRF6S23140H.

A double balanced GILBERT CELL in differential configuration is simulated with a conversion gain of

10dB, return losses less than -10dB, local oscillator to RF isolation and RF to local oscillator isolation

equal to -36dB.Transistors used are Freescale Semiconductor Transistors.

An Oscillator with a resonant structure uses a crystal resonator, and a negative impedance generator

using the ZETEX BFS17 transistor in a Clapp configuration is simulated with an oscillating frequency of

25MHz.

Fabrication and characterization is yet to be completed. A PCB design of our single stage amplifiers

could be fabricated in the future if desired.

Acknowledgement

Thanks to Prof. Dr. Syed Azeemuddin for giving us the opportunity to do this project work. Especially

thanks to our panel member Dr. Vijay Sankara Rao for helping us rectify our mistakes during each phase

of evaluation. I would like to thank them both for their continuous and unwavering support to us, for

their constructive criticism and propitious advice, for helping us despite our faults and through our

mistakes, and for encouraging us to learn better and work harder.

Also thanks to all the research students at the Centre of VLSI and Embedded Systems (CVEST) for their

support and encouragement.

Contents

Chapter

1. INTRODUCTION ............................................................................................................... 10

1.1 Aim of the project10

1.2 What is RF Transceiver? .........................................................................................10

1.3 Motivation ..........................................................................................10

1.4 Block Diagram...........................................................................................11

1.5 Steps to design RF Transceiver...............................................................................11

2.1 Introduction12

2.2 Specifications .....................................................................................................12

2.3 Challenges in LNA Design......................................................................12

2.4 General Design Procedures.................................................................................14

2.5 Design Flow of LNA.15

2.6 Two-port S-Parameters ......................................................................................16

2.7 Matching Network.................................................................................19

2.8 LNA Schematic....................................................................................................21

2.9 Results Analysis22

3.1 Introduction28

3.2 Specifications .....................................................................................................29

3.3 Design Flow of PA....................................................................30

3.4 Characterization of Transistor.............................................................................32

3.5 Two-port S-Parameters .......................................................................................33

3.6 Matching Network.................................................................................37

3.7 PA Schematic.......................................................................................................39

3.8 Results Analysis.41

4. OSCILLATOR46

4.1 Introduction46

4.2 Design Analysis.46

4.3 Specifications...46

4.4 Result Analysis....48

5. MIXER50

5.1 Introduction...50

5.2 Why differential gilbert cell?............................................................................50

5.3 Design Analysis.52

5.4 Specifications.53

5.5 Conversion gain calculations..54

5.6 Isolation calculations...56

5.7 Results Analysis...57

6. CONCLUSIONS.58

7. BIBLIOGRAPHY59

List of Tables

Table

2.1 Specifications of Low-Noise Amplifier.12

3.1 Specifications of Power Amplifier............................................................................................29

List of Figures

Figure

1.1 Block Diagram of RF Transceiver11

2. LOW NOISE AMPLIFIER (LNA)

2.1 Flow chart of LNA Design15

2.2 S Parameters of transistor from frequency sweep of 2GHz to 3GHz..17

2.3 Microwave amplifier block diagram showing the source matching network, transistor, and

output matching network with the gain of each stage and total transducer gain noted.20

2.4 Low Noise Amplifier Circuit with source and load matching networks, and biasing circuit21

2.5 Graph for stability with K, B1..22

2.6 Gain graph with MSG, Actual Transducer Gain..24

2.7 Noise Figure.25

2.8 Return Losses.26

2.9 Output Power27

3. POWER AMPLIFIER (PA)

3.1 Flow chart of PA Design.30

3.2 Curve Tracer Setup32

3.3 Transistors IV Curve: The other line in Figure 3 is the load line at the quiescent operating

point of 1400 mA, Vgs = 2.7 V and Vdd = 28 V..33

3.4 S Parameters of transistor from frequency sweep of 2GHz to 3GHz34

3.5 Microwave amplifier block diagram showing the source matching network, transistor, and

output matching network with the gain of each stage and total transducer gain noted38

3.6 Power Amplifier Circuit with source and load matching networks, and biasing circuit39

3.7 Transducer gain and return loss of amplifier circuit plotted on a power gain in dB vs frequency

set of axes.41

3.8 Tuned transducer gain and return loss42

3.9 Dynamic range of our amplifier42

3.10 1 dB compression point of our amplifier43

3.11 IP3: Third Order Intercept Point.44

3.12 Output Power45

4. OSCILLATOR

4.1 Oscillator schematic47

4.2 Oscillator feedback network.47

4.3 Total output Impedance plot48

4.4 Phase noise plot49

5. MIXER

5.1 Gilbert cell differential diagram.52

5.2 Conversion gain plot..54

5.3 Return loss plot..55

5.4 S-Parameters...55

5.5 Isolation plot.56

5.6 IF output spectrum..56

5.7 IF output waveform.57

10

1. INTRODUCTION

1.1 Aim of the project

To design the front-end of RF Transceiver on a PCB using AWR Microwave Office tools. (Primary aim is

to make schematic design)

RF front end is a generic term for all the circuitry between the antenna and the first intermediate

frequency (IF) stage. It consists of all the components in the transceiver that process the signal at

the original incoming frequency (RF/IF), before it is converted to a required frequency (IF/RF).

1) An impedance matching circuit to match the input impedance of the transceiver with the

antenna, so the maximum power is transferred to and from the antenna.

2) A band-pass filter (BPF) to reduce strong out-of-band signals.

3) An RF amplifier, in the receiver side often called the low-noise amplifier (LNA).

4) Power amplifier at transceiver side, usually the last stage of the transmitter end.

5) The mixer, which mixes the incoming signal with the signal from a local oscillator (LO) to

convert the signal to the intermediate frequency (IF).

1.3 Motivation

RF Transceiver has many uses in the field of communication. It forms an essential component in modernday cellphones. Other applications include vehicle monitoring, remote control, small-range wireless

network, GPS etc.

11

Phase 1: Schematic design of the individual blocks of the transceiver, namely:

1. Low Noise Amplifier

2. Power Amplifier

3. RF Mixer

4. RF Local Oscillator

Phase 2: Integrating the individual blocks with proper impedance matching circuits to obtain the

schematic for the RF Transceiver.

12

2.1 Introduction

Low-noise amplifier (LNA) is an electronic amplifier used to amplify very weak signals (for example,

captured by an antenna) and it amplifies the signal while introducing a minimum amount of noise. It is

usually located very close to the detection device to reduce losses in the feed line. This active antenna

arrangement is frequently used in microwave systems like GPS.

2.2 Specifications

Parameters

Required

Frequency of Operation

2.4GHz

Bandwidth

200MHz

Gain or S21

>12dB

Noise Figure

<1dB

1dB compression

>20dB

Power Output

>20dBm

Impedance match

50

-10dB

An LNA design presents considerable challenge because of its simultaneous requirement for high

gain, low noise figure, good input and output matching and unconditional stability.

1. Although gain, noise figure, stability, linearity and input and output match are all equally

important, they are interdependent and do not always work in each others favor.

13

2. Carefully selecting a transistor based on the specifications is the first and most important step

in an LNA design.

Any Microwave Integrated Circuit (MIC) amplifier design essentially consists of the following

steps:

1. Selection of proper transistor

2. Checking the conditional stability

3. If transistor is unstable at the desired frequency, proper techniques are applied to make it

stable.

4. Biasing is done. Bias point is selected depending on the application like low power, low

noise, linearity etc.

5. Different techniques are applied to optimize different parameters like noise figure, gain,

power dissipation. Two parameters cannot be optimized simultaneously. Matching circuits

that provide optimum performance in a microwave amplifier can be easily and quickly

designed using a Smith chart.

System Design: In AWR there are two types of devices, (1) S-parameter & (2) normal device. Sparameter device is in-built with S-parameters loaded from the data sheet. There is no need of

applying external bias to it, because it has fixed S-parameters (i.e. fixed biasing). For the LNA

design, S-parameter device is chosen in general.

Selection of the transistor: Based on the above specifications we chose ATF53189 (Avago

Technologies) which has noise figure of 0.85dB at bias point of 4V, IDS = 135mA at 2GHz and

associated gain of 17.5dB. It has somewhat similar parameter values as the specifications of the

project. Hence Transistor ATF53189 has been chosen.

14

1. Evaluate the Rolletts stability factor to identify the possibility of instabilities depending on

source and load matching.

2. Determine bias conditions and circuit.

3. If a specified gain is required at a single frequency then the gain circles can be plotted on a

smith chart and the associated source match can be read off and the corresponding load

match calculated.

4. If a specified noise figure and gain at a frequency is required then the noise circles need to be

added to the gain circles. The source match required will be the intersection of the gain &

noise circles.

5. Once the required source impedance has been chosen the corresponding output match

required for best return loss can be calculated.

Stability Design:

1. Unconditional stability of the circuit for complete range of frequencies where the device has a

substantial gain is the goal of LNA design which means that with any load present to the

output the circuit will not become unstable.

2. S-parameters provided by manufacturer of the transistor will aid in stability analysis.

3. When K-factor is greater than unity, the circuit will be unconditionally stable for any

combinations of source and load impedance.

4. A transistor can be stabilized by adding small inductance to the source.

15

Designing stability

enhancement circuit

K > 1, B1 > 0

No

Increasing series

resistance

Specs meet?

Design Verification

Layout design

Fabrication

Figure 2.1 Flow chart of LNA Design

No

Tuning

16

In order to determine the s-parameters of our Avago transistor we performed a frequency

sweep of the S Parameters. This sweep is shown in Figure 2.2. This sweep was done with our

transistor biased at ID=430mA, VGS=0.65V, and VDD=4V. These biasing conditions are all very close

to the quiescent conditions shown in the transistors data sheet. We then extracted the S Parameters

of the transistor at 2.4GHz.

S11 = 0.8497140.3o

S12 = 0.0366710.53o

S21 = 3.95144.97o

S22 = 0.3737164o

It should be noted that S11 and S22 should both have magnitudes less than one to maintain

stability. Also, since the transistor gain is the square of the magnitude of S21 this value should be

greater than one to have gain greater than unity. This is explained in greater detail in the stability

section and the conjugate matching section of this report.

17

18

Unilateral Condition:

A transistor is unilateral if S12 is zero or very near zero when compared to the other S

parameters of its scattering matrix. From the S matrix that we determined for the Avago transistor,

the S12 term is very small and can be set to 0 to simplify our amplifier calculations. With this

assumption, there will be no internal feedback. This means the input resistance will be independent

of the load resistance, and the output resistance will be independent of the source resistance. This

will make designing the source and load matching networks easier.

Stability:

A successful amplifier design requires a number of characteristics to be met including voltage gain,

power gain and linearity, but perhaps the most critical aspect of any amplifier is stability. Even if a

design produces excellent gain and linearity, if it is unstable it is essentially unusable. For this reason it

was vital for us to consider stability through every step of the design process. Stability of an amplifier

is its immunity to causing oscillations. In the case of high-frequency amplifiers, there are two types of

stability defined: conditional stability and unconditional stability. If an amplifier is conditionally stable,

it is shown to be stable with both ports properly terminated (that is, with the intended source and

load impedances). A much better result is unconditional stability, which shows that an amplifier is

stable regardless of input and output impedances. In our analysis we sought to determine

unconditional stability for this amplifier design. If the transistor is not unilateral the following

conditions must be met to determine unconditional stability:

To facilitate the determination of this key factor, we needed to first establish that our circuit was

unilateral; that is signal flows only in the forward direction or, equivalently, S12 (transmission from port

2 to port 1) equals zero. If the unilateral condition is met, calculations required for unconditional

stability determination simplify greatly, requiring only two conditions. These are:

19

Using AWR Microwave Office, we characterized our circuits scattering parameters through simulation

and were able to show that the unilateral condition was met. To determine the stability of the circuit we

needed to examine the magnitude of input and output reflection coefficients as various parameters of

the circuit were varied to find if any condition existed which would cause either of these magnitudes to

exceed unity. We used the tuner tool in Microwave Office to facilitate this determination by varying the

quiescent bias point and observing how the scattering parameters changed as a result. To clearly see the

magnitudes of the reflection coefficients, we plotted all four S-parameters on a polar chart to show

magnitude and phase. As we varied the quiescent point of the transistor we watched how S11 and S22

moved on the chart, paying close attention to whether these parameters ever moved outside of the unit

circle. Fortunately, regardless of how far we moved the bias point from our nominal value, we were

unable to force S11 or S22 greater than unity, showing that our circuit was unconditionally stable.

Conjugate matching is used to transfer the maximum amount of power from the source to the

transistor and from the transistor to the load. Maximum power transfer from the source to the load

occurs when the real part of the source matching network equals the real part of the input impedance

of the transistor and when the imaginary part of the matching network is the conjugate of the

imaginary part of the input impedance of the transistor. This can be written in mathematical form as:

S = in*S11*

After plugging in the complex conjugate of S11 we determined the reflection coefficient of the source

matching network seen from the transistor as being the following:

S =

0.8497-140.3o

It should be noted that taking the complex conjugate of a reflection coefficient results in the complex

conjugate of the corresponding impedance being taken. Thus either reflection coefficient or

impedance can be used for conjugate matching. Since we already have the reflection coefficients of

20

our transistor from its scattering matrix it is simpler to deal with reflection coefficient. The same

argument was used to determine the output matching networks required reflection coefficient:

L = out*S22*

L = 0.3737-164o

Figure 2.3, below, shows the basic block diagram that we used to design our microwave amplifier.

Knowing the S parameters of our transistor was the main key to being able to design our microwave

amplifier circuit.

Figure 2.3 Microwave amplifier block diagram showing the source matching network, transistor,

and output matching network with the gain of each stage and total transducer gain noted.

From figure 2.3 the gains of each stage can be seen. GS is the input matching network gain, G0 is the

transistor gain, and GL is the output matching network gain. These three gains combined are the total

gain of the amplifier circuit known as the transducer gain, GT. Smith charts were used to determine

the input and output matching networks required for conjugate matching. We used an open shunt

stub followed by a transmission line to take us from the port impedance of 50 to the required input

matching and output matching network impedances. These impedances exist at the same point as the

input matching and output matching reflection coefficients respectively.

21

Our path from port 1, the source, to our required source matching network impedance that exists at

the same point at the input matching network reflection coefficient is as follows: We first followed the

constant conductance circle using an open stub of length 0.285 to where it intersects with the VSWR

circle of our input matching network impedance. We then followed a transmission line of length

0.074 to our final destination denoted as S.

Our path from the output port, port 2, to our required output matching impedance is as

follows: Once again we started at 50, which is our load impedance. We then followed an open

shunt stub of length 0.285 along a constant conductance circle until we hit the intersection point of

this circle and the VSWR circle on which our required output matching load impedance exists. After

hitting this VSWR circle we then traveled on a transmission line of length 0.46 to land at our

required output matching network impedance.

After we determined what our input matching and output matching network stub

and transmission line lengths were we were ready to simulate our amplifier using AWR.

Figure 2.4 Low Noise Amplifier Circuit with source and load matching networks, and biasing circuit

22

Biasing Circuit:

The biasing circuit of figure 2.4 has been designed with two voltage sources versus having one

Vdd source because it was easier to vary the two individual voltage sources independently. After the

voltage source is an inductor. The inductor will act like an open at high frequencies. This will prevent

the high frequency signal from going down that circuit path. Note, there are no resistors in the biasing

network since they will only introduce losses in the network. The last elements are the capacitors at

either end. They will prevent the biasing voltage from going down the signal path because they will act

like opens at DC. The values chosen for the voltage supplies are 0.65V at the gate and 4V at the drain.

With this combination, the quiescent operating point is achieved with a current of Ids = 450mA.

23

The main way of determining the stability of a device is to calculate the Rolletts Stability factor

(K), which is calculated using a set of S-parameters for the device at the frequency of operation.

The stability condition is satisfied which is shown above in figure 2.5.

The Rolletts stability factor (K) is also checked for the transistors entire frequency range. From

the above figure we can determine that the stability factor is greater than one and the device is

stable for the frequency ranging from 2 to 3 GHz.

B1 is one of the parameter of stability; it is called as supplemental stability factor for a two port.

This factor should be greater than 0 for the device to be stable. This measurement is applicable to

2-port circuits only.

MU1 computes the geometric stability factor of a 2-port. The geometric stability factor computes

the distance from the centre of the Smith Chart to the nearest unstable point of the output load

plane. The necessary and sufficient condition for unconditional stability of the two ports is that

MU1 > 1. From the above graph it is shown that geometric stability factor is greater than one and

the condition is satisfied for the full transistor frequency, ranging from 2 to 3 GHz. MU2

computes the geometric stability factor of a 2-port. The geometric stability factor computes the

distance from the centre of the Smith Chart to the nearest unstable point of the input source

plane. The necessary and sufficient condition for unconditional stability of the two ports is MU2 >

1 which is satisfied in the design.

24

The maximum stable gain is the maximum gain that can be achieved by a potentially unstable

device. Maximum stable gain is defined as the ratio of magnitude of S21 to the S12. This

measurement is applicable to 2-port circuits only. The gain is 13.3dB at the required frequency

2.4GHz.

The graph plotted in the figure 2.6 shows the Maximum Stable Gain varying from 16dB to 15dB

for the frequency 2.3GHz to 2.5GHz.

Noise Figure is the noise factor expressed in dB. The noise factor figure can be displayed as

cascaded from the starting point to the output of the block.

25

From the above figure 2.7, it is seen that the noise figure varies around 0.68dB which is less than

the required value. The Noise Figure of the Low Noise Amplifier has to be made as low as

possible.

NFMin computes the minimum noise factor as a ratio. This measurement computes what the

minimum noise factor would be with an optimum source termination. NFMin showed in the

above graph shows that it is varying around 0.67dB at the frequency 2.4GHz. The below graph 2.8

shows that the input return loss is varying around -16.35dB for the frequency 2.4GHz.

The return loss has to be in negative values. S11 is the ratio of the reflected voltage to the

incident voltage at an input port when looking from the start test point towards the end test

point.

26

This measurement displays the overall cascaded S11 versus frequency. Return loss or Reflection

loss is the reflection of signal power resulting from the insertion of a device in a transmission line.

Input return loss is a scalar measure of how close the actual input impedance of the network is to

the nominal system impedance value.

27

Required power output is >20dBm and in figure 2.9 shows the output power for 3 different input

power throughout the band from 2GHz-3GHz and required output power >20dBm is achieved at

input of 10dBm.

28

3.1 Introduction

Microwave power amplifiers are used to boost a small high frequency signal to a large high

frequency signal for transmission through a microwave antenna to another microwave antenna. As

the required distance between the microwave antennas increases, more power is required at the

base station to transmit. In this report, we describe how to design a microwave power amplifier at

2.4GHz starting from a MOSFET transistor chip to the actual schematic.

The design flow for the power amplifier begins with the transistor selection, characterization,

matching networks, stability, and dynamic range. Next, the power amplifier is tested with the above

parameters, and then tuned for maximum performance.

The transistor used here is the Freescale Semiconductor Transistor, MRF6S23140H. This part is

designed for CDMA base station applications with frequencies from 2.3 to 2.4GHz. This transistor is

characterized as follows at the quiescent operating point with targeted frequency of 2.4GHz. The load

line and S-parameter matrix were determined through simulations. This resulted in unilateral operation

of the transistor which implies a simpler matching network because there is no internal transistor

feedback. Source and load matching networks are designed at 50 ohms with the corresponding S

matrix. Stability was simulated and proven to be stable for the specified biasing range of the part. In

addition, IP3 and 1 dB compression was graphed for the part. The completed microwave amplifier

designs were simulated and the results are as follows. The simulated gain before tuning is 14.3dB. The

tuned amplifier gain, i.e. adjusting the matching network in real-time, is 17.0 dB. The results prove that

the matching networks were successfully matched, and that layout design will efficiently work at the

2.4 GHz specification.

Results from the power amplifier designs include gain and return loss. These results are

compared with each other and with the actual performance of the transistor. The most efficient

power amplifier design can then be laid out for the final PCB. This PCB can then be manufactured

with the corresponding components to complete the actual microwave power amplifier.

29

3.2 Specifications

The overall target specifications of the power amplifier design are as follows:

Parameters

Required

Frequency of Operation

2.4GHz

Bandwidth

200MHz

Gain or S21

~15dB

1dB compression

>20dB

Power Output

>25dBm

Maximum RF input

24dBm

Impedance match

50

IIP3

30 dBm

-10dB

30

Identification of PA specs

Model Availability

Performance Trade-off

Simulations

Load-Line Analysis

and Target Impedances

Matching networks

Layout generation,

Fabrication and

Assembly

31

The power amplifier is a base station operating at 2.4GHz. In addition, the power amplifier must

be realizable, i.e. the parts must exist to build it.

The device type is a MOSFET by Freescale Semiconductor, MRF6S23140H. The device was

chosen as it is easier to design matching networks if device is unilateral.

This is available from AWR Microwave Office.

This is available from AWR Microwave Office.

This is available from AWR Microwave Office.

The transistors quiescent point is in the data sheet, but the S parameters are unavailable and must

be determined through simulations.

The design of biasing and matching networks are first determined theoretically and then

simulated. The biasing versus stability is later simulated.

The most efficient design is laid out for fabrication.

32

Transistor characterization is performed by a curve tracer that steps the voltage from gate to source

and sweeps the voltage from drain to source as shown in Figure 3.2. C orresponding IV curve is plotted in

Figure 3.3.

33

Figure 3.3 Transistors IV Curve: The other line in Figure 3 is the load line at the quiescent operating

point of 1400 mA, Vgs = 2.7 V and Vdd = 28 V.

In order to determine the s-parameters of our Freescale transistor we performed a frequency

sweep of the S Parameters. This sweep is shown in Figure 3.4. This sweep was done with our transistor

biased at ID=1.43A, VGS=2.7V, and VDD=28V. These biasing conditions are all very close to the quiescent

conditions shown in the transistors data sheet. We then extracted the S Parameters of the transistor at

2.4GHz.

34

35

S11 = 0.8019-171.2o

S12 = 0.01-144o

S21 = 2.158-72.53o

S22 = 0.9216177.1o

It should be noted that S11 and S22 should both have magnitudes less than one to maintain stability. Also,

since the transistor gain is the square of the magnitude of S21 this value should be greater than one to have

gain greater than unity. This is explained in greater detail in the stability section and the conjugate matching

section of this report.

36

Unilateral Condition:

A transistor is unilateral if S12 is zero or very near zero when compared to the other S

parameters of its scattering matrix. From the S matrix that we determined for the Freescale transistor,

the S12 term is very small and can be set to 0 to simplify our amplifier calculations. With this

assumption, there will be no internal feedback. This means the input resistance will be independent of

the load resistance, and the output resistance will be independent of the source resistance. This will

make designing the source and load matching networks easier.

Stability:

A successful amplifier design requires a number of characteristics to be met including voltage gain,

power gain and linearity, but perhaps the most critical aspect of any amplifier is stability. Even if a design

produces excellent gain and linearity, if it is unstable it is essentially unusable. For this reason it was vital

for us to consider stability through every step of the design process. Stability of an amplifier is its

immunity to causing oscillations. In the case of high-frequency amplifiers, there are two types of stability

defined: conditional stability and unconditional stability. If an amplifier is conditionally stable, it is shown

to be stable with both ports properly terminated (that is, with the intended source and load impedances).

A much better result is unconditional stability, which shows that an amplifier is stable regardless of input

and output impedances. In our analysis we sought to determine unconditional stability for this amplifier

design. If the transistor is not unilateral the following conditions must be met to determine unconditional

stability:

To facilitate the determination of this key factor, we needed to first establish that our circuit was

unilateral; that is, signal flows only in the forward direction or, equivalently, S12 (transmission from port 2

to port 1) equals zero. If the unilateral condition is met, calculations required for unconditional stability

determination simplify greatly, requiring only two conditions. These are:

(1) |S11| < 1

Using AWR Microwave Office, we characterized our circuits scattering parameters through simulation and

were able to show that the unilateral condition was met. To determine the stability of the circuit we

37

needed to examine the magnitude of input and output reflection coefficients as various parameters of the

circuit were varied to find if any condition existed which would cause either of these magnitudes to exceed

unity. We used the tuner tool in Microwave Office to facilitate this determination by varying the quiescent

bias point and observing how the scattering parameters changed as a result. To clearly see the magnitudes

of the reflection coefficients, we plotted all four S-parameters on a polar chart to show magnitude and

phase. As we varied the quiescent point of the transistor we watched how S11 and S22 moved on the

chart, paying close attention to whether these parameters ever moved outside of the unit circle.

Fortunately, regardless of how far we moved the bias point from our nominal value, we were unable to

force S11 or S22 greater than unity, showing that our circuit was unconditionally stable.

Conjugate matching is used to transfer the maximum amount of power from the source to the

transistor and from the transistor to the load. Maximum power transfer from the source to the load

occurs when the real part of the source matching network equals the real part of the input impedance of

the transistor and when the imaginary part of the matching network is the conjugate of the imaginary part

of the input impedance of the transistor. This can be written in mathematical form as:

S = in*S11*

After plugging in the complex conjugate of S11 we determined the reflection coefficient of the source

matching network seen from the transistor as being the following:

S =

0.8019171.2o

It should be noted that taking the complex conjugate of a reflection coefficient results in the complex

conjugate of the corresponding impedance being taken. Thus either reflection coefficient or impedance

can be used for conjugate matching. Since we already have the reflection coefficients of our transistor

from its scattering matrix it is simpler to deal with reflection coefficient. The same argument was used to

determine the output matching networks required reflection coefficient:

L = out*S22*

L = 0.9216-177.1o

38

Figure 3.5, below, shows the basic block diagram that we used to design our microwave amplifier.

Knowing the S parameters of our transistor was the main key to being able to design our microwave

amplifier

Figure 3.5 Microwave amplifier block diagram showing the source matching network, transistor, and

output matching network with the gain of each stage and total transducer gain noted.

From figure 3.5 the gains of each stage can be seen. GS is the input matching network gain, G0 is the

transistor gain, and GL is the output matching network gain. These three gains combined are the total

gain of the amplifier circuit known as the transducer gain, GT. Smith charts were used to determine the

input and output matching networks required for conjugate matching. We used an open shunt stub

followed by a transmission line to take us from the port impedance of 50 to the required input

matching and output matching network impedances. These impedances exist at the same point as the

input matching and output matching reflection coefficients respectively.

Our path from port 1, the source, to our required source matching network impedance that exists at the

same point at the input matching network reflection coefficient is as follows: We first followed the

constant conductance circle using an open stub of length 0.285 to where it intersects with the VSWR

circle of our input matching network impedance. We then followed a transmission line of length 0.074

to our final destination denoted as S.

39

Our path from the output port, port 2, to our required output matching impedance is as follows:

Once again we started at 50, which is our load impedance. We then followed an open shunt stub of

length 0.285 along a constant conductance circle until we hit the intersection point of this circle and

the VSWR circle on which our required output matching load impedance exists. After hitting this VSWR

circle we then traveled on a transmission line of length 0.46 to land at our required output matching

network impedance.

3.7 PA Schematic

After we determined what our input matching and output matching network stub and

transmission line lengths were we were ready to simulate our amplifier using AWR.

Figure 3.6 Power Amplifier Circuit with source and load matching networks, and biasing circuit.

Biasing Circuit:

The biasing circuit of figure 3.6 has been designed with two voltage sources versus having one Vdd

source because it was easier to vary the two individual voltage sources independently. After the voltage

source is an inductor. The inductor will act like an open at high frequencies. This will prevent the high

frequency signal from going down that circuit path. Note, there are no resistors in the biasing network

since they will only introduce losses in the network. The last elements are the capacitors at either end.

They will prevent the biasing voltage from going down the signal path because they will act like opens at

40

DC. The values chosen for the voltage supplies are 2.7V at the gate and 28V at the drain. With this

combination, the quiescent operating point is achieved with a current of Ids = 1.4A.

Amplifier Gain:

Based upon the gain equations shown in figure 5 a theoretical amplifier gain was determined as

follows:

This theoretical gain of 18dB is the best gain that we could expect under perfect matching conditions.

41

The gain and return loss results of our AWR simulation of the circuit shown in figure 6 are shown in figure

Figure 3.7 Transducer gain and return loss of amplifier circuit plotted on a power gain in dB vs frequency set of

axes. The pink line is gain, and the green line is the negative of our return loss.

From the plot of figure 3.7 it can be seen that the gain of our amplifier circuit is 13.79dB at 2.4GHz and the

negative of our return loss is -5.91dB. This gain is below our theoretical maximum, which is expected, but it

still lies between the expected ranges of the data sheet of 13 to 18dB. It should also be noted that our

return loss maximizes at our operating frequency of 2.4GHz, this means that we have maximum

transmission from source to transistor at our operating frequency. After seeing what our results were from

the Smith chart predicted matching networks we decided to tune the transmission line and stub lengths of

our matching networks using the tuner tool of AWR. After tuning these lengths for maximum gain we

arrived at the plot shown in figure 3.8.

42

Figure 3.8 Tuned transducer gain and return loss. Here the pink line is our gain and the green line is the

negative of our return loss.

It can be seen from figure 3.8 that tuning our matching network gave us an additional gain of 3.12dB.

Dynamic Range:

The dynamic range is the linear range of the graph in Figure 3.9, a dB plot of output power versus input

power. The 1 dB compression point from Figure 10 is 24.22 dBm.

43

The 1 dB compression point in Figure 3.10 is defined at the upper range of the graph where the linear

part of the graph is extended past the nonlinear part of the graph where the vertical distance between the

two graphs is 1 dB. This value is the maximum possible value where the relationship is still linear.

This upper range still needs to be interpreted in terms of its intercept point. The concept of intercept

point means that higher-order nonlinear terms are negligible. However, the weakly nonlinear assumption

does not hold for the upper end of the input power range. These results in the simulated data deviating from

the ideal slope of three assuming the third order intercept point.

44

The third order intercept point is determined as follows and is shown in Figure 3.11.

The intercept point is obtained graphically by plotting the output power (dBm) versus the

input power (dBm). The linear amplified signal has a slope of one, and the third order

nonlinear product will have a slope of 3 dBm. Both curves are extended linearly until they

intersect. This is defined as the third order intercept point. This value is 45 dBm.

In determining the upper range, as a rule of thumb, the 1 dB compression point

should be 10 dBm below the IP3 intercept. In this case, IP3 is 45 dBm, and 1dB

compression is at 24.22 dBm. Hence, using the 1 dB compression would introduce

nonlinear terms in the upper ranges, i.e. above 24.22 dBm. Therefore, the dynamic range

will be computed using the rule of thumb and is up to 24.22 dBm. This process can be

repeated for high order intercept points like IP5. Note, IP3 is an approximate curve.

45

Output Power:

Required power output is 25dBm and figure 3.12 shows the output power for 5 different

input power throughout the band from 2GHz-3GHz and required output power 25dBm is

achieved at input of 10dBm.

46

4. OSCILLATOR

4.1 Introduction

An oscillator is simply a signal generator converting its dc supply voltage into a continuously

repeating ac output signal without any input signal. Oscillators play very important roles in

communication systems. An oscillator generates the carrier or local oscillation signal used in

any communication system.

An oscillator generates the carrier or local oscillation signal used in any communication

system. It includes an amplifier and a feedback network constructed by the resonator. When

dc power is first applied to the circuit, noise will appear in the circuit and is amplified by the

amplifier and then fed to the input through the feedback network that is a resonant circuit

with filter function.

The resonant structure uses a crystal resonator, and the negative impedance generator uses

the ZETEX BFS17 bipolar transistor in a Clapp configuration. It is advisable to use linear

analysis as a starting point. Nonlinear analysis can be used once the basic circuit design is

understood and the approximate oscillator frequency has been determined. The first part

looks at the admittances of the two sections of the oscillator: the resonator, and the negative

impedance generator. The oscillation frequency is predicted. The second part verifies the

predicted oscillation frequency, as well as calculated the output properties and phase noise of

the oscillator.

4.3 Specifications

Oscillating Frequency=25MHz.

47

48

The two schematics Feedback network and Resonator are used in Crystal Oscillator. The

Feedback Network schematic has the negative impedance generator and the Resonator

schematic has the resonator structure using the crystal model. The approximate oscillation

conditions occur when the sum of the susceptance for both networks is zero and the

conductance is a negative value.

The graph Admittance shows the individual contributions of the admittance and the graph

Total Admittance shows the sum of these values, where the sum of the total admittances

has been defined as the variable ytotal in the Output Equations. This graph shows that

oscillation should occur slightly over 25 MHz A DC node voltage annotation has been added to

the Feedback Network schematic to see that the circuit is biasing up correct

49

At the node between the sub circuits, the OSCAPROBE element is attached to determine the

nonlinear oscillation characteristics. Also the OSCNOISE block is used to specify phase noise

simulations settings. With these two elements, the graphs Phase Noise, Output

Spectrum, and Output Waveform are possible. Notice that this oscillator is oscillating at 25

MHz

50

5. MIXER

5.1 Introduction

RF Mixers are 3-port active or passive devices. They are designed to yield both, a sum and a

difference frequency at a single output port when two distinct input frequencies are inserted

into the other two ports. In addition to this, a Mixer can be used as a phase detector or as a

demodulator. The two signals inserted into the two input ports are usually the Local Oscillator

signal, and the incoming (for a receiver) or outgoing (for a transmitter) signal. To produce a

new frequency (or new frequencies) requires a nonlinear device. In a mixing process if we

want to produce an output frequency that is lower than the input signal frequency, then it is

called down-conversion and if we want to produce an output signal that is at a higher

frequency than the input signal, it is referred to as up-conversion.

a) Convert RF to a lower IF or baseband for easy signal processing in receivers.

b) Convert IF frequency (or baseband signal) to a higher IF or RF frequency for efficient

transmission in transmitters.

Many forms of mixers are not balanced and as a result they allow through considerable levels

of the local oscillator and RF signals. There are normally not wanted and normally they would

have to be removed by filtering which is often inconvenient and expensive. The solution is to

balance the mixer to remove the input signals.

Gilbert Cell is a double balanced mixer, much complex, but have more performance in terms of

RF to IF and LO to IF rejection, compared to single balanced mixer. Unbalanced mixers allow

some of both input signals to pass through to the output .In a single balanced either local

oscillator or RF signal is suppressed at the output. Double balanced mixer has symmetric paths

for both the inputs so no input signals, only output signals appear at the output.

51

1) Both local oscillator and RF are balanced providing both local oscillator and RF rejection at

the IF output.

2) All poles of the mixer are inherently isolated from each other.

3) Increased linearity compared to single balanced.

4) Improved suppression of unwanted products.

1) Both LO and RF provide rejection at the IF output, all ports of the mixer are

inherently

2) Increased linearity,

3) Improved suppression of spurious products

4) Less susceptible to supply voltage noise due to differential topography.

1) Conversion Gain or Loss - lowers the noise impact of following stages.

2) Intercept Point (Linearity) - impacts receiver blocking and interferer performance.

3) Ports Isolation (LO-to-RF, LO-to-IF, RF-to-IF) - want to minimize interaction between the RF,

IF, and LO ports.

4) Noise Figure - impacts receiver sensitivity.

5) Rejection ratios.

52

As the figure shows the RF signal is applied to the transistors M2 and M3 which perform a

voltage to current conversion. MOSFETS M4 and M7 form a multiplication function, Multiply

the RF signal current from M2 and M3 with the local oscillator signal applied across M4 and

M7 which provide the switching function M2 and M3 provide +/- RF current and M4 and M7

switch between them to provide the inverted RF signal to the left hand load M5 and M7 switch

between them for the right hand load .The two load resistors form a current to voltage

transformation giving differential output IF signal.

Conversion Gain or Loss is the ratio of the desired IF output (voltage or power) to the RF input

signal value (voltage or power). Conversion gain or loss of the RF Mixer is dependent by the

53

type of the mixer (active or passive), is dependent by the load of the input RF circuit as well the

output impedance at the IF port, and also is dependent by the level of the LO.

If the input impedance and the load impedance of the mixer are both equal to the source

impedance, then the voltage conversion gain and the power conversion gain of the mixer will

be the same in dB. The typical conversion gain of an Active Mixer is approximately +10dB,

when the conversion loss of a typical Diode Mixer is approximately -6dB.

The Conversion Gain or Loss of the RF Mixer measured in dB is given by:

Conversion [dB] = Output IF power delivered to the load [dBm] RF input power [dBm]

Isolation: It is the amount of local oscillator power that leaks into either the IF or the RF ports.

There are multiple types of isolation: LO-to-RF, LO-to-IF and RF-to-IF isolation.

a) Self-Mixing of Reverse LO feed-through:

- LO component in the RF input can pass back through the mixer and be modulated by the LO

signal, and a DC and 2fo components are created at the IF output.

- This has no consequence for a heterodyne system, but can cause problems for homodyne

systems (i.e., zero IF).

Noise Figure: is a measure of the noise added by the Mixer itself, noise as it gets converted to

the IF output. For a passive Mixer which has no gain and only loss, the Noise Figure is almost

equal with the insertion loss. In a mixer noise is replicated and translated by each harmonic of

the LO that is referred to as Noise Folding.

5.4 Specifications

1. Frequency of operation RF = 2.4 GHz and fLO = 2.3 GHz

2. Conversion gain GC 10dB

3. Measuring Isolation.

4. Calculating return losses S11 and S22<= -10dB.

54

Results:

Conversion gain is a measure of efficiency of mixer in providing frequency translation

between the input RF signal and output IF signal. For a given frequency translation two equal

output signals are produced ,a lower sideband and an upper side band (only one of the side

band is used).Conversion gain of the mixer is equal to the ratio of IF signal sideband output to

the RF input level.

55

Return loss is the measured as the ratio of incident power to reflected power.

S11 and S22 are differential reflection coefficients and the measure of the return loss.

56

Isolation parameter defines how much signal leakage will occur between pairs of ports i.e RF

to LO, LO to IF and RF to IF. Isolation RF to LO is -36.4 dB means that the RF at the LO port will

be 36.4 dB lower that RF applied to RF port.

57

Since the mixture is a nonlinear device, the two tones will be visible at the output along with

their respective distortion products. These distortion products are closely related to the

frequencies of the signal of interest, when 2 tones F1 and F2 are given we obtain 2nd order

distortion products which generate additional 3rd order distortion products. The generated

F1-F2 is the required IF (intermediate frequency). The problem of spurious response is a

serious one. Spurious response arises when unwanted signals at different frequencies are up

or down converted into the band of interest. Due to non-linearitys in the active devices, the

harmonics of the spurious signal and LO mix as well. It is sometimes possible for the mixing

products of the harmonics to land at the same frequency of interest as the signal.

58

6. CONCLUSIONS

In this project, a narrowband Low Noise Amplifier (LNA) circuit is designed for frequency

operation of 2.4GHz.Circuit simulation is done in AWR Microwave Office. The ATF-53189

provides a very low noise figure along with high intercept point, making it ideal for applications

where high dynamic range is required. In addition to providing a low noise figure, the ATF53189 have been simultaneously matched for very good input and output return loss, making it

easily cascadable with other amplifiers and filters with minimal effect on system pass band gain

ripple. The wide gate width of the ATF-53189 provides the added benefit of self-biasing

requiring only a single power supply voltage. The LNA provides low noise figure (0.68 dB)

coincident with good input return loss, moderate output return loss, and moderate gain at a

bias point of Vds = 4 V and Id = 450 mA. LNA has been successfully designed with 13.6 dB gain and

noise figure less than 1dB throughout the frequency band using E-PHEMT ATF-53189 by Avago

technologies. The LNA design has shown very good overall performance apart from the gain.

We have successfully simulated a single stage power amplifier. The simulated gain of our

single stage amplifier at 2.4GHz is 13.79 dB with a return loss of 5.91dB. The tuned single

stage amplifier gain, i.e. adjusting the matching network real-time, is 16.91dB. Of which, all

designs are in agreement with the transistors specifications, i.e. nominal gain is 15.2 dB,

minimum gain is 13 dB, and maximum gain of 18 dB. Our amplifier has been shown to be

stable using theoretical and simulated results. Even after increasing the drain bias current

to a value above which the transistor could physically handle the simulated system

remained stable.

We have also successfully designed, Gilbert cell at 2.4GHz with conversion gain equal to

10dB and return losses <10dB and pretty good isolation among the 3 ports, and a crystal

Oscillator with a resonance circuit and a feedback network oscillating at frequency 25MHz.

A PCB design of our single stage amplifier could be fabricated in the future if desired.

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7. BIBLIOGRAPHY

1. Guillermo Gonzalez, Microwave Transistor Amplifiers, Analysis and Design, 2nd edition

2. David M. Pozar, Microwave Engineering, John Wiley & Sons Canada, 2nd edition

3. AWR Design Environment 10 manual

4. https://awrcorp.com/download/faq/english/docs/Getting_Started/Getting_Started.htm

5. http://www.rfdesignhq.com/2013/06/atf-50189-high-linearity-balanced.html

6. http://electronicdesign.com/what-s-difference-between/what-s-difference-between-thirdorder-intercept-and-1-db-compression-point

7. http://www.slideshare.net/pramodputta/pramodlna

8. http://ece.iisc.ernet.in/~kjvinoy/study%20phase%20report%20on%20LNA.pdf

9. http://www.microwavejournal.com/News/article.asp?HH_ID=AR_4875?HH_ID=AR_4875

10. http://www.collectionscanada.gc.ca/obj/thesescanada/vol2/OKQ/TC-OKQ-5089.pdf

11. http://www.radio-electronics.com/info/rf-technology-design/mixers/rf-mixers-mixingbasics-tutorial.php

12. http://www.everythingrf.com/browse/crystal-oscillators

13.http://www.radioelectronics.com/info/circuits/transistor_crystal_oscillator/crystal_oscillato

r.php

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