Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Buy
Product
Folder
Technical
Documents
Support &
Community
Tools &
Software
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
3 Description
2 Applications
Device Information(1)
VIN
ENABLE
CBOOT
60
CFF
PGND
30
RFBT
FB
AGND
Vertical Polarization
Horizontal Polarization
40
SS/TRK
SYNC
dBuV
80
50
CBIAS
VCC
5.1 mm x 6.6 mm
70
COUT
CBOOT
BIAS
PGOOD
RT
VOUT
SW
LM46000
HTSSOP (16)
L
CIN
PACKAGE
LM46000
Simplified Schematic
VIN
PART NUMBER
20
10
Evaluation Board Emissions
CVCC
RFBB
30
100
Frequency (MHz)
1000
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
5
5
6
7
8
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (June 2014) to Revision A
Page
LM46000
www.ti.com
SW
SW
16
15
PGND
PGND
CBOOT
VCC
3
4
14
VIN
13
BIAS
VIN
12
SYNC
EN
11
RT
PGOOD
SS/TRK
7
8
10
AGND
PAD
(17)
FB
Pin Functions
PIN
DESCRIPTION
NAME
NUMBER
SW
1,2
CBOOT
Boot-strap capacitor connection for high-side driver. Connect a high quality 470 nF
capacitor from CBOOT to SW.
VCC
Internal bias supply output for bypassing. Connect bypass capacitor from this pin to
AGND. Do not connect external load to this pin. Never short this pin to ground during
operation.
BIAS
SYNC
Clock input to synchronize switching action to an external clock. Use proper high speed
termination to prevent ringing. Connect to ground if not used. Do not float.
RT
Connect a resistor RT from this pin to AGND to program switching frequency. Leave
floating for 500 kHz default switching frequency.
PGOOD
Open drain output for power-good flag. Use a 10 k to 100 k pull-up resistor to logic rail
or other DC voltage no higher than 12 V.
FB
Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT. Do
not short this pin to ground during operation.
AGND
10
Analog ground pin. Ground reference for internal references and logic. Connect to system
ground.
SS/TRK
11
Soft-start control pin. Leave floating for internal soft-start slew rate. Connect to a
capacitor to extend soft start time. Connect to external voltage ramp for tracking.
EN
12
Enable input to the LM46000: High = ON and low = OFF. Connect to VIN, or to VIN
through resistor divider, or to an external voltage or logic source. Do not float.
VIN
13,14
Supply input pins to internal LDO and high side power FET. Connect to power supply and
bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and PGND must
be as short as possible.
PGND
15,16
Power ground pins, connected internally to the low side power FET. Connect to system
ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as
possible.
PAD
17
Switching output of the regulator. Internally connected to both power MOSFETs. Connect
to power inductor.
Low impedance connection to AGND. Connect to PGND on PCB . Major heat dissipation
path of the die. Must be used for heat sinking to ground plane on PCB.
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings (1)
Over operating free-air temperature range (unless otherwise noted)
Input Voltages
Output Voltages
(1)
PARAMETER
MIN
MAX
VIN to PGND
-0.3
65
UNIT
EN to PGND
-0.3
VIN + 0.3
-0.3
3.6
PGOOD to AGND
-0.3
15
SYNC to AGND
-0.3
5.5
BIAS to AGND
-0.3
30
AGND to PGND
-0.3
0.3
SW to PGND
-0.3
VIN + 0.3
-3.5
65
CBOOT to SW
-0.3
5.5
VCC to AGND
-0.3
3.6
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
V(ESD)
(1)
(2)
Electrostatic discharge
MIN
MAX
UNIT
-65
150
2000
500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Input Voltages
PARAMETER
MIN
MAX
VIN to PGND
3.5
60
EN
-0.3
VIN
FB
-0.3
1.1
PGOOD
-0.3
12
-0.3
0.3
3.3
28
0.1
UNIT
AGND to PGND
-0.1
Output Voltage
VOUT
1.0
28
Output Current
IOUT
0.5
Temperature
-40
125
(1)
Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For
ensured specifications, see Electrical Characteristics.
LM46000
www.ti.com
HTSSOP
(16 PINS)
(1)
RJA
RJC(top)
26.9
RJB
21.7
JT
0.8
JB
21.5
RJC(bot)
2.3
(1)
(2)
39.9
UNIT
(2)
C/W
The package thermal impedance is calculated in accordance with JESD 51-7 standard with a 4-layer board and 1 W power dissipation.
RJA is highly related to PCB layout and heat sinking. Please refer to Figure 101 for measured RJA vs PCB area from a 2-layer board
and a 4-layer board.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
ISHDN
VEN = 0 V
IQ-NONSW
IBIAS-NONSW
IQ-SW
3.8
2.3
VEN = 3.3 V
VFB = 1.5 V
VBIAS = 3.4 V external
13
VEN = 3.3 V
VFB = 1.5 V
VBIAS = 3.4 V external
85
140
VEN = 3.3 V
IOUT = 0 A
RT = open
VBIAS = VOUT = 3.3 V
RFBT = 1.0 Meg
24
VEN-VCC-L
VEN-VOUT-H
VEN-VOUT-HYS
VENABLE hysteresis
ILKG-EN
VEN = 3.3 V
0.8
VIN 3.8 V
3.3
3.14
-567
mV
2.96
1.2
2.00
2.1
0.4
2.42
-305
mV
1.75
VCC-UVLO
VBIAS-ON
3.2
-71
V
mV
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
PARAMETER
CONDITIONS
MIN
TYP
MAX
TJ = 25 C
1.009
1.016
1.023
TJ = -40 C to 85 C
0.999
1.016
1.031
TJ = -40 C to 125 C
0.999
UNIT
Feedback voltage
ILKG-FB
1.016
1.039
FB = 1.016 V
0.2
65
Shutdown threshold
160
Recovery threshold
150
nA
THERMAL SHUTDOWN
TSD
(1)
Thermal shutdown
1.05
1.35
1.56
ILS-LIMIT
0.46
0.6
0.75
1.17
2.2
2.85
RSSD
16
% of FB voltage
VPGOOD-LOW
% of FB voltage
VPGOOD-HYS
% of FB voltage
RPGOOD
VEN = 3.3 V
40
125
VEN = 0 V
60
150
MOSFETS
110%
83%
113%
90%
6%
(2)
RDS-ON-HS
IOUT = 0.5 A
VBIAS = VOUT = 3.3 V
419
RDS-ON-LS
IOUT = 0.5 A
VBIAS = VOUT = 3.3 V
231
(1)
(2)
Ensured by design.
Measured at package pins.
TYP
MAX
UNIT
32
Cycles
TOC
5.5
ms
4.1
ms
220
220
LM46000
www.ti.com
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SW (SW PIN)
tON-MIN (1)
125
165
ns
tOFF-MIN (1)
200
250
ns
500
570
kHz
445
DEFAULT
200
kHz
2200
kHz
10%
VSYNC-LOW
DSYNC-MAX
90%
DSYNC-MIN
10%
TSYNC-MIN
(1)
0.4
80
ns
Ensured by design.
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
100
100
90
90
80
80
70
70
Efficiency (%)
Efficiency (%)
Unless otherwise specified, VIN = 24 V, VOUT = 3.3 V, FS = 500 kHz, L = 27 H, COUT = 100 F, CFF = 33 pF. Please refer to
Application Performance Curves for Bill of Materials (BOM) for other VOUT and FS combinations.
60
50
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
40
30
20
10
0
0.001
0.01
VOUT = 3.3 V
40
20
10
0
0.001
FS = 500 kHz
VOUT = 5 V
90
90
80
80
70
70
60
50
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
40
30
20
10
60
50
40
10
0
0.001
VOUT = 5 V
90
80
80
70
70
60
50
VIN = 24V
Efficiency (%)
Efficiency (%)
100
90
50
VIN = 28V
30
VIN = 36V
30
20
VIN = 42V
20
10
VIN = 48V
10
VOUT = 12 V
VIN = 60V
FS = 500 kHz
0.1
40
0
0.001
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
0.01
Load Current (A)
C007
VOUT = 24 V
Figure 5. Efficiency
C005
FS = 1 MHz
60
40
0.1
Figure 4. Efficiency
100
0.01
0.01
Load Current (A)
C003
FS = 500 kHz
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
20
Figure 3. Efficiency
0
0.001
C004
FS = 200 kHz
30
0.1
VOUT = 5 V
0.1
Figure 2. Efficiency
100
Efficiency (%)
Efficiency (%)
Figure 1. Efficiency
0.01
0.01
Load Current (A)
C002
100
0
0.001
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
50
30
0.1
60
0.1
C008
FS = 500 kHz
Figure 6. Efficiency
LM46000
www.ti.com
5.15
3.38
5.10
3.36
5.05
3.32
Vout (V)
Vout (V)
3.34
3.30
3.28
3.26
3.24
3.22
3.20
0.001
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
0.01
4.95
4.90
4.85
4.80
0.001
0.1
VOUT = 3.3 V
5.00
FS = 500 kHz
VOUT = 5 V
5.15
5.15
5.10
5.10
5.05
5.05
5.00
4.95
4.85
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
0.01
VIN = 60V
0.01
0.1
C014
FS = 200 kHz
5.00
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
4.85
4.80
0.001
0.01
0.1
C013
FS = 500 kHz
VOUT = 5 V
C015
FS = 1 MHz
Figure 10. VOUT Regulation
12.5
25.0
12.4
24.8
12.3
24.6
12.2
24.4
12.1
24.2
Vout (V)
Vout (V)
VIN = 48V
4.90
0.1
12.0
11.9
11.8
24.0
23.8
23.6
11.7
11.6
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
0.01
FS = 500 kHz
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
23.4
23.2
23.0
0.001
0.1
VOUT = 12 V
VIN = 36V
VIN = 42V
4.95
4.90
11.5
0.001
VIN = 18V
VIN = 28V
Vout (V)
Vout (V)
VOUT = 5 V
VIN = 12V
VIN = 24V
C012
5.20
4.80
0.001
VIN = 8V
0.01
0.1
C017
VOUT = 24 V
C018
FS = 500 kHz
Figure 12. VOUT Regulation
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
5.2
3.4
5.0
3.3
4.8
3.1
VOUT (V)
VOUT (V)
3.2
3.0
2.9
Load = 0.2A
2.8
4.6
Load = 0.2A
4.4
Load = 0.3A
Load = 0.3A
2.7
Load = 0.4A
2.6
Load = 0.4A
4.2
Load = 0.5A
Load = 0.5A
2.5
4.0
3.5
3.7
3.9
4.1
4.3
4.5
VIN (V)
VOUT = 3.3 V
5.0
5.4
FS = 500 kHz
VOUT = 5 V
5.8
5.0
5.0
4.8
4.8
VOUT (V)
5.2
4.6
Load = 0.2A
C024
FS = 200 kHz
4.6
Load = 0.2A
4.4
Load = 0.3A
Load = 0.3A
4.2
6.0
5.2
4.4
5.6
VIN (V)
VOUT (V)
5.2
C022
Load = 0.4A
4.2
Load = 0.4A
Load = 0.5A
Load = 0.5A
4.0
4.0
5.0
5.2
5.4
5.6
5.8
6.0
VIN (V)
VOUT = 5 V
5.0
5.2
5.4
5.6
5.8
6.0
VIN (V)
C023
FS = 500 kHz
VOUT = 5 V
C025
FS = 1 MHz
Figure 16. Drop-Out Curve
12.4
24.5
12.2
24.0
VOUT (V)
VOUT (V)
12.0
11.8
11.6
Load = 0.2A
11.4
Load = 0.3A
11.2
Load = 0.4A
23.5
23.0
Load = 0.2A
Load = 0.3A
22.5
Load = 0.4A
Load = 0.5A
Load = 0.5A
11.0
12.0
12.5
13.0
13.5
VIN (V)
VOUT = 12 V
FS = 500 kHz
14.0
22.0
24.0
VOUT = 24 V
10
24.5
25.0
25.5
VIN (V)
C027
26.0
C028
FS = 500 kHz
Figure 18. Drop-Out Curve
LM46000
www.ti.com
Frequency (Hz)
Frequency (Hz)
1000000
100000
Load = 0.01 A
Load = 0.01 A
Load = 0.1 A
Load = 0.1 A
Load = 0.5 A
10000
3.4
3.6
3.8
4.0
4.2
4.4
4.6
4.8
VIN (V)
VOUT = 3.3 V
100000
Load = 0.5 A
10000
5.0
5.0
5.2
VOUT = 5 V
5.6
5.8
6.0
6.2
6.4
6.6
6.8
7.0
VIN (V)
C001
FS = 500 kHz
5.4
C001
FS = 1 MHz
Vertical Polarization
70
Horizontal Polarization
60
Vertical Polarization
70
Horizontal Polarization
60
50
50
EN 55022 Class B Limit
40
30
30
20
20
10
40
10
Evaluation Board Emissions
30
100
Frequency (MHz)
1000
VOUT = 3.3 V
FS = 500 kHz
IOUT = 0.5 A
Measured on the LM46000PWPEVM with default BOM. No input
filter used.
30
dBuV
100
90
dBuV
100
90
80
80
Quasi Peak Limit
60
Average Limit
50
1000
VOUT = 5 V
FS = 500 kHz
IOUT = 0.5 A
Measured on the LM46000PWPEVM with L = 44 H, COUT = 66
F, CFF = 33 pF. No input filter used.
70
100
Frequency (MHz)
40
30
70
60
Average Limit
50
40
30
20
10
0.15
20
10
10
30
VOUT = 3.3 V
FS = 500 kHz
IOUT = 0.5 A
Measured on the LM46000PWPEVM with default BOM. EVM input
filter: Lin = 1 H Cd = 47 F CIN4 = 68 F
0.15
10
30
VOUT = 5 V
FS = 500 kHz
IOUT = 0.5 A
Measured on the LM46000PWPEVM with L = 44 H, COUT = 66
F, CFF = 33 pF. EVM input filter Lin = 1 H Cd = 47 F CIN4 = 68
F
11
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
700
3.5
Shutdown Current (A)
800
Rdson (mohm)
600
500
400
300
200
HS
100
3
2.5
2
1.5
1
VIN = 12V
0.5
LS
VIN = 24V
0
-50
50
100
150
Temperature (C)
-50
50
100
150
Temperature (C)
C001
C001
2.5
1.4
1.2
1.5
EN-VOUT Rising TH
EN-VOUT Falling TH
EN-VCC Rising TH
EN-VCC Falling TH
0.5
1
0.8
0.6
0.4
0.2
VEN = 3.3V
0
-50
50
100
150
Temperature (C)
-50
100
150
C001
120%
1.030
115%
1.025
110%
1.020
105%
VFB (V)
50
Temperature (C)
100%
95%
1.015
1.010
1.005
90%
OVP Trip Level
OVP Recover Level
UVP Recover Level
UVP Trip Level
85%
80%
75%
-50
50
Temperature (C)
100
1.000
VIN = 12V
0.995
VIN = 24V
0.990
150
-50
50
Temperature (C)
C001
12
C001
100
150
C001
LM46000
www.ti.com
70
1.8
60
1.6
50
1.2
IQ (A)
Current (A)
1.4
1.0
0.8
0.6
40
30
20
0.4
IL Peak Limit
0.2
10
IL Valley Limit
0.0
0
-50
50
Temperature (C)
VIN = 24 V
VOUT = 3.3 V
100
150
10
FS = 500 kHz
20
30
40
50
60
VIN (V)
C001
VOUT = 3.3 V
FS = 500 kHz
C001
IOUT = 0 A
13
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
7 Detailed Description
7.1 Overview
The LM46000 SIMPLE SWITCHER regulator is an easy to use synchronous step-down DC-DC converter that
operates from 3.5 V to 60 V supply voltage. It is capable of delivering up to 0.5 A DC load current with
exceptional efficiency and thermal performance in a very small solution size. An extended family is available in
1.0 A and 2.0 A load options in pin-to-pin compatible packages.
The LM46000 employs fixed frequency peak current mode control with Discontinuous Conduction Mode (DCM)
and Pulse Frequency Modulation (PFM) mode at light load to achieve high efficiency across the load range. The
device is internally compensated, which reduces design time, and requires fewer external components. The
switching frequency is programmable from 200 kHz to 2.2 MHz by an external resistor, RT. It defaults at 500 kHz
without RT. The LM46000 is also capable of synchronization to an external clock within the 200 kHz to 2.2 MHz
frequency range. The wide switching frequency range allows the device to be optimized to fit small board space
at higher frequency, or high efficient power conversion at lower frequency.
Optional features are included for more comprehensive system requirements, including power-good (PGOOD)
flag, precision enable, synchronization to external clock, extendable soft-start time, and output voltage tracking.
These features provide a flexible and easy to use platform for a wide range of applications. Protection features
include over temperature shutdown, VCC under-voltage lockout (UVLO), cycle-by-cycle current limit, and shortcircuit protection with hiccup mode.
The family requires few external components and the pin arrangement was designed for simple, optimum PCB
layout. The LM46000 device is available in the HTSSOP / PWP 16 pin leaded package (5.1 mm x 6.6 mm x 1.2
mm) with 0.65 mm lead pitch.
VCC
Enable
Internal
SS
ISSC
BIAS
VCC
LDO
VIN
Precision
Enable
SS/TRK
CBOOT
HS I Sense
EA
REF
RC
TSD
UVLO
CC
PGOOD
AGND
OV/UV
Detector
FB
SW
PFM
Detector
PGood
Slope
Comp
Freq
Foldback
Zero
Cross
HICCUP
Detector
Oscillator
LS I Sense
FB
PGood
SYNC
14
PGND
RT
LM46000
www.ti.com
VIN
tOFF
tON
0
-VD1
Inductor Current
iL
TSW
ILPK
IOUT
iL
Figure 33. SW Node and Inductor Current Waveforms in Continuous Conduction Mode (CCM)
The LM46000 synchronous Buck converter employs peak current mode control topology. A voltage feedback
loop is used to get accurate DC voltage regulation by adjusting the peak current command based on voltage
offset. The peak inductor current is sensed from the HS switch and compared to the peak current to control the
ON time of the HS switch. The voltage feedback loop is internally compensated, which allows for fewer external
components, makes it easy to design, and provides stable operation with almost any combination of output
capacitors. The regulator operates with fixed switching frequency in Continuous Conduction Mode (CCM) and
Discontinuous Conduction Mode (DCM). At very light load, the LM46000 will operate in PFM to maintain high
efficiency and the switching frequency will decrease with reduced load current.
7.3.2 Light Load Operation
DCM operation is employed in the LM46000 when the inductor current valley reaches zero. The LM46000 will be
in DCM when load current is less than half of the peak-to-peak inductor current ripple in CCM. In DCM, the LS
switch is turned off when the inductor current reaches zero. Switching loss is reduced by turning off the LS FET
at zero current and the conduction loss is lowered by not allowing negative current conduction. Power conversion
efficiency is higher in DCM than CCM under the same conditions.
In DCM, the HS switch ON time will reduce with lower load current. When either the minimum HS switch ON time
(TON-MIN) or the minimum peak inductor current (IPEAK-MIN) is reached, the switching frequency will decrease to
maintain regulation. At this point, the LM46000 operates in PFM. In PFM, switching frequency is decreased by
the control loop when load current reduces to maintain output voltage regulation. Switching loss is further
reduced in PFM operation due to less frequent switching actions. Figure 34 shows an example of switching
frequency decreases with decreased load current.
15
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
Frequency (Hz)
1000000
100000
VIN = 8 V
VIN = 12 V
VIN = 18 V
VIN = 24 V
10000
0.001
VIN = 36 V
0.01
0.1
Load (A)
C001
Figure 34. Switching Frequency Decreases with Lower Load Current in PFM Operation
VOUT = 5 V FS = 1 MHz
In PFM operation, a small positive DC offset is required at the output voltage to activate the PFM detector. The
lower the frequency in PFM, the more DC offset is needed at VOUT. Please refer to the Typical Characteristics for
typical DC offset at very light load. If the DC offset on VOUT is not acceptable for a given application, a static load
at output is recommended to reduce or eliminate the offset. Lowering values of the feedback divider RFBT and
RFBB can also serve as a static load. In conditions with low VIN and/or high frequency, the LM46000 may not
enter PFM mode if the output voltage cannot be charged up to provide the trigger to activate the PFM detector.
Once the LM46000 is operating in PFM mode at higher VIN, it will remain in PFM operation when VIN is reduced.
7.3.3 Adjustable Output Voltage
The voltage regulation loop in the LM46000 regulates output voltage by maintaining the voltage on FB pin ( VFB)
to be the same as the internal REF voltage (VREF). A resistor divider pair is needed to program the ratio from
output voltage VOUT to VFB. The resistor divider is connected from the VOUT of the LM46000 to ground with the
mid-point connecting to the FB pin.
VOUT
RFBT
FB
RFBB
16
LM46000
www.ti.com
17
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
18
LM46000
www.ti.com
Figure 38. Tracking with Longer Start-up Time Than The Internal Ramp
Enable
Internal SS Ramp
Ext Tracking Signal to SS pin
VOUT
Figure 39. Tracking with Shorter Start-up Time Than The Internal Ramp
7.3.7 Switching Frequency (RT) and Synchronization (SYNC)
The switching frequency of the LM46000 can be programmed by the impedance RT from the RT pin to ground.
The frequency is inversely proportional to the RT resistance. The RT pin can be left floating and the LM46000 will
operate at 500 kHz default switching frequency. The RT pin is not designed to be shorted to ground.
For a desired frequency, typical RT resistance can be found by Equation 3.
RT(k) = 40200 / Freq (kHz) - 0.6
(3)
RT Resistance (k)
200
150
100
50
0
0
500
1000
1500
2000
2500
C008
19
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
RT (k)
200
200
350
115
500
80.6
750
53.6
1000
39.2
1500
26.1
2000
19.6
2200
17.8
The LM46000 switching action can also be synchronized to an external clock from 200 kHz to 2.2 MHz. Connect
an external clock to the SYNC pin, with proper high speed termination, to avoid ringing. The SYNC pin should be
grounded if not used.
SYNC
EXT CLOCK
RTERM
(4)
20
(5)
LM46000
www.ti.com
(6)
At lower supply voltage, the switching frequency will decrease once TOFF-MIN is tripped. The minimum VIN without
frequency foldback can be approximated by
VIN-MIN = VOUT / (1 - FS * TOFF-MIN )
(7)
Taking considerations of power losses in the system with heavy load operation, VIN-MIN is higher than the result
calculated in Equation 7 . With frequency foldback, VIN-MIN is lowered by decreased FS. Figure 42 gives an
example of how FS decreases with decreasing supply voltage VIN at drop-out operation.
Frequency (Hz)
1000000
100000
Load = 0.01 A
Load = 0.1 A
Load = 0.5 A
10000
5.0
5.2
5.4
5.6
5.8
6.0
6.2
6.4
6.6
VIN (V)
6.8
7.0
C001
CFF
FB
RFBB
(8)
(9)
21
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
(10)
would be low enough to boost the phase up around the crossover frequency. Designs using mostly electrolytic
capacitors at the output may not need any CFF.
The CFF creates a time constant with RFBT that couples in the attenuated output voltage ripple to the FB node. If
the CFF value is too large, it can couple too much ripple to the FB and affect VOUT regulation. It could also couple
too much transient voltage deviation and falsely trip PGOOD thresholds. Therefore, CFF should be calculated
based on output capacitors used in the system. At cold temperatures, the value of CFF might change based on
the tolerance of the chosen component. This may reduce its impedance and ease noise coupling on the FB
node. To avoid this, more capacitance can be added to the output or the value of CFF can be reduced. Please
refer to the Detailed Design Procedure for the calculation of CFF.
7.3.10 Bootstrap Voltage (BOOT)
The driver of the HS switch requires a bias voltage higher than VIN when the HS switch is ON. The capacitor
connected between CBOOT and SW pins works as a charge pump to boost voltage on the CBOOT pin to (VSW +
VCC). The boot diode is integrated on the LM46000 die to minimize the Bill-Of-Material (BOM). A synchronous
switch is also integrated in parallel with the boot diode to reduce voltage drop on CBOOT. A high quality ceramic
0.47 F 6.3 V or higher capacitor is recommended for CBOOT.
7.3.11 Power Good (PGOOD)
The LM46000 has a built in power-good flag shown on PGOOD pin to indicate whether the output voltage is
within its regulation level. The PGOOD signal can be used for start-up sequencing of multiple rails or fault
protection. The PGOOD pin is an open-drain output that requires a pull-up resistor to an appropriate DC voltage.
Voltage seen by the PGOOD pin should never exceed 12 V. A resistor divider pair can be used to divide the
voltage down from a higher potential. A typical range of pull-up resistor value is 10 k to 100 k.
When the FB voltage is within the power-good band, +4% above and -4% below the internal reference VREF
typically, the PGOOD switch will be turned off and the PGOOD voltage will be pulled up to the voltage level
defined by the pull up resistor or divider. When the FB voltage is outside of the tolerance band, +10 % above or 10 % below VREF typically, the PGOOD switch will be turned on and the PGOOD pin voltage will be pulled low to
indicate power bad. Both rising and falling edges of the power-good flag have a built-in 220 s (typical) deglitch
delay.
7.3.12 Over-Current and Short Circuit Protection
The LM46000 is protected from over-current conditions by cycle-by-cycle current limiting on both peak and valley
of the inductor current. Hiccup mode will be activated to prevent over heating if a fault condition persists.
High-side MOSFET over-current protection is implemented by the nature of the Peak Current Mode control. The
HS switch current is sensed when the HS is turned on after a set blanking time. The HS switch current is
compared to the output of the Error Amplifier (EA) minus slope compensation every switching cycle. Please refer
to Functional Block Diagram for more details. The peak current of the HS switch is limited by the maximum EA
output voltage minus the slope compensation at every switching cycle. The slope compensation magnitude at the
peak current is proportional to the duty cycle.
22
LM46000
www.ti.com
23
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
24
LM46000
www.ti.com
VIN
VIN
CIN
VOUT
SW
LM46000
ENABLE
CBOOT
COUT
CIN
LM46000
CBOOT
COUT
CBOOT
CBIAS
RT
VOUT
SW
ENABLE
CFF
SS/TRK
AGND
VIN
CBOOT
BIAS
PGOOD
SYNC
VIN
PGOOD
RFBT
BIAS
RT
FB
VCC
CVCC
AGND
PGND
RFBT
FB
VCC
SYNC
RFBB
CVCC
CFF
SS/TRK
RFBB
PGND
The LM46000 also integrates a full list of optional features to aid system design requirements, such as precision
enable, VCC UVLO, programmable soft-start, output voltage tracking, programmable switching frequency, clock
synchronization and power-good indication. Each application can select the features for a more comprehensive
design. A schematic with all features utilized is shown in Figure 46.
L
VIN
RENT
VIN
CIN
LM46000
ENABLE
RENB
VOUT
SW
CBOOT
COUT
RFBT
CBOOT
FB
VCC
SS/TRK
CSS
CFF
RFBB
CVCC
RT
BIAS
RT
CBIAS
SYNC
RSYNC
AGND
PGOOD
PGND
25
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
L (H)
(1)
COUT (F)
(2)
CFF (pF)
(3) (4)
RT (k)
RFBB (k)
(3) (4)
VOUT = 1 V
200
22
500
none
200
100
500
10
330
none
80.6 or open
100
1000
4.8
180
none
39.2
100
2200
2.2
100
none
17.8
100
200
68
220
44
200
442
500
27
100
33
80.6 or open
442
1000
15
47
18
39.2
442
2200
6.8
27
12
17.8
442
200
100
150
66
200
249
VOUT = 3.3 V
VOUT = 5 V
500
44
66
33
80.6 or open
249
1000
22
33
22
39.2
249
2200
10
22
18
17.8
249
200
150
33
200
93.1
500
56
22
47
80.6 or open
93.1
1000
27
15
33
39.2
93.1
200
270
22
see note
(5)
200
44.2
500
120
15
see note
(5)
80.6 or open
44.2
see note
(5)
39.2
44.2
VOUT = 12 V
see note
(5)
VOUT = 24 V
1000
(1)
(2)
(3)
(4)
(5)
26
56
10
Inductor values are calculated based on typical VIN = 24 V. For VOUT of 24 V, VIN = 48 V
All the COUT values are after derating. Add more when using ceramics
RFBT = 0 for VOUT = 1 V. RFBT = 1 M for all other VOUT settings.
For designs with RFBT other than 1 M, please adjust CFF such that (CFF RFBT) is unchanged and adjust RFBB such that (RFBT / RFBB)
is unchanged.
High ESR COUT will give enough phase boost and CFF not needed.
LM46000
www.ti.com
VALUE
3.3 V
400 mV
30 mV
0.5 A
Operating Frequency
500 kHz
Soft-start time
10 ms
(12)
For 500 kHz, the calculated RT is 79.8 k and standard value 80.6 k can also be used to set the switching
frequency at 500 kHz.
8.2.2.3 Input Capacitors
The LM46000 device requires high frequency input decoupling capacitor(s) and a bulk input capacitor,
depending on the application. The typical recommended value for the high frequency decoupling capacitor is
4.7 F to 10 F. A high-quality ceramic type X5R or X7R with sufficient voltage rating is recommended. The
voltage rating must be greater than the maximum input voltage. To compensate the derating of ceramic
capacitor, a voltage rating of twice the maximum input voltage is recommended. Additionally, some bulk
capacitance may be required, especially if the LM46000 circuit is not located within approximately 5 cm from
the input voltage source. The bulk input capacitor is used to provide damping to the voltage spiking due to
the lead inductance of the cable or trace. The value for this capacitor is not critical but must be rated to
handle the maximum input voltage including ripple.
For this design, a 10 F, X7R dielectric capacitor rated for 100 V is used for the input decoupling capacitor.
The equivalent series resistance (ESR) is approximately 3 m, and the current-rating is 3 A. Include a
capacitor with a value of 0.1 F for high-frequency filtering and place it as close as possible to the device
pins.
27
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
NOTE
DC Bias effect: High capacitance ceramic capacitors have a DC Bias effect, which will
have a strong influence on the final effective capacitance. Therefore the right capacitor
value has to be chosen carefully. Package size and voltage rating in combination with
dielectric material are responsible for differences between the rated capacitor value and
the effective capacitance.
8.2.2.4 Inductor Selection
The first criterion for selecting an output inductor is the inductance itself. In most buck converters, this value is
based on the desired peak-to-peak ripple current, iL, that flows in the inductor along with the DC load current.
As with switching frequency, the selection of the inductor is a tradeoff between size and cost. Higher inductance
gives lower ripple current and hence lower output voltage ripple with the same output capacitors. Lower
inductance could result in smaller, less expensive component. An inductance that gives a ripple current of 20% to
40% of the 0.5 A at the typical supply voltage is a good starting point. iL = (1/5 to 2/5) x IOUT. The peak-to-peak
inductor current ripple can be found by Equation 13 and the range of inductance can be found by Equation 14
with the typical input voltage used as VIN.
'iL
(VIN VOUT ) u D
L u FS
(13)
(VIN VOUT ) u D
(V VOUT ) u D
d L d IN
0.4 u FS u IL MAX
0.2 u FS u IL MAX
(14)
D is the duty cycle of the converter which in a buck converter it can be approximated as D = VOUT / VIN, assuming
no loss power conversion. By calculating in terms of amperes, volts, and megahertz, the inductance value will
come out in micro Henries. The inductor ripple current ratio is defined by:
'iL
r
IOUT
(15)
The second criterion is the inductor saturation current rating. The inductor should be rated to handle the
maximum load current plus the ripple current:
IL-PEAK = ILOAD-MAX + iL
(16)
The LM46000 has both valley current limit and peak current limit. During an instantaneous short, the peak
inductor current can be high due to a momentary increase in duty cycle. The inductor current rating should be
higher than the HS current limit. It is advised to select an inductor with a larger core saturation margin and
preferably a softer roll off of the inductance value over load current.
In general, it is preferable to choose lower inductance in switching power supplies, because it usually
corresponds to faster transient response, smaller DCR, and reduced size for more compact designs. But too low
of an inductance can generate too large of an inductor current ripple such that over current protection at the full
load could be falsely triggered. It also generates more conduction loss, since the RMS current is slightly higher
relative that with lower current ripple at the same DC current. Larger inductor current ripple also implies larger
output voltage ripple with the same output capacitors. With peak current mode control, it is not recommended to
have too small of an inductor current ripple. Enough inductor current ripple improves signal-to-noise ratio on the
current comparator and makes the control loop more immune to noise.
Once the inductance is determined, the type of inductor must be selected. Ferrite designs have very low core
losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and
preventing saturation. Ferrite core material saturates hard, which means that inductance collapses abruptly when
the peak design current is exceeded. The hard saturation results in an abrupt increase in inductor ripple current
and consequent output voltage ripple. Do not allow the core to saturate!
For the design example, a standard 27 H inductor from Wurth, Coiltronics, or Vishay can be used for the 3.3 V
output with plenty of current rating margin.
28
LM46000
www.ti.com
(17)
The other is caused by the inductor current ripple charging and discharging the output capacitors:
VOUT-C = iL/ ( 8 FS COUT )
(18)
The two components in the voltage ripple are not in phase, so the actual peak-to-peak ripple is smaller than the
sum of the two peaks.
Output capacitance is usually limited by transient performance specifications if the system requires tight voltage
regulation in the presence of large current steps and fast slew rates. When a fast large load transient happens,
output capacitors provide the required charge before the inductor current can slew to the appropriate level. The
initial output voltage step is equal to the load current step multiplied by the ESR. VOUT continues to droop until
the control loop response increases or decreases the inductor current to supply the load. To maintain a small
over- or under-shoot during a transient, small ESR and large capacitance are desired. But these also come with
higher cost and size. Thus, the motivation is to seek a fast control loop response to reduce the output voltage
deviation.
For a given input and output requirement, the following inequality gives an approximation for an absolute
minimum output cap required:
COUT !
r 2
1
u u (1 Dc) Dc u (1 r)
(19)
Along with this for the same requirement, the max ESR should be calculated as per the following inequality
ESR
Dc
1
u ( 0.5)
FS u COUT r
(20)
where
r = Ripple ratio of the inductor ripple current (IL / IOUT)
VOUT = Target output voltage undershoot
D = 1 Duty cycle
FS = Switching Frequency
IOUT = Load Current
A general guide line for COUT range is that COUT should be larger than the minimum required output capacitance
calculated by Equation 19, and smaller than 10 times the minimum required output capacitance or 1 mF. In
applications with VOUT less than 3.3 V, it is critical that low ESR output capacitors are selected. This will limit
potential output voltage overshoots as the input voltage falls below the device normal operating range. To
optimize the transient behavior a feed-forward capacitor could be added in parallel with the upper feedback
resistor. For this design example, two 47 F,10 V, X7R ceramic capacitors are used in parallel.
29
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
1
1
u
2Sfx
RFBT u (RFBT / /RFBB )
(22)
This equation indicates that the crossover frequency is geometrically centered on the zero and pole frequencies
caused by the CFF capacitor.
For designs with higher ESR, CFF is not neeed when COUT has very high ESR and CFF calculated from
Equation 22 should be reduced with medium ESR.Table 2 can be used as a quick starting point.
For the application in this design example, a 33 pF COG capacitor is selected.
8.2.2.7 Bootstrap Capacitors
Every LM46000 design requires a bootstrap capacitor, CBOOT. The recommended bootstrap capacitor is 0.47 F
and rated at 6.3 V or higher. The bootstrap capacitor is located between the SW pin and the CBOOT pin. The
bootstrap capacitor must be a high-quality ceramic type with X7R or X5R grade dielectric for temperature
stability.
8.2.2.8 VCC Capacitor
The VCC pin is the output of an internal LDO for LM46000. The input for this LDO comes from either VIN or
BIAS (please refer to Functional Block Diagram for LM46000). To insure stability of the part, place a minimum of
2.2 F, 10 V capacitor from this pin to ground.
8.2.2.9 BIAS Capacitors
For an output voltage of 3.3 V and greater, the BIAS pin can be connected to the output in order to increase light
load efficiency. This pin is an input for the VCC LDO. When BIAS is not connected, the input for the VCC LDO
will be internally connected into VIN. Since this is an LDO, the voltage differences between the input and output
will affect the efficiency of the LDO. If necessary, a capacitor with a value of 1 F can be added close to the
BIAS pin as an input capacitor for the LDO.
8.2.2.10 Soft-Start Capacitors
The user can leave the SS/TRK pin floating and the LM46000 will implement a soft start time of 4.1 ms typically.
In order to use an external soft start capacitor, the capacitor should be sized such that the soft start time will be
longer than 4.1 ms. Use the following equation in order to calculate the soft start capacitor value:
CSS ISSC u t SS
(23)
Where,
CSS = Soft start capacitor value (F)
ISS = Soft start charging current (A)
tSS = Desired soft start time (s)
For the desired soft start time of 10 ms and soft start charging current of 2.2 A, the equation above yield a soft
start capacitor value of 0.022 F.
30
LM46000
www.ti.com
(24)
The EN rising threshold for LM46000 is set to be 2.1 V. Choose the value of RENB to be 1 M to minimize input
current going into the converter. If the desired VIN (UVLO) level is at 5 V, then the value of RENT can be
calculated using the equation below:
RENT = (VIN-UVLO-RISING / VENH - 1) RENB
(25)
The above equation yields a value of 1.37 M. The resulting falling UVLO threshold can be calculated as
follows:
VIN-UVLO-FALLING = 1.8 (RENB + RENT) / RENB
(26)
8.2.2.12 PGOOD
A typical pull-up resistor value is 10 k to 100 k from the PGOOD pin to a voltage no higher than 12 V. If it is
desired to pull up the PGOOD pin to a voltage higher than 12 V, a resistor can be added from the PGOOD pin to
ground to divide the voltage seen by the PGOOD pin to a value no higher than 12 V.
31
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
80
RT
Efficiency (%)
70
L=27 H
LM46000
VOUT
SW
CBOOT
CBOOT
0.47 F
COUT
100 F
CBIAS
1 F
CFF
BIAS
VCC
CVCC
2.2 F
RFBT
1 M
33 pF
FB
60
50
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
40
30
20
RFBB
432
k
10
0
0.001
0.01
0.1
VOUT = 3.3 V
FS = 500 kHz
VIN = 24 V
VOUT = 3.3 V
3.40
3.5
3.38
3.4
3.36
3.3
3.34
3.2
3.32
3.1
VOUT (V)
Vout (V)
3.30
3.28
3.26
3.24
3.22
3.20
0.001
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
C002
FS = 500 kHz
3.0
2.9
Load = 0.2A
2.8
Load = 0.3A
2.7
Load = 0.4A
2.6
Load = 0.5A
2.5
0.01
0.1
3.5
VOUT = 3.3 V
3.7
3.9
4.1
4.3
4.5
VIN (V)
C012
FS = 500 kHz
VOUT = 3.3 V
C022
FS = 500 kHz
Figure 50. Drop-Out Curve
0.6
VDROP_ON_0.75_LOAD
(375 mV/DIV)
0.5
Current (A)
0.4
0.3
0.2
R,JA = 10 C/W
IL (500 mA/DIV)
0.1
R,JA = 20 C/W
R,JA = 30 C/W
50
60
70
80
90
100
Temperature (C)
VOUT = 3.3 V
FS = 500 kHz
VIN = 24 V
VOUT = 3.3 V
32
FS = 500 kHz
110
120
C001
VIN = 24 V
LM46000
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
100
90
80
RT
LM46000
Efficiency (%)
70
L=44 H
VOUT
SW
CBOOT
CBOOT
0.47 F
COUT
66 F
CBIAS
1 F
CFF
BIAS
VCC
CVCC
2.2 F
33 pF
FB
60
50
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
40
RFBT
1 M
30
RFBB
249
k
10
20
0
0.001
0.01
0.1
VOUT = 5 V
FS = 500 kHz
VIN = 24 V
VOUT = 5 V
C003
FS = 500 kHz
5.20
5.15
5.0
4.8
5.05
VOUT (V)
Vout (V)
5.10
5.00
4.95
4.6
Load = 0.2A
4.4
4.90
VIN = 12V
VIN = 24V
4.85
0.01
Load = 0.4A
Load = 0.5A
VIN = 42V
4.0
0.1
5.0
VOUT = 5 V
4.2
VIN = 28V
VIN = 36V
4.80
0.001
Load = 0.3A
VIN = 18V
5.2
5.4
5.6
5.8
6.0
VIN (V)
C013
FS = 500 kHz
VOUT = 5 V
C023
FS = 500 kHz
Figure 56. Drop-Out Curve
0.6
VDROP_ON_0.50_LOAD
(200 mV/DIV)
0.5
Current (A)
0.4
0.3
0.2
R,JA = 10 C/W
IL (500 mA/DIV)
0.1
R,JA = 20 C/W
R,JA = 30 C/W
50
60
70
80
90
100
110
120
Temperature (C)
VOUT = 5 V
FS = 500 kHz
VIN = 24 V
VOUT = 5 V
FS = 500 kHz
C001
VIN = 24 V
33
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
100
90
80
RT
RT
200
k
Efficiency (%)
70
L=100 H
VOUT
SW
LM46000
CBOOT
CBOOT
0.47 F
COUT
150 F
CBIAS
1 F
CFF
BIAS
VCC
CVCC
2.2 F
FB
VIN = 8V
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
50
40
30
RFBT
1 M
68 pF
60
20
RFBB
249
k
10
0
0.001
0.01
0.1
VOUT = 5 V
FS = 200 kHz
VIN = 24 V
VOUT = 5 V
5.15
5.2
5.10
5.0
4.8
VOUT (V)
Vout (V)
5.05
5.00
4.95
4.90
4.85
4.80
0.001
C004
FS = 200 kHz
4.6
Load = 0.2A
4.4
VIN = 8V
VIN = 12V
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
0.01
Load = 0.4A
4.2
Load = 0.5A
4.0
0.1
5.0
VOUT = 5 V
Load = 0.3A
VIN = 18V
5.2
5.4
5.6
5.8
6.0
VIN (V)
C014
FS = 200 kHz
VOUT = 5 V
C024
FS = 200 kHz
Figure 62. Drop-Out Curve
0.6
VDROP_ON_0.75_LOAD
(500 mV/DIV)
0.5
Current (A)
0.4
0.3
0.2
R,JA = 10 C/W
IL (500 mA/DIV)
0.1
R,JA = 20 C/W
R,JA = 30 C/W
50
60
70
80
90
100
Temperature (C)
VOUT = 5 V
FS = 200 kHz
VIN = 24 V
VOUT = 5 V
34
FS = 200 kHz
110
120
C001
VIN = 24 V
LM46000
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
100
90
VOUT = 5 V FS = 1 MHz
80
RT
RT
39.2
k
LM46000
Efficiency (%)
70
L=22 H
VOUT
SW
CBOOT
CBOOT
0.47 F
COUT
33 F
CBIAS
1 F
CFF
BIAS
VCC
CVCC
2.2 F
FB
50
40
30
RFBT
1 M
22 pF
60
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
20
RFBB
249
k
10
0
0.001
0.01
0.1
VOUT = 5 V
FS = 1 MHz
VIN = 24 V
VOUT = 5 V
C005
FS = 1 MHz
VIN = 24 V
5.20
5.15
5.0
4.8
5.05
VOUT (V)
Vout (V)
5.10
5.00
4.95
4.6
Load = 0.2A
4.4
Load = 0.3A
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 28V
4.90
4.85
4.80
0.001
0.01
Load = 0.5A
4.0
0.1
5.0
VOUT = 5 V
Load = 0.4A
4.2
5.2
5.4
5.6
5.8
6.0
VIN (V)
C015
FS = 1 MHz
VOUT = 5 V
C025
FS = 1 MHz
Figure 68. Drop-Out Curve
0.6
VDROP_ON_0.75_LOAD
(375 mV/DIV)
0.5
Current (A)
0.4
0.3
0.2
R,JA = 10 C/W
IL (500 mA/DIV)
0.1
R,JA = 20 C/W
R,JA = 30 C/W
50
60
70
80
90
100
110
120
Temperature (C)
VOUT = 5 V
FS = 1 MHz
VIN = 24 V
VOUT = 5 V
FS = 1 MHz
C001
VIN = 24 V
35
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
100
90
80
RT
LM46000
Efficiency (%)
70
L=56 H
VOUT
SW
CBOOT
CBOOT
0.47 F
COUT
22 F
BIAS
CBIAS
1 F
VCC
CVCC
2.2 F
RFBT
1 M
CFF
47 pF
FB
60
50
RFBB
90.9
k
VIN = 24V
40
VIN = 28V
30
VIN = 36V
20
VIN = 42V
10
VIN = 48V
VIN = 60V
0
0.001
0.01
0.1
VOUT = 12 V
FS = 500 kHz
VIN = 24 V
VOUT = 12 V
C007
FS = 500 kHz
Figure 72. Efficiency
12.5
12.4
12.4
12.2
12.3
12.0
12.1
VOUT (V)
Vout (V)
12.2
12.0
11.9
11.8
11.7
11.6
11.5
0.001
VIN = 24V
VIN = 28V
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
0.01
VOUT = 12 V
11.6
Load = 0.2A
11.4
Load = 0.3A
11.2
Load = 0.4A
Load = 0.5A
11.0
12.0
0.1
11.8
12.5
13.0
13.5
14.0
VIN (V)
C017
FS = 500 kHz
VOUT = 12 V
C027
FS = 500 kHz
Figure 74. Drop-Out Curve
0.6
0.5
Current (A)
0.4
0.3
0.2
R,JA = 10 C/W
IL (500 mA/DIV)
0.1
R,JA = 20 C/W
R,JA = 30 C/W
50
60
70
80
90
100
Temperature (C)
VOUT = 12 V
FS = 500 kHz
VIN = 24 V
VOUT = 12 V
36
FS = 500 kHz
110
120
C001
VIN = 24 V
LM46000
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
100
90
80
RT
LM46000
Efficiency (%)
70
L=120 H
VOUT
SW
CBOOT
CBOOT
0.47 F
COUT
15 F
CBIAS
1 F
CFF
BIAS
VCC
CVCC
2.2 F
82 pF
FB
60
50
40
RFBT
1 M
30
RFBB
43.2
k
10
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
20
0
0.001
0.01
0.1
VOUT = 24 V
FS = 500 kHz
VIN = 48 V
VOUT = 24 V
C008
FS = 500 kHz
Figure 78. Efficiency
25.0
24.5
24.8
24.6
24.0
24.2
VOUT (V)
Vout (V)
24.4
24.0
23.8
23.6
VIN = 36V
VIN = 42V
VIN = 48V
VIN = 60V
23.4
23.2
23.0
0.001
0.01
VOUT = 24 V
23.0
Load = 0.2A
Load = 0.3A
22.5
Load = 0.4A
Load = 0.5A
22.0
24.0
0.1
23.5
24.5
25.0
25.5
26.0
VIN (V)
C018
FS = 500 kHz
VOUT = 24 V
C028
FS = 500 kHz
Figure 80. Drop-Out Curve
0.6
0.5
VOUT (1 V/DIV)
Current (A)
0.4
0.3
0.2
IL (500 mA/DIV)
R,JA = 10 C/W
0.1
R,JA = 20 C/W
0
50
60
70
80
90
100
110
120
Temperature (C)
VOUT = 24 V
FS = 500 kHz
VIN = 48 V
VOUT = 24 V
FS = 500 kHz
C001
VIN = 48 V
37
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
0.6
0.6
0.5
0.5
0.4
0.4
Current (A)
Current (A)
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
0.3
0.2
0.3
0.2
Vin = 12V
Vin = 12V
Vin = 24V
0.1
Vin = 24V
0.1
Vin = 36V
Vin = 36V
0
50
60
70
80
90
100
110
120
Temperature (C)
VOUT = 3.3 V
FS = 500 kHz
50
RJA = 20 C/W
VOUT = 5 V
80
90
100
0.6
0.6
0.5
0.5
0.4
0.4
0.3
0.2
120
FS = 500 kHz
C001
RJA = 20 C/W
0.3
0.2
Vin = 12V
Vin = 12V
Vin = 24V
0.1
Vin = 24V
0.1
Vin = 36V
Vin = 36V
0
50
60
70
80
90
100
110
120
Temperature (C)
VOUT = 5 V
FS = 200 kHz
50
60
70
80
90
100
RJA = 20 C/W
VOUT = 5 V
FS = 1 MHz
C001
RJA = 20 C/W
1.E+06
Switching Frequency (Hz)
1.E+05
1.E+04
VIN = 8V
1.E+05
1.E+04
VIN = 12V
VIN = 24V
VIN = 12V
VIN = 24V
0.010
0.100
VOUT = 3.3 V
120
1.E+06
1.E+03
0.001
110
Temperature (C)
C001
1.000
1.E+03
0.001
FS = 500 kHz
VIN = 36V
0.010
0.100
C006
VOUT = 5 V
38
110
Current (A)
Current (A)
70
Temperature (C)
60
C001
1.000
C007
FS = 1 MHz
LM46000
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
SW (10 V/DIV)
SW (10 V/DIV)
VOUT (5 mV/DIV)
VOUT (5 mV/DIV)
IL (500 mA/DIV)
IL (500 mA/DIV)
Time (2 s/DIV)
VOUT = 3.3 V
FS = 500 kHz
Time (2 s/DIV)
IOUT = 0.5A
VOUT = 3.3 V
FS = 500 kHz
IOUT = 40 mA
SW (10 V/DIV)
PGOOD (2 V/DIV)
VOUT (2 V/DIV)
VOUT (5 mV/DIV)
IL (500 mA/DIV)
IL (500 mA/DIV)
VOUT = 3.3 V
FS = 500 kHz
Time (2 ms/DIV)
IOUT = 0 mA
VIN = 24 V
VOUT = 3.3 V
RLOAD = 6.6
PGOOD (2 V/DIV)
PGOOD (2 V/DIV)
VOUT (2 V/DIV)
VOUT (2 V/DIV)
IL (100 mA/DIV)
IL (250 mA/DIV)
Time (2 ms/DIV)
VIN = 24 V
VOUT = 3.3 V
Time (2 ms/DIV)
RLOAD = 13.2
VIN = 24 V
VOUT = 3.3 V
RLOAD = 33
39
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
Please refer to Table 2 for Bill of materials for each VOUT and FS combination. Unless otherwise stated, application
performance curves were taken at TA = 25 C.
PGOOD (10 V/DIV)
PGOOD (2 V/DIV)
VOUT (1 V/DIV)
VOUT (10 V/DIV)
IL (500 mA/DIV)
IL (500 mA/DIV)
Time (2 ms/DIV)
VIN = 24 V
VOUT = 3.3 V
Time (5 ms/DIV)
RLOAD = Open
VIN = 24 V
VOUT = 12 V
RLOAD = 24
IL (500 mA/DIV)
IL (500 mA/DIV)
Time (2 ms/DIV)
VOUT = 3.3 V
Time (2 ms/DIV)
FS = 500 kHz
IOUT = 0.5A
VOUT = 3.3 V
FS = 500 kHz
IOUT = 0.25 A
PGOOD (5 V/DIV)
VOUT (2 V/DIV)
IL (500 mA/DIV)
VOUT = 3.3 V
FS = 500 kHz
VIN = 24 V
40
LM46000
www.ti.com
10 Layout
The performance of any switching converter depends as much upon the layout of the PCB as the component
selection. The following guidelines will help users design a PCB with the best power conversion performance,
thermal performance, and minimized generation of unwanted EMI.
VIN
SW
CIN
VOUT
COUT
PGND
High di/dt
current
PGND
41
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
(27)
where
TJ = Junction temperature in C
PD = VIN x IIN x (1 Efficiency) 1.1 x IOUT x DCR
DCR = Inductor DC parasitic resistance in
RJA = Junction-to-ambient thermal resistance of the device in C/W
TA = Ambient temperature in C.
The maximum operating junction temperature of the LM46000 is 125C. RJA is highly related to PCB size and
layout, as well as enviromental factors such as heat sinking and air flow. Figure 101 shows measured results of
RJA with different copper area on a 2-layer board and a 4-layer board.
42
LM46000
www.ti.com
1W @ 0fpm - 2 layer
2W @ 0fpm - 2 layer
R,JA (C/W)
45.0
1W @ 0fpm - 4 layer
2W @ 0fpm - 4 layer
40.0
35.0
30.0
25.0
20.0
20mm x 20mm
30mm x 30mm
40mm x 40mm
Copper Area
50mm x 50mm
C030
Figure 101. Measured RJA vs PCB Copper Area on a 2-layer Board and a 4-layer Board
10.1.3 Feedback Resistors
To reduce noise sensitivity of the output voltage feedback path, it is important to place the resistor divider and
CFF close to the FB pin, rather than close to the load. The FB pin is the input to the error amplifier, so it is a high
impedance node and very sensitive to noise. Placing the resistor divider and CFF closer to the FB pin reduces the
trace length of FB signal and reduces noise coupling. The output node is a low impedance node, so the trace
from VOUT to the resistor divider can be long if short path is not available.
If voltage accuracy at the load is important, make sure voltage sense is made at the load. Doing so will correct
for voltage drops along the traces and provide the best output accuracy. The voltage sense trace from the load to
the feedback resistor divider should be routed away from the SW node path, the inductor and VIN path to avoid
contaminating the feedback signal with switch noise, while also minimizing the trace length. This is most
important when high value resistors are used to set the output voltage. It is recommended to route the voltage
sense trace on a different layer than the inductor, SW node and VIN path, such that there is a ground plane in
between the feedback trace and inductor / SW node / VIN polygon. This provides further shielding for the voltage
feedback path from switching noises.
43
LM46000
SNVSA45A JUNE 2014 REVISED JULY 2014
www.ti.com
VOUT distribution
point is away
from inductor
and past COUT
COUT
As much copper area as possible, for
better thermal performance
GND
CBOOT
Place
bypass caps
close to
terminals
CVCC
Ground
bypass caps
to DAP
1
2
CBOOT
VCC
BIAS
SYNC
PAD
(17)
16
PGND
15
PGND
14
VIN
13
VIN
12
EN
11
SS/TRK
RT
10
AGND
PGOOD
CBIAS
SW
SW
CIN
VIN
Place ceramic
bypass caps close
to VIN and PGND
terminals
RFBB
FB
RFBT
CFF
Route VOUT
sense trace
away from SW
and VIN
nodes.
Preferably
shielded in an
alternative
layer
GND Plane
As much copper area as possible, for better thermal performance
44
LM46000
www.ti.com
11.3 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
45
www.ti.com
18-Jul-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
LM46000PWP
ACTIVE
HTSSOP
PWP
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
LM46000
LM46000PWPR
ACTIVE
HTSSOP
PWP
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
LM46000
LM46000PWPT
ACTIVE
HTSSOP
PWP
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
LM46000
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
www.ti.com
18-Jul-2014
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
18-Aug-2014
Device
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM46000PWPR
HTSSOP
PWP
16
2000
330.0
12.4
LM46000PWPT
HTSSOP
PWP
16
250
180.0
12.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
6.9
5.6
1.6
8.0
12.0
Q1
6.9
5.6
1.6
8.0
12.0
Q1
18-Aug-2014
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM46000PWPR
HTSSOP
PWP
16
2000
367.0
367.0
35.0
LM46000PWPT
HTSSOP
PWP
16
250
210.0
185.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as components) are sold subject to TIs terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TIs terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TIs goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
www.ti.com/automotive
Amplifiers
amplifier.ti.com
www.ti.com/communications
Data Converters
dataconverter.ti.com
www.ti.com/computers
DLP Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
www.ti.com/energy
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
www.ti.com/video
RFID
www.ti-rfid.com
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright 2014, Texas Instruments Incorporated