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Documenti di Professioni
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SYSTEM DESIGN
Mukesh Kumar
mkb@genericembedded.com
www genericembedded com
www.genericembedded.com
Agenda(1)
IntroductiontoEmbeddedSystemDesign
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
y
p
ApplicationSpecificInstructionSets
MicroController
DigitalSignalProcessorsandVLIW
Di i l Si l P
d VLIW
ProgrammableHardware
ASICs
Agenda (2)
Agenda(2)
Challengesinembeddedsystemdesign
Challenges in embedded system design
Dependability,efficiency,
Designflows
Design flows
Requirementsforspecificationtechniques
Modelsofcomputation
Models of computation
Localmodel
Communication
What isEmbeddedSystem?..
y
Embeddedsystems(ES)
Embedded
systems (ES) =information
information
processingsystemsembeddedintoalarger
product
Anembeddedsystem isacomputersystem
designedtodooneorafewdedicatedand/or
specificfunctionsoftenwithrealtime
computingconstraints.Itisembedded aspart
ofacompletedeviceoftenincludinghardware
f
l
d i
f
i l di h d
andmechanicalparts.
Applicationareas(1)
Automotiveelectronics
Avionics
Trains
Telecommunication
Applicationareas(2)
Robotics
ExamplesofEmbeddedSystems
Informationsystems,forexamplewireless
communication (mobile phone, Wireless LAN,
communication(mobilephone,WirelessLAN,
),enduserequipment,router,
CommunicatingEmbeddedSystems
Example:BTnodes http://www.btnode.ethz.ch)
completeplatformincludingOS
especiallysuitedforpervasivecomputingapplications
BTnode Platform
CommunicatingEmbeddedSystems
sensornetworks(civilengineering,buildings,environmental
monitoring,traffic,emergencysituations)
smartproducts,wearable/ubiquitouscomputing
/
CharacteristicsofEmbeddedSystems(1)
Mustbedependable:
Reliability:R(t)=probabilityofsystemworkingcorrectly
providedthatiswasworkingatt=0
Maintainability:M(d)=probabilityofsystemworking
correctly d time units after error occurred
correctlydtimeunitsaftererroroccurred.
Availability:probabilityofsystemworkingattimet
Safety:noharmtobecaused
Safety: no harm to be caused
Security:confidentialandauthenticcommunication
Even perfectly designed systems can fail if the assumptions about the
workload and possible errors turn out to be wrong. Making the system
dependable must not be an afterthought, it must be considered from
the very beginning.
beginning
CharacteristicsofEmbeddedSystems(2)
Mustbeefficient:
Energyefficient
Codesizeefficient(especiallyforsystemsonachip)
Runtimeefficient
Weight efficient
Weightefficient
Costefficient
D
Dedicatedtowardsacertain
di
d
d
i application:Knowledge
li i
K
l d
aboutbehavioratdesigntimecanbeusedto
minimizeresourcesandtomaximizerobustness.
Dedicateduser interface(nomouse,keyboardand
screen).
CharacteristicsofEmbeddedSystems(3)
ManyESmustmeetrealtimeconstraints:
A real-time system must react to stimuli from
the controlled object (or the operator) within the
time interval dictated by the environment.
Forrealtimesystems,rightanswersarrivingtoolate
(or even too early) are wrong
(oreventooearly)arewrong.
Arealtimeconstraintiscalledhard,ifnot
meetingthatconstraint
g
couldresultina
catastrophe[Kopetz,1997].
Allothertimeconstraintsarecalledsoft.
Aguaranteedsystemresponsehastobe
explainedwithoutstatisticalarguments.
CharacteristicsofEmbeddedSystems(4)
Frequentlyconnectedtophysicalenvironment
through sensorsandactuators,
Hybridsystems(analog+digitalparts).
Typically,ESarereactivesystems:
Areactivesystemisonewhichisincontinual
interactionwithisenvironmentandexecutesat
apacedeterminedbythatenvironment
d
i db h
i
[Berg,1995]
Behaviordependsoninputandcurrentstate.
B h i d
d
i
t d
t t t
automatamodeloftenappropriate,
Comparison
EmbeddedSystems
FFewapplicationsthatareknown
li i
h
k
atdesigntime.
Notprogrammablebyenduser.
Fixedruntimeequirements
(additionalcomputingpowernot
useful).
Criteria:
cost
powerconsumption
predictability
GeneralPurposeComputing
B d l
Broadclassofapplications.
f
li i
Programmablebyenduser.
Fasterisbetter.
Criteria:
cost
averagespeed
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
S t
S i li ti
ApplicationSpecificInstructionSets
MicroController
Mi
C
ll
DigitalSignalProcessorsandVLIW
ProgrammableHardware
Programmable Hardware
ASICs
EmbeddedSystemHardware
Embeddedsystemhardwareisfrequently
used in a loop (hardware
usedinaloop(
hardwareinaloop
in a loop):
):
TypicalArchitecture
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
System Specialization
ApplicationSpecificInstructionSets
MicroController
Mi
C
ll
DigitalSignalProcessorsandVLIW
ProgrammableHardware
Programmable Hardware
ASICs
ImplementationAlternatives
GeneralpurposeProcessors
Highperformance
Highlyoptimizedcircuitsandtechnology
Useofparallelism
superscalar:dynamicschedulingofinstructions
superpipelining:instructionpipelining,branchprediction,
speculation
complexmemoryhierarchy
Notsuitedforrealtimeapplications
f
pp
Executiontimesarehighlyunpredictablebecauseof
intensiveresourcesharinganddynamicdecisions
Properties
Goodaverageperformanceforlargeapplicationmix
Highpowerconsumption
PentiumP4
SystemSpecialization
Themaindifferencebetweengeneralpurposehighest
volumemicroprocessorsandembeddedsystemsis
p
y
specialization.
Specializationshouldrespectflexibility
application
applicationdomainspecificsystemsshallcoveraclassof
domain specific systems shall cover a class of
applications
someflexibilityisrequiredtoaccountforlatechanges,
debugging
Systemanalysisrequired
identificationofapplicationpropertieswhichcanbe
usedforspecialization
df
i li ti
quantificationofindividualspecializationeffects
Example:CodesizeEfficiency
CISCmachines:RISCmachinesdesignedforrun
time, not for codesizeefficiency.
time,notforcode
size efficiency.
Compressiontechniques:keyidea
Example:Heterogeneousregisters
Example:Multiplememorybanksormemories
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
System Specialization
ApplicationSpecificInstructionSets
MicroController
Mi
C t ll
DigitalSignalProcessorsandVLIW
ProgrammableHardware
P
bl H d
ASICs
Microcontroller
controldominantapplications
supportsprocessschedulingand
synchronization
preemption(interrupt),context
switch
it h
shortlatencytimes
lowpowerconsumption
peripheralunitsoften
integrated
suitedforrealtime
applications
ControlDominatedSystems
Reactivesystemswitheventdrivenbehavior
Underlyingsemanticsofsystemdescription(input
modelofcomputation)typically(coupled)Finite
StateMachines
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
System Specialization
ApplicationSpecificInstructionSets
MicroController
Micro Controller
DigitalSignalProcessorsandVLIW
ProgrammableHardware
ASICs
DigitalSignalProcessor
optimizedfordataflowapplications
suitedforsimplecontrolflow
parallelhardware
ll l h d
units(VLIW)
specialized
specialized
instructionset
highdatathroughput
zerooverheadloops
specializedmemory
suitedforrealtime
df
l
applications
MAC(multiply&accumulate)
DataDominatedSystems
Streamingorientedsystemswithmostly
periodicbehavior
Underlyingsemanticsofinputdescriptione.g.
flowgraphs(inputmodelofcomputation)
Applicationexamples:signalprocessing,
controlengineering
g
g
VeryLongInstructionWord(VLIW)
Keyidea:detectionofpossibleparallelismtobedone
bycompiler,notbyhardwareatruntime(inefficient).
VLIW:paralleloperations(instructions)encodedin
onelongword(instructionpacket),eachinstruction
controlling one functional unit E g :
controllingonefunctionalunit.E.g.:
Example:PhilipsTriMedia TM1000
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
System Specialization
ApplicationSpecificInstructionSets
MicroController
Micro Controller
DigitalSignalProcessorsandVLIW
ProgrammableHardware
bl
d
ASICs
FPGA BasicStructure
LogicUnits
I/OUnits
Connections
FPGA Classification
Granularityoflogicunits:
Gate,tables,memory,functionalblocks(ALU,
control,datapath,processor)
Communicationnetwork:
Crossbar,hierarchicalmesh,tree
Reconfiguration:
fixedatproductiontime,onceatdesigntime,
p
,
g
,
dynamicduringruntime
FloorplanofVIRTEXIIFPGAs
Agenda
GeneralIntroductiontoEmbeddedSystems
General Introduction to Embedded Systems
HardwarePlatformsandComponents
SystemSpecialization
System Specialization
ApplicationSpecificInstructionSets
MicroController
Micro Controller
DigitalSignalProcessorsandVLIW
ProgrammableHardware
P
bl H d
ASICs
ApplicationSpecificCircuits(ASICS)
Customdesignedcircuits
necessary
ifultimatespeedor
energyefficiencyisthegoaland
energy efficiency is the goal and
largenumberscanbesold.
Approachsuffersfrom
longdesigntimes,
l
d i
i
lackofflexibility
(
(changingstandards)and
g g
)
highcosts
(e.g.Mill.$maskcosts).
Agenda (2)
Agenda(2)
Challengesinembeddedsystemdesign
Challenges in embedded system design
Dependability,efficiency,
Designflows
Design flows
Structureofthiscourse
Requirementsforspecificationtechniques
Requirements for specification techniques
Modelsofcomputation
Localmodel
L l
d l
Communication
Quiteanumberofchallenges,e.g.
dependability
Dependability?
Nonrealtimeprotocolsusedforrealtimeapplications
(e.g.Berlinfiredepartment)
Oversimplificationofmodels
(e.g.aircraftanticollisionsystem)
Usingunsafesystemsforsafetycriticalmissions
(e.g.voicecontrolsysteminLosAngeles;~800
planeswithoutvoiceconnectiontotowerfor>3hrs
l
h
f
h
ItisnotsufficienttoconsiderES
just as a special case of software engineering
justasaspecialcaseofsoftwareengineering
EEknowledgemustbeavailable,
WallsbetweenEEandCSmustbetorndown
CS
Thesameforwallstootherdisciplinesandmorechallenges.
EE
Agenda (2)
Agenda(2)
Challengesinembeddedsystemdesign
Challenges in embedded system design
Dependability,efficiency,
Designflows
Design flows
Requirementsforspecificationtechniques
Modelsofcomputation
Models of computation
Localmodel
Communication
App
plicationKn
nowledge
Hypotheticaldesignflow
Specification
Designrepository
EShardware
Design
Test*
Applicationmapping
Systemsoftware
System
software
(RTOS,middleware,
)
O ti i ti
Optimization
Evaluation&Validation
(energy,cost,performance,
)
)
Genericloop:toolchainsdifferinthenumberandtypeofiterations
e e c oop oo c a s d e
e u be a d ype o e a o s
*Couldbe
Could be
integrated
intoloop
Iterativedesign(1)
Afterunrollingloop
After unrolling loop
Example:
SpecC
SpecC
tools
Iterativedesign(2)
Afterunrollingloop
Example:Vmodel
Requirement
analysis
System
architecture
System
System
design
Software
architecture
Software
design
Acceptance
&use
System
integration
Integration
testing
Unit
tests
Skippingsomeexplicit
repositoryupdates..
ApplicationKno
owledge
Hypotheticaldesignflow
2:Specification
3:EShardware
4:Systemsoftware
4:
System software
(RTOS,middleware,
)
Designrepository
6:Application
mapping
7 O ti i ti
7:Optimization
5:Evaluation&Validation
(energy,cost,performance,
)
)
Numbersdenotesequenceofchapters
Design
8.Test*
*Couldbe
Could be
integrated
intoloop
Models
Definition:Amodelisasimplificationofanotherentity,
which can be a physical thing or another model. The model
whichcanbeaphysicalthingoranothermodel.Themodel
containsexactlythosecharacteristicsandpropertiesofthe
modeledentitythatarerelevantforagiventask.Amodel
isminimalwithrespecttoataskifitdoesnotcontainany
is minimal with respect to a task if it does not contain any
othercharacteristicsthanthoserelevantforthetask.
[Jantsch,2004]:
Whichrequirementsdowehaveforourmodels?
Requirementsforspecificationtechniques:
Hierarchy
Hierarchy
Humansnotcapabletounderstandsystems
containingmorethan~5objects.
Mostactualsystemsrequiremoreobjects
) Hierarchy
Behavioralhierarchy
Examples:states,processes,procedures.
Structuralhierarchy
Examples:processors,racks,
p
printedcircuitboards
proc
proc
proc
Requirementsforspecificationtechniques(2):
Componentbased
Component
baseddesign
design
Systemsmustbedesignedfrom
components
Mustbeeasytoderivebehaviorfrom
behaviorofsubsystems
)WorkofSifakis,Thiele,Ernst,
Concurrency
Synchronizationandcommunication
Requirementsforspecificationtechniques(3):
Ti i
Timing
Timingbehavior
Essentialforembeddedandcyphy systems!
Additionalinformation(periods,dependences,
scenarios,usecases)welcome
Also,thespeedoftheunderlyingplatformmustbe
Also the speed of the underlying platform must be
known
Farreachingconsequencesfordesignprocesses!
Thelackoftiminginthecoreabstraction (ofcomputerscience) isaflaw,fromthe
perspectiveofembeddedsoftware [Lee,2005]
Requirementsforspecificationtechniques(3):
Ti i (2)
Timing(2)
4typesoftimingspecsrequired,accordingtoBurns,1990:
1.
Measureelapsedtime
Check,howmuchtimehaselapsedsincelastcall
?
execute
t
2.
Meansfordelayingprocesses
Requirementsforspecificationtechniques(3)
Ti i (3)
Timing(3)
3.
Possibilitytospecifytimeouts
Stay in a certain state a maximum time
Stayinacertainstateamaximumtime.
4.
Methodsforspecifyingdeadlines
Notavailableorinseparatecontrolfile.
execute
t
Specificationofembeddedsystems(4):
Support for designing reactive systems
Supportfordesigningreactivesystems
Stateorientedbehavior
Requiredforreactivesystems;
classicalautomatainsufficient.
Eventhandling
(externalorinternalevents)
Exceptionorientedbehavior
Notacceptabletodescribe
exceptions for every state
exceptionsforeverystate
Wewillsee,howallthe
arrowslabeledk canbe
replacedbyasingleone.
p
y
g
Requirementsforspecification
techniques (5)
techniques(5)
Presenceofprogrammingelements
Executability(noalgebraicspecification)
y(
g
p
)
Supportforthedesignoflargesystems() OO)
Domainspecificsupport
R d bilit
Readability
Portabilityandflexibility
Termination
SupportfornonstandardI/Odevices
Nonfunctionalproperties
S
Supportforthedesignofdependablesystems
t f th d i
fd
d bl
t
Noobstaclesforefficientimplementation
Adequatemodelofcomputation
q
p
Whatdoesitmeantocompute?
Models of computation
Modelsofcomputation
Whatdoesitmean,tocompute?
Modelsofcomputationdefine:
Componentsandanexecutionmodelfor
computationsforeachcomponent
Communicationmodelforexchangeof
Communication model for exchange of
informationbetweencomponents.
C1
C2
Communication
Sharedmemoryy
Comp1
memory
Comp2
Variablesaccessibletoseveralcomponents/tasks.
Modelmostlyrestrictedtolocalsystems.
Shared memory
Sharedmemory
Potentialraceconditions()inconsistentresultspossible)
) Criticalsections=sectionsatwhichexclusiveaccessto
Critical sections = sections at which exclusive access to
resourcer (e.g.sharedmemory)mustbeguaranteed.
task a{
..
P(S)//obtainlock
..//criticalsection
V(S)//releaselock
}
task b{
..
P(S)//obtainlock
..//criticalsection
V(S)//releaselock
}
P(S)andV(S)aresemaphore operations,
allowingatmostn accesses,n =1inthiscase(mutex,lock)
Racefreeaccesstoshared
memoryprotectedbyS
possible
Nonblocking/asynchronous
message passing
messagepassing
Senderdoesnothavetowaituntilmessagehasarrived;
send()
Potentialproblem:bufferoverflow
receive()
Blocking/synchronousmessagepassing
rendezvous
d
Senderwillwaituntilreceiverhasreceivedmessage
send()
receive()
Nobufferoverflow,butreducedperformance.
Agenda (2)
Agenda(2)
Challengesinembeddedsystemdesign
Challenges in embedded system design
Dependability,efficiency,
Designflows
Design flows
Requirementsforspecificationtechniques
Modelsofcomputation
Models of computation
Localmodel
Communication
Testing
Test: Goals
Test:Goals
1. Productiontest
2 IIsthereanywayofusingtestpatternsforproduction
2.
th
f i t t tt
f
d ti
testalreadyduringthedesign?
3 Testforfaultsafterdeliverytocustomer
3.
T t f f lt ft d li
t
t
Whyistestingofembedded
systemsdifficult?
Embedded/cyber
Embedded/cyberphysicalsystemsintegratedintoa
physical systems integrated into a
physicalenvironmentmaybesafetycritical.Asa
result,expectationsfortheproductqualityare
h h h f
higherthanfornonsafetycriticalsystems.
f
l
Testingoftimingcriticalsystemshastovalidatethe
correcttimingbehavior.Thismeansthatjusttesting
thefunctionalbehaviorisnotsufficient.
Testingembedded/cyberphysicalsystemsintheir
realenvironmentmaybedangerous.
Scope
Testing includes
theapplicationoftestpatternstotheinputsofthe
deviceundertest(DUT)and
theobservationoftheresults.
the observation of the results
Moreprecisely,testingrequiresthefollowingsteps:
p
y,
g q
g p
1. testpatterngeneration,
2. testpatternapplication,
3. responseobservation,and
4. resultcomparison.
Faultmodelsandtestpattern
generation
Testpatterngenerationtypically
T
i
i ll
considerscertainfaultmodelsand
generatespatternsthatenableadistinction
betweenthefaultyandthefaultfreecase.
Examples:
Booleandifferences
DAlgorithm
Selftestprograms
Stuckat
Stuck
atfaultmodel
fault model
Hardwarefaultmodel:
NetpermanentlyconnectedtogroundorVdd
Simplificationoftherealsituation
Neverthelessusefulinmanycases
Example:
Stuckat1at port p
Stuckat1atportp
stuck
stuckopenfaults:
open faults:
forCMOS,open
transistorscan
behave like
behavelike
memories
www.cedcc.psu.edu/ee497f
/rassp_43/sld022.htm
delayfaults:circuitis
functionallycorrect,
but the delay is not.
butthedelayisnot.
Faultmodelsandtestpattern
generation
Testpatterngenerationtypically
T
i
i ll
considerscertainfaultmodelsand
generatespatternsthatenableadistinction
betweenthefaultyandthefaultfreecase.
Examples:
Booleandifferences
DAlgorithm
Selftestprograms
TheDalgorithm:asimpleexample
noerror
0
1
error
0 /1
1/0
1
1/0
Couldwecheckforastuckatoneerroratportp (sa1(p))?
Solution(justguessing):
Solution (just guessing):
Signal f='1'ifthereisanerror
) a='0',b='0'inordertohavef='0'ifthereisnoerror
g='1'
g=
1 inordertopropagateerror
in order to propagate error
SymbolicvaluesD
c='1'inordertohaveg='1'(orsetd='1')
andD areassignedto
e='1'inordertopropagateerror
signalsf, h andi
i='1'
i=
1 ifthereisnoerror&i=
if there is no error & i='0'
0 ifthereis
if there is
GenerationofSelfTestProgramGeneration
Keyconcept
y
p
1.
Storepatternofall1sintheregisterfile
2.
Performxor betweenregisterandconstant00..0";
3.
Testifresultcontains0bit
4.
Ifyes,reporterror;
5.
Samequalityofresults?
Th k
Thankyou!
!
References:
Embedded
EmbeddedSystemDesign
System DesignBookand
Book and
LectureofPeterMarwedel
Hard
HardRealTimeComputingSystems
Real Time Computing SystemsBook
Book
ofGiorgioButtazzo.
EmbeddedSystemDesign:Aunified
E b dd d S
D i
A ifi d
Hardware/softwareintroduction
V hid/Gi
Vahid/Givargis
i