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LAST_MODIFIED=Tue Sep
PDF CSA CONTENTS
SYNC MASTER
DATE
Table of Contents
MIKE
NA
32
J2DEV
33
N/A
BOM TABLES
MIKE
34
N/A
AP: MAIN
MIKE
35
N/A
AP: I/Os
JOE
36
N/A
AP: NAND
MIKE
37
N/A
AP: TV,DP,MIPI
JOE
01/13/2011
10
AP: DDR
MIKE
10
11
AP: POWER
MIKE
40
N/A
12
ALEX
41
N/A
13
CHOPIN
12/10/2010
14
NAND
MIKE
16
DDR 0 AND 1
MIKE
06/21/2010
17
DDR 2 AND 3
MIKE
06/21/2010
09/01/2011
75
MADHAVI
01/13/2011
80
POWER ALIASES
MADHAVI
01/13/2011
81
MADHAVI
01/13/2011
82
MLB
01/14/2011
83
MADHAVI
01/13/2011
90
ALEX
10/04/2010
93
FCT/ICT TEST/BRACKETS
ALEX
10/04/2010
150
MIKE
01/21/2011
151
MIKE
01/21/2011
152
CONSTRAINTS: DISPLAY/AUDIO
MIKE
01/21/2011
153
CONSTRAINTS: DDR/FMI
MIKE
01/21/2011
154
MIKE
01/21/2011
155
CONSTRAINTS: DEBUG
MIKE
01/21/2011
156
MIKE
01/21/2011
157
MIKE
01/21/2011
44
45
TABLE_TABLEOFCONTENTS_ITEM
21
MLB ALIASES/CONNECTIONS
ALEX
09/30/2010
46
TABLE_TABLEOFCONTENTS_ITEM
22
JOE
01/19/2011
47
TABLE_TABLEOFCONTENTS_ITEM
30
GRAPE: GROUNDHOG,CONN,BOOST
RAMSIN
12/17/2010
TABLE_TABLEOFCONTENTS_ITEM
18
X26_WIFI_MIKE_BT
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
17
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
16
42
43
N/A
TABLE_TABLEOFCONTENTS_ITEM
15
63
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
14
09/01/2011
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
13
X26_WIFI_MIKE_BT
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
12
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
11
38
39
N/A
TABLE_TABLEOFCONTENTS_ITEM
62
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
DATE
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
D
SYNC MASTER
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
2011-09-06
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
ENGINEERING RELEASED
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
0001231154
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
10
CK
APPD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
DESCRIPTION OF REVISION
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
ECN
6 17:35:11 2011
TABLE_TABLEOFCONTENTS_HEAD
REV
DATE
48
TABLE_TABLEOFCONTENTS_ITEM
31
GRAPE: Z1, Z2
RAMSIN
12/17/2010
36
KAVITHA
02/03/2011
37
KAVITHA
02/03/2011
38
KAVITHA
02/03/2011
42
KAVITHA
02/03/2011
43
KAVITHA
02/03/2011
54
CONNECTOR: SENSOR
MARK
01/11/2011
55
MARK
01/11/2011
56
MARK
01/11/2011
57
JOE
01/19/2011
58
JOE
01/19/2011
59
JOE
01/19/2011
60
CONNECTOR: X26
JOE
01/19/2011
61
X26_WIFI_MIKE_BT
09/01/2011
TABLE_TABLEOFCONTENTS_ITEM
19
TABLE_TABLEOFCONTENTS_ITEM
20
TABLE_TABLEOFCONTENTS_ITEM
21
TABLE_TABLEOFCONTENTS_ITEM
22
TABLE_TABLEOFCONTENTS_ITEM
23
TABLE_TABLEOFCONTENTS_ITEM
24
TABLE_TABLEOFCONTENTS_ITEM
25
TABLE_TABLEOFCONTENTS_ITEM
26
TABLE_TABLEOFCONTENTS_ITEM
27
TABLE_TABLEOFCONTENTS_ITEM
28
TABLE_TABLEOFCONTENTS_ITEM
29
TABLE_TABLEOFCONTENTS_ITEM
30
TABLE_TABLEOFCONTENTS_ITEM
31
SYNC_MASTER=MIKE
SYNC_DATE=NA
DRAWING TITLE
TABLE_TABLEOFCONTENTS_ITEM
SCH,J2,MLB
DRAWING NUMBER
Apple Inc.
051-8773
REVISION
10.0.0
DRAWING
DRAWING
MLB
Schematic / PCB #s
BRANCH
PAGE
1 OF 157
SHEET
1 OF 48
SIZE
Z2
H4G
SPI1
CSA 31
GROUNDHOG
DUAL-CORE ARM
CORTEX-A9 W/ SMP
950 MHZ
Z1
CSA 30
CSA 31
LPDDR2
ISP_I2C1
MIPI1C
FF CAMERA
ISP_I2C0
MIPI0C
REAR CAMERA
VGA FLEX
VA5/8 FLEX
HSIC1_1
UART3
UART6
MIMO
BT_I2S
WIFI/BT ANT 2
CSA 61-64
X26
CELLULAR/GPS
AUDIO
HSIC0_1
UART1
AE2
ARM A5 CPU
EDP
WIFI ANT 1
WIFI/BT
QUAD-CORE IMG
SGX543-MP2
400MHZ/800MB/S
GPU
1 GBYTE
4X32-BIT
DISPLAY/
TOUCH PANEL
HSIC1
USART
RESOLUTION: 2048X1536
SPI2
IPC
GPS ANT
BACKLIGHT
CSA 60
UART5
PMU
AMELIA
USB2.0
UART0
BATTERY
30-PIN
DOCK
DISPLAYPORT
CSA 75
VIDEO DAC
DWI
I2C0
I2C 8H78
AMP
CSA 81,82
AUDIO CODEC
L63B
I2C1
HALL EFF
PROX SENSOR
I2C 8H58
BUTTON FLEX
SENSOR PANEL
COMPASS
I2C 8H1C
SENSOR PANEL
I2C2
FMI0 FMI1
FMI2
FMI3
I2S2
VSP
I2S0
ASP
I2S3
XSP
CSA 57
LINEOUT
AMP
SPEAKER
AMP
MIC
I2C 8H94
CSA 36
MUX
US/CHINA
EXT MIC
I2C 8H76
SYNC_MASTER=J2DEV
SYNC_DATE=N/A
PAGE TITLE
GYRO
I2C 8HD0
SENSOR PANEL
ACCELEROMETER
I2C 8H32
SENSOR PANEL
ALS
I2C 8H72
VGA FLEX
DRAWING NUMBER
Apple Inc.
10.0.0
CSA 14
051-8773
REVISION
BRANCH
PAGE
2 OF 157
SHEET
2 OF 48
SIZE
PART#
Page Notes
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
051-8773
SCH,MLB,J2
SCH1
CRITICAL
820-2996
PCBF,MLB,J2
PCB1
CRITICAL
085-3058
DEV BOM,MLB,J2
DEV1
TABLE_5_ITEM
TABLE_5_ITEM
SOC
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U0600
CRITICAL
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U8100
CRITICAL
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
CRITICAL
TABLE_5_ITEM
343S0533
COMMON
ALTERNATE
16GB_PROD
32GB_PROD
64GB_PROD
128GB_PROD
IC,SOC,H4G,FCBGA1225
PMU
TABLE_5_HEAD
PART#
DEVELOPMENT_JTAG
DEVELOPMENT_JTAG_TAP
JTAG_DAP
QTY
DESCRIPTION
TABLE_5_ITEM
343S0561
IC,PMU,AMELIA,D1974AB
SPEAKER
INTERNAL_MIC
NAND_IO_1V8
NAND_IO-3V3
SNOTE
DEV
MLB
J2
SDRAM
TABLE_BOMGROUP_HEAD
BOM GROUP
BOM OPTIONS
BASIC
COMMON,ALTERNATE
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
TABLE_BOMGROUP_ITEM
TABLE_5_ITEM
333S0579
SDRAM,LPDDR2,512MB,SAMSUNG 46NM
U1600,U1700
TABLE_BOMGROUP_ITEM
AUDIO
SPEAKER,INTERNAL_MIC
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
333S0580
333S0579
333S0581
333S0579
TABLE_ALT_ITEM
TABLE_ALT_ITEM
C
BARCODE LABEL/EEEE CODES
NAND
16GB FLASH CONFIGURATIONS
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
825-7691
EEEE_DNKT
CRITICAL
EEEE_J1_16G
825-7691
EEEE_DM2N
CRITICAL
EEEE_J1_32G
TABLE_5_HEAD
PART#
TABLE_5_ITEM
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U1400
CRITICAL
16GB_PROD
TABLE_5_ITEM
335S0781
TABLE_5_ITEM
825-7691
EEEE_DM2P
CRITICAL
EEEE_J1_64G
825-7691
EEEE_DNKV
CRITICAL
EEEE_J2_16G
825-7691
EEEE_DHWV
CRITICAL
EEEE_J2_32G
825-7691
EEEE_DKQL
CRITICAL
EEEE_J2_64G
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
335S0804
335S0781
16GB_PROD
TABLE_5_ITEM
REF DES
COMMENTS:
TABLE_ALT_ITEM
TABLE_5_ITEM
U1400
TABLE_5_ITEM
825-7691
EEEE_DKQK
CRITICAL
EEEE_J2_128G
825-7691
EEEE_DRJQ
CRITICAL
EEEE_J2A_16G
825-7691
EEEE_DRF6
CRITICAL
EEEE_J2A_32G
825-7691
EEEE_DRF5
CRITICAL
EEEE_J2A_64G
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U1400,U1410
CRITICAL
32GB_PROD
TABLE_5_ITEM
TABLE_5_ITEM
335S0781
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
335S0804
335S0781
32GB_PROD
MECHANICAL PARTS
REF DES
COMMENTS:
TABLE_ALT_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
806-2105
FENCE,NAND,TOP,MLB,J2
806-1857
FENCE,LARGE,TOP,MLB,J2
PD_FENCE_NAND
CRITICAL
PD_FENCE_LARGE
CRITICAL
TABLE_5_ITEM
TABLE_5_HEAD
PART#
TABLE_5_ITEM
806-2349
FENCE,SMALLER,TOP,MLB,J2
PD_FENCE_SMALL
CRITICAL
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U1400,U1410
CRITICAL
64GB_PROD
TABLE_5_ITEM
335S0782
TABLE_5_ITEM
806-1860
FENCE,1,BTM,MLB,J2
PD_FENCE_BTM1
CRITICAL
806-1865
FENCE,2,BTM,MLB,J2
PD_FENCE_BTM2
CRITICAL
806-2352
FENCE,SMALLER,BTM,MLB,J2
PD_FENCE_BTM3
CRITICAL
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
335S0805
335S0782
64GB_PROD
TABLE_5_ITEM
REF DES
COMMENTS:
TABLE_ALT_ITEM
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U1400,U1410
CRITICAL
128GB_PROD
TABLE_5_ITEM
335S0814
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
335S0806
335S0814
128GB_PROD
REF DES
COMMENTS:
TABLE_ALT_ITEM
SYNC_MASTER=MIKE
PAGE TITLE
SYNC_DATE=N/A
BOM TABLES
DRAWING NUMBER
Apple Inc.
051-8773
REVISION
10.0.0
BRANCH
PAGE
4 OF 157
SHEET
3 OF 48
SIZE
R0601
45
0%
1/32W
MF
01005
0.00 2
45
10%
2 6.3V
X5R
01005
0.00 2
45
0%
1/32W
MF
01005
0.00 2
0.01UF
D
FL0600
80-OHM-0.2A-0.4-OHM
1
PP1V1_MIPID_PLL_F
1
C0620
56PF
C0621
0.01UF
5%
6.3V
2 NP0-C0G
01005
0.01UF
C0630
10%
2 6.3V
CERM
402
C0631
0.01UF
0.01UF
7MA
BI
HSIC0_BB_DATA1
HSIC0_BB_STB1
WLAN
40 15
42
BI
40 15
BI
46 42
NC_HSIC0_DATA2
46 42
NC_HSIC0_STB2
HSIC1_WLAN_DATA1
HSIC1_WLAN_STB1
46 42
1
5%
1/32W
IN
OUT
42 27
10
42
46
NC_HSIC1_DATA2
NC_HSIC1_STB2
10
JTAG_AP_SEL
46
NC_JTAG_AP_TRTCK
JTAG_AP_TRST_L
JTAG_AP_TDO
JTAG_AP_TDI
JTAG_AP_TMS
JTAG_AP_TCK
IN
AP_TESTMODE
5%
1/32W 01005
10
OUT
AP_TST_STPCLK
TP_AP_TST_CLKOUT
10K
1%
1/32W
MF
2 01005
10
OUT
AP_FAST_SCAN_CLK
10
IN
AP_HOLD_RESET
45
3.16V
HSIC0_DATA1
HSIC0_STB1
HSIC0_DATA2
HSIC0_STB2
HSIC1_DATA1
HSIC1_STB1
HSIC1_DATA2
HSIC1_STB2
34MA
OMIT
10MA
28MA
0%
1/32W
MF
01005
C0615
MLB
R0652
WDOG AP29
0.00 2
1
AP_WDOG
2.5MA
U0600
42
H4G
RST_PMU_IN
AK29
AM27
AR27
AP30
AN30
AJ27
AN29
RST_AP_1V8_L
R0641
XTAL_24M_I
(1 OF 12)
R0650
1% MF
010051/32W
JTAG_SEL
JTAG_TRTCK
JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
XO0 Y35
42
22
1
42
24M_O
1
3
2 4
C0650
22PF
AR28 TST_STPCLK
AR29 TST_CLKOUT
AR33 FAST_SCAN_CLK
AN28 HOLD_RESET
USB_DP0
USB_DM0
USB_DP1
USB_DM1
U35
T35
N34
M34
USB11_DP0
USB11_DM0
USB11_DP1
USB11_DM1
T34
R34
N35
P35
USB_ANALOGTEST0 R30
USB_ANALOGTEST1 J28
AR30 RESET*
USB_VBUS0 T30
USB_VBUS1 J32
DDR0_CKEIN
DDR1_CKEIN
DDR2_CKEIN
DDR3_CKEIN
82.5K
1%
1/32W
MF
01005 2
USB_VSSAC
USB_VSSA0
R06431
T29
L28
R29
L29
AP_DDR1_CKEIN_1V2
T31
K32
T28
K31
USB_REXT0 R31
USB_REXT1 K28
USB_DVSS
10%
2 16V
X7R
201
USB_ID0
USB_ID1
USB_BRICKID0
USB_BRICKID1
U28
L31
C0640
1000PF
1.16V
SM-2
24.000MHZ-16PF-60PPM
R0651
XTAL_24M_O
5%
1/32W
MF
01005
AH27 TESTMODE
L6
F9
AK10
AF6
1.75V
1%
1/32W
MF
01005 2
CRITICAL
Y0602
1.00M
W6 CFSB0
AR32 CFSB1
1%
1/32W
MF
2 01005
42.2K
37 45
XI0 W35
FCBGA
USB_DK_D0_P
USB_DK_D0_N
NC_USB_D1_P
42 46
NC_USB_D1_N
42 46
5%
16V
2 CERM
01005
27 42
C0651
22PF
5%
16V
CERM
01005
27 42
USB11_MUX_D0_P
USB11_MUX_D0_N
NC_USB11_D1_P
42 46
NC_USB11_D1_N
42 46
11 42
PPVBUS_USB
100K
46
NC_USB_ANALOGTEST1
46
IN
NC_USB_ID0
46
NC_USB_ID1
46
36 45
R0609
NC_USB_ANALOGTEST0
USB_AP_VBUS0
USB_AP_VBUS1
11 42
5%
1/32W
MF
2 01005
10
2
GDZ-0201
GDZT2R5.1B
USB_BRICKID OUT
NC_USB_BRICKID1
DZ0600
37
46
USB_REXT0
USB_REXT1
R0612 1R0613
M32 PLL_USB_AVSS11
100K
OUT
0%
1/32W 01005
MF
14MA
R06421
0.01UF
10%
6.3V
2 X5R
01005
M31 FUSE1_FSRC
=PP3V3_USB_H4
R0640
K35
L35
K33
L33
H35
J35
H33
J33
34MA
0.00 2
MF
01005
42 27
100K 2
4 35
1UF
BI
42 30
7MA
2.5MA EACH
42 10
R0622
1
42 30
42 10
5%
1/32W 01005
=PP1V1_USB_H4
C0614
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
PLL_USB_AVDD11 M33
10%
6.3V
2 X5R
01005
R28
M28
10%
6.3V
2 X5R
01005
0.01UF
USB_VDD330
10%
6.3V
2 X5R
01005
45 42 10
100K 2
4 35
10%
6.3V
2 CERM
402
PP1V1_PLL_USB_F
C0635
U29
L30
0.01UF
USB_DVDD
C0634
MIPI0D_VDD11_PLL F27
MIPI1D_VDD11_PLL F30
0.01UF
100K 2
R0621
C0612
10%
6.3V
2 X5R
01005
V33
U33
T33
R33
P33
N33
C0633
R0608
5%
1/32W 01005
=PP3V3_USB_H4
10%
2 6.3V
X5R
01005
PLL0_AVDD11
PLL1_AVDD11
PLL2_AVDD11
PLL3_AVDD11
PLL4_AVDD11
PLL5_AVDD11
DEVELOPMENT_JTAG_TAP
100K 2
4 35
R0607
JTAGSEL
0 - PARALLEL
1 - DAISY CHAIN (FOR USE WITH 5-WIRE JTAG)
PER RADAR #6755237
42
35 10 7 4 =PP1V8_H4
10 7 4 =PP1V8_H4
=PP1V1_USB_H4
C0609
0.01UF
10%
2 6.3V
X5R
01005
10%
6.3V
2 X5R
01005
BB
R0620
35
1UF
10%
6.3V
2 X5R
01005
C0608
=PP1V1_MIPI_PLL_H4
0201
C0622
PP1V1_PL0_F
HSIC1_VDD121 K30
HSIC1_VDD122 J30
HSIC1_DVDD H32
C0632
10%
6.3V
2 X5R
01005
RST_AP_L
0%
1/32W
MF
01005
10%
2 6.3V
X5R
01005
45
0.01UF
IN
0.00 2
C0604
0.01UF
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
4 35
R0606
1
=PP1V2_HSIC_H4
1
45 37 30 27
0.01UF
10%
2 6.3V
X5R
01005
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
=PP1V1_PLL_H4
0%
1/32W
MF
01005
PP1V1_PL5_F
45
0.00 2
C0603
=PP1V1_HSIC_H4
0.01UF
35 4
1
1
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
C0607
10%
2 6.3V
X5R
01005
10%
6.3V
2 X5R
01005
35
45
PP1V1_PL1_F
45
35
C0602
0.01UF
0%
1/32W
MF
01005
35
PP1V1_PL2_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
10%
6.3V
2 X5R
01005
R0604
1
C0601
PP1V1_PL4_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
0.01UF
R0603
1
C0600
0.01UF
0%
1/32W
MF
01005
45
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
10%
2 6.3V
X5R
01005
R0602
PP1V1_PL3_F
MIPI_VSS
VSS
R0605
0.00 2
H24
H25
H26
H27
H28
H29
VSS
HSIC0_VDD121 P29
HSIC0_VDD122 P31
HSIC0_DVDD N31
(11 OF 12)
=PP1V1_PLL_H4
PLL0_AVSS11
PLL1_AVSS11
PLL2_AVSS11
PLL3_AVSS11
PLL4_AVSS11
PLL5_AVSS11
FCBGA
OMIT
35 4
V32
U32
T32
R32
P32
N32
H4G
AJ34
AK2
AL1
AM3
AM8
AM19
AM22
AM25
AM28
AM32
AM34
AN7
AN10
AN13
AN16
AP1
AP2
AP6
AP9
AP12
AP15
AP18
AP22
AP25
AP28
AP31
AP34
AP35
AR1
AR2
AR5
AR8
AR11
AR14
AR17
AR19
AR34
AR35
B1
B2
B4
B9
B12
B15
B34
B35
C7
C10
C13
C16
C30
C31
C32
C33
D3
D5
D8
D11
D14
D17
D30
D33
E1
E10
E21
E22
E24
E25
E26
E27
E28
E29
E30
E33
F2
F5
F16
F17
F21
F22
F24
F33
G3
G17
G18
G19
G20
G21
K29 HSIC1_VSS121
J29 HSIC1_VSS122
H31 HSIC1_DVSS
U0600
P28 HSIC0_VSS121
P30 HSIC0_VSS122
N30 HSIC0_DVSS
A1
A2
A5
A8
A11
A14
A17
A34
A35
AA2
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AA26
AA35
AB1
AB4
AB8
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AC3
AC8
AC10
AC18
AC20
AC22
AC24
AC28
AC32
AC34
AD2
AD8
AD9
AD11
AD19
AD21
AD23
AD25
AD27
AD29
AE1
AE8
AE9
AE10
AE18
AE20
AE22
AE24
AE26
AF3
AF8
AF9
AF27
AF30
AF32
AF34
AG2
AG8
AG9
AH1
AH8
AH9
AH10
AH11
AH12
AH17
AH22
AH25
AH26
AJ5
AJ13
AJ20
AJ29
AJ32
44.2
1%
1/20W
MF
2 201
44.2
1%
1/20W
MF
2 201
SYNC_MASTER=MIKE
PAGE TITLE
SYNC_DATE=N/A
AP: MAIN
DRAWING NUMBER
Apple Inc.
051-8773
REVISION
10.0.0
BRANCH
PAGE
6 OF 157
SHEET
4 OF 48
SIZE
OMIT
U0600
H4G
U0600
R0700
D
42 19
OUT
I2S0_ASP_MCK_R 1
CODEC ASP
42 19
OUT
42 19
OUT
42 19
IN
42 19
OUT
1/32W
MF
01005
42 I2S0_ASP_MCK
I2S0_ASP_BCLK
I2S0_ASP_LRCK
I2S0_ASP_DIN
I2S0_ASP_DOUT
NOT USED
46
NC_I2S1_MCK
46
NC_I2S1_BCLK
NC_I2S1_LRCK
46
46
NC_I2S1_DIN
46
NC_I2S1_DOUT
NC_I2S2_MCK
46
42 19 15
42 19 15
42 19 15
42 19 15
I2S2_VSP_BCLK
OUT I2S2_VSP_LRCK
I2S2_VSP_DIN
IN
OUT I2S2_VSP_DOUT
OUT
NC_I2S3_MCK
46
CODEC XSP
I2S3_XSP_BCLK
I2S3_XSP_LRCK
I2S3_XSP_DIN
IN
OUT I2S3_XSP_DOUT
42 19
OUT
42 19
OUT
42 19
42 19
46
OMIT
H4G
33.2
1%
NC_AP_GPIO216
AR26
AG24
AP26
AK25
AL25
AC15
AC17
AC14
AC16
AF26
AK27
AF24
AN26
AG25
AM26
AP27
AN27
AF25
AK26
AL26
FCBGA
(3 OF 12)
I2S0_MCK
I2C0_SCL
I2S0_BCLK
I2C0_SDA
I2S0_LRCK
I2S0_DIN
I2C1_SCL
I2S0_DOUT
I2C1_SDA
AJ23
AK23
I2C0_SCL_1V8
I2C0_SDA_1V8
AN24
AR25
I2C1_SCL_1V8
I2C1_SDA_1V8
I2C2_SCL AH21
I2C2_SDA AK21
I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT
SWI_DATA AC13
DWI_CLK AN25
DWI_DI AM24
DWI_DO AG23
I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT
SDIO0_CLK
SDIO0_CMD
SDIO0_DATA0
SDIO0_DATA1
SDIO0_DATA2
SDIO0_DATA3
I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT
AL27
AR31
AK28
AL28
AM29
AM30
BI
OUT
BI
OUT
I2C2_SCL_3V0
I2C2_SDA_3V0
NC_SWI_AP
BI
OUT
IN
37 24 5
IN
42 30
IN
10 19 22 37 42
10 25 42
TO SENSOR BOARD
37
IN
15
OUT
19
30 5
25 42
IN
10
IN
OUT
37 42
IN
37 42
OUT
37 42
10
IN
U6
W5
T6
W8
46
NC_SPI_FLASH_CS_L
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
AL30
AL29
AN32
AP33
42 17
42 17
42 17
42 17
IN SPI1_GRAPE_MISO
OUT SPI1_GRAPE_MOSI
OUT SPI1_GRAPE_SCLK
OUT SPI1_GRAPE_CS_L
AF20
AF19
AG20
AM21
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
THERM_TEST_OUT
THERM_RES_EXT
VDDA18_TS
VSSA18_TS
AF23
AL23
AH23
AM23
46
NC_AP_GPIO7
46
NC_AP_GPIO8
PM_RADIO_ON
RST_DET_L
46
IN
SPI2_IPC_SRDY
IN
45 30 15
IN
AUD_VOL_DOWN_L
GSM_TXBURST_IND
46
IN
BOOT_CONFIG_0
24
IN
46
NC_SDIO0_WL_DATA<0>
46
NC_SDIO0_WL_DATA<1>
46
NC_SDIO0_WL_DATA<2>
46
NC_SDIO0_WL_DATA<3>
46
NC_SPI3_MISO
46
NC_SPI3_MOSI
46
NC_SPI3_SCLK
46
NC_SPI3_CS_L
46
18
OUT
37 5
OUT
30
OUT
30
IN
10
IN
39 5
IN
OUT
10
IN
10
IN
42 15 5
IN
SPI2_IPC_MISO
SPI2_IPC_MOSI
SPI2_IPC_SCLK
IN
30 42
OUT
30 42
OUT
30 42
26
42 5
46
26
OUT
5 30 42
25
26
20
R0720
100K
R1030
11
5%
1/20W
MF
2 201
100K
1%
1/32W
MF
2 01005
NC_AP_GPIO31
OUT IRQ_PROX_INT_L
IN IRQ_GYRO_INT1
HSIC_HOST_READY_WL
OUT
TO BB
HSIC_HOST_RDY
AJ16 TP_THERM_TEST_OUT
AK16 THERM_RES_EXT
AF16
AG16
FILE A RADAR
NC_AP_GPIO19
AUD_VOL_UP_L
IRQ_GRAPE_HOST_INT_L
PM_KEEPACT
BB_EMERGENCY_DWLD
IPC_GPIO_X26
BOOT_CONFIG_1
FORCE_DFU
DFU_STATUS
BOOT_CONFIG_2
BOOT_CONFIG_3
HSIC_WLAN_RDY
46
NC_BOARD_ID_3
OUT IRQ_GYRO_INT2
10
46
NC_SDIO0_WL_CMD
NC_AP_GPIO13
26 5
46
NC_SDIO0_WL_CLK
NC_AP_GPIO11
24
42 30
26
TO GRAPE
3.0V IO
IN
NC_AP_GPIO3
IRQ_PMU_L
PM_BT_WAKE
IRQ_CODEC_L
46
AG27 SPDIF
BOARD_ID_2
BOARD_ID_1
BOARD_ID_0
OUT
45 30
10
IN
10 25 42
25 42
HOME_EMI_L
ONOFF_L
HSIC_BB_RDY
46
10 19 22 37 42
46
DWI_AP_CLK
DWI_AP_DI
DWI_AP_DO
37 28 5
NC_AP_GPIO35
IRQ_ACCEL_INT1_L
IN IRQ_ALS_INT_L
IN IRQ_ACCEL_INT2_L
OUT AUD_SPKRAMP_MUTE_L
IN
OUT PORT_DOCK_VIDEO_AMP_EN
46
NC_AP_GPIO3V1
AJ14
AK15
AL16
AG14
AP19
AH13
AH16
AE13
AE12
AH15
AG17
AD13
AK17
AE14
AL17
AF17
AL18
AK18
AJ18
AD12
AH18
AF18
AM18
AN18
AN19
AG18
AP20
AN20
AR20
AR21
AP21
AK19
AN21
AH19
AG19
AJ19
AR22
AL20
AM20
AN22
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
FCBGA
(2 OF 12)
EHCI_PORT_PWR0 AG26
EHCI_PORT_PWR1 AE15
EHCI_PORT_PWR2 AE16
GPIO40_BRD_REV0
GPIO41_BRD_REV1
GPIO42_BRD_REV2
TMR32_PWM0 AD16
TMR32_PWM1 AD14
TMR32_PWM2 AC12
TP_LED_STROBE_EN
NC_AP_GPIO185
46
NC_AP_GPIO186
46
IN
10
IN
10
IN
10
UART0_RXD AH14
UART0_TXD AG15
UART0_AP_RXD
UART0_AP_TXD
IN
15 42
OUT
15 42
UART1_CTSN AP23
UART1_RTSN AL21
UART1_BB_CTS_L
UART1_BB_RTS_L
IN
30 42
OUT
30 42
UART1_RXD AG21
UART1_TXD AF21
UART1_BB_RXD
UART1_BB_TXD
IN
30 42
UART2_CTSN U5
UART2_RTSN T7
NC_UART2_RXD
46
NC_UART2_TXD
46
UART3_CTSN AG22
UART3_RTSN AJ21
UART3_BT_CTS_L
UART3_BT_RTS_L
UART3_RXD AR24
UART3_TXD AR23
UART3_BT_RXD
UART3_BT_TXD
UART4_CTSN Y6
UART4_RTSN Y7
15 42
IN
15 42
OUT
15 42
BATTERY_SWI OUT
34 37
46
NC_UART4_RXD
46
NC_UART4_TXD
46
UART6_CTSN U9
UART6_RTSN V6
NC_UART6_CTSN
46
NC_UART6_RTSN
46
UART6_RXD U7
UART6_TXD V7
30 45
15 42
46
UART5_RTXD AL22
5 24 37
IN
NC_UART4_RTS_L
UART4_RXD W7
UART4_TXD Y5
AN31 GPIO_3V0
AP32 GPIO_3V1
30 42
OUT
OUT
NC_UART4_CTS_L
UART6_WLAN_RXD
UART6_WLAN_TXD
TO DOCK MUX
TO BB USART
SRL_L IN
RST_BB_L OUT
UART2_RXD U8
UART2_TXD T5
TO BT UART
IN
15 42
OUT
15 42
R1180
45
PP1V8_VDDA18_TS
0.00 2
=PP1V8_VDDA18_TS
35
0%
1/32W
MF
01005
1
C1188
0.01UF
10%
6.3V
2 X5R
01005
PM_KEEPACT
IRQ_GYRO_INT2
FORCE_DFU
DFU_STATUS
PM_RADIO_ON
5 37
5 26
5 39
5
5 30
NOSTUFF
R0730
42 30 5
HSIC_HOST_RDY
R0711
0.00 2
0%
1/32W
MF
01005
35 9
HSIC_HOST_READY_WLAN
=PP1V8_VDDIOD_H4
NOSTUFF
15 42
HSIC_HOST_READY_WL
R08851
5%
1/20W
MF
2 201
R0712
100K
5%
1/32W
MF
2 01005
R0713
100K
5%
1/20W
MF
2 201
R0714
100K
5%
1/20W
MF
2 201
R0715
100K
5%
1/20W
MF
2 201
R07221
R0731
42 5
100K
0.00 2
1
100K
1%
1/20W
MF
201 2
0%
1/32W
MF
01005
100K
HSIC_WLAN_RDY
42 15 5
5%
1/20W
MF
201 2
R0708
=PP1V8_S2R_MISC
39 35 27 5
37 28 5
220K 2
HOME_EMI_L
5%
1/20W
MF
201
R0709
35
=PP1V8_ALWAYS 1
37 24 5
220K 2
SYNC_MASTER=JOE
PAGE TITLE
ONOFF_L
DRAWING NUMBER
Apple Inc.
R0710
39 35 27 5
=PP1V8_S2R_MISC
37 24 5
SRL_L
SYNC_DATE=N/A
AP: I/Os
5%
1/20W
MF
201
220K 2
051-8773
REVISION
10.0.0
5%
1/20W
MF
201
BRANCH
PAGE
7 OF 157
SHEET
5 OF 48
SIZE
5
45 9 6
G22
G23
G30
H1
H4
H8
H9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H20
H21
H22
H23
H30
H34
J2
J8
J9
J10
J11
J12
J14
J16
J18
J20
J22
J24
J26
J31
J34
K3
K8
K9
K10
K11
K13
K15
K17
K19
K21
K23
K25
K27
K34
L32
L1
L4
L8
L10
L12
L14
L16
L18
L20
L22
L24
L26
M2
M3
M8
M9
M11
M13
M15
M17
M19
M21
M23
M25
M27
M30
L34
N3
N8
N10
N12
N14
N16
N18
N20
N22
N24
N26
U0600
OMIT
H4G
FCBGA
(12 OF 12)
VSS
VSS
M35
P1
P8
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
R2
R8
R10
R12
R14
R16
R18
R20
R22
R24
R26
P34
T3
T9
T11
T13
T15
T17
T19
T21
T23
T25
T27
R35
U1
U10
U12
U14
U16
U18
U20
U22
U24
U26
U30
U31
V9
V11
V13
V15
V17
V19
V21
V23
V25
V27
V29
U34
V35
W1
W3
W10
W12
W14
W16
W18
W20
W22
W24
W26
W34
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y28
Y31
R0832
100K
5%
1/32W
MF
2 01005
44 12 6
44 12 6
44 12 6
PPIO_NAND_H4
1
44 12 6
R0836
100K
5%
1/32W
MF
2 01005
45 9 6
R0831 1R0834
100K
PPIO_NAND_H4
NOSTUFF
100K
5%
1/32W
MF
2 01005
NOSTUFF
R0800 1R0801
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
FMI1_CE0_L
FMI1_CE1_L
FMI0_CE0_L
FMI0_CE1_L
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
100K
5%
1/32W
MF
2 01005
R0802
100K
5%
1/32W
MF
2 01005
NOSTUFF
R0803
100K
5%
1/32W
MF
2 01005
FMI0_WE_L
FMI0_RE_N
FMI1_WE_L
FMI1_RE_N
FMI0_ALE
FMI0_CLE
FMI1_ALE
FMI1_CLE
NOSTUFF
R0810
100K
5%
1/32W
MF
2 01005
35 28
NOSTUFF
1
NOSTUFF
R0811
100K
5%
1/32W
MF
2 01005
NOSTUFF
NOSTUFF
R0812 1R0813
100K
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
=PP3V0_IO_MISC
C
R0804
U0600
100K
OMIT
5%
1/32W
MF
2 01005
H4G
FCBGA
(4 OF 12)
44 12 6
OUT
44 12 6
OUT
46
46
46
46
46
46
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12 6
OUT
44 12 6
OUT
44 12 6
OUT
44 12 6
OUT
44 12
OUT
44 12 6
OUT
44 12 6
OUT
46
46
46
46
46
46
Y34
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12
BI
44 12 6
OUT
44 12 6
OUT
44 12 6
OUT
44 12 6
OUT
44 12
OUT
FMI0_CE0_L
FMI0_CE1_L
NC_FMI0_CE2_L
NC_FMI0_CE3_L
NC_FMI0_CE4_L
NC_FMI0_CE5_L
NC_FMI0_CE6_L
NC_FMI0_CE7_L
AH31
AF31
AD28
AG29
Y29
AH28
AG28
AM31
FMI0_CEN0
FMI0_CEN1
FMI0_CEN2
FMI0_CEN3
FMI0_CEN4
FMI0_CEN5
FMI0_CEN6
FMI0_CEN7
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
AG35
AF35
AH35
AH33
AG31
AG32
AG34
AH32
FMI0_ALE
FMI0_CLE
FMI0_WE_L
FMI0_RE_N
FMI0_DQS_P
FMI2-3_CEN IS 3.0V
FMI2_CEN0
FMI2_CEN1
FMI2_CEN2
FMI2_CEN3
FMI2_CEN4
FMI2_CEN5
FMI2_CEN6
FMI2_CEN7
AE35
AB28
AA28
AB30
AE28
AF28
AA29
AB31
SPK_ID
IN 20
NC_FMI2_CE1_L 46
NC_FMI2_CE2_L 46
NC_FMI2_CE3_L 46
PM_LCDVDD_PWREN
NEW GPIO FOR J2. FILE A RADAR
OUT 16
NC_FMI2_CE5_L 46
RST_GRAPE_L OUT 17 45
CHECK WITH GRAPE ON VOLTAGE FOR THESE TWO SIGNALS
GRAPE_FW_DNLD_EN_L OUT 17
FMI0_IO0
FMI0_IO1
FMI0_IO2
FMI0_IO3
FMI0_IO4
FMI0_IO5
FMI0_IO6
FMI0_IO7
FMI2_IO0
FMI2_IO1
FMI2_IO2
FMI2_IO3
FMI2_IO4
FMI2_IO5
FMI2_IO6
FMI2_IO7
AC31
AB33
AC35
AE34
AD34
AD32
AD35
AD31
NC_FMI2_AD<0> 46
NC_FMI2_AD<1> 46
NC_FMI2_AD<2> 46
NC_FMI2_AD<3> 46
NC_FMI2_AD<4> 46
NC_FMI2_AD<5> 46
NC_FMI2_AD<6> 46
NC_FMI2_AD<7> 46
AE32
AF33
AH34
AE33
AG33
FMI0_ALE
FMI0_CLE
FMI0_WEN
FMI0_REN
FMI0_DQS
FMI2_ALE
FMI2_CLE
FMI2_WEN
FMI2_REN
FMI2_DQS
AB34
AB32
AB35
AD33
AC33
NC_FMI2_ALE
NC_FMI2_CLE
NC_FMI2_WE_L
NC_FMI2_RE_L
NC_FMI2_DQS
FMI1_CE0_L
FMI1_CE1_L
NC_FMI1_CE2_L
NC_FMI1_CE3_L
NC_FMI1_CE4_L
NC_FMI1_CE5_L
NC_FMI1_CE6_L
NC_FMI1_CE7_L
AJ33
AN33
AD30
AE30
AJ31
AJ30
AL31
AK31
FMI1_CEN0
FMI1_CEN1
FMI1_CEN2
FMI1_CEN3
FMI1_CEN4
FMI1_CEN5
FMI1_CEN6
FMI1_CEN7
FMI3_CEN0
FMI3_CEN1
FMI3_CEN2
FMI3_CEN3
FMI3_CEN4
FMI3_CEN5
FMI3_CEN6
FMI3_CEN7
W31
W28
W29
V30
AG30
AC30
AH30
AE31
NC_FMI3_CE0_L 46
NC_FMI3_CE1_L 46
NC_FMI3_CE2_L 46
NC_FMI3_CE3_L 46
NC_FMI3_CE4_L 46
NC_FMI3_CE5_L 46
NC_FMI3_CE6_L 46
NC_FMI3_CE7_L 46
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
AL32
AN35
AK32
AK33
AL33
AK34
AM33
AJ35
FMI1_IO0
FMI1_IO1
FMI1_IO2
FMI1_IO3
FMI1_IO4
FMI1_IO5
FMI1_IO6
FMI1_IO7
FMI3_IO0
FMI3_IO1
FMI3_IO2
FMI3_IO3
FMI3_IO4
FMI3_IO5
FMI3_IO6
FMI3_IO7
AA34
W33
AA33
V34
AA30
V31
W32
Y30
NC_FMI3_AD<0> 46
NC_FMI3_AD<1> 46
NC_FMI3_AD<2> 46
NC_FMI3_AD<3> 46
NC_FMI3_AD<4> 46
NC_FMI3_AD<5> 46
NC_FMI3_AD<6> 46
NC_FMI3_AD<7> 46
FMI1_ALE
FMI1_CLE
FMI1_WE_L
FMI1_RE_N
FMI1_DQS_P
AN34
AK35
AM35
AL35
AL34
FMI1_ALE
FMI1_CLE
FMI1_WEN
FMI1_REN
FMI1_DQS
FMI3_ALE
FMI3_CLE
FMI3_WEN
FMI3_REN
FMI3_DQS
Y33
W30
AA32
AA31
Y32
NC_FMI3_ALE
NC_FMI3_CLE
NC_FMI3_WE_L
NC_FMI3_RE_L
NC_FMI3_DQS
46
46
46
46
46
46
46
SYNC_MASTER=MIKE
46
PAGE TITLE
46
SYNC_DATE=N/A
AP: NAND
46
DRAWING NUMBER
Apple Inc.
051-8773
REVISION
10.0.0
BRANCH
PAGE
8 OF 157
SHEET
6 OF 48
SIZE
R0910
45
PP1V8_DP_AVDD_AUX
1
0.22UF
C0926
0.22UF
20%
6.3V
2 X5R
402
35 9
C0925
0.22UF
20%
6.3V
2 X5R
402
C0924
56PF
20%
6.3V
2 X5R
402
5%
6.3V
2 NP0-C0G
01005
=PP3V0_IO_H4
1
0.1UF
45
10%
2 6.3V
X5R
201
35 7
=PP1V8_MIPI_H4
1
PP0V4_MIPI1D
21MA
H4G
45
43 25
OUT
43 25
OUT
46 43
46 43
46 43
46 43
43 25
43 25
OUT
OUT
MIPI0C_AP_DATA_P<1>
MIPI0C_AP_DATA_N<1>
B33 MIPI0C_DPDATA1
B32 MIPI0C_DNDATA1
NC_MIPI0C_AP_DATA_P<2>
NC_MIPI0C_AP_DATA_N<2>
B31 MIPI0C_DPDATA2
B30 MIPI0C_DNDATA2
NC_MIPI0C_AP_DATA_P<3>
NC_MIPI0C_AP_DATA_N<3>
A31 MIPI0C_DPDATA3
A30 MIPI0C_DNDATA3
MIPI0C_AP_CLK_P
MIPI0C_AP_CLK_N
ISP1_FLASH
ISP1_PRE_FLASH
ISP1_SCL
ISP1_SDA
AF14
AE17
AP24
AN23
CAM0_RESET_L
26
TP_CAM0_1V2_VDDCORE_EN
ISP_AP_0_SCL
OUT 25 42
ISP_AP_0_SDA
BI 25 42
NC_ISP_AP_1_FLASH
NC_ISP_AP_1_PRE_FLASH
01005
0.00 2
A33 MIPI0C_DPCLK
A32 MIPI0C_DNCLK
MIPI1C_DPDATA0 F34
MIPI1C_DNDATA0 E34
MIPI1C_DPDATA1 D34
MIPI1C_DNDATA1 C34
MIPI1C_DPCLK F35
MIPI1C_DNCLK E35
0.1UF
10%
2 6.3V
X5R
201
DAC_AP_IREF
F31 DAC_IREF
U0600
FCBGA
(5 OF 12)
R0950
OMIT
172MA
35
C0930
56PF
5%
6.3V
2 NP0-C0G
01005
35
C0910
10%
2 6.3V
X5R
201
DAC_AP_OUT3
DAC_AP_OUT2
DAC_AP_OUT1
R0955
200
1%
1/20W
MF
2 201
5MA
2MA
DAC_OUT3 G33
DAC_OUT2 G34
DAC_OUT1 G35
5MA
H4G
6.34K
1%
1/20W
MF
2 201
B18
A18
E19
E18
C26
C25
D24
D23
E31 DAC_VREF
5%
6.3V
2 NP0-C0G
01005
=PP1V8_EDP_H4
DP_HPD AL15
DP_AP_HPD
R0956
200
1%
1/20W
MF
2 201
OUT
11 43
OUT
11 43
OUT
11 43
R0957
200
1%
1/20W
MF
2 201
IN
37 43
DP_PAD_AUXP C28
DP_PAD_AUXN C27
DP_AP_AUX_P
DP_AP_AUX_N
OUT
28 43
OUT
28 43
DP_PAD_TX0P A28
DP_PAD_TX0N A27
DP_AP_TX_P<0>
DP_AP_TX_N<0>
OUT
28 43
OUT
28 43
DP_PAD_TX1P D26
DP_PAD_TX1N D25
DP_AP_TX_P<1>
DP_AP_TX_N<1>
OUT
28 43
OUT
28 43
DP_PAD_TX2P B26
DP_PAD_TX2N B25
DP_AP_TX_P<2>
DP_AP_TX_N<2>
OUT
28 43
OUT
28 43
DP_PAD_TX3P C24
DP_PAD_TX3N C23
46
1
0%
SENSOR1_CLK AH24 42 CLK_CAM_FF_R
1/32W
SENSOR1_RST AL24
C0955
DAC_AP_VREF
46
ISP_AP_1_SCL
ISP_AP_1_SDA
5%
1/20W
MF
201
CLK_CAM_RF
PM_REAR_CAM_SHUTDOWN
BI
25 42
25 42
NOSTUFF
25 42
25
10%
6.3V
2 X5R
01005
CLK_CAM_FF 25 42
PM_FRONT_CAM_SHUTDOWN 25
MIPI1C_AP_DATA_P<0> OUT
MIPI1C_AP_DATA_N<0> OUT
C0950
0.01UF
R0940
MF
01005
NC_MIPI1C_AP_DATA_P<1> 43
NC_MIPI1C_AP_DATA_N<1> 43
OUT
E23 DP_PAD_R_BIAS
R0920
4.99K
1%
1/32W
MF
2 01005
25 43
25 43
46
EDP_HPD AJ15
46
MIPI1C_AP_CLK_P
MIPI1C_AP_CLK_N
OUT
25 43
OUT
25 43
TP_EDP_AP_ANALOG_TEST
C0957
0.01UF
IN
16 43
EDP_AP_AUX_P
EDP_AP_AUX_N
OUT
16 43
OUT
16 43
EDP_PAD_TX0P D22
EDP_PAD_TX0N D21
EDP_AP_TX_P<0>
EDP_AP_TX_N<0>
OUT
16 43
OUT
16 43
EDP_PAD_TX1P B22
EDP_PAD_TX1N B21
EDP_AP_TX_P<1>
EDP_AP_TX_N<1>
OUT
16 43
OUT
16 43
EDP_PAD_TX2P C20
EDP_PAD_TX2N C19
EDP_AP_TX_P<2>
EDP_AP_TX_N<2>
OUT
16 43
OUT
16 43
EDP_PAD_TX3P A20
EDP_PAD_TX3N A19
EDP_AP_TX_P<3>
EDP_AP_TX_N<3>
OUT
16 43
OUT
16 43
E20 EDP_PAD_R_BIAS
R0921
4.99K
1%
1/32W
MF
2 01005
G32 DAC_AVSS30A1
F32 DAC_AVSS30A2
10%
2 6.3V
X5R
01005
F20 EDP_PAD_DC_TP
EDP_AP_HPD
EDP_PAD_AUXP A24
EDP_PAD_AUXN A23
A22 EDP_PAD_DVSS
OUT
D35 MIPI0C_DPDATA0
C35 MIPI0C_DNDATA0
AD17
AF13
AK22
AF22
2MA
5MA
56PF
1.2MA
A21 EDP_PAD_AVSSX
43 25
MIPI0C_AP_DATA_P<0>
MIPI0C_AP_DATA_N<0>
ISP0_FLASH
ISP0_PRE_FLASH
ISP0_SCL
ISP0_SDA
5MA
B20 EDP_PAD_AVSS_AUX
OUT
AD15 MIPI_VSYNC
332MA
1.2MA
B19 EDP_PAD_AVSSP0
43 25
NC_MIPI_VSYNC_H4
6MA
EDP_PAD_DVDD C22
5%
1/32W
MF
2 01005
FCBGA
(6 OF 12)
46
20%
6.3V
2 X5R
402
C0931
=PP1V1_EDP_PAD_DVDD_H4
EDP_PAD_AVDDX C21
1.00K
EDP_PAD_AVDDP0 D19
5%
1/32W
MF
2 01005
EDP_PAD_AVDD
1.00K
EDP_PAD_AVDD_AUX D20
5%
1/32W
MF
2 01005
EDP_PAD_AVSS
4MA
1.00K
R0933
DP_PAD_DVDD A29
5%
1/32W
MF
2 01005
R0932
10%
6.3V
2 X5R
201
D18
C18
F19
F18
U0600
1.00K
R0931
0.1UF
4 10 35
DP_PAD_AVDDX B29
OMIT
R0930
C0956
0.22UF
0.1UF
C29 DP_PAD_DVSS
14MA
DP_PAD_AVDDP0 D27
MIPI_VDD11
=PP1V8_H4
C0932
D29 DP_PAD_AVSSX
DAC_AP_COMP_FTR
B27 DP_PAD_AVSSP0
10%
10V
2 X5R
201
=PP3V0_VIDEO_H4
20%
6.3V
2 X5R
402
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
DP_PAD_AVDD
2.2NF
0.01UF
10%
6.3V
2 X5R
01005
FL0910
0.22UF
20%
6.3V
2 X5R
402
C0952
DP_PAD_AVSS
10%
10V
2 X5R
201
C0961
R0911
1
C0933
0201
MIPI0D_VDD18 F25
MIPI1D_VDD18 F28
2.2NF
240-OHM-0.2A-0.8-OHM
35 7
G24
G25
G26
G27
G28
G29
C0960
C0951
1UF
C0934
0.22UF
10%
6.3V
2 CERM
402
C0907
10%
6.3V
2 X5R
201
MIPI0D_VREG_0P4V F26
MIPI1D_VREG_0P4V F29
35
PP0V4_MIPI0D
VOLTAGE=0.4V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
=PP3V0_VIDEO_H4
0.1UF
VOLTAGE=0.4V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
45
PP1V8_EDP_AVDD_AUX
1
A26
A25
B24
B23
45
35
C0909
C0903
DP_PAD_AVDD_AUX D28
10%
2 6.3V
X5R
201
DAC_AVDD30D D32
C0908
0.1UF
10%
2 6.3V
CERM
402
B28 DP_PAD_AVSS_AUX
1UF
DAC_AVDD30A G31
C0935
56PF
5%
6.3V
2 NP0-C0G
01005
10%
6.3V
2 X5R
201
D31 DAC_AVSS30D
35
C0923
0.1UF
10%
6.3V
2 X5R
01005
=PP1V1_MIPI_H4
=PP1V8_DP_H4
5%
1/20W
MF
201
=PP1V1_DP_PAD_DVDD_H4
C0953
0.01UF
35
C0927
SYNC_MASTER=JOE
PAGE TITLE
SYNC_DATE=01/13/2011
AP: TV,DP,MIPI
DRAWING NUMBER
Apple Inc.
051-8773
REVISION
10.0.0
BRANCH
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
132S0279
132S0154
BOM OPTION
REF DES
COMMENTS:
C0960,C0961
RADAR:9624625
TABLE_ALT_ITEM
PAGE
9 OF 157
SHEET
7 OF 48
SIZE
44 40 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 40 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
DDR1_CA<0>
DDR1_CA<1>
DDR1_CA<2>
DDR1_CA<3>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<6>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CA<9>
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<2>
DDR0_DM<3>
E12
E9
C14
D6
DDR0_DM0
DDR0_DM1
DDR0_DM2
DDR0_DM3
DDR1_DM0
DDR1_DM1
DDR1_DM2
DDR1_DM3
L5
N5
G4
R5
DDR1_DM<0>
DDR1_DM<1>
DDR1_DM<2>
DDR1_DM<3>
DDR0_DQS_P<0>
DDR0_DQS_N<0>
DDR0_DQS_P<1>
DDR0_DQS_N<1>
DDR0_DQS_P<2>
DDR0_DQS_N<2>
DDR0_DQS_P<3>
DDR0_DQS_N<3>
A13
A12
A6
A7
A16
A15
A3
A4
DDR0_PDQS0
DDR0_NDQS0
DDR0_PDQS1
DDR0_NDQS1
DDR0_PDQS2
DDR0_NDQS2
DDR0_PDQS3
DDR0_NDQS3
DDR1_PDQS0
DDR1_NDQS0
DDR1_PDQS1
DDR1_NDQS1
DDR1_PDQS2
DDR1_NDQS2
DDR1_PDQS3
DDR1_NDQS3
F1
G1
N1
M1
C1
D1
T1
R1
DDR1_DQS_P<0>
DDR1_DQS_N<0>
DDR1_DQS_P<1>
DDR1_DQS_N<1>
DDR1_DQS_P<2>
DDR1_DQS_N<2>
DDR1_DQS_P<3>
DDR1_DQS_N<3>
DDR0_CK_P
OUT
DDR0_CK_N
OUT
DDR0_CKE<0>
OUT
46 NC_DDR0_CKE<1>
35 8 =PP1V2_S2R_H4
DDR0_CSN<0>
OUT
NC_DDR0_CSN<1>
46
PPVREF_DDR0_DQ_H4
45 8
H4G_DDR0_ZQ
P4
N4
J1
K1
G11
K6
J6
D10
M4
DDR0_CK
DDR0_CKB
DDR0_CKE0
DDR0_CKE1
DDR0_VDDQ_CKE
DDR0_CSN0
DDR0_CSN1
DDR0_VREF_DQ
DDR0_ZQ
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
44 13
OUT
OUT
44 40 13
BI
BI
44 13
BI
44 40 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
BI
44 13
R1020
F11
F12
A10
A9
N7
F10
E13
L3
E11
1.00K
10%
6.3V
2 X5R
01005
1.00K
1%
1/32W
MF
2 01005
0.01UF
10%
6.3V
2 X5R
01005
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
OUT
13 44
44 14
OUT
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
BI
13 44
44 14
BI
13 44
44 14
OUT
13 44
44 14
OUT
13 44
44 14
OUT
13 44
44 14
OUT
35 8
46
45
45 8
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
U0600
DDR3_DQ0
DDR3_DQ1
DDR3_DQ2
DDR3_DQ3
DDR3_DQ4
DDR3_DQ5
DDR3_DQ6
DDR3_DQ7
DDR3_DQ8
DDR3_DQ9
DDR3_DQ10
DDR3_DQ11
DDR3_DQ12
DDR3_DQ13
DDR3_DQ14
DDR3_DQ15
DDR3_DQ16
DDR3_DQ17
DDR3_DQ18
DDR3_DQ19
DDR3_DQ20
DDR3_DQ21
DDR3_DQ22
DDR3_DQ23
DDR3_DQ24
DDR3_DQ25
DDR3_DQ26
DDR3_DQ27
DDR3_DQ28
DDR3_DQ29
DDR3_DQ30
DDR3_DQ31
H4G
FCBGA
(8 OF 12)
OMIT
AP7
AM7
AP8
AN8
AN9
AP10
AP11
AN11
AN12
AM10
AL10
AP13
AP14
AM14
AL14
AN14
AP4
AP3
AN4
AM4
AP5
AN5
AN6
AM5
AN15
AM15
AP16
AM16
AR18
AP17
AN17
AM17
DDR3_DQ<0>
DDR3_DQ<1>
DDR3_DQ<2>
DDR3_DQ<3>
DDR3_DQ<4>
DDR3_DQ<5>
DDR3_DQ<6>
DDR3_DQ<7>
DDR3_DQ<8>
DDR3_DQ<9>
DDR3_DQ<10>
DDR3_DQ<11>
DDR3_DQ<12>
DDR3_DQ<13>
DDR3_DQ<14>
DDR3_DQ<15>
DDR3_DQ<16>
DDR3_DQ<17>
DDR3_DQ<18>
DDR3_DQ<19>
DDR3_DQ<20>
DDR3_DQ<21>
DDR3_DQ<22>
DDR3_DQ<23>
DDR3_DQ<24>
DDR3_DQ<25>
DDR3_DQ<26>
DDR3_DQ<27>
DDR3_DQ<28>
DDR3_DQ<29>
DDR3_DQ<30>
DDR3_DQ<31>
DDR2_CA<0>
DDR2_CA<1>
DDR2_CA<2>
DDR2_CA<3>
DDR2_CA<4>
DDR2_CA<5>
DDR2_CA<6>
DDR2_CA<7>
DDR2_CA<8>
DDR2_CA<9>
AL6
AK6
AL7
AK7
AL8
AL11
AK11
AK12
AL12
AK13
DDR2_CA0
DDR2_CA1
DDR2_CA2
DDR2_CA3
DDR2_CA4
DDR2_CA5
DDR2_CA6
DDR2_CA7
DDR2_CA8
DDR2_CA9
DDR3_CA0
DDR3_CA1
DDR3_CA2
DDR3_CA3
DDR3_CA4
DDR3_CA5
DDR3_CA6
DDR3_CA7
DDR3_CA8
DDR3_CA9
AB5
AB6
AC5
AC6
AD5
AG5
AG6
AH6
AH5
AJ6
DDR3_CA<0>
DDR3_CA<1>
DDR3_CA<2>
DDR3_CA<3>
DDR3_CA<4>
DDR3_CA<5>
DDR3_CA<6>
DDR3_CA<7>
DDR3_CA<8>
DDR3_CA<9>
DDR2_DM<0>
DDR2_DM<1>
DDR2_DM<2>
DDR2_DM<3>
AD4
AG4
AA6
AK4
DDR2_DM0
DDR2_DM1
DDR2_DM2
DDR2_DM3
DDR3_DM0
DDR3_DM1
DDR3_DM2
DDR3_DM3
AM11
AL13
AM6
AK14
DDR3_DM<0>
DDR3_DM<1>
DDR3_DM<2>
DDR3_DM<3>
DDR2_DQS_P<0>
DDR2_DQS_N<0>
DDR2_DQS_P<1>
DDR2_DQS_N<1>
DDR2_DQS_P<2>
DDR2_DQS_N<2>
DDR2_DQS_P<3>
DDR2_DQS_N<3>
AC1
AD1
AK1
AJ1
Y1
AA1
AN1
AM1
DDR2_PDQS0
DDR2_NDQS0
DDR2_PDQS1
DDR2_NDQS1
DDR2_PDQS2
DDR2_NDQS2
DDR2_PDQS3
DDR2_NDQS3
DDR3_PDQS0
DDR3_NDQS0
DDR3_PDQS1
DDR3_NDQS1
DDR3_PDQS2
DDR3_NDQS2
DDR3_PDQS3
DDR3_NDQS3
AR6
AR7
AR13
AR12
AR3
AR4
AR16
AR15
DDR3_DQS_P<0>
DDR3_DQS_N<0>
DDR3_DQS_P<1>
DDR3_DQS_N<1>
DDR3_DQS_P<2>
DDR3_DQS_N<2>
DDR3_DQS_P<3>
DDR3_DQS_N<3>
DDR3_CK
DDR3_CKB
DDR3_CKE0
DDR3_CKE1
DDR3_VDDQ_CKE
DDR3_CSN0
DDR3_CSN1
DDR3_VREF_DQ
DDR3_ZQ
AH4
AJ4
AF1
AG1
AJ12
AE6
AD6
AM9
AE5
AM13
AM12
AR10
AR9
AE7
AK9
AK8
AE4
AL9
DDR2_CK_P
DDR2_CK_N
DDR2_CKE<0>
46 NC_DDR2_CKE<1>
=PP1V2_S2R_H4
DDR2_CSN<0>
NC_DDR2_CSN<1>
PPVREF_DDR2_DQ_H4
H4G_DDR2_ZQ
R1022
240
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
=PP1V2_VDDIOD_H4
DDR2_CK
DDR2_CKB
DDR2_CKE0
DDR2_CKE1
DDR2_VDDQ_CKE
DDR2_CSN0
DDR2_CSN1
DDR2_VREF_DQ
DDR2_ZQ
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
14 44
BI
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
OUT
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
BI
14 44
14 44
BI
DDR3_CK_P
OUT
DDR3_CK_N
OUT
DDR3_CKE<0>
OUT
NC_DDR3_CKE<1> 46
=PP1V2_S2R_H4 8 35
DDR3_CSN<0>
OUT
NC_DDR3_CSN<1> 46
PPVREF_DDR3_DQ_H4 8
H4G_DDR3_ZQ
1.00K
C1058
R1056
1.00K
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
14 44
14 44
14 44
14 44
45
C1056
10%
6.3V
2 X5R
01005
0.22UF
20%
6.3V
2 X5R
0201
10%
6.3V
2 X5R
01005
NOSTUFF
C1095
0.01UF
1%
1/32W
MF
2 01005
0.01UF
10%
6.3V
2 X5R
01005
R1084
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
1.00K
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
1%
1/32W
MF
2 01005
C1084
0.01UF
10%
6.3V
2 X5R
01005
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
SYNC_MASTER=MIKE
PAGE TITLE
SYNC_DATE=N/A
AP: DDR
PPVREF_DDR3_DQ_H4
8 45
NOSTUFF VOLTAGE=0.6V
1%
1/20W
MF
2 201
=PP1V2_VDDIOD_H4
1.00K
C1085
240
20%
2 6.3V
X5R
0201
R1095
NOSTUFF
R10234
C1023
0.22UF
PPVREF_DDR2_DQ_H4
1
NOSTUFF VOLTAGE=0.6V
0.01UF
C1022
R1083
NOSTUFF
35 9 8
8 45
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
DDR2_DQ0
DDR2_DQ1
DDR2_DQ2
DDR2_DQ3
DDR2_DQ4
DDR2_DQ5
DDR2_DQ6
DDR2_DQ7
DDR2_DQ8
DDR2_DQ9
DDR2_DQ10
DDR2_DQ11
DDR2_DQ12
DDR2_DQ13
DDR2_DQ14
DDR2_DQ15
DDR2_DQ16
DDR2_DQ17
DDR2_DQ18
DDR2_DQ19
DDR2_DQ20
DDR2_DQ21
DDR2_DQ22
DDR2_DQ23
DDR2_DQ24
DDR2_DQ25
DDR2_DQ26
DDR2_DQ27
DDR2_DQ28
DDR2_DQ29
DDR2_DQ30
DDR2_DQ31
240
PPVREF_DDR1_DQ_H4
NOSTUFF VOLTAGE=0.6V
C1054
BI
10%
6.3V
2 X5R
01005
8 45
R1054
44 14
0.01UF
PPVREF_DDR0_DQ_H4
1
13 44
AB2
AB3
AC2
AC4
AE2
AD3
AF2
AE3
AG3
AH2
AH3
AF4
AJ3
AJ2
AK3
AF5
Y2
W2
Y3
W4
Y4
AA3
AA5
AA4
AL2
AL3
AL4
AM2
AN2
AN3
AL5
AK5
DDR2_DQ<0>
DDR2_DQ<1>
DDR2_DQ<2>
DDR2_DQ<3>
DDR2_DQ<4>
DDR2_DQ<5>
DDR2_DQ<6>
DDR2_DQ<7>
DDR2_DQ<8>
DDR2_DQ<9>
DDR2_DQ<10>
DDR2_DQ<11>
DDR2_DQ<12>
DDR2_DQ<13>
DDR2_DQ<14>
DDR2_DQ<15>
DDR2_DQ<16>
DDR2_DQ<17>
DDR2_DQ<18>
DDR2_DQ<19>
DDR2_DQ<20>
DDR2_DQ<21>
DDR2_DQ<22>
DDR2_DQ<23>
DDR2_DQ<24>
DDR2_DQ<25>
DDR2_DQ<26>
DDR2_DQ<27>
DDR2_DQ<28>
DDR2_DQ<29>
DDR2_DQ<30>
DDR2_DQ<31>
1%
1/32W
MF
2 01005
0.01UF
1%
1/32W
MF
2 01005
BI
35 9 8
1.00K
C1057
BI
=PP1V2_VDDIOD_H4
R1055
NOSTUFF
BI
44 14
R1021
20%
2 6.3V
X5R
0201
R1053
44 14
13 44
C1021
0.22UF
35 9 8
13 44
BI
998-3125 0.5MM PT
C1020
=PP1V2_VDDIOD_H4
BI
DDR1_CK_P
OUT
DDR1_CK_N
OUT
DDR1_CKE<0>
OUT
NC_DDR1_CKE<1> 46
=PP1V2_S2R_H4
8 35
DDR1_CSN<0>
OUT
NC_DDR1_CSN<1> 46
PPVREF_DDR1_DQ_H4 8
H4G_DDR1_ZQ
20%
6.3V
2 X5R
0201
1%
1/20W
MF
2 201
DDR1_CK
DDR1_CKB
DDR1_CKE0
DDR1_CKE1
DDR1_VDDQ_CKE
DDR1_CSN0
DDR1_CSN1
DDR1_VREF_DQ
DDR1_ZQ
0.22UF
240
35 9 8
FCBGA
(7 OF 12)
E15
F15
F14
E14
F13
E8
F8
F7
E7
F6
OUT
44 13
H4G
DDR1_DQ<0>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<5>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<8>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<11>
DDR1_DQ<12>
DDR1_DQ<13>
DDR1_DQ<14>
DDR1_DQ<15>
DDR1_DQ<16>
DDR1_DQ<17>
DDR1_DQ<18>
DDR1_DQ<19>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<22>
DDR1_DQ<23>
DDR1_DQ<24>
DDR1_DQ<25>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
DDR1_CA0
DDR1_CA1
DDR1_CA2
DDR1_CA3
DDR1_CA4
DDR1_CA5
DDR1_CA6
DDR1_CA7
DDR1_CA8
DDR1_CA9
OUT
44 13
U0600
H2
H3
J3
J4
K2
L2
K4
K5
N2
P2
P3
R3
U3
T2
U2
R4
C2
D2
E2
E4
E3
F3
F4
G2
R6
T4
U4
V1
V2
V3
V4
V5
DDR0_CA0
DDR0_CA1
DDR0_CA2
DDR0_CA3
DDR0_CA4
DDR0_CA5
DDR0_CA6
DDR0_CA7
DDR0_CA8
DDR0_CA9
44 40 13
OMIT
DDR1_DQ0
DDR1_DQ1
DDR1_DQ2
DDR1_DQ3
DDR1_DQ4
DDR1_DQ5
DDR1_DQ6
DDR1_DQ7
DDR1_DQ8
DDR1_DQ9
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR1_DQ16
DDR1_DQ17
DDR1_DQ18
DDR1_DQ19
DDR1_DQ20
DDR1_DQ21
DDR1_DQ22
DDR1_DQ23
DDR1_DQ24
DDR1_DQ25
DDR1_DQ26
DDR1_DQ27
DDR1_DQ28
DDR1_DQ29
DDR1_DQ30
DDR1_DQ31
G5
G6
H5
H6
J5
M5
M6
N6
P5
P6
44 13
44 13
DDR0_DQ0
DDR0_DQ1
DDR0_DQ2
DDR0_DQ3
DDR0_DQ4
DDR0_DQ5
DDR0_DQ6
DDR0_DQ7
DDR0_DQ8
DDR0_DQ9
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQ16
DDR0_DQ17
DDR0_DQ18
DDR0_DQ19
DDR0_DQ20
DDR0_DQ21
DDR0_DQ22
DDR0_DQ23
DDR0_DQ24
DDR0_DQ25
DDR0_DQ26
DDR0_DQ27
DDR0_DQ28
DDR0_DQ29
DDR0_DQ30
DDR0_DQ31
DDR0_CA<0>
DDR0_CA<1>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<4>
DDR0_CA<5>
DDR0_CA<6>
DDR0_CA<7>
DDR0_CA<8>
DDR0_CA<9>
44 13
44 13
B14
B13
D13
C12
D12
B11
C11
B10
C9
D9
B8
C8
B7
B6
C6
D7
B17
C17
B16
E17
D16
E16
C15
D15
E6
B5
C5
E5
C4
D4
B3
C3
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<2>
DDR0_DQ<3>
DDR0_DQ<4>
DDR0_DQ<5>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<8>
DDR0_DQ<9>
DDR0_DQ<10>
DDR0_DQ<11>
DDR0_DQ<12>
DDR0_DQ<13>
DDR0_DQ<14>
DDR0_DQ<15>
DDR0_DQ<16>
DDR0_DQ<17>
DDR0_DQ<18>
DDR0_DQ<19>
DDR0_DQ<20>
DDR0_DQ<21>
DDR0_DQ<22>
DDR0_DQ<23>
DDR0_DQ<24>
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<27>
DDR0_DQ<28>
DDR0_DQ<29>
DDR0_DQ<30>
DDR0_DQ<31>
DRAWING NUMBER
8 45
R1096
1.00K
1%
1/32W
MF
2 01005
NOSTUFF VOLTAGE=0.6V
C1096
0.01UF
10%
6.3V
2 X5R
01005
Apple Inc.
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
10 OF 157
SHEET
8 OF 48
8
35 9
=PPVDD_SOC_H4
U0600
U0600
35 7
H4G
=PP3V0_IO_H4
H4G
AA9
AA11
AA13
AA15
AA17
AB10
AB12
AB14
AB16
AC9
AC11
AD10
AE11
AF10
AF11
AF12
AG10
AG11
AG12
AG13
J13
J15
J17
J19
J21
J23
J25
J27
K12
K14
K16
K18
K20
K22
K24
K26
L9
L11
L13
L15
L17
L19
L21
L23
L25
L27
M10
M12
M14
M16
M18
M20
M22
M24
M26
N9
N11
N13
N15
N17
N19
N21
FCBGA
(9 OF 12)
OMIT
VDD
VDD
3800MA
N23
N25
N27
P10
P12
P14
P16
P18
P20
P22
P24
P26
R9
R11
R13
R15
R17
R19
R21
R23
R25
R27
T10
T12
T14
T16
T18
T20
T22
T24
T26
U11
U13
U15
U17
U19
U21
U23
U25
U27
V10
V12
V14
V16
W9
W11
W13
W15
W17
Y10
Y12
Y14
Y16
C1142
56PF
5%
6.3V
2 NP0-C0G
01005
35
C1183
0.22UF
FCBGA OMIT
(10 OF 12)
V8 VDDIO30_CFSB
AF15 VDDIO30_DP_HPD
AJ28 VDDIO30_GPIO_3V0 160MA
M29
VDDIO30_USB11
N28
C1184
0.22UF
20%
2 6.3V
X5R
0201
20%
6.3V
2 X5R
0201
AA19
AA21
AA23
AA25
AA27
AB18
AB20
AB22
AB24
AB26
AC19
AC21
AC23
AC25
AC26
AC27
AD18
AD20
AD22
AD24
AD26
AE19
AE21
AE23
AE25
AE27
V18
V20
V22
V24
V26
W19
W21
W23
W25
W27
Y18
Y20
Y22
Y24
Y26
=PPVDD_CPU_H4
C1150
C1157
0.01UF
C1154 1
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
4.3UF
C1155
C1152 1
5%
6.3V
NP0-C0G 2
01005
5%
6.3V
NP0-C0G 2
01005
56PF
20%
6.3V 2
X5R
603
C1153 1
4.3UF
C1151
10UF
10%
6.3V 2
X5R
01005
4.3UF
20%
4V
X5R-CERM 2
0610
C1156
56PF
C1158 1
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
4.3UF
4.3UF
C1159 1
C1160 1
C1161 1
0.22UF
0.22UF
0.22UF
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
C1162 1
C1163 1
C1164 1
C1165 1
C1166 1
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
VDDIOD
1000MA
VDD_CPU
2300MA
UART4 ?MA
GPIO30-39 4MA
SPI1 1MA
I2C2 1MA
ISP FLASH, SPI3 3MA
FMI2-3_CEN 2MA
44MA
VDDIOD0
VDDIOD1
VDDIOD2
VDDIOD3
VDDIOD4
VDDIOD5
FMI0-1 88MA
VDDIOD6
FMI2-3 88MA
VDDIOD7
=PP1V2_VDDIOD_H4
8 35
AA7
AB7
AC7
AD7
AF7
AG7
AH7
AJ7
AJ8
AJ9
AJ10
AJ11
G7
G8
G9
G10
G12
G13
G14
G15
G16
H7
J7
K7
L7
M7
P7
R7
C1193
56PF
5%
6.3V
NP0-C0G 2
01005
C1194
0.22UF
20%
6.3V
X5R 2
0201
4.3UF
C1192
10UF
20%
4V
X5R-CERM 2
0610
20%
6.3V 2
X5R
603
C1195 1 C1196
0.22UF
C1190
C1197 1
0.22UF
20%
6.3V
X5R 2
0201
0.22UF
20%
6.3V
X5R 2
0201
C1176
20%
6.3V
X5R 2
0201
0.22UF
0.22UF
20%
6.3V
2 X5R
0201
Y8
AH20
AK20
AL19
AK30
AH29
AE29
AF29
AB29
AC29
C1177
20%
6.3V
X5R 2
0201
56PF
20%
6.3V
2 X5R
0201
C1181
0.22UF
5%
6.3V
2 NP0-C0G
01005
C1182
0.22UF
20%
6.3V
2 X5R
0201
5 35
C1143
=PP3V0_VDDIOD_H4
1
0.22UF
=PP1V8_VDDIOD_H4
1
35
C1144
56PF
20%
6.3V
2 X5R
0201
5%
6.3V
2 NP0-C0G
01005
NAND_IO_1V8
R1100
VDDIO18_FUSE0_FSRC N29
VDDIO18_GPIO AJ17
AJ22
AJ25
VDDIO18_UART1_TXD0
AJ26
VDDIO18_UART2_TXD T8
VDDIO18_XO0 V28
45 6
C1170
1UF
10%
6.3V
2 CERM
402
C1198
0.22UF
NAND_IO_3V3
=PP3V3_NAND_H4
35
5%
1/20W
MF
201
PPIO_NAND_H4
1
C1171
1UF
10%
6.3V
2 CERM
402
C1172
1UF
C1199
0.22UF
20%
2 6.3V
X5R
0201
C1173
0.22UF
10%
6.3V
2 CERM
402
20%
6.3V
2 X5R
0201
=PP1V8_VDDIO18_H4
1
35
R1101
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP1V8_NAND_H4
5%
1/20W
MF
201
20%
2 6.3V
X5R
0201
35 9
C1191
C1174
0.22UF
C1175
10UF
20%
6.3V
2 X5R
0201
20%
6.3V
2 CERM-X5R
0402-1
C1145
56PF
5%
6.3V
2 NP0-C0G
01005
B
35
C1146
56PF
5%
6.3V
2 NP0-C0G
01005
=PPVDD_SOC_H4
C1101
10UF
20%
6.3V
X5R 2
603
C1123
10UF
20%
6.3V
X5R 2
603
C1102 1
C1103 1
C1121 1
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
4.3UF
4.3UF
4.3UF
C1122
4.3UF
C1124
4.3UF
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
C1100 1
C1117 1
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
4.3UF
4.3UF
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
138S0702
138S0657
BOM OPTION
REF DES
COMMENTS:
C1100,C1102
QTY 17 RADAR:8837828
TABLE_ALT_ITEM
C1100,
C1121,
C1154,
C1191,
C1721
C1104
0.01UF
10%
6.3V 2
X5R
01005
C1105
0.01UF
10%
6.3V 2
X5R
01005
C1106
0.01UF
10%
6.3V 2
X5R
01005
C1107 1
C1125 1
10%
6.3V 2
X5R
01005
10%
6.3V 2
X5R
01005
0.01UF
0.01UF
C1126
0.01UF
C1140
C1141 1
5%
6.3V
NP0-C0G 2
01005
5%
6.3V
NP0-C0G 2
01005
56PF
10%
6.3V 2
X5R
01005
C1102,
C1122,
C1155,
C1615,
C1103,
C1124,
C1156,
C1621,
C1117,
C1153,
C1158,
C1715,
56PF
SYNC_MASTER=MIKE
PAGE TITLE
C1108 1
0.22UF
20%
6.3V
X5R 2
0201
C1109
0.22UF
20%
6.3V
X5R 2
0201
C1110
0.22UF
20%
6.3V
X5R 2
0201
C1111 1
C1129 1
C1130 1
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
0.22UF
0.22UF
0.22UF
C1131
C1132
0.22UF
0.22UF
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
C1133 1
C1134 1
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
0.22UF
0.22UF
C1135
0.22UF
20%
6.3V
X5R 2
0201
C1136
0.22UF
20%
6.3V
X5R 2
0201
C1137 1
0.22UF
20%
6.3V
X5R 2
0201
C1138
SYNC_DATE=N/A
AP: POWER
DRAWING NUMBER
Apple Inc.
0.22UF
20%
6.3V
X5R 2
0201
SIZE
10.0.0
051-8773
REVISION
BRANCH
PAGE
11 OF 157
SHEET
9 OF 48
BOOT CONFIG ID
35 10 7 4
NOSTUFF
R1200
10K
BOOT_CONFIG[3] (GPIO29)
BOOT_CONFIG_3
BOOT_CONFIG[2] (GPIO28)
BOOT_CONFIG_2
BOOT_CONFIG[1] (GPIO25)
BOOT_CONFIG_1
BOOT_CONFIG[0] (GPIO18)
BOOT_CONFIG_0
5%
1/20W
MF
2 201
R1201
10K
5%
1/20W
MF
2 201
R1202
10K
5%
1/20W
MF
2 201
5%
1/32W
MF
2 01005
35 10 7 4
J2A
1.00K
J2
42 25 24
DEV
42 25 24
BOARD_ID_1
BOARD_ID_0
5%
1/32W
MF
2 01005
BOARD_ID_3
BOARD_ID[0]
BOARD_ID[3-0]
0000
0001
0010
0011
0100
0101
OUT
0.00 2
VIDEO_EMI_C_Y
OUT
11 27 43
10K
5%
1/32W
MF
2 01005
42 4
JTAG_AP_TDI
OUT
I2C0_SDA_1V8
I2C0_SCL_1V8
100
JTAG_AP_TRST_L
OUT
0.00 2
IN
11 27 43
IN
11 27 43
VIDEO_EMI_Y_PR
0%
1/32W
MF
01005
4 10 42 45
DEVELOPMENT_JTAG_TAP
BOARD_ID_2
JTAG_AP_SEL
R1211
PP3V0_SENSOR_FLT
=PP1V8_H4
100
=PP1V8_H4
42 25 5
R1213
42 25 5
BOARD_ID[1]
JTAG_AP_TDO
IN
0%
1/32W
MF
01005
JTAG_DAP
42 37 22 19 5
BOARD_ID[2]
42 4
R1210
42 37 22 19 5
BOARD_ID[3]
R1212
JTAG_DAP
DEVELOPMENT_JTAG_TAP
FMI0/1 2/2 CS
FMI0/1 4/4 CS
FMI0/1 4/4 CS WITH TEST
35 10 7 4
DEVELOPMENT_JTAG_TAP
I2C PULL-UPS
10K
BOOT_CONFIG[3-0]
BOARD ID
JTAG
NOSTUFF
R1203
45 26 24
1100
1101
1110
=PP1V8_H4
1
5%
1/32W
MF
2 01005
1.00K
5%
1/32W
MF
2 01005
1.00K
5%
1/32W
MF
2 01005
1.00K
5%
1/32W
MF
2 01005
R1214
R0705 1R0706
1.00K
5%
1/32W
MF
2 01005
45 42 10 4
1.00K
JTAG_AP_TRST_L
0.00 2
VIDEO_EMI_CVBS_PB
0%
1/32W
MF
01005
5%
1/32W
MF
2 01005
I2C1_SDA_1V8
I2C1_SCL_1V8
2-WIRE DAP
DEVELOPMENT_JTAG
JTAG_DAP
I2C2_SDA_3V0_ALS
I2C2_SCL_3V0_ALS
OUT
SCAN DUMP
PRODUCTION
DEVELOPMENT_JTAG
DEVELOPMENT_JTAG_TAP
JTAG_DAP
10K
5%
1/32W
MF
2 01005
J1 AP
J1 DEV
J2 AP
J2 DEV
J2A AP
J2A DEV
1.
2.
3.
R1260
1
100K 2
AP_TESTMODE
5%
1/32W
MF
01005
NOSTUFF
BOARD REVISION
5
5
5
XW1200
NOSTUFF
GPIO42_BRD_REV2
GPIO41_BRD_REV1
GPIO40_BRD_REV0
XW1201
NOSTUFF
XW1202
1
5%
1/20W
MF
2 201
10K
5%
1/20W
MF
2 201
AP_TST_STPCLK
SHORT-01005
1
2
SHORT-01005
1
2
AP_FAST_SCAN_CLK
AP_HOLD_RESET
USB_AP_VBUS1
R1261
NOSTUFF
1
SHORT-01005
1
2
10K
10K
5%
1/32W
MF
01005
5%
1/20W
MF
2 201
B
BRD_REV[2-0]
000
001
010
011
100
PROTO
PROTO
PROTO
PROTO
EVT
0
1 LOCAL
1 CHINA
2
1.
2.
3.
FOR REFERENCE
BOOT_CONFIG[3:0]
0000
SPI0
0001
SPI1
0010
SPI0 W/TEST
0011
SPI1 W/TEST
0100
FMI0 2CS
0101
FMI0 4CS
0110
FMI0 4CS W/TEST
0111
RESERVED
1000
FMI1 2 CS
1001
FMI1 4 CS
1010
FMI1 4CS W/TEST
CURRENT SETTING -> 1100
FMI0/1 2/2 CS
1101
1110
1111
SYNC_MASTER=ALEX
FMI0/1 4/4 CS
FMI0/1 4/4 CS W/TEST
RESERVED
PAGE TITLE
SYNC_DATE=N/A
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
12 OF 157
SHEET
10 OF 48
=PP3V2_S2R_USBMUX
35
C1301
~15MA
56PF
C1300
10%
6.3V
X5R
201
0.1UF
5%
6.3V
NP0-C0G 2
01005
=PP3V0_VIDEO_BUF
35
C1370
0.1UF
VDH E2
VDL D2
VA_0 C1
VA_1 C4
10%
2 6.3V
X5R
201
PORT_DOCK_VIDEO_AMP_EN
CRITICAL
YIN
CVBSIN
CIN
43 7
IN
100K
43 7
IN
43 7
IN
42 15
IN
42 15
OUT
42 30
BI
42 30
BI
CH.1_IN
CH.2_IN
CH.3_IN
CH.1_OUT A2
CH.2_OUT A1
CH.3_OUT B1
UART0_MUX_TXD
UART0_MUX_RXD
D4
E4
TX_VLOW
RX_VLOW
RX_VHIGH/USB_2D+ E1
TX_VHIGH/USB_2D- D1
USB_BB_D_P
USB_BB_D_N
F3
F4
USB_D+
USB_D-
5%
1/32W
MF
01005 2
VID_EN C3
A3
A4
B4
DAC_AP_OUT3
DAC_AP_OUT2
DAC_AP_OUT1
R1360
R1372
THS7380IZSYR
UCSP
NOTE:
JTAG_DAP
U1300
IN
1
75
VIDEO_EMI_Y_PR OUT
10 27 43
1%
1/20W
MF
201
JTAG_DAP
R1361
BUF_Y_PR
BUF_CVBS_PB
43 BUF_C_Y
43
43
USB11_ACC_RX_P
USB11_ACC_TX_N
USB_1D+ F2
USB_1D- F1
USB11_MUX_D0_P
USB11_MUX_D0_N
SEL C2
DOCK_BB_EN
75
VIDEO_EMI_CVBS_PB
OUT
10 27 43
VIDEO_EMI_C_Y
OUT
10 27 43
1%
1/20W
MF
201
BI
4 42
BI
4 42
IN
37
OUT
27 42
IN
27 42
JTAG_DAP
R1362
R1315
75
1%
1/20W
MF
201
1.00M
DGND
R1320
D3
E3
B2
B3
AGND
5%
1/32W
MF
2 01005
100K
5%
1/32W
MF
2 01005
NOTE:
DOCK_BB_EN = 1:
DOCK_BB_EN = 0:
B
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
343S0539
343S0520
BOM OPTION
REF DES
COMMENTS:
U1300
RADAR:9009078
TABLE_ALT_ITEM
SYNC_MASTER=CHOPIN
SYNC_DATE=12/10/2010
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
13 OF 157
SHEET
11 OF 48
R1400 NAND_IO_1V8
1
5%
1/20W
MF
201
R1401
1
C1405
0.22UF
20%
6.3V
2 X5R
0201
C1406
0.22UF
20%
6.3V
2 X5R
0201
C1400
10UF
20%
6.3V
2 CERM-X5R
0402-1
C1401
10UF
C1402
10UF
20%
6.3V
2 CERM-X5R
0402-1
20%
6.3V
2 CERM-X5R
0402-1
PPVCCQ_NAND
C1404
12 45
C1410 1 C1411
C1450
1.0UF
20%
2 6.3V
X5R
0201-MUR
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
C1412
10UF
20%
6.3V
2 CERM-X5R
0402-1
C1413
0.22UF
20%
6.3V
2 X5R
0201
C1414
0.22UF
20%
6.3V
2 X5R
0201
C1425
0.22UF
20%
2 6.3V
X5R
0201
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
C1421
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
G3
H2
J3
K2
L5
K6
J5
H6
IO0-0
IO1-0
IO2-0
IO3-0
IO4-0
IO5-0
IO6-0
IO7-0
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
G1
J1
L1
N3
N5
L7
J7
G7
IO0-1
IO1-1
IO2-1
IO3-1
IO4-1
IO5-1
IO6-1
IO7-1
VCC
VCCQ
LGA
C1422
10UF
20%
2 6.3V
CERM-X5R
0402-1
20%
2 6.3V
CERM-X5R
0402-1
C1424
20%
2 6.3V
X5R
0201
0.1UF
C1471
C1470
1.0UF
20%
2 6.3V
X5R
0201-MUR
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
VDDI
R1455
CE0*
CLE0
ALE0
WE0*
A5
A3
C1
E3
RE0 B4
RE0* C7
DQS0 H4
DQS0* F4
FMI0_CE0_L
FMI0_CLE
FMI0_ALE
FMI0_WE_L
NC
1
IN
6 44
IN
6 12 44
IN
6 12 44
IN
6 12 44
FMI0_RE_N
IN
6 12 44
FMI0_DQS_P
IN
6 12 44
DQS1 M4
DQS1* K4
BI
44 12 6
BI
44 12 6
BI
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
44 12 6
BI
IN
6 44
44 12 6
BI
IN
6 12 44
44 12 6
BI
IN
6 12 44
44 12 6
BI
IN
6 12 44
44 12 6
BI
FMI1_RE_N
IN
6 12 44
FMI1_DQS_P
IN
6 12 44
FMI1_CE0_L
FMI1_CLE
FMI1_ALE
FMI1_WE_L
NC
44 12 6
44 12 6
NAND_SLOT0_RDYBSY_L
C5
C3
D2
E1
RE1 D4
RE1* D6
5%
1/32W
MF
2 01005
NC
R/B0* E5
CE1*
CLE1
ALE1
WE1*
100K
G3
H2
J3
K2
L5
K6
J5
H6
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
G1
J1
L1
N3
N5
L7
J7
G7
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
VCC
U1410
LGA
IO0-1
IO1-1
IO2-1
IO3-1
IO4-1
IO5-1
IO6-1
IO7-1
NOSTUFF
R1452
1K
5%
1/20W
MF
2 201
FMI0_CE1_L
FMI0_CLE
FMI0_ALE
FMI0_WE_L
C1433
0.22UF
20%
6.3V
2 X5R
0201
IN
6 44
IN
6 12 44
IN
6 12 44
IN
6 12 44
FMI0_RE_N
IN
6 12 44
FMI0_DQS_P
IN
6 12 44
NC
C1434
0.22UF
20%
6.3V
2 X5R
0201
R/B0* E5
CE1*
CLE1
ALE1
WE1*
DQS1 M4
DQS1* K4
100K
5%
1/32W
MF
01005 2
NAND_SLOT1_RDYBSY_L
C5
C3
D2
E1
RE1 D4
RE1* D6
R1475
NC
FMI1_CE1_L
FMI1_CLE
FMI1_ALE
FMI1_WE_L
IN
6 44
IN
6 12 44
IN
6 12 44
IN
6 12 44
FMI1_RE_N
IN
6 12 44
FMI1_DQS_P
IN
6 12 44
NC
NC
LEAVE VREF AS TP FOR MLB
TP_VREF_SLOT1
VREF G5
FMI_ZQ_U1400
243
1%
1/20W
MF
2 201
R1453
R/B1* E7
R1454
A5
A3
C1
E3
DQS0 H4
DQS0* F4
NOSTUFF
CE0*
CLE0
ALE0
WE0*
RE0 B4
RE0* C7
NC
ZQ A1
VSS
B2
F6
L3
VSSQ
A7
M2
OC0
OD0
OE8
OF0
G8
VSS
10UF
20%
6.3V
2 CERM-X5R
0402-1
VCCQ
NOSTUFF
R1472
1K
1K
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
FMI_ZQ_U1410
VSSQ
R1474
243
A7
M2
OC0
OD0
OE8
OF0
G8
ZQ A1
B2
F6
L3
2.2UF
20%
2 6.3V
CERM
402-LF
OMIT
IO0-0
IO1-0
IO2-0
IO3-0
IO4-0
IO5-0
IO6-0
IO7-0
R/B1* E7
VREF G5
10%
2 6.3V
X5R
201
PPVDDI_NAND_U1410
1
12 45
10%
2 6.3V
X5R
201
0.22UF
PPVCCQ_NAND
0.1UF
C1426
20%
2 6.3V
X5R
0201-MUR
OMIT
U1400
10UF
1.0UF
VDDI
44 12 6
20%
2 6.3V
CERM
402-LF
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
OB8
20%
2 6.3V
X5R
0201-MUR
PPVDDI_NAND_U1400
2.2UF
20%
2 6.3V
CERM-X5R
0402-1
N1
N7
OC8
OD8
OE0
OF8
G0
OA8
1.0UF
10%
2 6.3V
X5R
201
XXNM-XGBX8-MLC-PPN1.5-ODP
C1451
C1420
10UF
10%
6.3V
2 X5R
201
OB8
=PP3V3_NAND
0.1UF
B6
F2
M6
45
35 12
12 35
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
0.1UF
=PP3V3_NAND
5%
1/20W
MF
201
=PP3V3_NAND
N1
N7
OC8
OD8
OE0
OF8
G0
OA8
NAND_IO_3V3
XXNM-XGBX8-MLC-PPN1.5-ODP
35 12
35
B6
F2
M6
=PP1V8_NAND
1%
1/20W
MF
2 201
NOSTUFF
R1473
1K
5%
1/20W
MF
2 201
TEST POINTS
DO NOT PLACE IN NAND SINGLE PCS SHIELD CAN AREA
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
44 12 6
FMI0_AD<0>
FMI0_ALE
FMI0_CLE
FMI0_RE_N
FMI0_WE_L
1 TP
1 TP
FMI1_AD<0>
FMI1_ALE
FMI1_CLE
FMI1_RE_N
FMI1_WE_L
1 TP
1 TP
1 TP
1 TP
1 TP
1 TP
1 TP
1 TP
SYNC_MASTER=MIKE
PAGE TITLE
TP1400
TP1401
TP1402
TP1403
TP1404
TP1405
TP1406
TP1407
TP1408
TP1409
SYNC_DATE=N/A
NAND
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
14 OF 157
SHEET
12 OF 48
44 8
44 8
44 8
44 8
=PP1V2_S2R_DDR
35 14 13
44 8
R1605
2.21K
44 8
NOSTUFF
C1660
44 8
0.01UF
1%
1/32W
MF
2 01005
44 8
10%
6.3V
2 X5R
01005
44 8
44 8
PPVREF_DDR0_CA
44 8
DDR1_CA<0>
DDR1_CA<1>
DDR1_CA<2>
DDR1_CA<3>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<6>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CA<9>
T15
U15
U14
V14
T13
T9
U9
U8
V8
T7
DDR1_CK_P
DDR1_CK_N
DDR1_CKE<0>
U12 CK_1
U11 CKB_1
V13 CKE_1
CA0_1
CA1_1
CA2_1
CA3_1
CA4_1
CA5_1
CA6_1
CA7_1
CA8_1
CA9_1
OMIT
U1600
H4G-DRAM
XXXMB
BGA
SYM 1 OF 2
CA0_2
CA1_2
CA2_2
CA3_2
CA4_2
CA5_2
CA6_2
CA7_2
CA8_2
CA9_2
G16
G17
H17
H18
J16
N16
N17
P17
P18
R16
DDR0_CA<0>
DDR0_CA<1>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<4>
DDR0_CA<5>
DDR0_CA<6>
DDR0_CA<7>
DDR0_CA<8>
DDR0_CA<9>
CK_2 K17
CKB_2 L17
CKE_2 J18
DDR0_CK_P
DDR0_CK_N
DDR0_CKE<0>
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
35 14
=PP1V8_S2R_DDR
8 44
C1601
8 44
10UF
C1602 1
C1603 1
10%
6.3V
CERM 2
402
10%
6.3V
CERM 2
402
1UF
20%
6.3V
X5R 2
603
8 44
8 44
1UF
C1604
0.01UF
10%
6.3V
X5R 2
01005
C1605 1
0.01UF
10%
6.3V
X5R 2
01005
8 44
13 44 45
R1606
2.21K
1%
1/32W
MF
2 01005
NOSTUFF VOLTAGE=0.6V
C1650
0.01UF
10%
6.3V
2 X5R
01005
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
DDR1_CSN<0>
44 8
44 8
44 8
44 8
44 8
=PP1V2_S2R_DDR
U13 CSB_1
CSB_2 J17
DDR0_CSN<0>
DDR1_DM<0>
DDR1_DM<1>
DDR1_DM<3>
DDR1_DM<2>
C12
B10
B16
D7
DM0_1
DM1_1
DM2_1
DM3_1
DM0_2
DM1_2
DM2_2
DM3_2
K3
M2
G4
T2
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<3>
DDR0_DM<2>
DDR1_DQ<0>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<5>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<8>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<11>
DDR1_DQ<12>
DDR1_DQ<14>
DDR1_DQ<13>
DDR1_DQ<15>
DDR1_DQ<24>
DDR1_DQ<25>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
DDR1_DQ<16>
DDR1_DQ<17>
DDR1_DQ<18>
DDR1_DQ<19>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<22>
DDR1_DQ<23>
C15
D15
B14
C14
D14
E14
B13
C13
C9
D9
B8
C8
D8
E8
B7
C7
B18
C18
D18
E18
B17
D17
E17
E16
B6
B5
C5
D5
B4
C4
B3
C3
DQ0_1
DQ1_1
DQ2_1
DQ3_1
DQ4_1
DQ5_1
DQ6_1
DQ7_1
DQ8_1
DQ9_1
DQ10_1
DQ11_1
DQ12_1
DQ13_1
DQ14_1
DQ15_1
DQ16_1
DQ17_1
DQ18_1
DQ19_1
DQ20_1
DQ21_1
DQ22_1
DQ23_1
DQ24_1
DQ25_1
DQ26_1
DQ27_1
DQ28_1
DQ29_1
DQ30_1
DQ31_1
DQ0_2
DQ1_2
DQ2_2
DQ3_2
DQ4_2
DQ5_2
DQ6_2
DQ7_2
DQ8_2
DQ9_2
DQ10_2
DQ11_2
DQ12_2
DQ13_2
DQ14_2
DQ15_2
DQ16_2
DQ17_2
DQ18_2
DQ19_2
DQ20_2
DQ21_2
DQ22_2
DQ23_2
DQ24_2
DQ25_2
DQ26_2
DQ27_2
DQ28_2
DQ29_2
DQ30_2
DQ31_2
G3
G2
H5
H4
H3
H2
J3
J2
N4
N3
P5
P4
P3
P2
R4
R3
B2
C2
D3
D2
E4
E3
E2
F2
T5
U5
U4
U2
V5
V4
V3
V2
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<2>
DDR0_DQ<3>
DDR0_DQ<4>
DDR0_DQ<5>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<8>
DDR0_DQ<14>
DDR0_DQ<10>
DDR0_DQ<11>
DDR0_DQ<12>
DDR0_DQ<13>
DDR0_DQ<9>
DDR0_DQ<15>
DDR0_DQ<24>
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<28>
DDR0_DQ<27>
DDR0_DQ<29>
DDR0_DQ<30>
DDR0_DQ<31>
DDR0_DQ<16>
DDR0_DQ<22>
DDR0_DQ<19>
DDR0_DQ<18>
DDR0_DQ<20>
DDR0_DQ<17>
DDR0_DQ<21>
DDR0_DQ<23>
DDR1_DQS_P<0>
DDR1_DQS_N<0>
D13 DQS0_1
D12 DQSB0_1
DQS0_2 J4
DQSB0_2 K4
DDR0_DQS_P<0>
DDR0_DQS_N<0>
DDR1_DQS_P<1>
DDR1_DQS_N<1>
D10 DQS1_1
C10 DQSB1_1
DQS1_2 M4
DQSB1_2 M3
DDR0_DQS_P<1>
DDR0_DQS_N<1>
DDR1_DQS_P<3>
DDR1_DQS_N<3>
C16 DQS2_1
D16 DQSB2_1
DQS2_2 F4
DQSB2_2 F3
DDR0_DQS_P<3>
DDR0_DQS_N<3>
DDR1_DQS_P<2>
DDR1_DQS_N<2>
D6 DQS3_1
C6 DQSB3_1
DQS3_2 T3
DQSB3_2 T4
DDR0_DQS_P<2>
DDR0_DQS_N<2>
U10 VREFCA_1
D11 VREFDQ_1
VREFCA_2 M17
VREFDQ_2 L4
C1606 1
0.22UF
8 44
1%
1/32W
MF
2 01005
44 8
C1661
44 8
0.01UF
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
PPVREF_DDR1_CA
44 8
13 44 45
R1652
2.21K
1%
1/32W
MF
2 01005
44 8
NOSTUFF VOLTAGE=0.6V
C1652
0.01UF
10%
6.3V
2 X5R
01005
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
44 8
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
44 8
44 8
44 8
44 8
44 8
44 8
44 8
44 8
35 14 13
=PP1V2_VDDQ_DDR
44 8
44 8
R1653
1.00K
NOSTUFF
44 8
C1662
44 8
0.01UF
1%
1/32W
MF
2 01005
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
44 8
PPVREF_DDR0_DQ
13 44 45
R1654
1.00K
1%
1/32W
MF
2 01005
44 8
NOSTUFF VOLTAGE=0.6V
C1654
0.01UF
10%
6.3V
2 X5R
01005
44 8
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
44 8
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
44 8
44 8
44 8
44 8
44 8
44 8
35 14 13
=PP1V2_VDDQ_DDR
44 8
44 8
R1655
1.00K
C1663
44 8
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
PPVREF_DDR1_DQ
C1608 1
C1609 1
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
5%
6.3V
NP0-C0G 2
01005
0.22UF
56PF
8 44
8 44
=PP1V2_S2R_DDR
8 44
35 14 13
C1610
0.22UF
8 40 44
8 44
C1611 1
C1612 1
C1613 1
20%
6.3V
X5R 2
0201
0.22UF
0.22UF
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
C1617 1
C1618 1
C1619 1
10%
6.3V
CERM 2
402
10%
10V
X5R 2
201
5%
6.3V
NP0-C0G 2
01005
0.22UF
20%
6.3V
X5R 2
0201
8 44
8 44
8 44
8 44
C1614 1
8 44
10UF
8 44
C1615 1 C1616
4.3UF
20%
6.3V
X5R 2
603
8 44
8 40 44
1UF
20%
4V
X5R-CERM 2
0610
1UF
10%
6.3V
CERM 2
402
0.01UF
56PF
8 44
8 44
8 44
R1656
1.00K
1%
1/32W
MF
2 01005
NOSTUFF VOLTAGE=0.6V
C1656
0.01UF
10%
6.3V
2 X5R
01005
PPVREF_DDR1_CA
PPVREF_DDR1_DQ
45 44 13
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
45 44 13
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PPVREF_DDR0_CA
PPVREF_DDR0_DQ
8 44
35 14 13
8 44
8 44
=PP1V2_VDDQ_DDR
C1623 1
C1620 1
C1621 1
C1624 1
C1625 1
5%
6.3V
NP0-C0G 2
01005
20%
6.3V 2
X5R
603
20%
4V
X5R-CERM 2
0610
20%
6.3V 2
X5R
0201
20%
6.3V 2
X5R
0201
56PF
8 44
8 44
8 44
10UF
4.3UF
0.22UF
0.22UF
C1626 1 C1622
0.22UF
20%
6.3V 2
X5R
0201
0.01UF
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 40 44
8 40 44
8 44
8 40 44
35 14 13
8 44
8 44
8 44
=PP1V2_S2R_DDR
C1627
10UF
20%
6.3V
X5R 2
603
C1628
1UF
10%
6.3V
CERM 2
402
C1629
1UF
10%
6.3V
CERM 2
402
C1630
0.01UF
10%
6.3V
X5R 2
01005
DDR1_ZQ
U7 ZQ_1
ZQ_2 R17
44
C1631
0.01UF
10%
6.3V
X5R 2
01005
8 44
13 44 45
C1632 1
13 44 45
20%
6.3V
X5R 2
0201
DDR0_ZQ
R1620
C1633 1
C1634 1
C1635 1
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
5%
6.3V
NP0-C0G 2
01005
0.22UF
0.22UF
10%
6.3V 2
X5R
01005
8 44
0.22UF
44
VDD1_0
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
E11
E19
L5
M18
U17
T18
V10
V16
V18
W5
W16
W19
W18
V19
A3
T19
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDD2_7
VDD2_8
VDD2_9
VDD2_10
VDD2_11
VDD2_12
VDD2_13
VDD2_14
VDD2_15
VDD2_16
H1
M1
W3
E1
U1
B12
D4
U3
A14
C17
C19
A10
A17
J5
K2
A8
N2
R5
A13
E10
E15
P1
VDDQ27
VDDQ32
VDDQ31
VDDQ
VDDQ1
VDDQ3
VDDQ6
VDDQ30
VDDQ23
VDDQ25
VDDQ26
VDDQ22
VDDQ34
VDDQ16
VDDQ17
VDDQ21
VDDQ19
VDDQ20
VDDQ24
VDDQ28
VDDQ29
VDDQ33
F18
H16
K16
L16
P16
T11
T12
T14
V7
T8
VDDCA1
VDDCA2
VDDCA3
VDDCA4
VDDCA5
VDDCA6
VDDCA7
VDDCA8
VDDCA9
VDDCA10
OMIT
U1600
H4G-DRAM
XXXMB
BGA
SYM 2 OF 2
8 44
13 44 45
A2
B1
B11
F17
L2
M16
T10
U18
V17
V6
W17
U19
8 44
NOSTUFF
0.01UF
1%
1/32W
MF
2 01005
DDR_2
2.21K
NOSTUFF
DDR_1
44 8
R1651
C1607 1
0.22UF
20%
6.3V
X5R 2
0201
35 14 13
VSS
44 8
VDD1
44 8
VDD2
VDDQ
VSS0
VSS55
VSS2
VSS3
VSS4
VSS49
VSS6
VSS7
A16
A19
A4
A6
B15
C1
B9
C11
VSS9
VSS10
VSS1
VSS12
VSS13
VSS51
D1
D19
A1
E12
E13
G5
VSS52
VSS50
VSS18
VSS48
VSS20
VSS53
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
T16
E7
F16
B19
G18
V1
J1
K18
K5
L18
L3
M5
N18
N5
VSS47
VSS32
VSS33
VSS34
VSS35
VSS36
A18
R18
R2
T1
T17
U16
VSS54
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
W2
U6
V11
V12
V15
T6
V9
W1
W4
B
VDDCA
56PF
R1621
240
240
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
SYNC_MASTER=MIKE
PAGE TITLE
SYNC_DATE=06/21/2010
DDR 0 AND 1
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
16 OF 157
SHEET
13 OF 48
44 8
DDR3_CK_P
DDR3_CK_N
DDR3_CKE<0>
U12 CK_1
U11 CKB_1
V13 CKE_1
CK_2 K17
CKB_2 L17
CKE_2 J18
DDR2_CK_P
DDR2_CK_N
DDR2_CKE<0>
44 8
DDR3_CSN<0>
U13 CSB_1
CSB_2 J17
DDR2_CSN<0>
DDR3_DM<0>
DDR3_DM<1>
DDR3_DM<3>
DDR3_DM<2>
C12
B10
B16
D7
DM0_2
DM1_2
DM2_2
DM3_2
K3
M2
G4
T2
DDR2_DM<0>
DDR2_DM<1>
DDR2_DM<3>
DDR2_DM<2>
DDR3_DQ<0>
DDR3_DQ<1>
DDR3_DQ<2>
DDR3_DQ<3>
DDR3_DQ<4>
DDR3_DQ<5>
DDR3_DQ<6>
DDR3_DQ<7>
DDR3_DQ<8>
DDR3_DQ<9>
DDR3_DQ<10>
DDR3_DQ<11>
DDR3_DQ<12>
DDR3_DQ<13>
DDR3_DQ<14>
DDR3_DQ<15>
DDR3_DQ<24>
DDR3_DQ<25>
DDR3_DQ<26>
DDR3_DQ<27>
DDR3_DQ<28>
DDR3_DQ<29>
DDR3_DQ<30>
DDR3_DQ<31>
DDR3_DQ<16>
DDR3_DQ<17>
DDR3_DQ<18>
DDR3_DQ<19>
DDR3_DQ<20>
DDR3_DQ<21>
DDR3_DQ<22>
DDR3_DQ<23>
C15
D15
B14
C14
D14
E14
B13
C13
C9
D9
B8
C8
D8
E8
B7
C7
B18
C18
D18
E18
B17
D17
E17
E16
B6
B5
C5
D5
B4
C4
B3
C3
DQ0_2
DQ1_2
DQ2_2
DQ3_2
DQ4_2
DQ5_2
DQ6_2
DQ7_2
DQ8_2
DQ9_2
DQ10_2
DQ11_2
DQ12_2
DQ13_2
DQ14_2
DQ15_2
DQ16_2
DQ17_2
DQ18_2
DQ19_2
DQ20_2
DQ21_2
DQ22_2
DQ23_2
DQ24_2
DQ25_2
DQ26_2
DQ27_2
DQ28_2
DQ29_2
DQ30_2
DQ31_2
G3
G2
H5
H4
H3
H2
J3
J2
N4
N3
P5
P4
P3
P2
R4
R3
B2
C2
D3
D2
E4
E3
E2
F2
T5
U5
U4
U2
V5
V4
V3
V2
DDR2_DQ<0>
DDR2_DQ<1>
DDR2_DQ<2>
DDR2_DQ<3>
DDR2_DQ<4>
DDR2_DQ<5>
DDR2_DQ<6>
DDR2_DQ<7>
DDR2_DQ<8>
DDR2_DQ<15>
DDR2_DQ<10>
DDR2_DQ<11>
DDR2_DQ<12>
DDR2_DQ<13>
DDR2_DQ<14>
DDR2_DQ<9>
DDR2_DQ<24>
DDR2_DQ<25>
DDR2_DQ<26>
DDR2_DQ<27>
DDR2_DQ<30>
DDR2_DQ<29>
DDR2_DQ<28>
DDR2_DQ<31>
DDR2_DQ<16>
DDR2_DQ<20>
DDR2_DQ<18>
DDR2_DQ<19>
DDR2_DQ<23>
DDR2_DQ<21>
DDR2_DQ<22>
DDR2_DQ<17>
DDR3_DQS_P<0>
DDR3_DQS_N<0>
D13 DQS0_1
D12 DQSB0_1
DQS0_2 J4
DQSB0_2 K4
DDR2_DQS_P<0>
DDR2_DQS_N<0>
DDR3_DQS_P<1>
DDR3_DQS_N<1>
D10 DQS1_1
C10 DQSB1_1
DQS1_2 M4
DQSB1_2 M3
DDR2_DQS_P<1>
DDR2_DQS_N<1>
DDR3_DQS_P<3>
DDR3_DQS_N<3>
C16 DQS2_1
D16 DQSB2_1
DQS2_2 F4
DQSB2_2 F3
DDR2_DQS_P<3>
DDR2_DQS_N<3>
DDR3_DQS_P<2>
DDR3_DQS_N<2>
D6 DQS3_1
C6 DQSB3_1
DQS3_2 T3
DQSB3_2 T4
DDR2_DQS_P<2>
DDR2_DQS_N<2>
U10 VREFCA_1
D11 VREFDQ_1
VREFCA_2 M17
VREFDQ_2 L4
44 8
=PP1V2_S2R_DDR
44 8
R1705
2.21K
44 8
NOSTUFF
C1760
44 8
0.01UF
1%
1/32W
MF
2 01005
44 8
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
CA0_1
CA1_1
CA2_1
CA3_1
CA4_1
CA5_1
CA6_1
CA7_1
CA8_1
CA9_1
OMIT
U1700
H4G-DRAM
XXXMB
BGA
SYM 1 OF 2
CA0_2
CA1_2
CA2_2
CA3_2
CA4_2
CA5_2
CA6_2
CA7_2
CA8_2
CA9_2
G16
G17
H17
H18
J16
N16
N17
P17
P18
R16
DDR2_CA<0>
DDR2_CA<1>
DDR2_CA<2>
DDR2_CA<3>
DDR2_CA<4>
DDR2_CA<5>
DDR2_CA<6>
DDR2_CA<7>
DDR2_CA<8>
DDR2_CA<9>
8 44
35 13
=PP1V8_S2R_DDR
8 44
C1701
8 44
C1702
10UF
8 44
8 44
R1706
2.21K
1%
1/32W
MF
2 01005
44 8
NOSTUFF VOLTAGE=0.6V
C1750
0.01UF
10%
6.3V
2 X5R
01005
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
44 8
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
C1703 1
1UF
20%
6.3V
X5R 2
603
8 44
44 8
44 8
R1751
2.21K
44 8
NOSTUFF
C1761
44 8
44 8
44 8
44 8
44 8
NOSTUFF VOLTAGE=0.6V
C1752
0.01UF
10%
6.3V
2 X5R
01005
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
44 8
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
44 8
44 8
44 8
44 8
44 8
44 8
44 8
44 8
35 14 13
=PP1V2_VDDQ_DDR
44 8
44 8
R1753
1.00K
NOSTUFF
44 8
C1762
44 8
0.01UF
1%
1/32W
MF
2 01005
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
44 8
PPVREF_DDR2_DQ
14 45
R1754
1.00K
1%
1/32W
MF
2 01005
44 8
NOSTUFF VOLTAGE=0.6V
C1754
0.01UF
10%
6.3V
2 X5R
01005
44 8
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
44 8
44 8
44 8
44 8
44 8
44 8
44 8
44 8
35 14 13
=PP1V2_VDDQ_DDR
44 8
44 8
R1755
1.00K
C1763
44 8
10%
6.3V
2 X5R
01005
44 8
44 8
44 8
PPVREF_DDR3_DQ
R1756
1.00K
1%
1/32W
MF
2 01005
10%
6.3V
X5R 2
01005
8 44
8 44
8 44
C1706
0.22UF
8 44
C1707 1
C1708 1
20%
6.3V 2
X5R
0201
20%
6.3V 2
X5R
0201
0.22UF
0.22UF
20%
6.3V 2
X5R
0201
8 44
8 44
C1709
56PF
5%
6.3V
NP0-C0G 2
01005
35 14 13
8 44
C1710 1
C1711 1
C1712 1
C1713 1
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V
X5R 2
0201
20%
6.3V 2
X5R
0201
8 44
8 44
0.22UF
0.22UF
0.22UF
8 44
8 44
C1714 1 C1715
4.3UF
10UF
8 44
20%
6.3V
X5R 2
603
8 44
8 44
C1716
1UF
20%
4V
X5R-CERM 2
0610
C1717 1
1UF
10%
6.3V
CERM 2
402
C1718 1 C1719
0.01UF
10%
10V
X5R 2
201
10%
6.3V
CERM 2
402
56PF
5%
6.3V
NP0-C0G 2
01005
8 44
NOSTUFF VOLTAGE=0.6V
C1756
0.01UF
10%
6.3V
2 X5R
01005
44 8
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
44 8
PPVREF_DDR3_CA
PPVREF_DDR3_DQ
45 14
45 14
44
DDR3_ZQ
U7 ZQ_1
ZQ_2 R17
PPVREF_DDR2_CA
PPVREF_DDR2_DQ
44
A2
B1
B11
F17
L2
M16
T10
U18
V17
V6
W17
U19
VDD1_0
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
E11
E19
L5
M18
U17
T18
V10
V16
V18
W5
W16
W19
W18
V19
A3
T19
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDD2_7
VDD2_8
VDD2_9
VDD2_10
VDD2_11
VDD2_12
VDD2_13
VDD2_14
VDD2_15
VDD2_16
H1
M1
W3
E1
U1
B12
D4
U3
A14
C17
C19
A10
A17
J5
K2
A8
N2
R5
A13
E10
E15
P1
VDDQ27
VDDQ32
VDDQ31
VDDQ
VDDQ1
VDDQ3
VDDQ6
VDDQ30
VDDQ23
VDDQ25
VDDQ26
VDDQ22
VDDQ34
VDDQ16
VDDQ17
VDDQ21
VDDQ19
VDDQ20
VDDQ24
VDDQ28
VDDQ29
VDDQ33
F18
H16
K16
L16
P16
T11
T12
T14
V7
T8
VDDCA1
VDDCA2
VDDCA3
VDDCA4
VDDCA5
VDDCA6
VDDCA7
VDDCA8
VDDCA9
VDDCA10
OMIT
U1700
H4G-DRAM
XXXMB
BGA
SYM 2 OF 2
8 44
8 44
8 44
8 44
35 14 13
8 44
8 44
8 44
8 44
8 44
=PP1V2_VDDQ_DDR
C1723 1
C1720 1
C1721 1
5%
6.3V
NP0-C0G 2
01005
20%
6.3V
X5R 2
603
20%
4V
X5R-CERM 2
0610
56PF
10UF
C1724 1 C1725 1
4.3UF
0.22UF
20%
6.3V
X5R 2
0201
0.22UF
20%
6.3V
X5R 2
0201
C1726 1
C1722 1
20%
6.3V
X5R 2
0201
10%
6.3V
X5R 2
01005
0.22UF
0.01UF
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
8 44
VSS0
VSS55
VSS2
VSS3
VSS4
VSS49
VSS6
VSS7
A16
A19
A4
A6
B15
C1
B9
C11
VSS9
VSS10
VSS1
VSS12
VSS13
VSS51
D1
D19
A1
E12
E13
G5
VSS52
VSS50
VSS18
VSS48
VSS20
VSS53
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
T16
E7
F16
B19
G18
V1
J1
K18
K5
L18
L3
M5
N18
N5
VSS47
VSS32
VSS33
VSS34
VSS35
VSS36
A18
R18
R2
T1
T17
U16
VSS54
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
W2
U6
V11
V12
V15
T6
V9
W1
W4
R1720
8 44
35 14 13
=PP1V2_S2R_DDR
8 44
C1727 1
8 44
10UF
8 44
20%
6.3V 2
X5R
603
8 44
C1728
1UF
10%
6.3V 2
CERM
402
C1729
1UF
10%
6.3V 2
CERM
402
C1730 1
0.01UF
10%
6.3V 2
X5R
01005
C1731
0.01UF
10%
6.3V 2
X5R
01005
8 44
8 44
8 44
C1732
0.22UF
20%
6.3V
X5R 2
0201
8 44
8 44
C1733 1
C1734 1
20%
6.3V 2
X5R
0201
20%
6.3V
X5R 2
0201
0.22UF
0.22UF
C1735
56PF
5%
6.3V
NP0-C0G 2
01005
8 44
8 44
14 45
14 45
R1721
240
240
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
SYNC_MASTER=MIKE
PAGE TITLE
SYNC_DATE=06/21/2010
DDR 2 AND 3
DRAWING NUMBER
Apple Inc.
051-8773
SIZE
REVISION
10.0.0
DDR2_ZQ
8 44
14 45
0.01UF
NOSTUFF
0.01UF
1%
1/32W
MF
2 01005
DQ0_1
DQ1_1
DQ2_1
DQ3_1
DQ4_1
DQ5_1
DQ6_1
DQ7_1
DQ8_1
DQ9_1
DQ10_1
DQ11_1
DQ12_1
DQ13_1
DQ14_1
DQ15_1
DQ16_1
DQ17_1
DQ18_1
DQ19_1
DQ20_1
DQ21_1
DQ22_1
DQ23_1
DQ24_1
DQ25_1
DQ26_1
DQ27_1
DQ28_1
DQ29_1
DQ30_1
DQ31_1
DDR_2
44 8
14 45
1%
1/32W
MF
2 01005
DM0_1
DM1_1
DM2_1
DM3_1
DDR_1
10%
6.3V
2 X5R
01005
PPVREF_DDR3_CA
2.21K
C1705
8 44
0.01UF
1%
1/32W
MF
2 01005
R1752
10%
6.3V
X5R 2
01005
=PP1V2_S2R_DDR
=PP1V2_S2R_DDR
0.01UF
10%
6.3V
CERM 2
402
0.22UF
35 14 13
C1704
1UF
10%
6.3V
CERM 2
402
PPVREF_DDR2_CA
14 45
VSS
T15
U15
U14
V14
T13
T9
U9
U8
V8
T7
44 8
VDD1
DDR3_CA<0>
DDR3_CA<1>
DDR3_CA<2>
DDR3_CA<3>
DDR3_CA<4>
DDR3_CA<5>
DDR3_CA<6>
DDR3_CA<7>
DDR3_CA<8>
DDR3_CA<9>
44 8
35 14 13
VDD2
VDDQ
VDDCA
BRANCH
PAGE
17 OF 157
SHEET
14 OF 48
WIFI ALIASES
42 40 4
42 40 4
42 5
42 5
45 37
37
45 37
37
5
42 5
42 5
42 5
42 5
42 37
42 19 5
42 19 5
42 19 5
42 19 5
42 5
42 5
HSIC1_WLAN_DATA1
MAKE_BASE=TRUE
HSIC1_WLAN_STB1
MAKE_BASE=TRUE
HSIC_HOST_READY_WLANMAKE_BASE=TRUE
HSIC_WLAN_RDY
MAKE_BASE=TRUE
RST_WLAN_L
MAKE_BASE=TRUE
PM_WLAN_HOST_WAKE
MAKE_BASE=TRUE
RST_BT_L
MAKE_BASE=TRUE
PM_BT_HOST_WAKE
MAKE_BASE=TRUE
PM_BT_WAKE
MAKE_BASE=TRUE
UART3_BT_RXD
MAKE_BASE=TRUE
UART3_BT_TXD
MAKE_BASE=TRUE
UART3_BT_CTS_L
MAKE_BASE=TRUE
UART3_BT_RTS_L
MAKE_BASE=TRUE
CLK_32K_WLAN
MAKE_BASE=TRUE
I2S2_VSP_BCLK
MAKE_BASE=TRUE
I2S2_VSP_DOUT
MAKE_BASE=TRUE
I2S2_VSP_DIN
MAKE_BASE=TRUE
I2S2_VSP_LRCK
MAKE_BASE=TRUE
UART6_WLAN_RXD
MAKE_BASE=TRUE
UART6_WLAN_TXD
MAKE_BASE=TRUE
HSIC_DATA_4330
31 33
HSIC_STROBE_4330 31 33
WLAN_GPIO1
31 33
HSIC_DEVICE_READY 31
WLAN_ENABLE
31 33
WLAN_GPIO0
31 33
BT_RESET_N
31 33
BT_HOST_WAKE
31 33
BT_WAKE
31 33
BT_UART_TXD
31 33
BT_UART_RXD
31 33
BT_UART_RTS_N
31 33
BT_UART_CTS_N
31 33
CLK32K
32 33
BT_PCM_CLK
31
BT_PCM_DIN
31
BT_PCM_DOUT
31
BT_PCM_SYNC
31
WLAN_GPIO4
31 33
WLAN_GPIO3
31 33
UART ALIASES
42 5
42 5
UART0_AP_RXD
UART0_AP_TXD
MAKE_BASE=TRUE
MAKE_BASE=TRUE
UART0_MUX_RXD
UART0_MUX_TXD
11 42
11 42
OBSOLETE ALIASES
NC_EXT_SMPS_REQ
NC_EXT_PWM_REQ
NC_BT_GPIO5
TP_WLAN_GPIO5
45 30 5
GSM_TXBURST_IND
MAKE_BASE=TRUE
EXT_SMPS_REQ
EXT_PWM_REQ
BT_GPIO5
WLAN_GPIO5
MAKE_BASE=TRUE
LED_DRIVE_GSMB
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
31
31
NEED TO DOUBLE CHECK IF WE NEED THIS IN IPAD, OR IF THIS MIGHT BE A PHONE SPECIFIC ISSUE
SYNC_MASTER=ALEX
SYNC_DATE=09/30/2010
PAGE TITLE
MLB ALIASES/CONNECTIONS
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
21 OF 157
SHEET
15 OF 48
SIA413DJ
MOSFET
P-TYPE
RDS(ON)
100MOHM @-1.5V
IMAX
3 A
VGS MAX
+/- 8V
SC70-6L
35 16
=PP3V3_LCD
82PF
5%
25V
2 CERM
0201
COMMENTS:
Q2200
RADAR:8379470
TABLE_ALT_ITEM
R2203
39K
1%
1/20W
MF
2 201
1%
1/20W
MF
2 201
R2204
21.5K2
D 3
R2205
D
2
R2290
C2202
47K
1UF
10%
2 6.3V
X5R
201
5%
1/20W
MF
2 201
10%
2 6.3V
CERM
402
C2230
C2232
82PF
82PF
5%
25V
2 CERM
0201
C2206
1000PF
5%
2 25V
CERM
0201
10%
16V
2 X7R
201
C2204
0.015UF
1
5%
1/20W
MF
201
L2201
LCDVDD_PWREN_L_R
10%
6.3V
X5R
0201
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
Q2201
1
G
PM_LCDVDD_PWREN
R2250_1
1%
1/20W
MF
201
LCDVDD_PWREN_L
C2203
0.1UF
R2250
1
155S0583
FERR-120-OHM-1.5A
PP3V3_S0_LCD_FERR
10K
10K
IN
NOSTUFF
R2210
R22111
376S0796
REF DES
0402B
C2241
NOSTUFF
1%
1/20W
MF
201 2
45 16
=PP3V3_LCD
5%
25V
2 CERM
0201
376S0903
BOM OPTION
CRITICAL
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
SIA413DJ
82PF
ALTERNATE FOR
PART NUMBER
TABLE_ALT_ITEM
Q2200
C2240
TABLE_ALT_HEAD
PART NUMBER
155S0667
CRITICAL
L2242,L5500,L5501,L5600,L5601,L5620
D
35 16
EDP CONNECTOR
SIA413DJ
CHANNEL
45
PP3V3_LCDVDD_SW_F
2N7002TXG
SOT-523-3
S 2
100K
1%
1/20W
MF
2 201
PP3V3_S0_LCD_FERR
45 16
518S0827
CRITICAL
502250-8051
100K
43 7
43 7
IN
IN
EDP_AP_AUX_N
C2250
1
201 6.3V
EDP_AP_AUX_P
C2251
1
201 6.3V
20.1UF
43 EDP_EMI_AUX_N
10%
1%
1/32W
MF
2 01005
TCM0605-1
54
52
3
EDP_AUX_CONN_N
0.1UF
2
43
EDP_EMI_AUX_P
EDP_AUX_CONN_P
NC
16 43
SYM_VER-2
90-OHM-50MA
L2242
R2241
100K
43 16
1%
1/32W
MF
2 01005
EDP_AUX_CONN_P
NC
NC
43 7
IN
EDP_AP_TX_N<0>
C2242
1
201 6.3V
43 7
IN
EDP_AP_TX_P<0>
C2243
1
201 6.3V
20.1UF
10%
43
EDP_EMI_TX_N<0>
43
EDP_EMI_TX_P<0>
X5R
0.1UF
2
10% X5R
4
SYM_VER-2
TCM0806-4SM
12-OHM-100MA-8.5GHZ
EDP_DATA_CONN_N<0>
16 43
EDP_DATA_CONN_P<0>
16 43
NC
NC
L2212
43 7
IN
43 7
IN
EDP_AP_TX_N<1>
C2244
1
201 6.3V
EDP_AP_TX_P<1>
C2245
1
201 6.3V
20.1UF
10%
43
EDP_EMI_TX_N<1>
43
EDP_EMI_TX_P<1>
X5R
0.1UF
2
10% X5R
4
SYM_VER-2
TCM0806-4SM
12-OHM-100MA-8.5GHZ
EDP_DATA_CONN_N<1>
EDP_DATA_CONN_P<1>
16 43
16 43
L2222
43 7
IN
EDP_AP_TX_N<2>
C2246
1
201 6.3V
43 7
43 7
43 7
IN
IN
IN
EDP_AP_TX_P<2>
C2247
1
201 6.3V
EDP_AP_TX_N<3>
C2248
1
201 6.3V
EDP_AP_TX_P<3>
C2249
1
201 6.3V
20.1UF
10%
1.00M2
EDP_EMI_TX_N<2>
43
EDP_EMI_TX_P<2>
43
EDP_EMI_TX_N<3>
43
EDP_EMI_TX_P<3>
X5R
0.1UF
2
10% X5R
20.1UF
10%
0.1UF
2
10% X5R
1
4
SYM_VER-2
TCM0806-4SM
12-OHM-100MA-8.5GHZ
1
4
SYM_VER-2
TCM0806-4SM
12-OHM-100MA-8.5GHZ
EDP_DATA_CONN_N<2>
EDP_DATA_CONN_P<2>
EDP_DATA_CONN_N<3>
EDP_DATA_CONN_P<3>
16 43
16 43
EDP_DATA_CONN_P<0>
16 43
43 37
IN
43 37
IN
43 37
IN
43 37
IN
LED_IO_5_B
LED_IO_3_B
LED_IO_1_B
LED_IO_6_A
LED_IO_4_A
LED_IO_2_A
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
EDP_AUX_CONN_N 16 43
EDP_DATA_CONN_N<0> 16 43
EDP_DATA_CONN_P<0> 16 43
EDP_DATA_CONN_N<1> 16 43
EDP_DATA_CONN_P<1> 16 43
EDP_DATA_CONN_N<2> 16 43
EDP_DATA_CONN_P<2> 16 43
EDP_DATA_CONN_N<3> 16 43
EDP_DATA_CONN_P<3> 16 43
LED_IO_6_B
LED_IO_4_B
LED_IO_2_B
LED_IO_5_A
LED_IO_3_A
LED_IO_1_A
IN
37 43
IN
37 43
IN
37 43
IN
37 43
IN
37 43
IN
37 43
NC
NC
16 43
CRITICAL
L2210
FERR-240-OHM-25%-300MA
35
R2282
EDP_DATA_CONN_N<1>
16 43
01005
=PPLED_REG_B
VOLTAGE=20.4V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
45
C2253
100PF
EDP_DATA_CONN_P<1>
PPLED_BACK_REG_B
0402
R2283
1.00M2
1
IN
1%
1/32W
MF
2 01005
L2202
EDP_DATA_CONN_N<0>
01005
1.00M2
1
100K
16 43
R2281
1.00M2
F-RT-SM
53
55
16 43
01005
IN
43 37
NC
3
L2232
X5R
R2280
1
43
43 37
7 43
R2242
16 43
X5R
10% X5R
EDP_AP_HPD OUT
J2200
R2240
16 43
5%
50V
CERM
402
C2270
820PF
10%
2 50V
CERM
402
01005
R2284
1.00M2
EDP_DATA_CONN_N<2>
16 43
CRITICAL
01005
1.00M2
1
EDP_DATA_CONN_P<2>
16 43
35
01005
EDP_DATA_CONN_N<3>
=PPLED_REG_A
VOLTAGE=20.4V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
01005
1.00M2
45
PPLED_BACK_REG_A
C2233
100PF
EDP_DATA_CONN_P<3>
0402
16 43
R2287
1
5%
50V
CERM
402
Apple Inc.
C2220
820PF
10%
50V
2 CERM
402
051-8773
SIZE
REVISION
10.0.0
16 43
01005
SYNC_DATE=01/19/2011
PAGE TITLE
FERR-240-OHM-25%-300MA
R2286
1.00M2
1
SYNC_MASTER=JOE
L2200
R2285
BRANCH
PAGE
22 OF 157
SHEET
16 OF 48
=PP3V0_GRAPE_MARIO1
C3005
10%
25V
X5R
402
0.1UF
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
U3003
CRITICAL
BOM OPTION
1
=PP3V0_GRAPE
PP18V_GRAPE
TABLE_5_HEAD
PART#
C3007
10%
25V
X5R
402
0.1UF
C3053
10%
25V
X5R
402
0.1UF
17 18 35
35
R3025
C3006
10K
0.1UF
5%
1/20W
MF
2 201
10%
6.3V
2 X5R
201
A6
45 17
F3
E9
B6
TABLE_5_ITEM
U3003
AG_SHLD_TST
18
18
5%
1/20W
MF
201
18
5%
1/20W
MF
201
18
C3070
18
0.1UF
18
10%
25V
2 X5R
402
NOSTUFF
18
18
18
18
18
18
18
18
CRITICAL
18
P/N 518S0828
18
18
41
39
MT_PANEL_OUT<36>
MT_PANEL_OUT<38>
17
17
MT_PANEL_IN<29>
MT_PANEL_IN<27>
MT_PANEL_IN<25>
MT_PANEL_IN<23>
MT_PANEL_IN<21>
MT_PANEL_IN<19>
MT_PANEL_IN<17>
MT_PANEL_IN<15>
MT_PANEL_IN<13>
MT_PANEL_IN<11>
MT_PANEL_IN<9>
MT_PANEL_IN<7>
MT_PANEL_IN<5>
MT_PANEL_IN<3>
MT_PANEL_IN<1>
AG_SHLD_TST_FLEX
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
17
18
18
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
MT_PANEL_OUT<37>
MT_PANEL_OUT<39>
MT_PANEL_IN<28>
MT_PANEL_IN<26>
MT_PANEL_IN<24>
MT_PANEL_IN<22>
MT_PANEL_IN<20>
MT_PANEL_IN<18>
MT_PANEL_IN<16>
MT_PANEL_IN<14>
MT_PANEL_IN<12>
MT_PANEL_IN<10>
MT_PANEL_IN<8>
MT_PANEL_IN<6>
MT_PANEL_IN<4>
MT_PANEL_IN<2>
MT_PANEL_IN<0>
17
17
18
18
18
18
18
18
18
40 18
18
40 18
18
18
18
18
18
18
18
F-RT-SM
J3010
MATES WITH LEFTMOST GRAPE FLEX TAIL
CRITICAL
41
39
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
MT_PANEL_OUT<0>
MT_PANEL_OUT<2>
MT_PANEL_OUT<4>
MT_PANEL_OUT<6>
MT_PANEL_OUT<8>
MT_PANEL_OUT<10>
MT_PANEL_OUT<12>
MT_PANEL_OUT<14>
MT_PANEL_OUT<16>
MT_PANEL_OUT<18>
MT_PANEL_OUT<20>
MT_PANEL_OUT<22>
MT_PANEL_OUT<24>
MT_PANEL_OUT<26>
MT_PANEL_OUT<28>
MT_PANEL_OUT<30>
MT_PANEL_OUT<32>
MT_PANEL_OUT<34>
K5
J5
I7
K9
I8
K10
I6
J7
K11
I9
J11
I11
H11
G11
G10
F10
C10
D10
E11
D11
B11
NC
B10
NC
C4
NC
A4
SPI1_GRAPE_MOSI
RST_GRAPE_L
MAKE_BASE=TRUE
IN
45 6
IN
42 17 5
GRAPE_MISO
=PP3V0_GRAPE
10K
10K
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
42 17 5
IN
42 17 5
IN
0.1UF
10%
2 6.3V
X5R
201
0.1UF
IN
SPI1_GRAPE_MOSI
7 1A2
9 2A2
IN
Z1_B_ADR<0> 18
Z1_B_ADR<1> 18
Z1_B_ADR<2> 18
5 2DIR
16 2OE*
GRAPE_FW_DNLD_EN_L
17
Z1_SCLK
OUT
Z2_H_CS_L
1B1 15
2B1 13
OUT
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VR_BOOST_SW
C3009
17
=PP3V0_GRAPE
35 18 17
17
D3000
SOD-323
1
2
45
Z1_MISO
OUT
Z1_CS_OE
1B2 14
2B2 12
OUT
18 40
17 18
APN:311S0485
40
0.1UF
17
10%
16V
X5R
402
CRITICAL
U3010
C3008
R3009 1
33PF
5%
25V
NP0-C0G 2
201
1M
1%
1/16W
MF-LF
402
18 17
R3066
PP18V_R_GRAPE
B0520WSXG
17
17 18
40
VLF
17
18
TO Z1/Z2
=PP3V0_GRAPE
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=18V
CRITICAL
L3000
45
5%
1/20W
MF
2 201
40
CRITICAL
10K
GND
VCC
BOOST CONVERTOR
4.7UH-700MA-280MOHM
5%
1/20W
MF
2 201
(A -> B)
17
VR_BOOST_L 1
3.3K
10%
2 6.3V
X5R
201
PQFP1
6 1A1
8 2A1
4 1DIR
1 1OE*
42 17 5
CRITICAL
17 18 35
U3007
SPI1_GRAPE_SCLK
SPI1_GRAPE_CS_L
45
18
VCCA VCCB
DIR_U3007
17
17
IN
MAKE_BASE=TRUE
17
18
18
SPI1_GRAPE_MISO
OUT
=PP3V0_GRAPE
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
18
TO Z2
OUT
C3000
1UF
0.1
1%
1/20W
MF
201
PP18V_GRAPE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=18V
NET_SPACING_TYPE=PWR
17 45
18 17
IN
IN
SN74LVC1G126DRYR-M
LLP
Z1_CS_OE
1 OE
Z2_H_CS_L
2 A
C3041
10%
2 6.3V
X5R
201
CRITICAL
C3050
U3009
0.1UF
10%
6.3V
2 X5R
201
17 18 35
0.1UF
17 18 35
17
17
GRAPE_MOSI
OUT
RST_GRAPE_Z1_L
OUT
RST_GRAPE_Z2_L
17
17
18
MAKE_BASE=TRUE
17
17
18
OUT
D
42 17 5
NC
NC
NC
NC
NC
B5
A3
C5
B3
GRAPE_SCLK
OUT
GRAPE_CS_L
MAKE_BASE=TRUE
GND
17
CRITICAL
SN74LVC1G125DRYR-M
LLP
42 17 5
OUT
SPI1_GRAPE_MISO
Z1_MOSI
NC 5
OE*
IN
18
NC
Y 4
Z1_CS_L
OUT
18
18 17
GND
10%
2 25V
X5R
603-1
IN
Z1_CS_OE
NC
NC
VIN
U3000
DO
NC
1
QFN-1
10%
2 6.3V
X5R
603
VR_BOOST_FBK
PM_BOOST_EN
18
C3001
2.2UF
THRML
PAD
9
SW
PGND
J3011
FB
CTRL
TPS61045
F-RT-SM
502250-8037
C3002
470PF
10%
16V
2 X5R-X7R
201
R3012
71.5K
1%
1/20W
MF
2 201
SYNC_MASTER=RAMSIN
GRAPE: GROUNDHOG,CONN,BOOST
DRAWING NUMBER
TABLE_ALT_HEAD
AGND_U3000
PART NUMBER
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
Apple Inc.
TABLE_ALT_ITEM
311S0523
XW3000
311S0485
U3007
311S0524
311S0533
U3009
311S0525
311S0532
U3010
SIZE
10.0.0
TABLE_ALT_ITEM
051-8773
REVISION
TABLE_ALT_ITEM
SM
SYNC_DATE=12/17/2010
PAGE TITLE
6
45
MAKE_BASE=TRUE
A_AD_R0 A10
A_AD_R1 B9
A_AD_R2 A9
17
38
40
K1
K2
I3
K3
J4
I4
K6
H6
SPI1_GRAPE_SCLK
SPI1_GRAPE_CS_L
G8
G7
G6
G5
F7
F6
E7
E6
E5
E3
D7
C9
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
D2
E2
F1
G1
G2
I1
H2
I2
MT_PANEL_OUT<0> 17
MT_PANEL_OUT<1> 17
MT_PANEL_OUT<2> 17
MT_PANEL_OUT<3> 17
MT_PANEL_OUT<4> 17
MT_PANEL_OUT<5> 17
MT_PANEL_OUT<6> 17
MT_PANEL_OUT<7> 17
MT_PANEL_OUT<8> 17
MT_PANEL_OUT<9> 17
MT_PANEL_OUT<10> 17
MT_PANEL_OUT<11> 17
MT_PANEL_OUT<12> 17
MT_PANEL_OUT<13> 17
MT_PANEL_OUT<14> 17
MT_PANEL_OUT<15> 17
MT_PANEL_OUT<16> 17
MT_PANEL_OUT<17> 17
MT_PANEL_OUT<18> 17
MT_PANEL_OUT<19> 17
MT_PANEL_OUT<20> 17
MT_PANEL_OUT<21> 17
MT_PANEL_OUT<22> 17
MT_PANEL_OUT<23> 17
MT_PANEL_OUT<24> 17
MT_PANEL_OUT<25> 17
MT_PANEL_OUT<26> 17
MT_PANEL_OUT<27> 17
MT_PANEL_OUT<28> 17
MT_PANEL_OUT<29> 17
MT_PANEL_OUT<30> 17
MT_PANEL_OUT<31> 17
MT_PANEL_OUT<32> 17
MT_PANEL_OUT<33> 17
MT_PANEL_OUT<34> 17
MT_PANEL_OUT<35> 17
MT_PANEL_OUT<36> 17
MT_PANEL_OUT<37> 17
MT_PANEL_OUT<38> 17
MT_PANEL_OUT<39> 17
17
MT_PANEL_OUT<1>
MT_PANEL_OUT<3>
MT_PANEL_OUT<5>
MT_PANEL_OUT<7>
MT_PANEL_OUT<9>
MT_PANEL_OUT<11>
MT_PANEL_OUT<13>
MT_PANEL_OUT<15>
MT_PANEL_OUT<17>
MT_PANEL_OUT<19>
MT_PANEL_OUT<21>
MT_PANEL_OUT<23>
MT_PANEL_OUT<25>
MT_PANEL_OUT<27>
MT_PANEL_OUT<29>
MT_PANEL_OUT<31>
MT_PANEL_OUT<33>
MT_PANEL_OUT<35>
GND
17
C6
D3
D4
D5
D6
D8
D9
E4
E8
F4
F5
F8 NC
F9
G3
G4
G9
H3
H4
H7
H8
H9
J6
K7
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
18
502250-8037
17
BON_L0
BON_L1
BON_L2
BON_L3
BON_L4
C8 BON_L5
18
38
40
OMIT
C7
A7
B7
B8
A8
Z1_BON_L<0>
Z1_BON_L<1>
Z1_BON_L<2>
Z1_BON_L<3>
Z1_BON_L<4>
Z1_BON_L<5>
18
18
CRITICAL
A1
B2
C2
D1
IN
VSTM0
VSTM1
VSTM2
VSTM3
VSTM4
VSTM5
VSTM6
VSTM7
VSTM8
VSTM9
VSTM10
VSTM11
VSTM12
VSTM13
VSTM14
VSTM15
VSTM16
VSTM17
VSTM18
VSTM19
VSTM20
VSTM21
VSTM22
VSTM23
VSTM24
VSTM25
VSTM26
VSTM27
VSTM28
VSTM29
VSTM30
VSTM31
VSTM32
VSTM33
VSTM34
VSTM35
VSTM36
VSTM37
VSTM38
VSTM39
VSTM40
VSTM41
VSTM42
VSTM43
VSTM44
VSTM46
VSTM45
VSTM47
IN
42 17 5
SN74AVCH4T245RSV
AG_SHLD_TST_FLEX
R3071
17
18
BGA
42 17 5
11
R3070
B1 MUX0
C1 MUX1
E1 MUX2
F2 MUX3
H1 MUX4
J1 MUX5
J2 MUX6
J3 MUX7
K4 MUX8
H5 MUX9
I5 MUX10
J8 MUX11
J9 MUX12
K8 MUX13
J10 MUX14
I10 MUX15
H10 MUX16
F11 MUX17
C11 MUX18
E10 MUX19
A11 MUX20
NC
B4 MUX21
NC
A5 MUX22
NC
A2 MUX23
NC
MUX_IN<0>
MUX_IN<1>
MUX_IN<2>
MUX_IN<3>
MUX_IN<4>
MUX_IN<5>
MUX_IN<6>
MUX_IN<7>
MUX_IN<8>
MUX_IN<9>
MUX_IN<10>
MUX_IN<11>
MUX_IN<12>
MUX_IN<13>
MUX_IN<14>
MUX_IN<15>
MUX_IN<16>
MUX_IN<17>
MUX_IN<18>
MUX_IN<19>
18
GROUNDHOG
VCC_DIG
VDDH
10
343S0525
BRANCH
PAGE
30 OF 157
SHEET
17 OF 48
ZEPHYR 1+ ASIC
0.1UF
4.7
5%
1/20W
MF
201
Z1_1V8_OUT
10%
6.3V
2 X5R
201
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
45
45 18
C3104
2.2UF
20%
4V
2 X5R
402
2.2UF
C3103
0.1UF
=PP3V0_GRAPE
10%
6.3V
2 X5R
201
45
NC
B6
C5
C9
CRITICAL VDDIO
SCLK
CS*
MISO
MOSI
U3100
BCM5973
2.2UF
Z1_GO
Z1_DONE
PCLK A12
Z1_PCLK
IN
17 18
IN
17
IN
17 18 40
OUT
BGA
STMOUT A10
STMIN A13
C3112
20%
4V
2 X5R
402
Z1_SCLK
Z1_CS_L
Z1_MISO
Z1_MOSI
A2
A1
A3
A4
B4
B3
Z1_BON_L<0>
Z1_BON_L<1>
Z1_BON_L<2>
Z1_BON_L<3>
Z1_BON_L<4>
Z1_BON_L<5>
C3110
0.1UF
10%
6.3V
2 X5R
201
TM A9
A9
18
A7
A8
17 40
NC
NC
17 40
17 40
F9
F8
G9
B7
C7
U3101
BON_L0
BON_L1
BON_L2
BON_L3
BON_L4
BON_L5
J8
H9
J9
H7
J7
H5
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
J2
J3
H4
J6
G3
F3
F4
H6
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
G6
E8
E9
F7
H_CS*
H_SCLK
H_SDI
H_SDO
H1
J1
H3
J4
A_CS*
A_SCLK
A_SDI
A_SDO
F1
G1
F2
G4
TM0
TM1
E7
D4
CLKIN
CLKOUT
E5
E4
RESET*
D5
BCM5974CKFBGH
FBGA
IN3_0
IN3_1
IN4_0
NC
B6 IN4_1
NC
17
17
C6 IN5_0
NC
C5 IN5_1
NC
17
17
B5 IN6_0
NC
A5 IN6_1
NC
17 40
17 40
A4
CFG1
100
C3106
C3191
10UF
0.1UF
Z1_1V8_OUT
C3192
18 45
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8V
NET_SPACING_TYPE=PWR
1%
1/20W
MF
201
10UF
20%
6.3V
2 CERM-X5R
0402-1
10%
2 6.3V
X5R
201
1.00 2
20%
2 6.3V
CERM-X5R
0402-1
R3120
B_ADR0
B_ADR1
B_ADR2
CRITICAL
IN1_0
IN1_1
B8 IN2_0
NC
C8 IN2_1
NC
17
R3181
1
Z2_3V3_1V8_IN
VDDIO VDDLDO
IN0_0
NC
B9 IN0_1
NC
18
RST_GRAPE_Z1_L
D
R3190
U3100_TM
RESET* A7
20%
6.3V
2 X5R-CERM1
402
45
0.1UF
A6
BON_L0
BON_L1
BON_L2
BON_L3
BON_L4
BON_L5
C3108
10%
2 6.3V
X5R
201
VDDANA VDDCORE
18
Z1_STMIN
Z1_B_ADR<0>
Z1_B_ADR<1>
Z1_B_ADR<2>
17 18
NC
NC
B_ADR0 A5
B_ADR1 B5
B_ADR2 A6
C3107
4.7UF
10%
2 6.3V
X5R
201
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
GO A8
DONE B7
0.1UF
10%
2 6.3V
X5R
201
D2
VDDANA
C10
G6
G7
G8
K4
K10
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
IN17
IN18
IN19
IN20
IN21
IN22
IN23
IN24
IN25
IN26
IN27
IN28
IN29
IN30
IN31
IN32
IN33
IN34
IN35
IN36
IN37
IN38
IN39
IN40
IN41
IN42
IN43
IN44
IN45
IN46
IN47
IN48
IN49
IN50
IN51
IN52
IN53
IN54
IN55
IN56
IN57
IN58
IN59
IN60
IN61
IN62
IN63
A11
B10
B9
B8
0.1UF
C3105
VOLTAGE=1.8V
NET_SPACING_TYPE=PWR
5%
1/20W
MF
2 201
V18
C3109
Z2_VDDANA
VDDDIG
17 18 35
100K
H2
G2
D7
C1
F1
J1
D2
D1
K7
H1
E1
E2
J2
G1
F2
J7
K2
N4
M5
N5
M6
N3
M3
L1
K1
L2
N6
M2
M4
M1
N2
N1
N13
N12
M10
M13
N8
M12
K13
L13
L12
M11
N11
M8
N9
M9
N10
K12
J13
F12
G13
NC
J12
NC
E12
NC
E13
NC
H13
NC
N7
NC
D13
NC
D12
NC
H12
NC
F13
NC
NC C13
E7
NC
M7
NC
G12
10UF
20%
2 6.3V
CERM-X5R
0402-1
NET_SPACING_TYPE=PWR
20%
2 4V
X5R
402
C3111
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.1MM
C3101
R3155
17 MT_PANEL_IN<0>
17 MT_PANEL_IN<1>
17 MT_PANEL_IN<2>
17 MT_PANEL_IN<3>
17 MT_PANEL_IN<4>
17 MT_PANEL_IN<5>
17 MT_PANEL_IN<6>
17 MT_PANEL_IN<7>
17 MT_PANEL_IN<8>
17 MT_PANEL_IN<9>
17 MT_PANEL_IN<10>
17 MT_PANEL_IN<11>
17 MT_PANEL_IN<12>
17 MT_PANEL_IN<13>
17 MT_PANEL_IN<14>
17 MT_PANEL_IN<15>
17 MT_PANEL_IN<16>
17 MT_PANEL_IN<17>
17 MT_PANEL_IN<18>
17 MT_PANEL_IN<19>
17 MT_PANEL_IN<20>
17 MT_PANEL_IN<21>
17 MT_PANEL_IN<22>
17 MT_PANEL_IN<23>
17 MT_PANEL_IN<24>
17 MT_PANEL_IN<25>
17 MT_PANEL_IN<26>
17 MT_PANEL_IN<27>
17 MT_PANEL_IN<28>
17 MT_PANEL_IN<29>
17 MUX_IN<0>
17 MUX_IN<1>
17 MUX_IN<2>
17 MUX_IN<3>
17 MUX_IN<4>
17 MUX_IN<5>
17 MUX_IN<6>
17 MUX_IN<7>
17 MUX_IN<8>
17 MUX_IN<9>
17 MUX_IN<10>
17 MUX_IN<11>
17 MUX_IN<12>
17 MUX_IN<13>
17 MUX_IN<14>
17 MUX_IN<15>
17 MUX_IN<16>
17 MUX_IN<17>
17 MUX_IN<18>
17 MUX_IN<19>
35
VOLTAGE=1.8V
MT_3V3_INT
1
=PP3V0_GRAPE_Z2
Z2_VDDCORE
45
E2
E3
C3102
G8
H2
J5
R3101
=PP3V0_GRAPE_Z1
E1
35
CFG0
IN7_0
NC
B4 IN7_1
NC
MODE
DEPENDENT 1
DEPENDENT 2
AUTONOMOUS
A3 IN8_0
NC
B3 IN8_1
NC
C2 IN9_0
NC
A2 IN9_1
NC
5%
1/32W
MF
01005
SLAVE
B2
IN10_0
NC
C1 IN10_1
NC
B1
IN11_0
NC
A1 IN11_1
NC
NC
BOOT_CFG0_R
BOOT_CFG1_R
NC
NC
R3173
0
5%
1/20W
MF
2 201
NC
R3171
ARMTAPMD*
F6
D3
BOOT_CFG0
BOOT_CFG1
G5
F5
FLOO
LFOO
G7
EXTFLLIN
INTERNAL PU
Z1_CS_OE_R
NC_BON_L1 46
AG_SHLD_TST
NC_BON_L3
Z1_CS_OE IN
17
18
17
46
NC_BON_L5
BON_L4
BON_L3
LOW
MODE
K48
FLOAT
FLOAT
FLOAT
K94
FLOAT
LOW
FLOAT
J2
46
IRQ_GRAPE_HOST_INT_L
PM_BOOST_EN
Z1_GO
Z1_DONE
BON_L5
OUT
OUT
CRITICAL ERROR
DEFAULT
J2
17
18
R3160
18
GRAPE_CS_L
GRAPE_MOSI
GRAPE_MISO
GRAPE_SCLK
TP_U3101_TCK
TP_U3101_TDI
TP_U3101_TDO
TP_U3101_TMS
IN
17
IN
17
OUT
17
IN
17
100K
5%
1/20W
MF
2 201
=PP3V0_GRAPE
Z2_H_CS_L
IN
Z1_SCLK
IN
Z1_MISO
IN
Z1_MOSI
OUT
17
R3107
100K
17 18 40
17 18
Z2_A_CS_L
TP_Z2_A_SCLK
TP_Z2_A_SDI
TP_Z2_A_SDO
5%
1/20W
MF
2 201
R3180
1
HOST_REFCLK
RST_GRAPE_Z2_L
100
5%
1/32W
MF
01005
TP_U3101_TM0
U3101_TM1
NC
17 18 35
17 18
CLK_32K_PMU
MAKE_BASE=TRUE
IN
IN
37 42
17
GND
0
1
E6
Z1_PCLK
5%
1/20W
MF
201
C3
C4
D6
D7
D8
C9
D9
G2
D1
H8
35 18 17
=PP3V0_GRAPE
SYNC_MASTER=RAMSIN
PAGE TITLE
C4
GNDDIG GNDIO
SYNC_DATE=12/17/2010
GRAPE: Z1, Z2
B11
B1
B2
B12
B13
C2
C3
C6
C7
C8
C11
C12
D3
D11
F7
H7
L3
L4
L5
L6
L7
L8
L9
L10
L11
GNDANA
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
31 OF 157
SHEET
18 OF 48
35 22 20
35
=PP1V7_VA_VCP
=PPVCC_MAIN_AUDIO
C3605
27PF
10UF
IRQ_CODEC_L
IN
RST_L63_L
10%
6.3V
2 X5R
201
I2S0_ASP_MCK_R
B9 MCLK
OUT
IN
IN
IN
42 5
IN
42 5
OUT
R36025%1
1/32W
I2S3_XSP_LRCK
I2S3_XSP_BCLK
I2S3_XSP_DOUT
I2S3_XSP_DIN
DMIC_SCLK_SENSOR
R36082 22
1
5%
1/32W
DMIC_SD_SENSOR
R36035%1
1/32W
C9 VSP_LRCLK
C10 VSP_SLCLK
A11 VSP_SDIN
22
MF
42
01005
B6 XSP_LRCLK
A6 XSP_SCLK
A8 XSP_SDIN/DAC2B_MUTE
22
42
MF
01005
5%
1/32W
DMIC_SCLK_CODEC
DMIC_SD_CODEC
B5 DMIC_SCLK
A5 DMIC_SD
46
NC_LINE_IN1_CODEC
46
NC_LINE_IN1_REF_CODEC
C5 LINEINA
C4 LINEINA_REF
NC_LINE_IN2_CODEC
NC_LINE_IN2_REF_CODEC
D6 LINEINB
D5 LINEINB_REF
NC_MIC1_BIAS_CODEC
D4 MIC1_BIAS
46
NC_MIC1P_CODEC
A3 MIC1
46
NC_MIC1N_CODEC
B3 MIC1_REF
46
NC_MIC1_FILT_CODEC
E2 MIC1_BIAS_FILT
MF
01005
46
R36212 22
1
46
MF
01005
46
B
22
OUT
43 22
IN
43 22
IN
43 22
IN
R3604
HSMIC_C_P
1%
1/32W
EXT_MIC_P
EXT_MIC_REF
R3605
HSMIC_C_N
1.00K
2
MIC2_DET
MF
01005
LINEOUT2A D7
LINEOUT2A_REF E7
LEFT_CH_OUT_P OUT
LEFT_CH_OUT_REF IN
LINEOUT2B F7
LINEOUT2B_REF G7
RIGHT_CH_OUT_P OUT
RIGHT_CH_OUT_REF IN
SPEAKEROUTA+ F6
SPEAKEROUTA- G6
NC
NC
SPEAKEROUTB+ F4
SPEAKEROUTB- G4
NC
NC
FLYC F11
20%
10V
2 X5R-CERM
402
21 40
21 40
21 40
20 43
20 43
20 43
20 43
46
46
C3617
2.2UF
VHP_FLYC
SPEAKER_VQ E6
FILT+ G1
C3618
2.2UF
20%
10V
2 X5R-CERM
402
SPKR_VQ
FILT_POS
D3 MIC2_DETECT
B1 MIC2
1.00K
2
MIC2_DET_REF C3 MIC2_DETECT_REF
MIC2_BIAS_FILTC1 MIC2_BIAS_FILT
C3611
4.7UF
NC
D2 MIC3A_BIAS
NC
A1 MIC3A
NC
A2 MIC3A_REF
NC
D1 MIC3A_BIAS_FILT
NC
F1 MIC3B_BIAS
NC
A4 MIC3B
NC
B4 MIC3B_REF
NC
E1 MIC3B_BIAS_FILT
C3609
B10 GNDD
20%
6.3V
X5R-CERM1 2
402
1
4.7UF
2.2UF
RECOMMENDED
C3614
CRITICAL
10UF
CRITICAL
1
C3613
10UF
20%
6.3V
2 CERM-X5R
0402-1
C3616
4.7UF
20%
6.3V
CERM-X5R 2
0402-1
C3615
20%
2 6.3V
X5R-CERM1
402
4.7UF
20%
2 6.3V
X5R-CERM1
402
SYNC_MASTER=KAVITHA
PAGE TITLE
20%
6.3V
X5R-CERM1 2
402
SYNC_DATE=02/03/2011
Apple Inc.
GND_AUDIO_CODEC
051-8773
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
SIZE
REVISION
10.0.0
MAX_NECK_LENGTH=75 MM
21 22
B2 MIC2_REF
1
1%
1/32W
MF
01005
45 21 19
21 43
IN
C2 MIC2_BIAS
EXT_MIC_BIAS
IN
43 22
A7 XSP_SDOUT
I2S_L63_XSP_SDOUT
HP_L OUT
CODEC_LINE_OUT_R OUT
CODEC_LINE_OUT_L OUT
CODEC_LINE_OUT_REF IN
NC_EAROUT_AP
NC_EAROUT_AN
23
21 43
LINEOUT1B G8
LINEOUT1A F8
LINEOUT1_REF E8
EAROUT+ G3
EAROUT- F3
A10 VSP_SDOUT
I2S_L63_VSP_SDOUT
IN
HP_R OUT
HP_REF
GND
OUT
B8 ASP_SDIN
A9 ASP_SDOUT
I2S_L63_ASP_SDOUT
22 45
HP_DET
D9
42 15 5
42
GND_AUDIO_HP_AMP 21
HPOUTA G10
D8
IN
1/32W
I2S2_VSP_LRCK
I2S2_VSP_BCLK
I2S2_VSP_DOUT
I2S2_VSP_DIN
2 22
MF
01005
MIN_LINE_WIDTH=1.0MM
MIN_NECK_WIDTH=0.2MM
HPOUT_REF F9
G5 GNDP
IN
1
R3601 5%
HPOUTB G9
C8 ASP_LRCLK
B7 ASP_SCLK
I2S0_ASP_LRCK
I2S0_ASP_BCLK
IN
I2S0_ASP_DOUT
IN
I2S0_ASP_DIN
OUT
IN
42 15 5
42 5
26
IN
42 15 5
42 5
26
E3 WAKE*
IN
2
SM
AUD_MIK_HS1_INT_L
42 15 5
XW3602
HP_DETECT E9
F2 GNDA
42 5
2
SM
WLCSP-1
E10 GNDCP
42 5
42 5
XW3601
INT*
21 45
SM
U3600
OUT
GND_AUDIO_CODEC 19
XW3600
CS42L63B
E5 RESET*
42 5
C3608
4.7UF
CRITICAL
E4
42 5
20%
2 4V
TANT
402-3
C3604
C7 SDA
C3607
20%
4V
2 X5R
01005
0.1UF
20%
6.3V
CERM-X5R 2
0402-1
C6 SCL
37
0.1UF
20%
4V
2 X5R
402
VCP D11
C3603
20%
4V
X5R 2
01005
VP F5
0.1UF
VA G2
C3602
20%
4V
X5R 2
01005
I2C0_SDA_1V8
BI
OUT
45 37
0.1UF
I2C0_SCL_1V8
IN
42 37 22 10 5
C3601
VD B11
10%
6.3V
X5R-CERM 2
01005
C3606
10UF
5%
16V
2 NP0-C0G
01005
VL C11
C3600
1000PF
42 37 22 10 5
35
=PP1V8_AUDIO
BRANCH
PAGE
36 OF 157
SHEET
19 OF 48
GAIN
12DB
9DB
6DB
3DB
0DB
SPEAKER AMPLIFIER
APN:353S3317)
TURN ON TIME: 3.5MS
TURN ON DELAY: ?MS
VDD
NC
NC
SHORT
100K
NC
GND
SHORT
100K
NC
NC
NC
XW3701
SM
35 22 20 19
=PPVCC_MAIN_AUDIO
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
40
AUD_SPKR_AMP1_PBUS
LEFT_CH_OUT_REF
43 19
IN
LEFT_CH_OUT_P
100
43
10%
6.3V
X5R
0201
R3701
2
43
6.3V
MAX983X4_L_IN_N
20 5
IN
NDIFPR_BADTERM MAX98304C
WLP
C3 IN+
OUT+ A2
C2 INOUT- A1
CRITICAL
0.015UF
LEFT_CH_P
43
U3700
201
C3702
1%
1/32W
MF
01005
X5R 2
0%
1/32W
MF
01005 2
C3704
10UF
20%
2 10V
X5R
0603-1
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
SPKRAMP_L_OUT_P
SPKRAMP_L_OUT_N
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
CRITICAL
MAX983X4_L_IN_P
C1 SHDN*
10%
6.3V
X5R
0201
NC
OUT
20 43
OUT
20 43
GAIN B3
MAX983X4_L_GAIN
B2 NC
AUD_SPKRAMP_MUTE_L
PGND
B1
OUT
0.00
PVDD
10%
0.015UF
43 19
0.1UF
C3701
R37031
A3
C3703
CRITICAL
R37001
R3702
100K
0.00
5%
1/32W
MF
01005 2
0%
1/32W
MF
01005 2
L3700
GAIN:6DB
240-OHM-0.2A-0.8-OHM
6
XW3700
OUT
SPK_ID
SPK_ID_FILT
0201
SM
45
GND_SPKR_AMP1
C3700
27PF
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
5%
25V
2 NP0-C0G
0201
SPEAKER CONNECTOR
APN 518S0672
CRITICAL
J3700
78171-6006
M-RT-SM
7
43 20
43 20
SPKRAMP_L_OUT_P
SPKRAMP_L_OUT_N
1
2
3
4
43 20
43 20
SPKRAMP_R_OUT_P
SPKRAMP_R_OUT_N
5
6
NOSTUFF
CRITICAL
1
XW3711
35 22 20 19
=PPVCC_MAIN_AUDIO
2 40
5%
43 19
IN
RIGHT_CH_OUT_P
43
RIGHT_CH_P
10%
6.3V
X5R
0201
RIGHT_CH_OUT_REF
43
MAX983X4_R_IN_P
C3712
1
43
C3714
WLP
C1 SHDN*
MAX983X4_R_IN_N
NOSTUFF
CRITICAL
C3751
C3753
100PF
10UF
16V
NP0-C0G
01005
100PF
5%
20%
2 10V
X5R
0603-1
OUT+ A2
OUT- A1
SPKRAMP_R_OUT_P
SPKRAMP_R_OUT_N
CRITICAL
10%
6.3V
X5R
0201
AUD_SPKRAMP_MUTE_L
U3710
CRITICAL
0.015UF
0%
1/32W
MF
01005 2
01005
NOSTUFF
CRITICAL
5%
16V
NP0-C0G
01005
MAX98304C
C3 IN+
C2 IN-
NC
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
OUT
20 43
OUT
20 43
GAIN B3 MAX983X4_R_GAIN
B2 NC
PGND
B1
20 5
OUT
X5R
201
C3711
0.015UF
1%
1/32W
MF
01005
43 19
6.3V
0.00
PVDD
10%
CRITICAL
100
0.1UF
100PF
2 NP0-C0G
01005
A3
C3713
C3752
16V
2 NP0-C0G
R3713
5%
16V
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
AUD_SPKR_AMP2_PBUS
R3711
C3750
100PF
SM
NOSTUFF
CRITICAL
GAIN:6DB
R37121
0.00
0%
1/32W
MF
01005 2
XW3710
SM
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
45
GND_SPKR_AMP2
SYNC_MASTER=KAVITHA
PAGE TITLE
SYNC_DATE=02/03/2011
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
37 OF 157
SHEET
20 OF 48
SM
HP_L
43 19
IN
AUD_HP1_MLBCON_L OUT
23 43
XW3850
43 19
SM
HP_R
IN
R38501
100
45 22 19
22 19
OUT
1%
1/32W
MF
2 01005
C3853
27PF
5%
2 16V
NP0-C0G
01005
HP_ZL
HP_ZR
1
10%
6.3V 2
X5R
201
23 43
R3851
1%
1/32W
MF
01005 2
C3850
OUT
100
33000PF
AUD_HP1_MLBCON_R
C3852
27PF
5%
16V
2 NP0-C0G
01005
C3851
33000PF
10%
2 6.3V
X5R
201
GND_AUDIO_HP_AMP
HP_REF
IN
C3854
27PF
5%
16V
2 NP0-C0G
01005
40 19
OUT
CODEC_LINE_OUT_REF
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
R3800
40 19
CODEC_LINE_OUT_L
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
IN
100
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
CODEC_LINE_OUT_R
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
IN
AUDIO_EMI_LO_L
IN
OUT
27
27
1%
01005
R3801
40 19
AV_EMI_DIFF_SENSE
100
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
AUDIO_EMI_LO_R
OUT
27
1%
01005
1
C3801
15PF
CODEC
C3803
5%
16V
2 NP0-C0G-CERM
01005
C3802
DOCK
15PF
5%
16V
NP0-C0G-CERM 2
01005
15PF
5%
16V
NP0-C0G-CERM 2
01005
XW3803
SM
45 19
GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
GND_AUDIO_PT_DK
IN
27 45
MAX_NECK_LENGTH=75 MM
SYNC_MASTER=KAVITHA
SYNC_DATE=02/03/2011
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
38 OF 157
SHEET
21 OF 48
R4211
35
=PP3V0_S2R_HALL_CHSW
5%
1/20W
MF
201
PPVDD_CHSW
1
0.1UF
R4210
=PPVCC_MAIN_AUDIO
10%
2 6.3V
X5R
201
5%
1/20W
MF
201
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=4.6V
CHS_CLAMPI
A1
35 20 19
C4200
VDD
R4203
U4200
TS3A8235YFP
WCSP
RAMPI
R4202
2.2K 2
D4
R4201
2.2K 2
1%
1/20W
MF
201
1%
1/20W
MF
201
1K
CRITICAL
IN
C4216 1
33PF
5%
16V
NP0-C0G-CERM 2
01005
C4212
15PF
B1 MIC1
C1 MIC2
5%
16V
NP0-C0G-CERM 2
01005
AUD_HS_MIC2_HI
C3
B3
GND
40 23
IN
40 23
B4
MIC
REF
D2
D1
SCL
SDA
ADDR
A3
A4
A2
IN
45 21 19
IN
HSMIC_C_P
CHS_CLAMPO
(HSMIC_C_P)
1
C4202
10UF
(HSMIC_C_N)
20%
6.3V
2 CERM-X5R
0402-1
C4201
20%
6.3V
2 CERM-X5R
0402-1
5%
1/20W
MF
201
AUD_HS_MIC2_RET
AUD_HS_MIC1_RET
470
EXT_MIC_P
1%
1/20W
MF
201
1000PF
C4213
2
19 43
OUT
19 43
TO CODEC
R4213
0.1UF
10%
6.3V
X5R
201
OUT
C4217
10%
2 16V
X7R
201
HSMIC_R_P
10UF
R4204NOSTUFF
1
2 43
10%
6.3V
X5R
201
NOSTUFF
19
R4212
0.1UF
CHS_CAP_REF
FROM HEADSET
40 23
CLAMPO
AUD_HS_MIC1_HI
EXT_MIC_BIAS
C4211
GND2
GND1
IN
D3
C4
B2
C2
40 23
RAMPO
CLAMPI
1%
1/20W
MF
201
43
HSMIC_R_N
470
EXT_MIC_REF
OUT
19 43
HSMIC_C_N
OUT
19 43
1%
1/20W
MF
201
I2C0_SCL_1V8 5 10 19 37 42
I2C0_SDA_1V8 5 10 19 37 42
R4205
GND_AUDIO_HP_AMP
5%
1/20W
MF
201
XW4200
SM
HP_REF
OUT
19 21
SYNC_MASTER=KAVITHA
SYNC_DATE=02/03/2011
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
42 OF 157
SHEET
22 OF 48
30-OHM-1.7A
40 24
IN
CONN_AUD_HEADSET_CHS_MIC2
AUD_HS_MIC2_HI
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.05MM
0402
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.05MM
CRITICAL
L4308
OUT
22 40
OUT
22 40
30-OHM-1.7A
40 24
IN
CONN_AUD_HEADSET_CHS_RET2
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
AUD_HS_MIC2_RET
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
0402
L4301
30-OHM-1.7A
24
IN
CONN_AUD_HEADSET_CHS_MIC1
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.05MM
AUD_HS_MIC1_HI
0402
OUT
22 40
OUT
22 40
OUT
23 40
AUD_HP1_MLBCON_R
IN
21 43
AUD_HP1_MLBCON_L
IN
21 43
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.05MM
CRITICAL
L4302
30-OHM-1.7A
24
IN
CONN_AUD_HEADSET_CHS_RET1
IN
CONN_AUD_HEADSET_DET
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
AUD_HS_MIC1_RET
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
0402
L4303
240-OHM-0.2A-0.8-OHM
40 24
0201
AUD_HP1_DET_H
CRITICAL
L4304
30-OHM-1.7A
43 24
OUT
CONN_AUD_HEADSET_RIGHT
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.1MM
2
0402
CRITICAL
L4306
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.1MM
30-OHM-1.7A
43 24
OUT
CONN_AUD_HEADSET_LEFT
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.1MM
2
0402
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.1MM
40 23
IN
AUD_HP1_DET_H
3.3K 2
5%
1/32W
MF
01005
HP_DET
NOSTUFF
1
OUT
19
C4310
4700PF
10%
2 10V
X7R
201
SYNC_MASTER=KAVITHA
SYNC_DATE=02/03/2011
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
43 OF 157
SHEET
23 OF 48
D
APN: 518S0828
CRITICAL
J5400
502250-8037
40
38
25
42 25 10
42 25
26
42 25
25
PM_REAR_CAM_SHUTDOWN_FILT
I2C2_SCL_3V0_ALS
I2C1_SCL_1V8_CONN
DMIC_DATA_CONN
ISP_CAM_0_SCL
CONN_IRQ_HALL
NC
NC
NC
C
43 25
43 25
MIPI0C_CAM_DATA_P<0>
MIPI0C_CAM_DATA_N<1>
F-RT-SM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
PM_FRONT_CAM_SHUTDOWN_FILT
I2C2_SDA_3V0_ALS
IRQ_ALS_INT_CONN_L
I2C1_SDA_1V8_CONN
DMIC_CLK_CONN
ISP_CAM_0_SDA
PP3V0_S2R_HALL_FLT
CAM0_RESET_L_FLT
NC
NC
NC
PP3V0_SENSOR_FLT
PP1V8_SENSOR_FLT
PP2V85_CAM_FLT
CLK_CAM_RF_CONN
MIPI0C_CAM_DATA_N<0>
MIPI0C_CAM_DATA_P<1>
25
10 25 42
25
25 42
26
25 42
26 45
26
10 26 45
26 45
26 45
CAM CLOCK 0
25 42
25 43
25 43
39
41
APN: 518S0828
CRITICAL
J5401
502250-8037
40
38
NC
43 25
42 25
43 25
43 25
26
37 5
5
26
40 23
43 23
40 23
23
MIPI0C_CAM_CLK_N
NC
ISP_CAM_1_SCL
MIPI1C_CAM_CLK_N
MIPI1C_CAM_DATA_N<0>
CONN_IRQ_PROX_INT_L
ONOFF_L
AUD_VOL_DOWN_L
CONN_IRQ_ACCEL_INT1_L
CONN_AUD_HEADSET_DET
CONN_AUD_HEADSET_RIGHT
CONN_AUD_HEADSET_CHS_MIC2
CONN_AUD_HEADSET_CHS_MIC1
NC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
F-RT-SM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
NC
NC
MIPI0C_CAM_CLK_P
CLK_CAM_FF_CONN
ISP_CAM_1_SDA
MIPI1C_CAM_CLK_P
B
25 43
25 42
CAM CLOCK 1
25 42
25 43
MIPI1C_CAM_DATA_P<0> 25 43
CONN_IRQ_GYRO_INT2 26
SRL_L 5 37
AUD_VOL_UP_L 5
NC
CONN_IRQ_ACCEL_INT2_L
CONN_IRQ_GYRO_INT1
CONN_AUD_HEADSET_LEFT
CONN_AUD_HEADSET_CHS_RET1
CONN_AUD_HEADSET_CHS_RET2
26
26
23 43
23
23 40
39
41
SYNC_MASTER=MARK
SYNC_DATE=01/11/2011
PAGE TITLE
CONNECTOR: SENSOR
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
54 OF 157
SHEET
24 OF 48
R5510
1
R5620
1
0
2
5%
1/20W
MF
201
SYM_VER-1
SYM_VER-1
43 7
BI
MIPI0C_AP_DATA_N<1>
MIPI0C_CAM_DATA_N<1>
BI
24 43
43 7
BI
MIPI0C_AP_DATA_P<1>
MIPI0C_CAM_DATA_P<1>
BI
24 43
43 7
IN
MIPI1C_AP_CLK_P
MIPI1C_CAM_CLK_P
OUT
24 43
43 7
IN
MIPI1C_AP_CLK_N
MIPI1C_CAM_CLK_N
OUT
24 43
NOSTUFF
2
MF
201
5%
1/20W
R5511
1
0
2
R5512
1
0
2
5%
1/20W
2
MF
201
R5610
1
SYM_VER-1
43 7
MIPI0C_CAM_DATA_N<0>
BI
MIPI0C_AP_DATA_P<0>
R5611
1
MIPI1C_AP_DATA_P<0>
MIPI1C_CAM_DATA_P<0>
BI
24 43
BI
MIPI1C_AP_DATA_N<0>
MIPI1C_CAM_DATA_N<0>
BI
24 43
24 43
BI
R5513
1
2
MF
201
5%
1/20W
R5612
1
5%
1/20W
NOSTUFF
0
2
5%
1/20W
MIPI0C_CAM_DATA_P<0>
BI
24 43
BI
43 7
43 7
NOSTUFF
MF
201
L5501
SYM_VER-1
MIPI0C_AP_DATA_N<0>
NOSTUFF
90-OHM-50MA
TCM0605-1
L5600
BI
MF
201
5%
1/20W
NOSTUFF
90-OHM-50MA
TCM0605-1
43 7
L5500
90-OHM-50MA
TCM0605-1
5%
1/20W
NOSTUFF
90-OHM-50MA
TCM0605-1
L5620
R5621
1
2
MF
201
5%
1/20W
NOSTUFF
02
MF
201
NOSTUFF
NOSTUFF
MF
201
L5601
90-OHM-50MA
TCM0605-1
SYM_VER-1
43 7
IN
MIPI0C_AP_CLK_N
43 7
IN
MIPI0C_AP_CLK_P
R5613
1
5%
1/20W
MIPI0C_CAM_CLK_N
OUT
24 43
MIPI0C_CAM_CLK_P
OUT
24 43
0
2
MF
201
NOSTUFF
U5500
800MHZ-100MA-27PF
0603
R5600
42 7
CLK_CAM_FF
IN
22 OHM
PLACE IT NEAR H4
22
IRQ_ALS_INT_L
I2C2_SCL_3V0
I2C2_SDA_3V0
OUT
IN
42 5
BI
R5602
42
CLK_CAM_FF_C
5%
1/16W
MF-LF
402
NOSTUFF
1
C5500
22
42
1
2
3
4
IN1
OUT1 5
IN2
IN3
OUT2 6
OUT3 7
IN4
OUT4 8
IRQ_ALS_INT_CONN_L
I2C2_SCL_3V0_ALS
I2C2_SDA_3V0_ALS
CLK_CAM_FF_CONN
IN
OUT
BI
OUT
24
10 24 42
10 24 42
24 42
GND
CLK_CAM_FF_FILT
9
10
5
42 5
5%
1/16W
MF-LF
402
100PF
5%
25V
2 CERM
201
U5502
800MHZ-100MA-27PF
0603
42 10 5
IN
42 10 5
BI
I2C1_SCL_1V8
I2C1_SDA_1V8
NC
NC
1
2
3
4
IN1
OUT1 5
IN2
IN3
OUT2 6
OUT3 7
IN4
OUT4 8
I2C1_SCL_1V8_CONN
I2C1_SDA_1V8_CONN
OUT
BI
24 42
24 42
NC
NC
9
10
GND
35 25
35 25
=PP1V8_CAM
100K
NOSTUFF
100K
5%
1/20W
MF
2 201
42 7
IN
ISP_AP_0_SDA
PM_REAR_CAM_SHUTDOWN
ISP_AP_0_SCL
R5601
42 7
IN
CLK_CAM_RF 1
22
0603
1
2
3
4
IN1
OUT1 5
IN2
OUT2 6
IN3
IN4
OUT3 7
OUT4 8
R5603
42
CLK_CAM_RF_C
5%
1/16W
MF-LF
402
22
ISP_CAM_0_SDA
PM_REAR_CAM_SHUTDOWN_FILT
ISP_CAM_0_SCL
CLK_CAM_RF_CONN
42 7
BI
IN
42 7
BI
24 42
OUT
24
OUT
24 42
BI
IN
OUT
IN1
OUT1 5
IN2
IN3
OUT2 6
OUT3 7
IN4
OUT4 8
OUT
BI
24
24 42
OUT
24
OUT
24 42
24 42
GND
42
CLK_CAM_RF_FILT
SYNC_MASTER=MARK
SYNC_DATE=01/11/2011
PAGE TITLE
NOSTUFF
1
Apple Inc.
C5501
100PF
051-8773
SIZE
REVISION
10.0.0
5%
2 25V
CERM
201
BRANCH
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
155S0643
155S0373
REF DES
COMMENTS:
TABLE_ALT_ITEM
CONN_IRQ_HALL
ISP_CAM_1_SDA
PM_FRONT_CAM_SHUTDOWN_FILT
ISP_CAM_1_SCL
GND
5%
1/16W
MF-LF
402
22 OHM
PLACE IT NEAR H4
1
2
3
4
9
10
IN
U5503
0603
IRQ_HALL
ISP_AP_1_SDA
PM_FRONT_CAM_SHUTDOWN
ISP_AP_1_SCL
37
800MHZ-100MA-27PF
800MHZ-100MA-27PF
9
10
BI
U5501
5%
1/20W
MF
2 201
R5502
42 7
NOSTUFF
R5501
=PP1V8_CAM
U5502,U5503,U5500,U5501,U5600,U5601
RADAR:8376668
PAGE
55 OF 157
SHEET
25 OF 48
U5600
800MHZ-100MA-27PF
0603
19
IN
19
OUT
IN
OUT
DMIC_SCLK_SENSOR
DMIC_SD_SENSOR
CAM0_RESET_L
IRQ_PROX_INT_L
1
2
3
4
IN1
OUT1 5
IN2
IN3
OUT2 6
OUT3 7
IN4
OUT4 8
DMIC_CLK_CONN
DMIC_DATA_CONN
CAM0_RESET_L_FLT
CONN_IRQ_PROX_INT_L
OUT
24
IN
24
OUT
24
IN
24
9
10
GND
U5601
800MHZ-100MA-27PF
0603
OUT
OUT
OUT
OUT
IRQ_GYRO_INT2
IRQ_GYRO_INT1
IRQ_ACCEL_INT1_L
IRQ_ACCEL_INT2_L
1 IN1
2 IN2
3 IN3
OUT1 5
OUT2 6
OUT3 7
4 IN4
OUT4 8
CONN_IRQ_GYRO_INT2
CONN_IRQ_GYRO_INT1
CONN_IRQ_ACCEL_INT1_L
CONN_IRQ_ACCEL_INT2_L
IN
24
IN
24
IN
24
IN
24
10
GND
L5610
240-OHM-0.2A-0.8-OHM
35
=PP3V0_S2R_HALL
PP3V0_S2R_HALL_FLT
24 45
0201
1
C5601
82PF
5%
2 25V
CERM
0201
C5602
1UF
10%
2 10V
X5R
402-1
C563
1000PF
10%
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
2 16V
X7R
201
L5611
240-OHM-25%-400MA
35
=PP1V8_SENSOR
PP1V8_SENSOR_FLT
24 45
0402
DCR 0.31
C5612
82PF
5%
25V
2 CERM
0201
C5613
1UF
10%
10V
2 X5R
402-1
C5620
1000PF
10%
16V
2 X7R
201
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
L5613
240-OHM-25%-400MA
35
=PP2V85_CAM
PP2V85_CAM_FLT
0402
DCR 0.31
C5617
82PF
5%
2 25V
CERM
0201
24 45
C5618
1UF
10%
10V
2 X5R
402-1
C5621
1000PF
10%
2 16V
X7R
VOLTAGE=2.85V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
201
L5612
240-OHM-25%-400MA
35
=PP3V0_OPTICAL
PP3V0_SENSOR_FLT
10 24 45
0402
DCR 0.31
1
C5614
82PF
5%
2 25V
CERM
0201
C5615
1UF
10%
10V
2 X5R
402-1
C5616
0.1UF
C5623
1000PF
10%
2 6.3V
X5R
201
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
10%
16V
2 X7R
201
SYNC_MASTER=MARK
SYNC_DATE=01/11/2011
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
56 OF 157
SHEET
26 OF 48
USB
35
7
1
PPVBUS_USB_EMI
2
0603
C5721
27PF
C5722
R5790
12PF
5%
2 25V
NP0-C0G
0201
VOLTAGE=5.0V
MIN_LINE_WIDTH=4.1MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
L5757
FERR-70-OHM-4A
MIN_LINE_WIDTH=4.1MM
MIN_NECK_WIDTH=0.2MM
DZ5760
5%
1/20W
MF
2 201
0402
5%
2 25V
NP0-C0G
0201
C5750
27PF
27V-100PF
100K
5%
2 25V
NP0-C0G-CERM
0201
PPVBUS_USB_PT_DK_CON
FL5711
43 11 10
0.01UF
IN
VIDEO_EMI_CVBS_PB
VIDEO_PT_DK_CON_CVBS_PB 27
28 43
42 4
IN
42 4
IN
R5730
R5731
JTAG_AP_TCK
JTAG_AP_TMS
0201
10%
2 25V
X7R
402
80-OHM-0.2A-0.4-OHM
IN
VIDEO_EMI_C_Y
L5716
R5795
42 4
BI
BI
43 11 10
USB_DK_D0_P
USB_DK_D0_N
USB_PT_DK_CON_D_P
IN
VIDEO_EMI_Y_PR
USB_PT_DK_CON_D_N
D5703_6
=PP1V8_S2R_MISC
VIDEO_PT_DK_CON_Y_PR
5 IO
2 NC
29 42
5%
2 25V
NP0-C0G
0201
D5703
RCLAMP0502N
SLP1210N6
27
AUDIO_PT_DK_RET
NUP412VP5XXG
1
C5705
R5700
0.200
NOSTUFF
C5706
27PF
5%
2 25V
NP0-C0G
0201
1%
1/20W
MF
2 201
DEVELOPMENT_JTAG
0.1UF
27 28
43
R5796
10%
2 6.3V
X5R
201
27 28
43
29
NOTE:
JTAG_AP_TMS = 3.3V:
JTAG_AP_TMS = 1.8V:
27PF
5%
2 25V
NP0-C0G
0201
LINEOUT
L5760
ACCESSORY
21
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
AUDIO_PT_DK_CON_LO_L
2
0402A
ACC_PT_DK_CON_PP3V3
2
C5751
DZ5790
0201
5%
2 25V
NP0-C0G
0201
27PF
8V-100PF
29 45
DISPLAYPORT
C5782
0.01UF
10%
2 10V
X5R
201
L5700
12-OHM-100MA-8.5GHZ
TCM0806-4SM
IN
DP_EMI_TX_P<0>
IN
DP_EMI_TX_N<0>
DP_PT_DK_CON_TX_P<0>
R5750
21
DP_PT_DK_CON_TX_N<0>
D5700_6
220K
IN
AUDIO_EMI_LO_R
ACC_PT_DK_CON_DET_L
5%
1/20W
MF
201
DZ5753
6.8V-100PF
0201
29
IO 4
NC 3
5 IO
2 NC
0201
5%
25V
2 NP0-C0G
0201
SLP1210N6
5%
2 25V
NP0-C0G
0201
27PF
27PF
L5762
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
22-OHM-25%-900MA
RCLAMP0502N
27PF
C5711
DZ5711
C5700
5%
25V
2 NP0-C0G
0201
D5700
C5752
GND
21
IN
AV_EMI_DIFF_SENSE
AV_PT_DK_CON_DIFF_SENSE
NOSTUFF
43 28
IN
43 28
IN
DP_EMI_TX_N<1>
5%
25V
2 NP0-C0G
0201
0201
1
SYM_VER-1
DP_EMI_TX_P<1>
DP_PT_DK_CON_TX_P<1>
DP_PT_DK_CON_TX_N<1>
D5701_6
C5712
27PF
6.8V-100PF
TCM0806-4SM
100K 2
DZ5712
L5701
12-OHM-100MA-8.5GHZ
R5740
150
5%
1/20W
MF
2 201
29 43
1/20W 201
MF 1%
R5753
37
OUT PORT_DOCK_ACCID
10K
ACC_PT_DK_CON_ID
2
1
0201-1
C5760
14.2V-6PF
0.01UF
10%
16V
X5R-CERM
0201
DZ5752
A
29 43
45 21
C5753
IN
GND_AUDIO_PT_DK
5%
2 25V
NP0-C0G
0201
IO 4
NC 3
5 IO
2 NC
RCLAMP0502N
SLP1210N6
C5701
27PF
GND
R5720
USB11_ACC_TX_N
ACC_PT_DK_CON_TX
5%
1/20W
MF
201
R5710
29 42
37
NOSTUFF
1
A1
C5754
DZ5751
35-OHM-50MA
TCM0605
5%
25V
2 NP0-C0G
0201
FW_ZENER_PWR
L5702
27PF
B1
OUT
USBULC6-2F3
43 28
IN
DP_EMI_AUX_P
43 28
IN
DP_EMI_AUX_N
DZ5720
GDZT2R5.1B
SYM_VER-1
47K
5%
1/20W
MF
201
DP_PT_DK_CON_AUX_P
DP_PT_DK_CON_AUX_N
D5702_6
GDZ-0201
29 43
IN
42 11
27
5%
2 25V
NP0-C0G
0201
D5701
AUDIO_PT_DK_RET
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0402
VBUS
27PF
L5763
30-OHM-1.7A
29
5%
1/20W
MF
201
29
0201
R5752
37
29
NOSTUFF
VBUS
29 43
R5751
PLACE
BY PMU
PMU_ADC_REF
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.07MM
AUDIO_PT_DK_CON_LO_R
UCLAMP0511Z
5%
1/20W
MF
2 201
10K
27PF
0402A
43 28
5%
25V
2 NP0-C0G
0201
FERR-120-OHM-1.5A
29 43
=PPVCC_MAIN_DOCK
OUT PORT_DOCK_ACC_DET_L
0201
L5761
C5710
SYM_VER-1
37
29
NOSTUFF
DZ5710
UCLAMP0511Z
43 28
35
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.1MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
L5714
IN
AUDIO_EMI_LO_L
0402A
FERR-120-OHM-1.5A
=PP3V3_PORT_ACC
U5730S IN = 2.13V
U5730S IN = 1.16V
C5708
FERR-120-OHM-1.5A
35
OUT
4 30 37 45
1%
1/32W
MF
2 01005
NOSTUFF
1
RST_AP_L
1.00M
C5707
5%
25V
2 NP0-C0G
0201
OUT A1
GND
C5730
27PF
5%
25V
2 NP0-C0G
0201
GND
UCSP
A2 IN
DEVELOPMENT_JTAG
27 28
43
NOSTUFF
27PF
SOT953
SM
27PF
NOSTUFF
U5700
XW5700
C5703
U5730
U5730_IN
OMIT
28
(JTAG_TMS)
MAX9061
B1 REF
39 35 5
VIDEO_PT_DK_CON_Y_PR
VIDEO_PT_DK_CON_C_Y
VIDEO_PT_DK_CON_CVBS_PB
AV_PT_DK_CON_RET
VBUS
28
27 28 43
IO 4
NC 3
1%
1/32W
MF
2 01005
0201
29 42
0
0
DEVELOPMENT_JTAG
523K
80-OHM-0.2A-0.4-OHM
SYM_VER-1
42 4
1
27 28 43
FL5708
35-OHM-50MA
TCM0605
DEVELOPMENT_JTAG
VIDEO_PT_DK_CON_C_Y
0201
DEVELOPMENT_JTAG
FL5707
43 11 10
(JTAG_TCK)
PT_DK_CON_P14
PT_DK_CON_P17
DEVELOPMENT_JTAG
80-OHM-0.2A-0.4-OHM
C5783
JTAG
ANALOG VIDEO
29 45
B2
FW_PT_DK_CON_PWR
1
29
C5780
0.01UF
10%
50V
2 X7R
402
BGA
A2
B2
29 43
TABLE_ALT_HEAD
R5721
42 11
OUT
USB11_ACC_RX_P
PART NUMBER
ALTERNATE FOR
PART NUMBER
377S0090
377S0081
ACC_PT_DK_CON_RX
5%
1/20W
MF
201
VBUS
29 42
NOSTUFF
1
C5755
27PF
5%
2 25V
NP0-C0G
0201
D5702
RCLAMP0502N
SLP1210N6
C5702
27PF
5%
25V
2 NP0-C0G
0201
2 NC
REF DES
COMMENTS:
DZ5751
RADAR:8972666
TABLE_ALT_ITEM
IO 4
NC 3
5 IO
BOM OPTION
GND
377S0111
DZ5710,DZ5711
377S0099
377S0107
377S0066
155S0625
155S0559
D5700,D5701,D5702,D5703
TABLE_ALT_ITEM
SYNC_MASTER=JOE
SYNC_DATE=01/19/2011
PAGE TITLE
RADAR:8849707
TABLE_ALT_ITEM
RADAR:8947642
TABLE_ALT_ITEM
L5700,L5701
RADAR:8423156
Apple Inc.
TABLE_ALT_ITEM
377S0116
377S0108
DZ5760
RADAR:8370432
051-8773
155S0276
155S0513
155S0320
QTY 4 RADAR:9625553
TABLE_ALT_ITEM
L5762
RADAR:9625601
10.0.0
R
TABLE_ALT_ITEM
155S0725
SIZE
REVISION
BRANCH
PAGE
57 OF 157
SHEET
27 OF 48
PLACEMENT NOTE:
R1250
SIGNAL_MODEL=EMPTY
NOSTUFF
R1251
150
SIGNAL_MODEL=EMPTY
NOSTUFF
R1252
43 28 7
DP_TERM_C1250
IN
SIGNAL_MODEL=EMPTY
NOSTUFF
43 28 7
IN
DP_AP_TX_N<0>
C5803
43 28 7
IN
DP_AP_TX_P<1>
C5804
43 28 7
IN
DP_AP_TX_N<1>
2
10%
10%
10%
C5805
43 7
IN
DP_AP_TX_N<2>
C5808
10%
C1251
IN
DP_AP_TX_P<2>
C5809
10%
0.1UF
5%
25V
2 CERM
201
43 7
IN
DP_AP_TX_N<3>
C5810
10%
0.1UF
43 7
IN
DP_AP_TX_P<3>
C5811
X5R
201
DP_EMI_TX_N<0>
6.3V
X5R
201
6.3V
X5R
201
DP_EMI_TX_P<1>
DP_EMI_TX_N<1>
6.3V
X5R
201
6.3V
X5R
201
2
10%
0.1UF
43 7
DP_EMI_TX_P<0>
6.3V
0.1UF
100PF
5%
25V
2 CERM
201
0.1UF
SIGNAL_MODEL=EMPTY
NOSTUFF
100PF
C5802
0.1UF
DP_TERM_C1251
C1250
DP_AP_TX_P<0>
0.1UF
7 28 43
5%
1/20W
MF
2 201
SIGNAL_MODEL=EMPTY
NOSTUFF
1
7 28 43
150
5%
1/20W
MF
2 201
7 28 43
150
5%
1/20W
MF
2 201
DISPLAYPORT AC COUPLING
R1253
150
5%
1/20W
MF
2 201
7 28 43
DP_AP_TX_P<1>
OUT
DP_AP_TX_N<1>OUT
SIGNAL_MODEL=EMPTY
NOSTUFF
NEAR U0600
DP_AP_TX_P<0> OUT
DP_AP_TX_N<0> OUT
DP_PT_DK_CON_TX_N<2>
DP_PT_DK_CON_TX_P<2>
6.3V
X5R
201
6.3V
X5R
201
DP_PT_DK_CON_TX_N<3>
OUT
27 43
OUT
27 43
OUT
27 43
OUT
27 43
OUT
28 43
OUT
28 43
OUT
28 43
OUT
28 43
35 6
=PP3V0_IO_MISC
R5820
100K
1%
1/32W
MF
2 01005
43 28 27
DP_EMI_AUX_N
43 28 27
DP_EMI_AUX_P
1
R5823
100K
2
10%
0.1UF
DP_PT_DK_CON_TX_P<3>
6.3V
X5R
201
1%
1/32W
MF
2 01005
29
2
1/20W 5%
29
PT_DK_CON_P16_R
1/20W 5%
R59101
R59121
5%
1/20W
MF
201 2
5%
1/20W
MF
201 2
43 7
BI
DP_AP_AUX_P
C5806
BI
DP_AP_AUX_N
C5807
2
10%
0.1UF
MF 201
43 7
6.3V
X5R
10%
6.3V
X5R
DP_EMI_AUX_P
BI
27 28 43
DP_EMI_AUX_N
BI
27 28 43
201
0.1UF
SNOTE
201
DEVELOPMENT_JTAG
DEVELOPMENT_JTAG
R5900
29
MF 201
SNOTE
R5913
PT_DK_CON_P14_R
1/20W 5%
R5902
PT_DK_CON_P14
27
29
PT_DK_CON_P17_R
MF 201
R5901
2
1/20W 5%
1/20W 5%
NO_XNET_CONNECTION=TRUE
SIGNAL_MODEL=EMPTY
R5914
NO_XNET_CONNECTION=TRUE
SIGNAL_MODEL=EMPTY
27
R5903
28 43
SNOTE
PT_DK_CON_P17
1
MF 201
MF 201
1/20W 5%
DP_PT_DK_CON_TX_P<2>
28 43
MF 201
SNOTE
R5915
45.3
1%
1/20W
MF
2 201
45.3
1%
1/20W
MF
2 201
FL5750
120-OHM-200MA
29
IN
HOME_L
HOME_EMI_L
OUT
5 37
0201
2
1
0201
5%
25V
2 NP0-C0G
0201
R5904
43 29
VIDEO_PT_DK_CON_Y_PR_R
1/20W 5%
27 43
43 29
VIDEO_PT_DK_CON_CVBS_PB_R
1/20W 5%
1
MF 201
SNOTE
NO_XNET_CONNECTION=TRUE
SIGNAL_MODEL=EMPTY
1/20W 5%
C5766
27PF
5%
25V
2 NP0-C0G
0201
R5906
VIDEO_PT_DK_CON_Y_PR
MF 201
R5905
27PF
6.8V-100PF
C5765
DZ5750
VIDEO_PT_DK_CON_CVBS_PB
27 43
MF 201
R5907
DP_PT_DK_CON_TX_P<3>
28 43
1/20W 5%
DP_PT_DK_CON_TX_N<3>
28 43
MF 201
SNOTE
R5916
R5917
NO_XNET_CONNECTION=TRUE
SIGNAL_MODEL=EMPTY
45.3
1%
1/20W
MF
2 201
45.3
1%
1/20W
MF
2 201
R5908
43 29
VIDEO_PT_DK_CON_C_Y_R
2
1/20W
5%
VIDEO_PT_DK_CON_C_Y
27 43
MF 201
R59091
0
5%
1/20W
MF
201 2
SYNC_MASTER=JOE
SNOTE
PAGE TITLE
SYNC_DATE=01/19/2011
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
58 OF 157
SHEET
28 OF 48
CRITICAL
J5900
CPB6450-0101F
53
45
27 PPVBUS_USB_PT_DK_CON
(JTAG_TCK_BACKUP)
(JTAG_TMS_BACKUP)
28
IN
28
IN
43 28
IN
43 28
IN
43 28
(JTAG_TCK)
(JTAG_TMS)
28
28
42 27
42 27
IN
IN
IN
OUT
IN
PT_DK_CON_P15_R
PT_DK_CON_P16_R
VIDEO_PT_DK_CON_Y_PR_R
VIDEO_PT_DK_CON_C_Y_R
VIDEO_PT_DK_CON_CVBS_PB_R
ACC_PT_DK_CON_PP3V3
45 27
PT_DK_CON_P14_R
PT_DK_CON_P17_R
ACC_PT_DK_CON_RX
ACC_PT_DK_CON_TX
M-ST-SM
51
10
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
54
52
FW_PT_DK_CON_PWR
ACC_PT_DK_CON_ID
OUT
27
OUT
27
(DP_HPD)
USB_PT_DK_CON_D_N
USB_PT_DK_CON_D_P
BI
27 42
BI
27 42
DP_PT_DK_CON_TX_P<0>
DP_PT_DK_CON_TX_N<0>
IN
27 43
IN
27 43
DP_PT_DK_CON_TX_P<1>
DP_PT_DK_CON_TX_N<1>
IN
27 43
IN
27 43
AV_PT_DK_CON_DIFF_SENSE
AUDIO_PT_DK_CON_LO_L
AUDIO_PT_DK_CON_LO_R
AV_PT_DK_CON_RET
ACC_PT_DK_CON_DET_L
DP_PT_DK_CON_AUX_P
DP_PT_DK_CON_AUX_N
HOME_L
OUT
27
IN
27
IN
27
OUT
27
OUT
27
BI
27 43
BI
27 43
OUT
28
SYNC_MASTER=JOE
SYNC_DATE=01/19/2011
PAGE TITLE
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
59 OF 157
SHEET
29 OF 48
998-3732
J6000
HOT-BAR-PADS
HB-SM
SNSV_BATT_POS_ACF
=BATT_POS_F_3G
35
NC
1
2
3
4
5
R6100
255K
C
37
OUT
45 37 27 4
ADC_IN7
NOSTUFF
1
C6100
0.01UF
10%
6.3V
2 X5R
01005
1%
1/32W
MF
2 01005
IN
45 37
IN
45 15 5
R6101
255K
1%
1/32W
MF
2 01005
OUT
OUT
45 5
IN
45 5
OUT
RST_AP_L
PM_RADIO_ON
RST_BB_PMU_L
GSM_TXBURST_IND
RST_BB_L
RST_DET_L
NC
NC
9
10
11
12
13
14
15
16
17
42 5
IN
42 5
OUT
42 5
IN
42 5
IN
42 5
OUT
OUT
37
OUT
HSIC_HOST_RDY
SPI2_IPC_SRDY
SPI2_IPC_SCLK
SPI2_IPC_MOSI
SPI2_IPC_MISO
BB_EMERGENCY_DWLD
PM_BB_HOST_WAKE
18
19
20
21
22
23
24
25
37
IN
42 11
BI
42 11
BI
BB_VBUS_DET
USB_BB_D_P
USB_BB_D_N
26
27
28
29
42 5
OUT
42 5
IN
42 5
OUT
42 5
IN
BI
UART1_BB_RXD
UART1_BB_TXD
UART1_BB_CTS_L
UART1_BB_RTS_L
30
31
32
33
34
42 5
IN
IPC_GPIO_X26
HSIC_BB_RDY
42 4
BI
HSIC0_BB_STB1
BI
HSIC0_BB_DATA1
35
36
37
38
39
42 4
40
41
NC
42
SYNC_MASTER=JOE
PAGE TITLE
SYNC_DATE=01/19/2011
CONNECTOR: X26
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
60 OF 157
SHEET
30 OF 48
WLAN/BT POWER
WLAN/BT BASEBAND
NOSTUFF
XW1
10%
16V
2 X7R
201
31
SR_VLX
PWR1000
U4
L1
2
1008
VDD_CBUCK_1V5
PWR1000
C58
4.7UF
20%
6.3V 2
X5R
603
31
VDD_LNLDO_1V2
1
C48
4.7UF
31
(NEAR M9)
20%
6.3V
2 X5R
603
20%
6.3V
2 X5R
603
C82
0.1UF
10%
2 6.3V
X5R
201
PWR100
PWR100
PWR100
PWR100
VDD_LDO_2V5
33 32 31 VDD_LDO_3V3
C50
31
1UF
10%
6.3V
2 CERM
402
C70
4.7UF
20%
2 6.3V
X5R
603
C86
0.1UF
VDD_VCO_1V2
1
C52
33 32 31
0.1UF
10%
6.3V
2 X5R
201
33 32 31
C85
10PF
C17
1UF
5%
2 25V
NPO
201
BATT_VDD_4330
1
C29
0.22UF
20%
2 6.3V
X5R
0201
31
10%
6.3V
2 CERM
402
VDD_XTAL_1V2
1
C54
220PF
31
10%
25V
2 X7R-CERM
201
31
VDD_LNLDO_1V2
VDD_WRF_1V2
1
C56
0.1UF
10%
6.3V
2 X5R
201
C
31
31
31
31
33 32 31
C79
100PF
5%
25V
2 CERM
201
VDD_CORE_1V2
VDD_LDO_2V5
VDD_BT_1V2
VDD_BTCORE_1V2
VDD_LDO_3V3
1
31
C53
10PF
VDD_BT_1V2
1
5%
25V
2 NPO
201
C55
0.1UF
10%
2 6.3V
X5R
201
SR_VDDBAT1_0
SR_VDDBAT1_1
SR_VDDBAT2
SR_VLX
L10
M9
M10
J11
J12
E1
F2
C78
10PF
5%
2 25V
NPO
201
31
VDD_CORE_1V2
33 32 31 VDD_LDO_3V3
35 33 31 VDD_IO_1V8
1
SR
VOUT_LNLDO1
VOUT_CLDO
VIN_LDO
LDO
VOUT_3P1
VOUT_3P3
WRF_VDD_VCOLDO_IN_1P8
WRF_VCOLDO_OUT_1P2
A4
BATT_VDD_4330
10%
6.3V
2 X5R
201
31
31
SYM 1 OF 3
K12
L12
K11
M12
C49
4.7UF
VDD_CORE_1V2
1
31
WLBGA
(NEAR E1)
CRITICAL
31
BCM4330XKUBG
2.2UH-1.3A-0.1OHM
CRITICAL
WRF_VDDPA
C3 WRF_PADRV_VDD
B7 WRF_VDDLNA_1P2_2G
H3 WRF_XTAL_VDD1P2
D2 WRF_LOGEN_A_VDD1P2
G4 WRF_VDDAFE_1P2
WLAN
D1 WRF_VDDANA_1P2
K1 WL_VDDC0
K7 WL_VDDC1
E7 WL_VDDC2
CKPLUS_WAIVE=PWRTERM2GND
F3 WRF_TCXO_VDD
E12
E10
F12
D10
FM_RFVDD1P2
FM_VDDPLL1P2
FM_VDD2P5
FM_VDDAUDIO
B9
B8
B11
K8
E8
A8
A11
BT_RFVDD1P2
BT_IFVDD1P2
BT_PLLVDD1P2
BT_VDDC0
BT_VDDC1
BT_PAVDD3P3
BT_VCOVDD1P2
L1
L3
M3
F7
HSIC_AVDD12
VDDIO_RF
WL_VDDIO
BT_VDDIO
FM
WL_REG_ON
BT_REG_ON
BT_RST*
MISC
EXT_PWM_REQ
EXT_SMPS_REQ
L9
K10
G10
J10
NC
K9
31
WLAN_ENABLE
IN
15 31 33
BT_RESET_N
IN
15 33
33 15
R10
49.9332
1
1%
1/20W
MF
201
NC
R16
JTAG
WRF_VCO_GND
WRF_PA_GND0
WRF_PA_GND1
WRF_PA_GND2
WRF_PADRV_GND
WRF_GNDLNA_2G
WRF_XTAL_GND
WRF_LOGEN_A_GND
WRF_AFE_GND
WRF_ANA_GND
WL_VSS_0
WL_VSS_1
WL_VSS_2
WRF_GND
GND
FM_RXVSS
FM_PLLVSS
FM_VSSVCO
FM_VSSAUDIO
BT_RFVSS
BT_IFVSS
BT_PLLVSS
BT_VSSC
BT
10K
HOST WAKE
HSIC HOST RDY / JTAG TMS
5%
1/20W
HSIC DEV RDY / JTAG TCK
MF
201
UART RX / JTAG TDI
PULL DOWN FOR GPIO
UART TX / JTAG TDO
F1
JTAG TRST_N
(UNUSED)
B2
JTAG_SEL F5
JTAG_SEL
B4
B6
C4
C7
H2
D3
F4
C1
K2
L5
E5
C5
IN
15
BI
32
IN
33 15
OUT
33 15
IN
33 31
IN
33 15
IN
33 15
OUT
15
IN
31
OUT
WLBGA
M6
M8
M5
L8
M7
L7
SDIO_DATA0_4330
SDIO_DATA1_4330
SDIO_DATA2_4330
SDIO_DATA3_4330
SDIO_CLK_4330
SDIO_CMD_4330
SDIO_DATA_0
SDIO_DATA_1
SDIO_DATA_2
SDIO_DATA_3
SDIO_CLK
SDIO_CMD
HSIC_STROBE_4330
HSIC_DATA_4330
HSIC_RREF
M2
L2
J1
HSIC_STROBE
HSIC_DATA
HSIC_RREF
2G_TSSI
E4
WRF_GPIO_OUT
WLAN_GPIO0
WLAN_GPIO1
WLAN_GPIO2
WLAN_GPIO3
WLAN_GPIO4
WLAN_GPIO5
WLAN_GPIO6
H4
G5
H5
D5
J8
L6
D8
WL_GPIO_0
WL_GPIO_1
WL_GPIO_2
WL_GPIO_3
WL_GPIO_4
WL_GPIO_5
WL_GPIO_6
SYM 3 OF 3
E11
F10
F11
C11
B10
C8
C10
F8
MISC
SR_PVSS M11
35 33 31
ANDGATE_TI
U8
TI
FERRITE_TY
FL2,FL4
TAIYO YUDEN
155S0337
155S0444
FERRITE_TDK
FL6,FL9
TDK
10%
6.3V
2 X5R
201
31
SDIO_DATA0_4330
31
SDIO_DATA3_4330
2
0201
5%
1/20W
MF
2 201
BT_GPIO5
VDD_WRF_1V2
PWR100
31
33 31
IN
WLAN_GPIO2
35 33 31
DEF.ARM STATE
GSPI
RESET
HSIC
RUNNING
BOOTLOADERLESS HSIC
R34
100K
SDIO_CLK_4330
33 31 15
FL9
BOOTSTRAP RESISTORS
VDD_IO_1V8
IN
R11
10K
5%
1/20W
MF
2 201
31
R33
5%
1/20W
MF
2 201
5%
1/20W
MF
2 201
R4
10K
5%
1/20W
MF
2 201
WLAN_GPIO6
BI
5%
1/20W
MF
2 201
31
SDIO_DATA2_4330
31
SDIO_DATA1_4330
B
1
R5
10K
5%
1/20W
MF
2 201
0.1UF
0201
VDD_BTCORE_1V2
PWR100
2.2M 2
1
U8
WLAN_GPIO2_R
2 A
WLAN_ENABLE_RC
1 B
NC
C81
Y 4
R28
HSIC_DEVICE_READY_R 1
HSIC_DEVICE_READY
OUT
GND
600-OHM-150MA
PAGE TITLE
R76
VDD_XTAL_1V2
PWR100
31
33 31
WLAN_GPIO2
15 31
5%
1/20W
MF
201
10%
6.3V
2 X5R
201
FL6
SOT891
5 NC
0.1UF
31
74AUP1G08GF
VCC
IN
WLAN_ENABLE
5%
1/20W
MF
201
600-OHM-150MA
HSIC_DEVICE_READY
A
WLAN BB & POWER
DRAWING NUMBER
15 31
Apple Inc.
5%
1/20W
MF
201
051-8773
SIZE
REVISION
10.0.0
NOSTUFF
RUNNING
C80
10%
6.3V
2 X5R
201
R27
VDD_IO_1V8
5%
1/20W
MF
2 201
15
BI
0201
15 33
R12
R26
15 31 33
RESET
5%
1/20W
MF
2 201
VDD_WRF_1V2
PWR100
IN
OUT
100K
VDD_CORE_1V2
PWR100
15
SDIO
100K
120-OHM-200MA
15
IN
R31
VDD_IO_1V8
31
FL4
PWR100
15
100K
35 33 31
VDD_BT_1V2
PWR100
0201
15
IN
NC
NC
NOSTUFF
100K
IN
OUT
BT_WAKE
VDD_LNLDO_1V2
PWR100
MODE
SDIO_CMD_4330
31
31
FL2
31
BT_WAKE
BT_HOST_WAKE
5%
1/20W
MF
2 201
TABLE_ALT_ITEM
F9
D9
H10
NC
H9
NC
H12
NC
J9
BT_GPIO_0
BT_GPIO_1
BT_GPIO_2
BT_GPIO_3
BT_GPIO_4
BT_GPIO_5
100K
R32
31
BT_PCM_CLK
BT_PCM_DIN
BT_PCM_DOUT
BT_PCM_SYNC
35 33 31
TABLE_ALT_ITEM
H6
J6
J5
K6
R35
SUPPLY FILTERING
31
BT_PCM_CLK
BT_PCM_IN
BT_PCM_OUT
BT_PCM_SYNC
NC
NC
NC
NC
SDIO_DATA1
C59
120-OHM-200MA
311S0398
155S0537
BOOTSTRAPPING OPTIONS
VDD_IO_1V8
TABLE_ALT_HEAD
155S0657
15 33
SDIO_DATA2
0.1UF
TABLE_ALT_ITEM
15 33
IN
PMU_AVSS L11
COMMENTS:
311S0548
BT_I2S_DO
BT_I2S_DI
BT_I2S_CLK
BT_I2S_WS
H7
G7
H8
G8
PULL-UP/DOWN RESISTORS
HSIC_AVSS M1
B
REF DES
15 33
GPIO6
BOM OPTION
15 33
OUT
BT_FEVSS A10
BT_VSS C9
33 31 15
ALTERNATE FOR
PART NUMBER
IN
OUT
BT_TM0 G11
TEST
0.1UF
PART NUMBER
BT_UART_RXD
BT_UART_TXD
BT_UART_RTS_N
BT_UART_CTS_N
BT_CLK_REQ_IN D7
BT_CLK_REQ_MODE E9
C57
10%
6.3V
2 X5R
201
E6
D6
F6
G6
BT_UART_RXD
BT_UART_TXD
BT_UART_RTS*
BT_UART_CTS*
UART
C3
1000PF
20%
6.3V
2 X5R
603
FM I2S
4.7UF
20%
6.3V
2 X5R
603
PCM
C2
4.7UF
BCM4330XKUBG
GPIO
C1
CRITICAL
U4
WLAN SDIO
BATT_VDD_4330
PWR1000 1
HSIC
33 32 31
WLAN LOGIC
BT/FM LOGIC
BATT_VCC
PWR500
WLAN GPIO
35 33
SHORT-0402
1
2
BRANCH
PAGE
61 OF 157
SHEET
31 OF 48
WLAN TRANSCEIVER
RF I/O PLAN
RF_SW_CTRL_0:
RF_SW_CTRL_1:
2G_CTRL_BT
2G_CTRL_RX
RF_SW_CTRL_2:
RF_SW_CTRL_3:
2G_CTRL_TX
2G_CTRL_PA_EN
RF_SW_CTRL_4:
RF_SW_CTRL_5:
5G_CTRL_RX
5G_CTRL_TX
RF_SW_CTRL_6:
RF_SW_CTRL_7:
5G_CTRL_LNA_EN
5G_CTRL_PA_EN
CRITICAL
U4
BCM4330XKUBG
WLBGA
SYM 2 OF 3
RF / CLOCKS
RF_SW_CTRL_0
WRF_RES_EXT E3
32
OUT
2G_CTRL_RX
2G_CTRL_TX
J2
L4
RF_SW_CTRL_1
RF_SW_CTRL_2
RF_SW_CTRL_3
RF_SW_CTRL_4
50_OHM
50_OHM
5G_RF_IN_4330
5G_RF_OUT_4330
33
M4
50_OHM
50_OHM
IN
2G_CTRL_PA_EN
5G_CTRL_RX
WRF_RFIN_5G B1
WRF_RFOUT_5G A2
OUT
33
WRF_RFOUT_2G A6
WRF_RFIN_2G A7
50_OHM
50_OHM
2G_RF_OUT_4330
OUT
32
50_OHM
50_OHM
2G_RF_IN_4330
IN
32
5G_TSSI
IN
33
OUT
32
OUT
33
OUT
33
OUT
33
OUT
5G_CTRL_TX
5G_CTRL_LNA_EN
33
OUT
5G_CTRL_PA_EN
K3
J4
J3
K4
A12
WLAN_XTAL_N_4330
LPO J7
CLK32K
50_OHM
IN
2G_RF_BT_4330
50_OHM
OUT
15 33
C47
BT_CLK_REQ_OUT G12 NC
33PF
R9
32
220
5%
25V
2
2 NP0-C0G
201
WLAN_XTAL_N_XTAL
1%
1/20W
MF
201
CRITICAL
Y1
WRF_TCXO_IN G3
BT_RF A9
5%
25V
NP0-C0G 2
201
FM_RXP
FM_RXN
C46
33PF
WLAN_XTAL_P_4330
FM_TX
D11
WRF_XTAL_OP G1
WRF_XTAL_ON H1
1%
1/20W
MF
201
SM-2
FM_AOUT1
FM_AOUT2
C12
NC
D12
NC
WRF_A_TSSI_IN D4
RF_SW_CTRL_7
15K
NC
WLAN_RBIAS_4330
NC
B12
NC
RF_SW_CTRL_5
RF_SW_CTRL_6
FM
CLOCKS
32
RF
K5
WLAN RF
2G_CTRL_BT
37.4MHZ-18PF-10PPM
OUT
BT
R1
32
2.4GHZ TX
3.3NH+/-0.1NH-0.45A
+/-0.1PF%
25V
CER
0201
1.2NH+/-0.1NH-0.75A
LFB182G45CG3C179
3 2G_RF_BPF1_OUT 2
1
2G_RF_BPF1_IN 1
2G_RF_PA_IN
50_OHM 50_OHM
50_OHM 50_OHM
50_OHM
0201
50_OHM
1
CRITICAL
L14
4.7NH-3%-0.35A
L20
CRITICAL 0201
0201
0201
RFOUT
MF2425PL-DL0767
1.8PF
100PF
+/-0.1PF
25V
C0G 2
201
NOSTUFF
NOSTUFF
HIGH(5.0GHZ) 4
5G_RF
3.3NH+/-0.1NH-0.45A
1
2G_RF_SP3T_LNA1
0201
2G_RF_SP3T_LNA2
NOSTUFF
VCTL2
VCTL3
MODE
1
0
0
1
0
0
BT TX/RX
WLAN RX
0
0
0
0
0
1
LNA BYPASS
WLAN TX
ANTENNA CONNECTOR
BI
32
CRITICAL
C21
33
BI
RF_CAL_MATCH
50_OHM
50_OHM
1
L6
+/-0.1PF
25V
COG-CERM
0201
RF_CAL 1
50_OHM IN
1 50_OHM
OUT
RF_ANT_MATCH1
50_OHM
50_OHM
GND
L7
C11
F-ST-SM
0.00 2
1%
1/20W
MF
0201
0201
NOSTUFF
NOSTUFF
2
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
5.6NH
A
PAGE TITLE
L9
+/-0.1PF
25V
2 C0G
201
NOSTUFF
RF_ANT
50_OHM
50_OHM
1.0PF
0201
NOSTUFF
5.6NH
0201
CRITICAL
MM4829-2702
R3
5.6NH
J2
CRITICAL
4.7PF
5
3
32
J1
2G_RF
GND
BI
MM8030-2600RK0
0805
LOW(2.4GHZ) 6
ANT(COMMON) 2
0201
C69
5%
2 25V
CERM
201
L5
100PF
5%
2 25V
CERM
201
L43
1.8PF
+/-0.1PF
25V
C0G 2
201
VCTL1
C5
32
2G_RF
50_OHM
50_OHM
NOSTUFF
9
7
C45
FL10 CRITICAL
2.4-5.0GHZ
100PF
C20
8.2PF
3 2G_RF_BPF2_OUT
1
2
50_OHM
50_OHM
2
0201
C44
C4
5%
2 25V
CERM
201
GND
32
0201
CER
25V
+/-0.1PF%
2
1%
1/20W
MF
201
R15
10K
2G_RF_PA_OUT
50_OHM
50_OHM
1
2.4GHZ/5GHZ DIPLEXER
SW_OUT/NC LNA_IN/NC 6
NOSTUFF
CRITICAL
2
2G_RF_BPF2_IN1
50_OHM
50_OHM
32
1.2NH+/-0.1NH-0.75A
LLP
4 RFIN
4.7NH-3%-0.35A
NOSTUFF
2
RX
TX
2G_CTRL_BT IN
2G_CTRL_RX IN
2G_CTRL_TX IN
L24
THRM_PAD
L15
VC1 1
VC2 11
VC3 3
BT
CRITICAL
U6
1.2NH+/-0.1NH-0.75A
NOSTUFF
8
2G_RF_TX_SP3T 4
50_OHM
50_OHM
5
2G_RF_SP3T_ANT
50_OHM
50_OHM
1
OUT 2G_RF_IN_4330
50_OHM
C64 1 50_OHM+/-0.1PF%
C68 1
1.8PF
25V
1.8PF
+/-0.1PF
CER
+/-0.1PF
25V 2
25V 2
0201
C0G
C0G
201
201
32
2G_RF_OUT_4330
50_OHM 50_OHM
31
IN
L16
50_OHM
50_OHM
2 2G_RF_RX_SP3T
CRITICAL
8.2PF
32
FL8 CRITICAL
2450MHZ-3.50DB
C37
5%
25V
NP0-C0G 2
201
2G_TSSI OUT
8.2PF
10%
6.3V
2 X5R
201
R14
0.1UF
C42
33PF
1%
1/20W
MF
201 2
C39
2.2K
VCC1 3
VCC2 2
2G_PA_VCC2
VCTRL 5
2G_PA_VCRL
VDET 6
2G_PA_VDET
0805
8.2PF
ANT 2
50_OHM
50_OHM
2G_RF_BT_SP3T12
FL1 CRITICAL
2.45GHZ-2.4DB
C18
QFN
C66
2.4GHZ BPF
0201
CER
25V
+/-0.1PF%
CRITICAL
U3
SKY65513-11
0201
CRITICAL
VDD
0201
5%
2 25V
NPO
201
SP3T+LNA
NOSTUFF
5%
25V
2 NPO
201
NOSTUFF
NOSTUFF
10PF
10%
6.3V
2 X5R
201
L23
10PF
1.8PF
+/-0.1PF
25V
C0G 2
201
0.1UF
31 33
C6
25V
CER
0201
+/-0.1PF
25V
C0G 2
201
32
C43
C89
3
2
L17
4.3NH-3%-0.35A
1
1%
1/20W
MF
201
20%
6.3V
X5R 2
603
10%
2 6.3V
X5R
201
R2
4.7UF
0.1UF
47
1.8PF
2G_CTRL_PA_EN IN
C41
C38
C67
6.8NH-5%-0.3A
33 31 BATT_VDD_4330
1
2
2G_RF_BT_4330
50_OHM
C63 1 50_OHM+/-0.1PF%
IN
VDD_LDO_3V3
PWR100
0201
CRITICAL
10
2G_SP3T_VDD
8.2PF
32
PWR100
C65
3.3NH+/-0.1NH-0.45A
BRANCH
PAGE
62 OF 157
SHEET
32 OF 48
VCTL2
0
1
0
PA_EN
0
0
1
LNA_EN
1
1
0
MODE
RX SUPERBYPASS MODE -- 26DB GAIN STEP
RX
TX
31 32
CRITICAL
0201
5G_LNA_CHOKE
C76
100PF
+/-0.1PF
25V
C0G-CERM
0201
0.6PF
+/-0.10PF
25V
CERM 2
201
0.6PF
+/-0.10PF
2 25V
CERM
201
NOSTUFF
NOSTUFF
THRM
PAD
C8
100PF
GND
5%
25V
2 CERM
201
+/-0.1PF
25V
C0G-CERM
0201
C10
CRITICAL
0.6PF
+/-0.05PF
25V
CERM 2
0201
0.6PF
+/-0.10PF
25V
2 CERM
201
U9
C72
DEA165375BT
2.0PF
1
3 5G_RF_RX_BPF_IN 1
2
50_OHM
50_OHM
50_OHM
50_OHM
C71 1
+/-0.1PF
25V
C0G-CERM
0201
5%
25V
2 CERM
201
CRITICAL
CRITICAL
C84
UPG2185T6R
C73
0.6PF
5G_RF_RX
50_OHM
50_OHM
+/-0.05PF
2 25V
CERM
0201
TSSON
OUTPUT1
INPUT 5
OUTPUT2
6
4
NOSTUFF
2.0PF
2
5G_RF_TRSW 1
50_OHM
50_OHM
+/-0.1PF
25V
C0G-CERM
0201
VCONT1
VCONT2
GND
2
NOSTUFF
5G_RF
50_OHM
50_OHM
BI
32
C60
2.0PF5G_RF_RX_BPF_OUT
32
0201
5G_RF_IN_4330
50_OHM
50_OHM
5
2
OUT
32
C77
32
5G_CTRL_TX IN
C75
NOSTUFF
2.0PF
FL7 CRITICAL
5.0GHZ-1.7DB
CRITICAL
32
QFN
50_OHM
V_ENABLE 1 5G_CTRL_LNA_EN IN
50_OHM
5G_RF_LNA_OUT 4 RF_OUT
5G_RF_LNA_IN
RF_IN 3
50_OHM
1 C62
50_OHM
2
4
C61
5G_CTRL_RX IN
100PF
5%
25V
CERM 2
201
5GHZ BPF
CRITICAL
U1
SKY65404-31
CRITICAL
L22
VCC
1.0NH+/-0.1NH-0.75A
4.7PF
+/-0.1PF
25V
2 COG-CERM
0201
VDD_LDO_3V3
0.01UF
10%
10V
2 X5R
201
C87
L46
C7
1.0NH+/-0.1NH-0.75A
5GHZ LNA
5GHZ PA
33 32 31
BATT_VDD_4330
1
C32
4.7UF
C34
TEST POINTS
10PF
20%
2 6.3V
X5R
603
5%
25V
2 NPO
201
IN 5G_CTRL_PA_EN
62
R13
5G_PA_VCTL
5%
1/20W
MF
201
5G_PA_VDET
1
1
C74
C36
100PF
5G_TSSI
1
1%
1/20W
MF
201
27PF
5%
2 25V
NP0-C0G
0201
5%
2 25V
CERM
201
2.2K 2
OUT
32
TP11 WLAN_ENABLE
15 31
TP-P6
R7
10K
1%
1/20W
MF
2 201
TP71 WLAN_GPIO0
TP26
1 BT_UART_TXD
15 31
TP-P6
C35
25V
C0G-CERM
0201
TP51 WLAN_GPIO3
A
TP-P6
TP10
1 WLAN_GPIO4
15 31
2
0201
NOSTUFF
TP19
1
TP-1P0-TOP
NOSTUFF
15 31
TP81 BT_HOST_WAKE
15 31
TP91 BT_WAKE
15 31
TP-P6
TP61 CLK32K
15 32
TP-P6
NOSTUFF
1
TP18
1
TP-1P0-TOP
15 31
NOSTUFF
PAGE TITLE
PP29
P4MM
Apple Inc.
1 HSIC_DATA_4330
1 HSIC_STROBE_4330
15 31
SIZE
10.0.0
051-8773
REVISION
15 31
PP30
P4MM
31 35
NOSTUFF
TP-P6
SM
PP
VDD_IO_1V8
NOSTUFF
TP-P6
SM
PP
TP-1P0-TOP
15 31
TP-P6
NOSTUFF
TP17
1
NOSTUFF
15 31
NOSTUFF
L21
1.0NH+/-0.1NH-0.75A
NOSTUFF
5G_RF_TX
50_OHM
50_OHM
31 32 33
NOSTUFF
TP-P6
TP29
1 BT_UART_CTS_N
A
BATT_VDD_4330
TP-1P0-TOP
NOSTUFF
31
NOSTUFF
2.0PF
2
5G_RF_TX_MATCH 1
50_OHM
50_OHM
+/-0.1PF
2
0201
NOSTUFF
+/-0.1PF
25V
C0G-CERM
0201
L12
VDET 8
TP41 WLAN_GPIO2
TP-P6
C83
2.0PF
5G_RF_PA_OUT
50_OHM
50_OHM
1.0NH+/-0.1NH-0.75A
VCTL
RFOUT
THRM
PAD
LGA
RFIN
2
3
2
0201
L11
NC/GND
NC/GND
5G_RF_PA_IN
50_OHM
50_OHM
NOSTUFF
2
0201
L10
1.0NH+/-0.1NH-0.75A
+/-0.1PF
25V
C0G-CERM
0201
NOSTUFF
1.0NH+/-0.1NH-0.75A
IN 5G_RF_OUT_4330
50_OHM
50_OHM
VCC3 7
VCC12 6
U10
MF5060PK-DL0967
C33
2.0PF
32
TP16
1
15 31
NOSTUFF
TP28
1 BT_UART_RTS_N
31 35
NOSTUFF
TP-P6
BATT_VCC
TP-1P0-TOP
TP-P6
TP27
1 BT_UART_RXD
TP-P6
CRITICAL
A
A
15 31
NOSTUFF
CRITICAL
TP15
1
15 31
NOSTUFF
TP31 WLAN_GPIO1
A
CRITICAL
TP21 BT_RESET_N
NOSTUFF
NOSTUFF
CRITICAL
TP-P6
NOSTUFF
BRANCH
PAGE
63 OF 157
SHEET
33 OF 48
CRITICAL
35
=BATT_POS_CONN
J7500
BATT-J2
TP7500
1
F-RT-SMTH
7
6
TP-P55
NOSTUFF
FL7500
240-OHM-0.2A-0.8-OHM
37 5
BI
BATTERY_SWI
1
2
3
4
5
BATT_SWI_CONN
BATT_NTC_CONN
0201
NET_SPACING_TYPE=ANLG
R7541
37
BI
BATTERY_NTC
NET_SPACING_TYPE=ANLG
5%
1/20W
C7522
33PF
MF
201
5%
25V
NP0-C0G 2
201
C7523
33PF
5%
25V
NP0-C0G 2
201
C7524
1000PF
10%
16V
X7R 2
201
C7525
82PF
5%
25V
CERM 2
0201
HDQ
THERM
PACK_NEG
PACK_POS
SENSE
BATT_SNS
APN:516S0926
NET_SPACING_TYPE=ANLG
MIN_LINE_WIDT=0.25MM
MIN_NECK_WIDT=0.15MM
TP7501
1
A
TP-P55
NOSTUFF
TP7502
1
A
TP-P55
SYNC_MASTER=MADHAVI
NOSTUFF
SYNC_DATE=01/13/2011
PAGE TITLE
TP7503
1
TP-P55
DRAWING NUMBER
NOSTUFF
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
75 OF 157
SHEET
34 OF 48
BUCK RAILS
PROGRAMMABLE ON/OFF
LDO1
45 36
PP3V0_GRAPE
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
LDO2
45 40 36
PP1V7_VA_VCP
MAKE_BASE=TRUE
VOLTAGE=1.7V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
=PP3V0_GRAPE
=PP3V0_GRAPE_MARIO1
=PP3V0_GRAPE_Z1
=PP3V0_GRAPE_Z2
BUCK0
17 18
17
45 36
PP1V25_CPU
MAKE_BASE=TRUE
VOLTAGE=1.25V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
18
18
=PP1V7_VA_VCP
BUCK2
45 36
PP1V2_SOC
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
LDO3
45 36
PP3V0_VIDEO
45 36
PP3V0_OPTICAL
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
45 37 36
PPVCC_MAIN
MAX_NECK_LENGTH=3 MM
=PPVDD_SOC_H4
45 36
PP3V2_LDO5
MAKE_BASE=TRUE
VOLTAGE=3.2V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
45 36
PP3V3_ACC
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
BUCK3
=PP3V0_OPTICAL
45 36
PP1V8_S2R
26
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.15 MM
NET_SPACING_TYPE=PWR
45 36
PP3V0_VIDEO_BUF
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
=PP1V8_S2R_MISC
VDD_IO_1V8
=PP1V8_S2R_DDR
5 27 39
31 33
BATTERY
13 14
45 39 36
45 36
PP3V2_S2R_USBMUX
LDO9
45 36
PP3V0_IO
MAKE_BASE=TRUE
VOLTAGE=3.2V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
PPBATT_VCC
MAKE_BASE=TRUE
VOLTAGE=4.2V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
NET_SPACING_TYPE=PWR
=BATT_POS_F_3G
=BATT_POS_CONN
BATT_VCC
30
34
31
33
USED BY WIFI_BT
MAX_NECK_LENGTH=3 MM
=PP3V2_LDO5
CPU1V8_SW
(BUCK3)
36
45
PP1V8
MAKE_BASE=TRUE
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP3V3_PORT_ACC
27
=PP3V0_VIDEO_BUF
11
WDIG_SW
(BUCK3)
MAX_NECK_LENGTH=3 MM
LDO8
19 20 22
27
MAX_NECK_LENGTH=3 MM
MAX_NECK_LENGTH=3 MM
LDO7
37
MAX_NECK_LENGTH=3 MM
LDO6
=PPVCC_MAIN_LED
=PPVCC_MAIN_AUDIO
=PPVCC_MAIN_DOCK
MAX_NECK_LENGTH=3 MM
LDO5
MAKE_BASE=TRUE
VOLTAGE=4.7V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP3V0_VIDEO_H4
MAX_NECK_LENGTH=3 MM
LDO4
=PPVDD_CPU_H4
MAX_NECK_LENGTH=3 MM
19
CHARGER MAIN
=PP3V2_S2R_USBMUX
45 36
PP1V8_GRAPE
11
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
=PP1V8_CAM
=PP1V8_SENSOR
=PP1V8_DP_H4
=PP1V8_AUDIO
=PP1V8_H4
=PP1V8_NAND_H4
=PP1V8_MIPI_H4
=PP1V8_NAND
=PP1V8_VDDIO18_H4
=PP1V8_EDP_H4
=PP1V8_VDDIOD_H4
=PP1V8_VDDA18_TS
25
26
7
19
4 7 10
9
7
12
9
7
5 9
=PP1V8_GRAPE
27
PPVBUS_USB_EMI
PPVBUS_USB_DCIN
36 45
MAKE_BASE=TRUE
MAX_NECK_LENGTH=3 MM
MAX_NECK_LENGTH=3 MM
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
=PP3V0_IO_MISC
=PP3V0_IO_H4
=PP3V0_VDDIOD_H4
6 28
BUCK4
7 9
45 36
MAX_NECK_LENGTH=3 MM
PP1V2_S2R
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
=PP1V2_S2R_H4
=PP1V2_S2R_DDR
LCM_BOOST
13 14
MAX_NECK_LENGTH=3 MM
45 37
LDO10
45 36
PP3V0_S2R_HALL
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
=PP3V0_S2R_HALL
=PP3V0_S2R_HALL_CHSW
BUCK4_SW
26
22
45 36
MAX_NECK_LENGTH=3 MM
LDO11
45 36
PP2V85_CAM
MAKE_BASE=TRUE
VOLTAGE=2.85V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
PP1V2
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
=PP1V2_VDDIOD_H4
=PP1V2_HSIC_H4
=PP1V2_VDDQ_DDR
8 9
PP5V25_VLCM2
MAKE_BASE=TRUE
VOLTAGE=5.25V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
=PP5V25_GRAPE_VDDH
MAX_NECK_LENGTH=3 MM
4
13 14
MAX_NECK_LENGTH=3 MM
=PP2V85_CAM
26
MAX_NECK_LENGTH=3 MM
LDO12
45 36
PP1V1
MAKE_BASE=TRUE
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
BUCK5
=PP1V1_PLL_H4
4
=PP1V1_MIPI_H4
7
=PP1V1_DP_PAD_DVDD_H4 7
=PP1V1_USB_H4
4
=PP1V1_HSIC_H4
4
=PP1V1_MIPI_PLL_H4
4
=PP1V1_EDP_PAD_DVDD_H4 7
PP1V8_ALWAYS
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
NET_SPACING_TYPE=PWR
=PP1V8_ALWAYS
PP3V3_OUT
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
=PP3V3_NAND
=PP3V3_USB_H4
=PP3V3_NAND_H4
=PP3V3_LCD
12
4
9
16
GND
MAKE_BASE=TRUE
VOLTAGE=0V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MM
NET_SPACING_TYPE=GND
MAX_NECK_LENGTH=5 MM
VOUT_LED_A
45 36
45 36
VOUT_LED_B
5
45 37
45 37
PPLED_OUT_A
MAKE_BASE=TRUE
VOLTAGE=20.4V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
PPLED_OUT_B
MAKE_BASE=TRUE
VOLTAGE=20.4V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
=PPLED_REG_A
16
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PPLED_REG_B
16
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
SYNC_MASTER=MADHAVI
PAGE TITLE
SYNC_DATE=01/13/2011
POWER ALIASES
MAX_NECK_LENGTH=3 MM
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
80 OF 157
SHEET
35 OF 48
CRITICAL
L8100
2.2UH-20%-1.85A-80MOHM
45
BUCK0_LXL
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
CRITICAL
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
CRITICAL
L8101
TABLE_ALT_HEAD
PART NUMBER
PP1V25_CPU
PST25201B-SM
45
TABLE_ALT_ITEM
197S0392
197S0299
Y8138
RADAR:8788152
152S1452
152S1292
L8128
RADAR:8376462
ALTERNATE FOUNDRY
BUCK0_LXM
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
TABLE_ALT_ITEM
45
22UF
C8103
22UF
20%
20%
6.3V
2 6.3V
X5R-CERM-1 2 X5R-CERM-1
603
603
2
PST25201B-SM
XW8103
BUCK0_FB
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
C8102
2.2UH-20%-1.85A-80MOHM
COMMENTS:
35 45
ADDITIONAL DISTRIBUTED
25UF (N0 DE-RATING)
CRITICAL
SM
NOSTUFF
CRITICAL
L8105
2.2UH-20%-1.85A-80MOHM
45
BUCK2_LXL
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
CRITICAL
2.2UH-20%-4A-32MOHM
1
RDS(ON)
27 MOHM @-4.5V
IMAX
6.9 A
VGS MAX
+/- 25V
PPBATT_VCC
Q8123
0.022UF
10%
2 25V
X7R
0402
B25 ACT_DIO
DZ8120
PPVBUS_PROT
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V
CRITICAL
45 4
C8124 1
CRITICAL
SHORT-0201
1
PPVBUS_USB 2
10%
25V
X5R-CERM 2
805
5
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V
R8130
A30 VBUS_OV_N
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6V
E29
F29
G29
H29
J29
C8125
10UF
10%
25V
2 X5R
805
VBUS_PROT_G
PPVBUS_USB_DCIN
VCENTER
NC_VBUS_A_OV_L
PMU_VCENTER
46
NOSTUFF
2.2UF
VBUS
VBUCK5_BYP
LDO
VCC-MAIN
C8100
0.5
20%
6.3V
2 CERM-X5R
0402-1
CRITICAL
1
C8171
10UF
20%
6.3V
2 CERM-X5R
0402-1
M8
K2
M11
M5
M12
M7
M4
M6
BATT_POS_RC
45 36 35
PP1V8_S2R
1
C8135
1UF
10%
6.3V
2 CERM
402
1%
1/16W
MF
402
10UF
20%
6.3V
2 CERM-X5R
0402-1
45
C8170
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=4.6V
R8100
10UF
10UF
20%
2 6.3V
CERM-X5R
0402-1
CRITICAL
C8101
45 37 36 35
45 36 35
DIDT=TRUE
PPVCC_MAIN
PP1V8_S2R
1
N1 XTAL1
N2 XTAL2
NET_SPACING_TYPE=CRYSTAL
10%
6.3V
2 CERM
402
VCC_MAIN BYPASS
C8142
C8166 1
C8165 1
20%
6.3V 2
TANT-1
B15G
20%
6.3V 2
TANT-1
B15G
150UF
150UF
CRITICAL
1
C8154
10UF
20%
2 6.3V
X5R
603
CRITICAL
1
C8155
10UF
20%
2 6.3V
X5R
603
CRITICAL
1
C8156
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8157
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8158
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8159
10UF
20%
2 6.3V
CERM-X5R
0402
C8160
10UF
20%
2 6.3V
CERM-X5R
0402
PP3V0_GRAPE
(100MA; 1.65-1.805V; BUCK3) PP1V7_VA_VCP
(50MA; 2.5-3.3V)
PP3V0_VIDEO
(100MA; 1.8-3.3V)
PP3V0_OPTICAL
(300MA; 2.5-3.6V)
PP3V2_LDO5
(150MA; 2.5-3.6V)
PP3V3_ACC
(50MA; 1.5-3.3V)
PP3V0_VIDEO_BUF
(10MA; 2.0-3.55V) PP3V2_S2R_USBMUX
(300MA; 1.2-3.0V)
PP3V0_IO
(200MA; 2.5-3.55V)
PP3V0_S2R_HALL
(200MA; 1.7-3.0V)
PP2V85_CAM
(150MA; 0.6-1.3V)
PP1V1
PP1V8_ALWAYS
C8161
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8162
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8130
10UF
20%
2 6.3V
CERM-X5R
0402
45 40 36 35
45 36 35
45 36 35
1UF
20%
2 6.3V
X5R
0201
10%
6.3V
X5R 2
402
45 36 35
35 36 37 45
45 36 35
82PF
5%
2 25V
CERM
0201
C8164
18PF
5%
2 25V
NP0-C0G
201
45 36 35
45 36 35
45 36 35
C8169
20%
6.3V
X5R 2
0201
BUCK4_LXM
C8121
35 36 45
ADDITIONAL
CRITICAL
CRITICAL
L8121
22UF
22UF
XW8126
BUCK4_FB
SM
NOSTUFF
CRITICAL
35 36 45
L8128
2.2UH-20%-3.3A-0.064OHM
35 36 45
35 36 45
45
35 36 45
35 36 45
BUCK5_LX
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
DCR=64MOHM MAX
PP3V3_OUT
PIME051E-SM
45
BUCK5_FB
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
35 36 45
22UF
XW8132
35 36 45
35 36 45
C8119
35 45
ADDITIONAL
CRITICAL
CRITICAL
35 36 45
DISTRIBUTED
47UF (N0 DE-RATING)
C8120
22UF
20%
20%
6.3V
6.3V
2 X5R-CERM-1 2 X5R-CERM-1
603
603
SM
NOSTUFF
35 36 45
35 36 45
C8138
1UF
46
20%
2 6.3V
X5R
0201
2.2UF
10%
6.3V
X5R 2
402
C8168
2.2UF
DISTRIBUTED
20%
20%
6.3V
6.3V
2 X5R-CERM-1 2 X5R-CERM-1
603
603
2
PST25201B-SM
35 36 40 45
46
PP3V2_S2R_USBMUX
PP3V0_IO
PP3V0_S2R_HALL
PP2V85_CAM
PP1V1
PP1V8_ALWAYS
CRITICAL
0.22UF
CRITICAL
45 35
C8149
2.2UF
C8131 1 C8163
PST25201B-SM
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
35 36 45
36
C8150
CRITICAL
1
PP1V2_S2R
DSP_SW
PP3V0_GRAPE
PP1V7_VA_VCP
PP3V0_VIDEO
PP3V0_OPTICAL
PP3V2_LDO5
PP3V3_ACC
PP3V0_VIDEO_BUF
CRITICAL
CRITICAL 1
1
18PF
CRITICAL
C8140
1UF
10%
2 6.3V
CERM
402
C8139
1UF
10%
2 6.3V
CERM
402
35 36 45
TP8133
TP-P55
1
TP
NOSTUFF
35 36 45
35 45
TP8101
PP1V8_GRAPE
1
TP
TP-P55
C8141
NOSTUFF
1UF
36
PMU_VPUMP
C8137
0.01UF
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=4.6V
10%
6.3V 2
X5R
01005
CRITICAL
C8148
CRITICAL
1
4.7UF
20%
6.3V
X5R-CERM1 2
402
C8146
CRITICAL
C8145
2.2UF
CRITICAL
1
2.2UF
10%
6.3V
X5R 2
402
10%
6.3V
X5R 2
402
C8144
CRITICAL
1
10UF
20%
6.3V
CERM-X5R 2
0402
C8147
2.2UF
10%
6.3V
X5R 2
402
SYNC_MASTER=MADHAVI
PAGE TITLE
SYNC_DATE=01/13/2011
CRITICAL
1
10%
6.3V
X5R 2
402
35 45
10%
2 6.3V
CERM
402
LDO BYPASS
45 36 35
5%
25V
2 NP0-C0G
201
45
(150MA; 2.5-3.55V)
C8143
N8
K1
N10
N4
N11
N9
N5
M10
N12
N7
N3
N6
L2
45 36 35
CRITICAL
BUCK4_LXL
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
PPVCC_MAIN
L8119
45 36 35
2012
2
SM
2.2UH-20%-1.85A-80MOHM
CRITICAL NOSTUFF
45
NET_SPACING_TYPE=CRYSTAL
5%
25V
NP0-C0G 2
201
CRITICAL
2 42 PMU_EXTAL
18PF
XW8117
BUCK3_FB
PP1V8_S2R
PP1V8
Y8138
PMU_XTAL
2
PST25201B-SM
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
E1
E2
H1
H2
22UF
2.2UH-20%-1.85A-80MOHM
45 36 35
32.768K-20PPM-12.5PF
C8118
20%
20%
6.3V
6.3V
2 X5R-CERM-1 2 X5R-CERM-1
603
603
2.2UH-20%-1.85A-80MOHM
BUCK3_LXM
C8117
22UF
L8116
35 36 45
CRITICAL
VBUCK3 B18
CPU1V8_SW A19 (RON=0.2 OHM MAX)
WDIG_SW B19 (RON=0.5 OHM MAX)
CRITICAL
42
CRITICAL
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
45 36 35
C8136
1UF
VDD_LDO1_6
VDD_LDO2
VDD_LDO3_5_8
VDD_LDO4_7
VDD_LDO9
VDD_LDO10
VDD_LDO11
VDD_LDO12
SWITCH POWER
CRITICAL
BUCK3_LXL
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
45
PP1V8_S2R
CRITICAL
NOSTUFF
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
45
ADDITIONAL DISTRIBUTED
2
PST25201B-SM
PP1V2_S2R
PP1V2
LDO INPUT
NOSTUFF
CRITICAL
NOSTUFF
1
A26 VCC_MAIN_SENSE
A24
VCC_MAIN
A25
SM
VBUCK4 A21
CPU1V2_SW A20 (RON=0.1 OHM MAX)
DSP_SW B21 (RON=1 OHM MAX)
XTAL
45 39 36 35
45
L8115
2.2UH-20%-1.85A-80MOHM
XW8113
1
45
VLDO1
VLDO2
REVIEW THESE
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
VLDO11
VLDO12
ON_BUF
VDD_BUCK2
22UF
CRITICAL
2
PST25201B-SM
BUCK2_FB
BUCK5_FB G3
VDD_BUCK0
C8108
20%
20%
6.3V
2 6.3V
X5R-CERM-1 2 X5R-CERM-1
603
603
L8110
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
BUCK3_LXL A18
BUCK3_LXM A16
BUCK3_FB D16
BUCK5_LX
A10
B10
A5
B5
22UF
CRITICAL
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
BUCK4_LXL A14
BUCK4_LXM A12
BUCK4_FB D13
C8107
1
2
PST25201B-SM
BUCK2_LXR
CRITICAL
MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=ANLG
1%
1/20W
MF
201 2
PPBATT_VCC
45
BUCK2_LXM A6
BUCK2_LXR A4
BUCK2_FB D5
220K
BUCK0_LXL A11
BUCK0_LXM A9
BUCK0_FB D7
BUCK2_LXL A7
DIDT=TRUE
XW8114
DIDT=TRUE
LLP
G 4
E30
J30
D
45 35
C8172
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
NET_SPACING_TYPE=ANLG
BZT52C10LP
MLP3.3X3.3
45
FDMC6676BZ
NOSTUFF
5%
1/20W
MF
201
D
5
ACT_DIO
45 39 36 35
CRITICAL
34
35 45
ADDITIONAL DISTRIBUTED
30UF (N0 DE-RATING)
CRITICAL
2.2UH-20%-1.85A-80MOHM
45
K10 VBAT
A27 IBAT_SENSE
A22
A23 IBAT
BATT_SNS_R
MLP3.3X3.3
BATT_SNS 1
BUCK
P-TYPE
1%
1/20W
MF
2 201
R8172
FDMC6683
CHG_LX
USB/BAT
CHANNEL
470K
Q8104
1%
1/20W
MF
201
FDMC6676BZ
3
2
1
MOSFET
CRITICAL1
499
NOSTUFF
R8116
SYM 2 OF 4
F30
G30
H30
PMEG4030ER
CRITICAL
BUCK2_LXM
TFBGA
SOD-123W
OMIT
D1974AB
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
D8100
2 3
CRITICAL
L8107
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
U8100
SW_CHGA
PIME101E-SM
DCR=32MOHM MAX
45
R8173
RDSON=0.0136@VGS=-2.5V
ID=12.0A
PPVCC_MAIN
PP1V2_SOC
CRITICAL
2.2UH-20%-1.85A-80MOHM
L8112
45 37 36 35
2
PST25201B-SM
C8167
2.2UF
CRITICAL
1
10%
6.3V
X5R 2
402
C8153
2.2UF
CRITICAL
C8152
10%
6.3V
X5R 2
402
4.7UF
20%
6.3V
X5R-CERM1 2
402
Apple Inc.
CRITICAL
C8151
1UF
SIZE
10.0.0
10%
6.3V
CERM 2
402
051-8773
REVISION
BRANCH
PAGE
81 OF 157
SHEET
36 OF 48
5
BOARD_TEMP5_P
BOARD_TEMP6_P
NET_SPACING_TYPE=ANLG
NET_SPACING_TYPE=ANLG
37
37
R8281
R8282
10KOHM-1%
10KOHM-1%
0201
0201
100PF
5%
6.3V
CERM 2
01005
C8206
0.01UF
SM
NOSTUFF
28 5
IN
24 5
IN
24 5
IN
27
IN
27
IN
IN
30
(TEMP1
(TEMP2
(TEMP3
(TEMP4
1
1
CRITICAL
R8216
C8215
R8222
100PF
C8221
5%
6.3V
CERM 2
01005
0201
100PF
C8217
5%
6.3V 2
CERM
01005
C8223
CRITICAL
BOARD_TEMP3_N
XW8200
1
SM
NOSTUFF
SM
NOSTUFF
SM
SM
C8220
R8219
3.92K
0.1%
100PF
402
1/16W
1 MF
5%
6.3V
CERM 2
01005
IN
39
IN
45 4
OUT
OUT
42 22 19 10 5
IN
42 22 19 10 5
BI
42 5
IN
42 5
IN
42 5
L8225
=PPVCC_MAIN_LED
D8228
C8226
PMEG4010BEA
PIME051E-SM
CRITICAL
DCR=106MOHM MAX
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
43 16
OUT
OUT
PPLED_OUT_A
1
CRITICAL
C8232
4.7UF
CRITICAL
C8233
4.7UF
10%
2 35V
X5R-CERM
0603
C8234
CRITICAL
1
4.7UF
10%
2 35V
X5R-CERM
0603
C8235
43 16
OUT
4.7UF
10%
2 35V
X5R-CERM
0603
10%
2 35V
X5R-CERM
0603
43 16
43 16
43 16
LED_IO_1_A
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO_2_A
4.7UH-3.2A
37 35
=PPVCC_MAIN_LED
C8256
2
PIME051E-SM
CRITICAL
1
DCR=106MOHM MAX
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO_4_A
1%
1/20W
MF
201
OUT
LED_IO_5_A
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO_6_A
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
1.00
1%
1/20W
MF
201
C8262
4.7UF
10%
35V
2 X5R-CERM
0603
C8263
4.7UF
10%
35V
2 X5R-CERM
0603
M21
N21
K22
N15
M15
N16
M16
N17
M17
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
1.00
43
43
43
43
43
R8232
1
1.00
1%
1/20W
MF
201
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
43
43
R8239
1.00
1%
1/20W
MF
201
M23
N23
K23
N18
N19
M18
N20
M19
M20
2
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO1_A_R
LED_IO2_A_R
LED_IO3_A_R
LED_IO4_A_R
LED_IO5_A_R
LED_IO6_A_R
43
43
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
43
43
LED_IO1_B_R
LED_IO2_B_R
LED_IO3_B_R
LED_IO4_B_R
LED_IO5_B_R
LED_IO6_B_R
DWI_CK
DWI_DI
DWI_DO
C8264
43 16
4.7UF
10%
35V
2 X5R-CERM
0603
CRITICAL
1
WLED_LXA
VOUT_WLED_A
WLED1_A
WLED2_A
WLED3_A
WLED4_A
WLED5_A
WLED6_A
WLED_LXB
43 16
C8265
43 16
43 16
M1
L1
K24
K4
M9
K9
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
B22
B23
B24
D21
D20
D14
D19
E16
D17
D18
D15
K21
J20
K20
J19
K19
J18
CLK_32K_PMU
CLK_32K_WLAN
RST_BT_L
RST_WLAN_L
RST_BB_PMU_L
BATTERY_SWI
PM_BT_HOST_WAKE
PM_WLAN_HOST_WAKE
PM_BB_HOST_WAKE
AUD_MIK_HS1_INT_L
DOCK_BB_EN
NC_PMU_GPIO12
NC_PMU_GPIO13
RST_L63_L
IRQ_HALL
NC_PMU_GPIO16
NC_PMU_GPIO17
AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_AY
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_BY
J28
H28
K26
K27
K29
G28
F28
E28
D27
D29
NC_PMU_AMUX_A0
NC_PMU_AMUX_A1
NC_PMU_AMUX_A2
NC_PMU_AMUX_A3
NC_PMU_AMUX_AY
NC_PMU_AMUX_B0
NC_PMU_AMUX_B1
NC_PMU_AMUX_B2
NC_PMU_AMUX_B3
NC_PMU_AMUX_BY
VDD_LCM_SW
45
VDD_BOOST_LCM
LX_BOOST_LCM
45
LCM_FB
VDD_LCM
LCM2_EN
VLCM1
VLCM2
VLCM3
M25
N26
M24
N25
M14
K30
N14
M13
N13
PMU_IREF
NET_SPACING_TYPE=ANLG
PMU_VREF
NET_SPACING_TYPE=ANLG
PMU_VDD_REF
0.1UF
10%
2 6.3V
X5R
201
NET_SPACING_TYPE=ANLG
C8209
1UF
10%
2 6.3V
CERM
402
C8210
0.22UF
20%
2 6.3V
X5R
0201
PMU_VDD_RTC
NET_SPACING_TYPE=ANLG
27
NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.1MM
C8214
(CPU1V8; PUSH-PULL)
USED BY ZEPHYR2. WHICH IS NOW POR
1000PF
(1.8_S2R; PUSH-PULL)
10%
6.3V
2 X5R-CERM
(1.8_S2R; PUSH-PULL; NO PD REQD PER BB TEAM)
01005
(1.8_S2R; PUSH-PULL; NO PD REQD PER BB TEAM)
(1.8_S2R; PUSH-PULL)
(FALLING EDGE SENSITIVE) 2.5V ALWAYS ON PU IN BMU
(INTERNAL PD; RISING EDGE SENSITIVE)
(INTERNAL PD; RISING EDGE SENSITIVE)
(INTERNAL PD; RISING EDGE SENSITIVE) CANT BE USED FOR 32K CLK OUTPUT
(INTERNAL PU TO PP1V8_S2R; RISING EDGE SENSITIVE)
(1.8_S2R; PUSH-PULL) EXT PD BY BB MUXES
NEED RADAR TO STOP GENERATING 32K CLOCK
1
OUT
18 42
OUT
15 42
OUT
15 45
OUT
15 45
OUT
30 45
IN
5 34
IN
15
IN
15
IN
30
IN
19
OUT
11
46
NC_VLCM1
OUT
IN
19 45
25
(INTERNAL PU TO 1.8_S2R)
(BOTH EDGES SENSITIVE) EXT PU
46
46
46
46
46
46
46
46
(NOTE: 2MHZ)
CRICITAL
46
L8229
46
2.2UH-1.05A-0.195OHM
46
46
CRICITAL
MAKE_BASE=TRUE
VLS201612E-SM
VOLTAGE=6.0V
MIN_LINE_WIDTH=0.4MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
D8230
PMEG2005AEL
1
MAKE_BASE=TRUE
VOLTAGE=6.0V
MIN_LINE_WIDTH=0.4MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
46
PP5V25_VLCM2
35 45
BB_VBUS_DET OUT
C8240
2.2UF
10%
6.3V 2
X5R
402
2.2UF
20%
10V
X5R-CERM 2
402
SOD882
46
C8236
46
PPVCC_MAIN 35 36 45
PP6V0_LCM_HI
LCM_LX
PP6V0_LCM_VBOOST
NC_LCM2_EN
PMU_ADC_REF
30
C8238
1UF
10%
2 6.3V
CERM
402
C8237
10UF
20%
2 10V
X5R
0603-1
(PPLED_OUT_B)
OUT
OUT
OUT
4.7UF
10%
35V
2 X5R-CERM
0603
IREF
VREF
VDD_REF
VDD_REF_A
VDD_RTC
ADC_REF
VOUT_WLED_B
WLED1_B
WLED2_B
WLED3_B
WLED4_B
WLED5_B
WLED6_B
PPLED_OUT_A
SOD-323
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
1%
1/20W
MF
201
R8257
43 16
DWI_AP_CLK
DWI_AP_DO
DWI_AP_DI
43
CRITICAL
1
C29 SCL
D30 SDA
I2C0_SCL_1V8
I2C0_SDA_1V8
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
R8240
LED_IO_1_B
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO_2_B
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
1%
1/20W
MF
201
OUT
OUT
OUT
LED_IO_3_B
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
LED_IO_4_B
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
1.00
1%
1/20W
MF
201
LED_IO_5_B
LED_IO_6_B
1.00
1%
1/20W
MF
201
0.01UF
10%
50V 2
X7R
402
0.01UF
10%
50V
PLACEMENT_NOTE=PLACE
NEAR U8100.K22
X7R 2
402
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
1.00
1%
1/20W
MF
201
PPLED_OUT_B
C8251
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0.01UF
10%
50V
X7R 2
402
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
C8267 1
35 37 45
0.01UF
SYNC_MASTER=MLB
PAGE TITLE
R8269
1
R8270
1
C8201
2
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
35 37 45
C8266 1
R8262
R8265
1
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
1.00
1.00
1%
1/20W
MF
201
R8261
PPLED_OUT_B
1
B28 KEEPACT
A2 SHDN
PMEG4010BEA
43 16
CRITICAL
RST_PMU_IN
RST_AP_L
IRQ_PMU_L
D8258
20%
10V 2
X5R
603
CRITICAL
R8235
1
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
10UF
45 37 35
(INTERNAL PULL-DOWN)
TDEV1
TDEV2
TDEV3
TDEV4
TDEV5
TDEV6
TDEV7
TDEV8
TBAT
TCAL
NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
CRITICAL
L8255
1.00
1.00
1%
1/20W
MF
201
R8231
LED_IO_3_A
OUT
OUT
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM
WLED_LX_B
CRITICAL
PM_KEEPACT
PMU_SHDWN
R8227
43 16
CRITICAL
(PPLED_OUT_A)
20%
10V 2
X5R
603
45 37 35
BOARD_TEMP1_P NET_SPACING_TYPE=ANLG
BOARD_TEMP2_P NET_SPACING_TYPE=ANLG
BOARD_TEMP3_P NET_SPACING_TYPE=ANLG
BOARD_TEMP4_P NET_SPACING_TYPE=ANLG
BOARD_TEMP5_P NET_SPACING_TYPE=ANLG
BOARD_TEMP6_P NET_SPACING_TYPE=ANLG
NC_BOARD_TEMP7 NET_SPACING_TYPE=ANLG
NC_BOARD_TEMP8 NET_SPACING_TYPE=ANLG
BATTERY_NTC
PMU_TCAL
NET_SPACING_TYPE=ANLG
WLED_LX_A
SOD-323
10UF
OUT
N30
M30
M29
L30
A29
A28
B26
D25
C30
D26
ACC_ID
BRICK_ID
ADC_IN7
ADC_IN31
CRITICAL
4.7UH-3.2A
37 35
IN
45 30 27 4
CRITICAL
IN
2 CRITICAL
XW8203
BOARD_TEMP4_N
NOSTUFF
NOSTUFF
34
10KOHM-1%
5%
6.3V 2
CERM
01005
46
R8280
100PF
XW8201
BOARD_TEMP1_N
37
10KOHM-1%
XW8202
1
46
5%
6.3V
CERM 2
01005
BOARD_TEMP2_N
NEAR
NEAR
NEAR
NEAR
R8218
100PF
SIDE
SIDE
SIDE
SIDE
37
0201
BOTTOM
BOTTOM
BOTTOM
BOTTOM
0201
CRITICAL
10KOHM-1%
0201
CRITICAL
10KOHM-1%
M2
N28
N27
M26
PORT_DOCK_ACCID
USB_BRICKID
ADC_IN7
FW_DPHP_DET
DPHP
BUTTON1
BUTTON2
BUTTON3
ACC_DET
REFERENCES
FW_ZENER_PWR
DP_AP_HPD
HOME_EMI_L
ONOFF_L
SRL_L
PORT_DOCK_ACC_DET_L
IN
OUT
DIGITAL INPUT
27
43 7
C8212
OMIT
SYM 1 OF 4
200K
1%
1/20W
MF
2 201
TFBGA
R8203
0.1UF
D1974AB
GPIO
SM
NOSTUFF
U8100
10%
6.3V
X5R
01005
ANALOG MUX
XW8281
C8207
0.01UF
C8204
10%
6.3V
2 X5R
201
LCM/GRAPE
BOARD_TEMP6_N
5%
1/32W
MF
2 01005
ANALOG
INPUT
10%
2 6.3V
X5R
01005
XW8282
1
220K
BOARD_TEMP5_N
R8260
TEMPERATURE
NOSTUFF
1
WDOG
C8282
5%
6.3V
CERM 2
01005
RESET
100PF
LED
BACKLIGHT
C8281
1.00
1%
1/20W
MF
201
SYNC_DATE=01/14/2011
Apple Inc.
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
051-8773
10.0.0
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
SIZE
REVISION
BRANCH
PAGE
82 OF 157
SHEET
37 OF 48
U8100
U8100
OMIT
D1974AB
OMIT
TFBGA
SYM 3 OF 4
VSS_BUCK02
VSS_BUCK2
VSS_BUCK04
VSS_BUCK3
VSS_BUCK34
VSS_BUCK5
VSSA_BUCK0
VSSA_BUCK2
VSSA_BUCK3
VSSA_BUCK4
VSSA_BUCK5
VSS
D1974AB
TFBGA
A3
B1
B2
B3
B4
B9
C2
D10
D11
D22
D23
D24
D4
D9
E10
E11
E12
E13
E14
E17
E18
E19
E20
E21
E22
E23
E24
E25
E26
E27
E3
E4
E5
E6
E7
E8
E9
F10
M22
VSS_WLED
N22
VSS_LCM N24
VSS
SYM 4 OF 4
F3
F4
A8
B8
B6
B7
B11
B12
B17
A15
B15
D1
D2
D8
D6
E15
D12
C1
F5
H26
F6
F7
H27
H3
F8
H4
F9
G10
H5
H6
G11
G12
H7
H8
G13
H9
G14
G15
J1
J10
G16
J11
G17
G18
J12
J13
G19
J14
G20
G21
J15
J16
G22
G23
J2
J21
G24
J22
G25
G26
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F26
F27
H24
H25
VSS
VSS
J23
J24
G27
J25
G4
G5
J26
J27
G6
J3
G7
G8
J4
J5
G9
H10
J6
J7
H11
J8
H12
H13
J9
K11
H14
K12
H15
H16
K13
K14
H17
K15
H18
H19
K25
K5
H20
H21
K6
K7
H22
K8
H23
M3
SYNC_MASTER=MADHAVI
PAGE TITLE
SYNC_DATE=01/13/2011
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
83 OF 157
SHEET
38 OF 48
35 27 5
=PP1V8_S2R_MISC
NOSTUFF
1
R9000
45 36 35
PPBATT_VCC
300
5%
1/20W
MF
2 201
NOSTUFF
1
R9002
1.5K
1%
1/20W
MF
2 201
FORCE_DFU
5
OUT
PMU_SHDWN
37
PWR_ON_LED
OUT
NOSTUFF
1
R9001
300
NOSTUFF
5%
1/20W
MF
2 201
LED9000
RED-50MCD-20MA
0603
SYNC_MASTER=ALEX
PAGE TITLE
SYNC_DATE=10/04/2010
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
90 OF 157
SHEET
39 OF 48
PROBE POINTS
PP0
P4MM
SM
PP
CODEC_LINE_OUT_REF
19 21
CODEC_LINE_OUT_R
19 21
AUD_SPKR_AMP2_PBUS
20
AUD_SPKR_AMP1_PBUS
20
CODEC_LINE_OUT_L
19 21
DDR0_DQS_P<0>
8 13 44
DDR0_DQ<0>
8 13 44
DDR0_DQS_N<0>
8 13 44
DDR0_DQS_N<1>
8 13 44
DDR0_DQ<14>
8 13 44
HSIC1_WLAN_DATA1
4 15 42
HSIC1_WLAN_STB1
4 15 42
Z1_BON_L<5>
17 18
Z1_B_ADR<2>
17 18
Z1_B_ADR<1>
17 18
Z1_B_ADR<0>
17 18
Z1_MISO
17 18
Z1_BON_L<4>
17 18
PP1V7_VA_VCP
35 36 45
PP1
P4MM
SM
PP
PP2
P4MM
SM
PP
PP3
P4MM
SM
PP
PP4
P4MM
FID9300
SM
PP
SL-1.1X0.4-1.4X0.7
FID9301
FID
SM
PP
SL-1.1X0.4-1.4X0.7
SM
PP
SM
PP
SL-1.1X0.4-1.4X0.7
0P5SM1P0SQ-NSP
1
FID
SL-1.1X0.4-1.4X0.7
SM
PP
SL-1.1X0.4-1.4X0.7
FID9304
FID
SM
PP
FID9305
SL-1.1X0.4-1.4X0.7
SL9314
TH-NSP
PP12
P4MM
SM
PP
0P5SM1P0SQ-NSP
1
SL9304
TH-NSP
SM
PP
SL-1.1X0.4-1.4X0.7
PP15
P4MM
SL9316
TH-NSP
SM
PP
PP14
P4MM
SL9306
TH-NSP
SL-1.1X0.4-1.4X0.7
SM
PP
SL9315
TH-NSP
PP13
P4MM
SL-1.1X0.4-1.4X0.7
SL9305
TH-NSP
SL-1.1X0.4-1.4X0.7
SM
PP
1
SL-1.1X0.4-1.4X0.7
PP11
P4MM
FID
PP10
P4MM
SL9313
TH-NSP
0P5SM1P0SQ-NSP
PP9
P4MM
SM
PP
SL9312
TH-NSP
SL9302
TH-NSP
0P5SM1P0SQ-NSP
PP8
P4MM
FID
FID9303
PP7
P4MM
FID9302
PP6
P4MM
SL9301
TH-NSP
0P5SM1P0SQ-NSP
PP5
P4MM
SL9310
TH-NSP
SL9300
TH-NSP
FID
0P5SM1P0SQ-NSP
PP16
P4MM
SL-1.1X0.4-1.4X0.7
SM
PP
PP17
P4MM
SM
PP
PP18
P4MM
SM
PP
PP19
P4MM
SM
PP
CONN_AUD_HEADSET_CHS_RET2
23 24
CONN_AUD_HEADSET_CHS_MIC2
23 24
PP20
P4MM
SM
PP
PP21
P4MM
SM
PP
CONN_AUD_HEADSET_DET
23 24
AUD_HP1_DET_H
23
AUD_HS_MIC2_RET
22 23
AUD_HS_MIC1_HI
22 23
AUD_HS_MIC1_RET
22 23
AUD_HS_MIC2_HI
22 23
PP22
P4MM
SM
PP
PP23
P4MM
SM
PP
PP24
P4MM
SM
PP
PP25
P4MM
SM
PP
PP26
P4MM
SM
PP
SYNC_MASTER=ALEX
SYNC_DATE=10/04/2010
PAGE TITLE
FCT/ICT TEST/BRACKETS
DRAWING NUMBER
Apple Inc.
051-8773
10.0.0
SIZE
REVISION
BRANCH
PAGE
93 OF 157
SHEET
40 OF 48
MLB CONSTRAINTS
TABLE_BOARD_INFO
BOARD LAYERS
BOARD AREAS
BOARD UNITS
(MIL or MM)
ALLEGRO
VERSION
TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM
NO_TYPE,BGA,BGA06-06
MM
16.2
PHYSICAL CONSTRAINTS
SPACING CONSTRAINTS
DEFAULT/BGA SPACING RULES
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_PHYSICAL_RULE_ITEM
DEFAULT
=45_OHM_SE
=45_OHM_SE
30 MM
0 MM
0 MM
STANDARD
=DEFAULT
=DEFAULT
12.7 MM
=DEFAULT
=DEFAULT
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
DEFAULT
0.100 MM
STANDARD
=DEFAULT
BGA_SPA
=DEFAULT
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
ISL1,ISL12
45_OHM_SE
ISL5,ISL8
0.110 MM
0.060 MM
3.0 MM
1:1_SPACING
0.057 MM
0P08_SPACING
0.080 MM
NOTES:
0.077 MM
0.060 MM
3.0 MM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
1.5:1_SPACING
0.086 MM
2:1_SPACING
0.114 MM
2.5:1_SPACING
0.143 MM
0.075
MM
~ 3 MIL
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
45_OHM_SE
ISL3
0.055 MM
0.050 MM
3.0 MM
45_OHM_SE
0.055 MM
0.050 MM
3.0 MM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
WEIGHT
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
45_OHM_SE
LINE-TO-LINE SPACING
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
TABLE_SPACING_RULE_ITEM
3:1_SPACING
0.171 MM
4:1_SPACING
0.228 MM
5:1_SPACING
0.285 MM
TABLE_SPACING_RULE_ITEM
50 OHMS
0.089
MM
~ 3.5 MIL
0.102
MM
~ 4 MIL
0.114
MM
~ 4.5 MIL
0.125
MM
~ 5 MIL
0.140
MM
~ 5.5 MIL
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
50_OHM_SE
ISL1,ISL12
0.088 MM
0.050 MM
3.0 MM
TABLE_SPACING_RULE_ITEM
0P5MM_SPACING
0.5 MM
0P64MM_SPACING
0.64 MM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
50_OHM_SE
ISL3
0.050 MM
0.050 MM
3.0 MM
50_OHM_SE
ISL5,ISL8
0.062 MM
0.050 MM
3.0 MM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
50_OHM_SE
0.050 MM
0.050 MM
3.0 MM
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
0.15 MM
~ 6 MIL
0.18 MM
~ 7 MIL
0.2
~ 8 MIL
MM
0.25 MM
~ 10 MIL
0.3
MM
~ 12 MIL
0.33 MM
~ 13 MIL
0.4
MM
~ 16 MIL
1.0
MM
= 39.37 MIL
WEIGHT
TABLE_SPACING_RULE_ITEM
PWR_P1SPACING
0.1 MM
900
GND_P1SPACING
0.1 MM
950
SWITCHNODE
0.5 MM
1000
SWITCHNODE
TOP,BOTTOM
0.2 MM
1000
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
POWER
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
90 OHMS
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
ALLOW ROUTE
ON LAYER?
LAYER
LAYER
ALLOW ROUTE
ON LAYER?
90_OHM_DIFF
TOP,BOTTOM
0.085 MM
0.085 MM
90_OHM_DIFF
ISL3
0.051 MM
0.051 MM
90_OHM_DIFF
ISL5,ISL8
0.072 MM
0.075 MM
0.110 MM
0.110 MM
=STANDARD
0.120 MM
0.120 MM
=STANDARD
0.120 MM
0.120 MM
PWR
0.6MM
0.25 MM
10.0 MM
GND_PH
0.6MM
0.075 MM
10.0 MM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MISC
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
1:1_DIFFPAIR
=STANDARD
=STANDARD
=STANDARD
0.08 MM
0.08 MM
SPEAKER
0.3 MM
0.19MM
10 MM
0.08 MM
0.08 MM
LED
0.2 MM
0.10MM
10 MM
0.08 MM
0.08 MM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA
BGA_SPA
CLK
BGA
BGA_SPA
PWR
PWR_P1SPACING
GND
GND_P1SPACING
SWITCHNODE
SWITCHNODE
ANLG
3:1_SPACING
LED
3:1_SPACING
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
SYNC_MASTER=MIKE
AREA_TYPE
PHYSICAL_RULE_SET
BGA
BGA_PHY
SYNC_DATE=01/21/2011
PAGE TITLE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
DRAWING NUMBER
Apple Inc.
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
BGA_PHY
0.060 MM
0.060 MM
=STANDARD
0.076 MM
0.075 MM
051-8773
TABLE_PHYSICAL_RULE_ITEM
10.0.0
SIZE
REVISION
BRANCH
PAGE
150 OF 157
SHEET
41 OF 48
USB
JTAG
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
USB_90D
90_OHM_DIFF
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
JTAG
2:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
CLK_50S
50_OHM_SE
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
USB
5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
CLK
5:1_SPACING
NET_SPACING_TYPE1
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
I14
NET_TYPE
PHYSICAL
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
SE_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
CLK_50S
I63
I162
I81
I88
I89
I95
I96
I94
I225
I130
I131
I157
I158
I234
I235
I13
SPACING
CLK
CLK
CLK
CLK
CLK
0P2MM_SPACING
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
I20
CLK_32K_PMU
CLK_32K_WLAN
CLK_32K_GPS
CLK_CAM_FF
CLK_CAM_FF_FILT
CLK_CAM_FF_CONN
CLK_CAM_RF
CLK_CAM_RF_FILT
CLK_CAM_RF_CONN
I2S0_ASP_MCK
I2S0_ASP_MCK_R
CLK_CAM_FF_R
CLK_CAM_RF_R
CLK_CAM_FF_C
CLK_CAM_RF_C
JTAG_AP_TCK
JTAG_AP_TMS
JTAG_AP_TDI
JTAG_AP_TDO
JTAG_AP_TRST_L
JTAG
JTAG
JTAG
JTAG
RST
I16
I15
ELECTRICAL_CONSTRAINT_SET
4 27
ELECTRICAL_CONSTRAINT_SET
4 27
4 10
4 10
4 10 45
I5
I6
I7
I8
18 37
PHYSICAL
SPACING
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_DK_D0_P
USB_DK_D0_N
USB_DK_CON_D0_P
USB_DK_CON_D0_N
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_BB_D_P
USB_BB_D_N
USB11_MUX_D0_P
USB11_MUX_D0_N
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB11_ACC_TX_N
USB11_ACC_RX_P
ACC_PT_DK_CON_TX
ACC_PT_DK_CON_RX
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
EXTRA_USB_D1_N
EXTRA_USB_D1_P
NC_USB11_D1_N
NC_USB11_D1_P
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
NC_USB_D1_N
NC_USB_D1_P
TP_WLAN_USB_DN
TP_WLAN_USB_DP
USB_GPIO_DM
USB_GPIO_DM_CONN
USB_GPIO_DP
USB_GPIO_DP_CONN
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB_90D
USB_90D
USB
USB
USB_PT_DK_CON_D_N
USB_PT_DK_CON_D_P
USB_UART_DM
USB_UART_DM_CONN
USB_UART_DP
USB_UART_DP_CONN
USB_90D
USB_90D
USB
USB
EXTRA_USB11_D1_N
EXTRA_USB11_D1_P
15 37
I82
7 25
I83
25
I84
24 25
I85
7 25
I128
25
I129
I2C
24 25
I171
I172
TABLE_PHYSICAL_ASSIGNMENT_HEAD
5 19
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
I204
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I2C_50S
50_OHM_SE
I206
25
I205
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
25
NET_TYPE
TABLE_SPACING_ASSIGNMENT_ITEM
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
I207
4 27
4 27
11 30
11 30
4 11
4 11
11 27
11 27
27 29
27 29
4 46
4 46
TABLE_SPACING_ASSIGNMENT_ITEM
I2C
1.5:1_SPACING
I208
I209
UART
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
I210
SPACING
I211
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
UART_50S
50_OHM_SE
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I1
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I2
I3
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
I4
SPACING_RULE_SET
I61
TABLE_SPACING_ASSIGNMENT_ITEM
UART
3:1_SPACING
I62
TABLE_SPACING_ASSIGNMENT_ITEM
UART
UART
I98
2:1_SPACING
I99
I100
I101
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
I237
I236
I174
I173
I175
I176
I177
I178
I179
I182
I181
I180
I232
I233
I102
SPACING
UART0_AP_RXD
UART0_AP_TXD
UART0_MUX_RXD
UART0_MUX_TXD
UART1_BB_CTS_L
UART1_BB_RTS_L
UART1_BB_TXD
UART1_BB_RXD
UART3_BT_CTS_L
UART3_BT_RTS_L
UART3_BT_RXD
UART3_BT_TXD
UART6_WLAN_RXD
UART6_WLAN_TXD
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
I103
5 15
I228
5 15
I229
11 15
I124
11 15
I125
5 30
I226
5 30
I227
5 30
I2C1_SDA_1V8
I2C1_SCL_1V8
I2C0_SDA_1V8
I2C0_SCL_1V8
I2C2_SDA_3V0
I2C2_SCL_3V0
ISP_AP_0_SCL
ISP_AP_0_SDA
ISP_AP_1_SCL
ISP_AP_1_SDA
I2C2_SCL_3V0_ALS
I2C2_SDA_3V0_ALS
I2C1_SCL_1V8_CONN
I2C1_SDA_1V8_CONN
ISP_CAM_1_SCL
ISP_CAM_1_SDA
ISP_CAM_0_SCL
ISP_CAM_0_SDA
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
I2C
5 10 25
I212
5 10 25
I214
5 10 19 22 37
I213
5 10 19 22 37
I215
5 25
5 25
7 25
7 25
7 25
I216
I217
I218
I219
7 25
I222
10 24 25
I221
10 24 25
24 25
I223
I224
24 25
24 25
HSIC
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
HSIC
50_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
5 15
TABLE_SPACING_ASSIGNMENT_HEAD
5 15
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
CRYSTAL
5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
5 15
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
HSIC
5:1_SPACING
5 15
TABLE_SPACING_ASSIGNMENT_ITEM
PHYSICAL
SPACING
PHYSICAL_RULE_SET
45_OHM_SE
I93
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I230
I231
NET_SPACING_TYPE2
AREA_TYPE
4
36
36
I194
I193
I195
I2S
2:1_SPACING
I196
I197
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
NET_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
I198
TABLE_PHYSICAL_ASSIGNMENT_ITEM
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
I2S_90S
SPACING
I199
45_OHM_SE
I200
SPI_50S
SPI_50S
SPI_50S
SPI_50S
I183
I184
I185
I186
SPI_50S
SPI_50S
SPI_50S
SPI_50S
I187
I188
I189
I190
SPI1_GRAPE_MISO
SPI1_GRAPE_MOSI
SPI1_GRAPE_SCLK
SPI1_GRAPE_CS_L
SPI
SPI
SPI
SPI
5 17
5 17
SPI2_IPC_MISO
SPI2_IPC_MOSI
SPI2_IPC_SCLK
SPI2_IPC_SRDY
I141
I159
2:1_SPACING
I144
I148
I147
NET_TYPE
PHYSICAL
I153
I156
I146
SPACING
DWI_AP_CLK
DWI_AP_DI
DWI_AP_DO
DWI
DWI
DWI
I152
I160
5 37
I145
5 37
I149
5 37
I150
I151
I161
3:1_SPACING
I2S
I2S
2:1_SPACING
ELECTRICAL_CONSTRAINT_SET
TABLE_SPACING_ASSIGNMENT_ITEM
ELECTRICAL_CONSTRAINT_SET
I203
4 15 40
5 30
5 30
5
5 15
5 15
4 46
4 46
4 46
4 46
NET_TYPE
5 30
SPACING_RULE_SET
4 15 40
5 30
TABLE_SPACING_ASSIGNMENT_HEAD
I2S
4 30
5 30
I143
DWI
I202
4 30
5 30
I142
SPACING_RULE_SET
HSIC0_BB_DATA1
HSIC0_BB_STB1
HSIC1_WLAN_DATA1
HSIC1_WLAN_STB1
HSIC_BB_RDY
HSIC_HOST_RDY
HSIC_HOST_READY_WL
HSIC_HOST_READY_WLAN
HSIC_WLAN_RDY
NC_HSIC0_DATA2
NC_HSIC0_STB2
NC_HSIC1_DATA2
NC_HSIC1_STB2
TABLE_SPACING_ASSIGNMENT_ITEM
SPI
SPI
SPI
SPI
AREA_TYPE
AREA_TYPE
SPACING
HSIC_BB
HSIC_BB
HSIC_WLAN
HSIC_WLAN
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
5 17
DWI
NET_SPACING_TYPE2
NET_SPACING_TYPE2
TABLE_SPACING_ASSIGNMENT_ITEM
I140
NET_SPACING_TYPE1
I201
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
5 17
PHYSICAL
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
I191
I192
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
SPI
ELECTRICAL_CONSTRAINT_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_TYPE
XTAL_24M_I
XTAL_24M_O
24M_O
PMU_XTAL
PMU_EXTAL
CRYSTAL
CRYSTAL
CRYSTAL
CRYSTAL
CRYSTAL
I90
TABLE_PHYSICAL_ASSIGNMENT_HEAD
27 29
24 25
XTAL
5 15
I92
AREA_TYPE
27 29
TABLE_PHYSICAL_ASSIGNMENT_HEAD
5 15
ELECTRICAL_CONSTRAINT_SET
SPI_50S
24 25
5 30
SPI
NET_PHYSICAL_TYPE
4 46
24 25
NET_TYPE
4 46
PHYSICAL
SPACING
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S
I2S0_ASP_BCLK
I2S0_ASP_LRCK
I2S0_ASP_DIN
I2S0_ASP_DOUT
I2S_L63_ASP_SDOUT
I2S2_VSP_BCLK
I2S2_VSP_LRCK
I2S2_VSP_DIN
I2S2_VSP_DOUT
I2S_L63_VSP_SDOUT
I2S3_XSP_BCLK
I2S3_XSP_LRCK
I2S3_XSP_DIN
I2S3_XSP_DOUT
I2S_L63_XSP_SDOUT
5 19
5 19
5 19
5 19
19
SYNC_MASTER=MIKE
5 15 19
SYNC_DATE=01/21/2011
PAGE TITLE
5 15 19
5 15 19
DRAWING NUMBER
5 15 19
Apple Inc.
19
5 19
5 19
5 19
19
SIZE
10.0.0
5 19
051-8773
REVISION
BRANCH
PAGE
151 OF 157
SHEET
42 OF 48
3
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
TABLE_PHYSICAL_RULE_HEAD
LAYER
ALLOW ROUTE
ON LAYER?
=50_OHM_SE
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
EDP_50S
50_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
EDP_90D
TABLE_PHYSICAL_RULE_ITEM
VID_50S
EMBEDDED DISPLAYPORT
=50_OHM_SE
=50_OHM_SE
=STANDARD
=STANDARD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
90_OHM_DIFF
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
ANALOG_VIDEO
5:1_SPACING
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
EDP
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
TABLE_SPACING_ASSIGNMENT_ITEM
ANALOG_VIDEO
ANALOG_VIDEO
3:1_SPACING
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
DISPLAYPORT
SPACING
I436
TABLE_PHYSICAL_ASSIGNMENT_HEAD
I213
I214
I215
I232
I231
I233
I219
I220
I221
I222
I224
I223
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
DAC_AP_OUT1
DAC_AP_OUT2
DAC_AP_OUT3
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
BUF_C_Y
BUF_CVBS_PB
BUF_Y_PR
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
VIDEO_EMI_CVBS_PB 10
VIDEO_EMI_C_Y 10 11 27
VIDEO_EMI_Y_PR 10 11 27
VID_50S
VID_50S
VID_50S
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
VIDEO_PT_DK_CON_CVBS_PB
VIDEO_PT_DK_CON_C_Y 27 28
VIDEO_PT_DK_CON_Y_PR 27 28
ANALOG_VIDEO
ANALOG_VIDEO
ANALOG_VIDEO
VIDEO_PT_DK_CON_CVBS_PB_R
VIDEO_PT_DK_CON_C_Y_R 28 29
VIDEO_PT_DK_CON_Y_PR_R 28 29
VID_50S
VID_50S
VID_50S
I526
I527
I528
NET_PHYSICAL_TYPE
VID_50S
VID_50S
VID_50S
AREA_TYPE
DP_90D
7 11
NET_SPACING_TYPE2
DP
11
ELECTRICAL_CONSTRAINT_SET
11 27
I417
27 28
I418
I419
I420
I422
28 29
I421
I423
I430
I431
I432
90_OHM_DIFF
I433
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
4:1_SPACING
I434
I466
TABLE_SPACING_ASSIGNMENT_ITEM
I467
I469
NET_TYPE
I468
SPACING
I470
I471
I472
I473
I474
I475
I343
I342
I311
I312
I399
I398
I397
I396
I395
I394
I519
I518
I521
I520
I523
I522
I525
I524
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
CAM_100DVA3
MIPI_90D
MIPI_90D
MIPI_90D
CAM_100DVA3
MIPI_90D
MIPI_90D
MIPI_90D
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
CAM
MIPI0C
MIPI0C
MIPI0C
CAM
MIPI0C
MIPI0C
MIPI0C
MIPI0C_AP_CLK_P 7 25
MIPI0C_AP_CLK_N 7 25
MIPI0C_CAM_CLK_P 24 25
MIPI0C_CAM_CLK_N 24 25
MIPI0C_AP_DATA_P<0> 7 25
MIPI0C_AP_DATA_N<0> 7 25
MIPI0C_AP_DATA_N<1> 7 25
NC_MIPI0C_AP_DATA_N<2> 7
NC_MIPI0C_AP_DATA_N<3> 7
MIPI0C_AP_DATA_P<1> 7 25
NC_MIPI0C_AP_DATA_P<2> 7
NC_MIPI0C_AP_DATA_P<3> 7
MIPI0C_CAM_DATA_N<0> 24 25
MIPI0C_CAM_DATA_N<1> 24 25
MIPI0C_CAM_DATA_N<2>
MIPI0C_CAM_DATA_N<3>
MIPI0C_CAM_DATA_P<0> 24 25
MIPI0C_CAM_DATA_P<1> 24 25
MIPI0C_CAM_DATA_P<2>
MIPI0C_CAM_DATA_P<3>
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C_CAM_CLK_DEBUG_N
MIPI0C_CAM_CLK_DEBUG_P
MIPI0C_CAM_D0_DEBUG_N
MIPI0C_CAM_D0_DEBUG_P
MIPI0C_CAM_D1_DEBUG_N
MIPI0C_CAM_D1_DEBUG_P
MIPI0C_CAM_D2_DEBUG_N
MIPI0C_CAM_D2_DEBUG_P
MIPI0C_CAM_D3_DEBUG_N
MIPI0C_CAM_D3_DEBUG_P
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
I390
I389
I391
I392
I393
I384
I385
I387
I386
I388
I476
I477
I478
I479
I480
I481
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
CAM_100DVGA
CAM_100DVGA
MIPI_90D
MIPI_90D
I346
I545
I544
I347
I348
I353
I355
I354
I356
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
I415
I414
I413
I412
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
CAM
CAM
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
I443
MIPI1C_AP_DATA_P<0> 7 25
MIPI1C_AP_DATA_N<0> 7 25
NC_MIPI1C_AP_DATA_P<1> 7
NC_MIPI1C_AP_DATA_N<1> 7
MIPI1C_AP_CLK_P 7 25
MIPI1C_AP_CLK_N 7 25
MIPI1C_CAM_DATA_P<0> 24 25
MIPI1C_CAM_DATA_N<0> 24 25
MIPI1C_CAM_CLK_P 24 25
MIPI1C_CAM_CLK_N 24 25
MIPI1C_CAM_CLK_DEBUG_N
MIPI1C_CAM_CLK_DEBUG_P
MIPI1C_CAM_D0_DEBUG_N
MIPI1C_CAM_D0_DEBUG_P
I445
I447
DP_AP_AUX_N 7 28
DP_AP_AUX_P 7 28
DP_AP_HPD
7 37
DP_AP_TX_N<0> 7 28
DP_AP_TX_N<1> 7 28
DP_AP_TX_P<0> 7 28
DP_AP_TX_P<1> 7 28
DP_EMI_AUX_N 27 28 43
DP_EMI_AUX_P 27 28 43
DP_EMI_TX_N<0> 27 28
DP_EMI_TX_N<1> 27 28
DP_EMI_TX_P<0> 27 28
DP_EMI_TX_P<1> 27 28
DP_PT_DK_CON_AUX_N 27 29 43
DP_PT_DK_CON_AUX_P 27 29 43
DP_PT_DK_CON_TX_N<0> 27 29
DP_PT_DK_CON_TX_N<1> 27 29
DP_PT_DK_CON_TX_P<0> 27 29
DP_PT_DK_CON_TX_P<1> 27 29
DP_AP_TX_N<2> 7 28
DP_AP_TX_N<3> 7 28
DP_AP_TX_P<2> 7 28
DP_AP_TX_P<3> 7 28
DP_EMI_AUX_N 27 28 43
DP_EMI_AUX_P 27 28 43
DP_EMI_TX_N<2>
DP_EMI_TX_N<3>
DP_EMI_TX_P<2>
DP_EMI_TX_P<3>
DP_PT_DK_CON_AUX_N 27 29 43
DP_PT_DK_CON_AUX_P 27 29 43
DP_PT_DK_CON_TX_N<2> 28
DP_PT_DK_CON_TX_N<3> 28
DP_PT_DK_CON_TX_P<2> 28
DP_PT_DK_CON_TX_P<3> 28
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
DP
I446
I449
I448
I450
I451
I452
I454
I453
I455
I457
I456
I458
I460
I459
I462
I461
I463
I464
I465
AREA_TYPE
PHYSICAL_RULE_SET
AUDIO
1:1_DIFFPAIR
SPEAKER
SPEAKER
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
AUDIO
3:1_SPACING
I511
TABLE_PHYSICAL_ASSIGNMENT_HEAD
I510
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I531
LED
I530
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
LED
3:1_SPACING
I512
I513
TABLE_SPACING_ASSIGNMENT_ITEM
I529
I514
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
I482
I484
I483
I485
I487
I486
I489
I488
I490
I491
I493
I494
I495
46
I496
46
I497
PHYSICAL
I498
I499
I500
I501
I502
I503
I504
I505
I515
SPACING
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
I532
LED_IO1_A_R
LED_IO1_B_R
LED_IO2_A_R
LED_IO2_B_R
LED_IO3_A_R
LED_IO3_B_R
LED_IO4_A_R
LED_IO4_B_R
LED_IO5_A_R
LED_IO5_B_R
LED_IO6_A_R
LED_IO6_B_R
LED_IO_1_A
LED_IO_1_B
LED_IO_2_A
LED_IO_2_B
LED_IO_3_A
LED_IO_3_B
LED_IO_4_A
LED_IO_4_B
LED_IO_5_A
LED_IO_5_B
LED_IO_6_A
LED_IO_6_B
16
16
16
16
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL_RULE_SET
16
TABLE_SPACING_ASSIGNMENT_ITEM
BACKLIGHT
LED
16
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
I508
AREA_TYPE
16
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I507
NET_PHYSICAL_TYPE
16
TABLE_PHYSICAL_ASSIGNMENT_ITEM
46
46
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
46
46
EDP_AP_AUX_N 7 16
EDP_AP_AUX_P 7 16
EDP_AP_HPD 7 16
EDP_AP_TX_N<0> 7 16
EDP_AP_TX_N<1> 7 16
EDP_AP_TX_N<2> 7 16
EDP_AP_TX_N<3> 7 16
EDP_AP_TX_P<0> 7 16
EDP_AP_TX_P<1> 7 16
EDP_AP_TX_P<2> 7 16
EDP_AP_TX_P<3> 7 16
EDP_AUX_CONN_N 16
EDP_AUX_CONN_P 16
EDP_DATA_CONN_N<0>
EDP_DATA_CONN_N<1>
EDP_DATA_CONN_N<2>
EDP_DATA_CONN_N<3>
EDP_DATA_CONN_P<0>
EDP_DATA_CONN_P<1>
EDP_DATA_CONN_P<2>
EDP_DATA_CONN_P<3>
EDP_EMI_AUX_N 16
EDP_EMI_AUX_P 16
EDP_EMI_TX_N<0> 16
EDP_EMI_TX_N<1> 16
EDP_EMI_TX_N<2> 16
EDP_EMI_TX_N<3> 16
EDP_EMI_TX_P<0> 16
EDP_EMI_TX_P<1> 16
EDP_EMI_TX_P<2> 16
EDP_EMI_TX_P<3> 16
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
AUDIO/SPEAKER
I506
I492
I345
I444
SPACING
DP_90D
DP_90D
DP_50S
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
DP_90D
I416
TABLE_SPACING_ASSIGNMENT_HEAD
I316
I438
I441
5:1_SPACING
PHYSICAL
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I315
I439
I442
SPACING_RULE_SET
NET_TYPE
PHYSICAL_RULE_SET
PHYSICAL
AREA_TYPE
11
TABLE_PHYSICAL_ASSIGNMENT_HEAD
ELECTRICAL_CONSTRAINT_SET
50_OHM_SE
TABLE_SPACING_ASSIGNMENT_ITEM
MIPI
MIPI
I440
NET_SPACING_TYPE1
I429
NET_SPACING_TYPE1
DP_50S
11
I428
I437
TABLE_SPACING_ASSIGNMENT_HEAD
I426
MIPI_90D
PHYSICAL_RULE_SET
7 11
I427
AREA_TYPE
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
90_OHM_DIFF
I425
NET_PHYSICAL_TYPE
NET_PHYSICAL_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I424
TABLE_PHYSICAL_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
7 11
SPACING
EDP_90D
EDP_90D
EDP_50S
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
I435
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
37
I533
37
37
37
37
37
37
37
I516
I517
I535
I534
I536
I537
37
37
37
37
16 37
16 37
16 37
I539
I538
I541
I540
I542
I543
PHYSICAL
SPACING
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
LEFT_CH_OUT_P
LEFT_CH_OUT_REF
LEFT_CH_P
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
MAX983X4_L_IN_N
MAX983X4_L_IN_P
SPKRAMP_L_OUT_N
SPKRAMP_L_OUT_P
RIGHT_CH_OUT_REF
RIGHT_CH_OUT_P
RIGHT_CH_P
MAX983X4_R_IN_P
MAX983X4_R_IN_N
SPKRAMP_R_OUT_N
SPKRAMP_R_OUT_P
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
19 20
19 20
20
20
20
20
20
19 20
19 20
20
20
20
20
20
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
EXT_MIC_P
EXT_MIC_REF
HSMIC_C_P
HSMIC_C_N
HSMIC_R_P
HSMIC_R_N
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUD_HP1_MLBCON_R
21 23
AUD_HP1_MLBCON_L
21 23
CONN_AUD_HEADSET_RIGHT 23 24
CONN_AUD_HEADSET_LEFT 23 24
HP_R
19 21
HP_L
19 21
19 22
19 22
19 22
19 22
22
22
16 37
16 37
SYNC_MASTER=MIKE
16 37
SYNC_DATE=01/21/2011
PAGE TITLE
CONSTRAINTS: DISPLAY/AUDIO
16 37
16 37
DRAWING NUMBER
16 37
Apple Inc.
16 37
16 37
16 37
SIZE
10.0.0
051-8773
REVISION
BRANCH
PAGE
152 OF 157
SHEET
43 OF 48
DDR
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
DDR
AREA_TYPE
SPACING_RULE_SET
3:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_ITEM
DDR_50S
TABLE_SPACING_ASSIGNMENT_ITEM
50_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
DDR_90D
90_OHM_DIFF
NAND
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NAND_50S
50_OHM_SE
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SPACING
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
NAND
2:1_SPACING
NAND DEV
TABLE_SPACING_ASSIGNMENT_ITEM
I221
I222
I223
I225
I226
I224
I228
I230
I229
I231
I232
I233
I235
I234
I236
I237
I238
I239
I240
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR0_CA<9..0>
DDR0_DM<3..0>
DDR0_CK_P
DDR0_CK_N
DDR0_CKE<1..0>
DDR0_CSN<2..0>
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR
DDR0
DDR0
DDR0
DDR1
DDR1
DDR1
DDR2
DDR2
DDR2
DDR3
DDR3
DDR3
DDR0_ZQ
DDR0_DQ<7..0>
DDR0_DQS_P<0>
DDR0_DQS_N<0>
DDR0_DQ<15..8>
DDR0_DQS_P<1>
DDR0_DQS_N<1>
DDR0_DQ<23..16>
DDR0_DQS_P<2>
DDR0_DQS_N<2>
DDR0_DQ<31..24>
DDR0_DQS_P<3>
DDR0_DQS_N<3>
8 13
8 13
I201
I202
I203
I205
I206
I204
I208
I210
I209
I211
I212
I213
I215
I214
I216
I217
I218
I219
I220
I181
I182
I183
I185
I186
I184
I188
I190
I189
I191
I192
I193
I195
I194
I196
I197
I198
I199
I200
I38
I39
I41
I44
I43
I47
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR1_CA<9..0>
DDR1_DM<3..0>
DDR1_CK_P
DDR1_CK_N
DDR1_CKE<1..0>
DDR1_CSN<2..0>
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR
DDR0
DDR0
DDR0
DDR1
DDR1
DDR1
DDR2
DDR2
DDR2
DDR3
DDR3
DDR3
DDR1_ZQ
DDR1_DQ<7..0>
DDR1_DQS_P<0>
DDR1_DQS_N<0>
DDR1_DQ<15..8>
DDR1_DQS_P<1>
DDR1_DQS_N<1>
DDR1_DQ<23..16>
DDR1_DQS_P<2>
DDR1_DQS_N<2>
DDR1_DQ<31..24>
DDR1_DQS_P<3>
DDR1_DQS_N<3>
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR2_CA<9..0>
DDR2_DM<3..0>
DDR2_CK_P
DDR2_CK_N
DDR2_CKE<1..0>
DDR2_CSN<2..0>
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR
DDR0
DDR0
DDR0
DDR1
DDR1
DDR1
DDR2
DDR2
DDR2
DDR3
DDR3
DDR3
DDR2_ZQ
DDR2_DQ<7..0>
DDR2_DQS_P<0>
DDR2_DQS_N<0>
DDR2_DQ<15..8>
DDR2_DQS_P<1>
DDR2_DQS_N<1>
DDR2_DQ<23..16>
DDR2_DQS_P<2>
DDR2_DQS_N<2>
DDR2_DQ<31..24>
DDR2_DQS_P<3>
DDR2_DQS_N<3>
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR3_CA<9..0>
DDR3_DM<3..0>
DDR3_CK_P
DDR3_CK_N
DDR3_CKE<1..0>
DDR3_CSN<2..0>
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR_50S
DDR
DDR0
DDR0
DDR0
DDR1
DDR1
DDR1
DDR2
DDR2
DDR2
DDR3
DDR3
DDR3
DDR3_ZQ
DDR3_DQ<7..0>
DDR3_DQS_P<0>
DDR3_DQS_N<0>
DDR3_DQ<15..8>
DDR3_DQS_P<1>
DDR3_DQS_N<1>
DDR3_DQ<23..16>
DDR3_DQS_P<2>
DDR3_DQS_N<2>
DDR3_DQ<31..24>
DDR3_DQS_P<3>
DDR3_DQS_N<3>
NET_TYPE
NET_TYPE
8 13
ELECTRICAL_CONSTRAINT_SET
8 13
PHYSICAL
ELECTRICAL_CONSTRAINT_SET
SPACING
PHYSICAL
SPACING
8 13
8 13
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
I68
I69
13
I70
8 13 40
I71
8 13 40
I72
8 13 40
I73
8 13 40
I74
8 13
I75
8 13 40
I76
8 13
I77
8 13
I78
8 13
I120
8 13
I121
8 13
I122
8 13
I123
I124
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
I125
8 13
I126
8 13
I127
8 13
I128
8 13
I129
8 13
I130
8 13
I131
I132
13
I133
8 13
I134
8 13
I135
8 13
I136
8 13
I137
8 13
I138
8 13
I139
8 13
I140
8 13
I141
8 13
I142
8 13
I143
8 13
I144
8 13
I145
I146
8 14
I147
8 14
I148
8 14
I149
8 14
I150
8 14
I151
8 14
I152
I153
14
I154
8 14
I155
8 14
I157
8 14
I156
8 14
I158
8 14
I160
8 14
I159
8 14
I161
8 14
I162
8 14
I163
8 14
I164
8 14
I165
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
FMI0_ALE
FMI0_CE0_L
FMI0_CE1_L
FMI0_CE2_L
FMI0_CE3_L
FMI0_CE4_L
FMI0_CE5_L
FMI0_CE6_L
FMI0_CE7_L
FMI0_CLE
FMI0_DQS_N
FMI0_DQS_P
FMI0_RB0_L
FMI0_RB1_L
FMI0_RE_N
FMI0_RE_P
FMI0_WE_L
FMI0_WP_L
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
FMI1_ALE
FMI1_CE0_L
FMI1_CE1_L
FMI1_CE2_L
FMI1_CE3_L
FMI1_CE4_L
FMI1_CE5_L
FMI1_CE6_L
FMI1_CE7_L
FMI1_CLE
FMI1_DQS_N
FMI1_DQS_P
FMI1_RB0_L
FMI1_RB1_L
FMI1_RE_N
FMI1_RE_P
FMI1_WE_L
FMI1_WP_L
FMI1_CLE
FMI1_ALE
FMI1_RE_L
FMI1_WE_L
FMI1_WP_L
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
6 12
I49
6 12
I50
6 12
I51
6 12
I52
6 12
I54
6 12
I53
6 12
I55
6 12
I56
6 12
I57
6 12
I58
6 12
I59
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
I60
I62
I61
I63
I64
I65
I67
6 12
I66
I79
6 12
I80
I81
I83
6 12
I82
I84
6 12
I85
6 12
I86
6 12
I87
6 12
I88
6 12
I89
6 12
I90
6 12
I91
6 12
I93
6 12
I92
6 12 44
I94
6 12
I95
6 12
I96
I97
I98
I99
I100
I101
I102
6 12 44
I103
I104
I105
6 12
I106
I107
I108
6 12
I109
6 12 44
I110
44
I111
6 12 44
I112
6 12 44
I113
I114
6 12 44
I116
44
I115
8 14
I117
I118
8 14
I119
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND0
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
NAND1
SLOT0_FMI0_AD<0>
SLOT0_FMI0_AD<1>
SLOT0_FMI0_AD<2>
SLOT0_FMI0_AD<3>
SLOT0_FMI0_AD<4>
SLOT0_FMI0_AD<5>
SLOT0_FMI0_AD<6>
SLOT0_FMI0_AD<7>
SLOT0_FMI0_ALE
SLOT0_FMI0_CE0_L
SLOT0_FMI0_CE1_L
SLOT0_FMI0_CLE
SLOT0_FMI0_DQS_P
SLOT0_FMI0_RE_N
SLOT0_FMI0_WE_L
SLOT0_FMI1_AD<0>
SLOT0_FMI1_AD<1>
SLOT0_FMI1_AD<2>
SLOT0_FMI1_AD<3>
SLOT0_FMI1_AD<4>
SLOT0_FMI1_AD<5>
SLOT0_FMI1_AD<6>
SLOT0_FMI1_AD<7>
SLOT0_FMI1_ALE
SLOT0_FMI1_CE0_L
SLOT0_FMI1_CE1_L
SLOT0_FMI1_CLE
SLOT0_FMI1_DQS_P
SLOT0_FMI1_RE_N
SLOT0_FMI1_WE_L
SLOT1_FMI0_AD<0>
SLOT1_FMI0_AD<1>
SLOT1_FMI0_AD<2>
SLOT1_FMI0_AD<3>
SLOT1_FMI0_AD<4>
SLOT1_FMI0_AD<5>
SLOT1_FMI0_AD<6>
SLOT1_FMI0_AD<7>
SLOT1_FMI0_ALE
SLOT1_FMI0_CE0_L
SLOT1_FMI0_CE1_L
SLOT1_FMI0_CLE
SLOT1_FMI0_DQS_P
SLOT1_FMI0_RE_N
SLOT1_FMI0_WE_L
SLOT1_FMI1_AD<0>
SLOT1_FMI1_AD<1>
SLOT1_FMI1_AD<2>
SLOT1_FMI1_AD<3>
SLOT1_FMI1_AD<4>
SLOT1_FMI1_AD<5>
SLOT1_FMI1_AD<6>
SLOT1_FMI1_AD<7>
SLOT1_FMI1_ALE
SLOT1_FMI1_CE0_L
SLOT1_FMI1_CE1_L
SLOT1_FMI1_CLE
SLOT1_FMI1_DQS_P
SLOT1_FMI1_RE_N
SLOT1_FMI1_WE_L
8 14
8 14
8 14
8 14
DDR VREF
8 14
TABLE_SPACING_ASSIGNMENT_HEAD
I48
I37
I170
I171
I172
I173
I174
I175
I176
I177
I178
I179
I180
14
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
VREF
5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
8 14
8 14
8 14
NET_TYPE
8 14
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
8 14
8 14
PWR
PWR
PWR
PWR
I166
8 14
I167
8 14
I169
8 14
I168
PPVREF_DDR0_CA
PPVREF_DDR0_DQ
PPVREF_DDR1_CA
PPVREF_DDR1_DQ
SYNC_MASTER=MIKE
13 45
SYNC_DATE=01/21/2011
PAGE TITLE
CONSTRAINTS: DDR/FMI
13 45
13 45
DRAWING NUMBER
13 45
Apple Inc.
8 14
8 14
SIZE
10.0.0
R
8 14
051-8773
REVISION
BRANCH
PAGE
153 OF 157
SHEET
44 OF 48
PWR
AREA_TYPE
PHYSICAL_RULE_SET
PWR
PWR_PMU
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
PWR
3:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_ITEM
ELECTRICAL_CONSTRAINT_SET
I255
I256
VOLTAGE
0.4V
0.4V
1.1V
1.2V
1.1V
1.1V
1.1V
1.1V
1.1V
1.1V
1.1V
1.1V
1.1V
1.25V
1.2V
1.2V
1.7V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
2.85V
2.85V
3.0V
3.0V
3.0V
3.0V
3.0V
3.0V
3.0V
3.0V
3.2V
3.2V
3.3V
3.3V
3.3V
3.3V
5.25V
6.0V
6.0V
4.2V
1.8V
20.4V
20.4V
20.4V
20.4V
6.0V
6.0V
6.0V
5.0V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR500
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PP3V0_VIDEO
PP3V0_VIDEO_BUF
PP3V2_LDO5
PP3V2_S2R_USBMUX
PP3V3_ACC
PP3V3_LCDVDD_SW_F
PP3V3_OUT
PP3V3_S0_LCD_FERR
PP5V25_VLCM2
PP6V0_LCM_HI
PP6V0_LCM_VBOOST
PPBATT_VCC
PPIO_NAND_H4
PPLED_BACK_REG_A
PPLED_BACK_REG_B
PPLED_OUT_A
PPLED_OUT_B
PPVBUS_PROT
PPVBUS_USB
PPVBUS_USB_DCIN
PPVBUS_USB_PT_DK_CON
1.8V
4.7V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
4.6V
18V
18V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PPVCCQ_NAND
PPVCC_MAIN
PPVREF_DDR0_CA
PPVREF_DDR0_DQ
PPVREF_DDR0_DQ_H4
PPVREF_DDR1_CA
PPVREF_DDR1_DQ
PPVREF_DDR1_DQ_H4
PPVREF_DDR2_CA
PPVREF_DDR2_DQ
PPVREF_DDR2_DQ_H4
PPVREF_DDR3_CA
PPVREF_DDR3_DQ
PPVREF_DDR3_DQ_H4
BATT_POS_RC
PP18V_GRAPE
PP18V_R_GRAPE
DAC_AP_VREF
PPVDDI_NAND_U1400
VR_BOOST_SW
VR_BOOST_L
MT_3V3_INT
I4
I5
I6
I7
I8
I9
I12
I11
I10
I13
I15
I14
I19
I20
I21
I23
I22
I24
I25
I26
I28
I27
I29
I30
I31
I32
I33
I34
I35
I36
I37
I38
I39
I40
I41
I42
I43
I44
I45
I46
I47
I49
I51
I50
I53
I52
I54
I55
I56
I57
I58
I59
I60
I61
I62
I63
I64
I65
I66
I67
I68
I69
I70
I71
I72
I73
I74
I76
I75
I77
I78
I79
I83
I80
I81
I82
I219
I84
I85
I220
I223
3.3V
I224
I225
I226
I258
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I3
I18
I257
SPACING
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
3.3V
I2
I17
PHYSICAL
ACC_PT_DK_CON_PP3V3
BUCK0_FB
BUCK0_LXL
BUCK0_LXM
BUCK2_FB
BUCK2_LXL
BUCK2_LXM
BUCK2_LXR
BUCK3_FB
BUCK3_LXL
BUCK3_LXM
BUCK4_FB
BUCK4_LXL
BUCK4_LXM
BUCK5_FB
BUCK5_LX
PP0V4_MIPI0D
PP0V4_MIPI1D
PP1V1
PP1V2
PP1V8
PP1V1_MIPID_PLL_F
PP1V1_PL0_F
PP1V1_PL1_F
PP1V1_PL2_F
PP1V1_PL3_F
PP1V1_PL4_F
PP1V1_PL5_F
PP1V1_PLL_USB_F
PP1V25_CPU
PP1V2_S2R
PP1V2_SOC
PP1V7_VA_VCP
PP1V8_ALWAYS
PP1V8_DP_AVDD_AUX
PP1V8_EDP_AVDD_AUX
PP1V8_GRAPE
PP1V8_S2R
PP1V8_SENSOR_FLT
PP1V8_VDDA18_TS
PP2V85_CAM
PP2V85_CAM_FLT
PP3V0_GRAPE
PP3V0_IO
PP3V0_OPTICAL
PP3V0_S2R_HALL
PP3V0_S2R_HALL_FLT
PP3V0_SENSOR_FLT
I1
I16
3.0V
PHYSICAL
SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
NET_TYPE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
I221
I259
27 29
3.0V
1.8V
1.8V
1.8V
1.8V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PWR
MT_3V3_INT
Z1_1V8_OUT
Z2_VDDCORE
Z2_VDDANA
Z2_3V3_1V8_IN
18 45
18
18
18
18
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
7
35 36
35 36
35 36
4
4
4
4
4
GND
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
GND_PH
GND
4
TABLE_PHYSICAL_ASSIGNMENT_ITEM
35 36
35 36
35 36
NET_TYPE
35 36 40
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
35 36
7
I199
I200
35 36
I201
35 36
I202
24 26
I203
I207
35 36
I206
24 26
I205
35 36
I217
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VOLTAGE=0V
VOLTAGE=0V
VOLTAGE=0V
VOLTAGE=0V
VOLTAGE=0V
VOLTAGE=0V
GND
GND_AUDIO_CODEC
GND_AUDIO_HP_AMP
GND_AUDIO_PT_DK
GND_SPKR_AMP1
GND_SPKR_AMP2
GND_PMU
AGND
AGND_U3000
19 21
19 21 22
21 27
20
20
17
35 36
35 36
35 36
24 26
10 24 26
35 36
35 36
RST
35 36
35 36
TABLE_SPACING_ASSIGNMENT_HEAD
35 36
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
RST
4:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
16
35 36
16
NET_TYPE
35 37
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
37
37
I166
I167
16
I171
16
I169
35 37
I170
35 37
I168
36
I172
4 36
I174
35 36
I173
27 29
I175
I176
12
I177
35 36 37
I178
13 44
I179
13 44
I181
I180
13 44
I182
13 44
BB_TRST_L
DBG_RST
DEBUG_RST_L
GSM_TXBURST_IND
JTAG_AP_TRST_L
RST_AP_1V8_L
RST_AP_L
RST_BB_L
RST_BB_PMU_L
RST_BT_L
RST_DET_L
RST_GRAPE_L
RST_L63_L
RST_PMU_IN
RST_WLAN_L
SIMCRD_RST
TP_WLAN_TRST_L
UD881_RST
UD882_RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
GRAPE
RST
RST
RST
RST
RST
RST
RST
I165
35 36 39
6 9
I183
5 15 30
4 10 42
4
4 27 30 37
5 30
30 37
15 37
5 30
6 17
19 37
4 37
15 37
8
14
14
8
14
SYNC_MASTER=MIKE
14
SYNC_DATE=01/21/2011
PAGE TITLE
8
36
DRAWING NUMBER
17
Apple Inc.
17
7
051-8773
17
17
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REVISION
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PAGE
154 OF 157
SHEET
45 OF 48
SNS
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
SNS_50S
50_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
SNS
AREA_TYPE
SPACING_RULE_SET
3:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
SNS_90D
90_OHM_DIFF
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I48
NC_HSIC0_DATA2
I49
NC_HSIC0_STB2
I50
NC_HSIC1_DATA2
NC_HSIC1_STB2
I51
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
4 42
4 42
4 42
4 42
I117
I119
I118
I121
I120
NC_JTAG_AP_TRTCK
I52
NO_TEST=TRUE
I122
I124
I54
NC_USB_D1_P
I55
NC_USB_D1_N
I56
NC_USB11_D1_P
I57
NC_USB11_D1_N
I58
NC_USB_ANALOGTEST0
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
4 42
4 42
4 42
4 42
I123
I126
I128
I127
I130
NC_USB_ANALOGTEST1
I59
NC_USB_ID0
I60
NC_USB_ID1
I61
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_USB_BRICKID1
I62
NO_TEST=TRUE
NC_I2S1_MCK
I64
NC_I2S1_BCLK
I65
NC_I2S1_LRCK
I66
NC_I2S1_DIN
I67
NC_I2S1_DOUT
NC_I2S2_MCK
I68
I69
NC_I2S3_MCK
I70
NC_AP_GPIO216
NC_SPI_FLASH_CS_L
I71
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
4
4
I131
I134
I133
NO_TEST=TRUE
I137
I136
I139
I138
I140
I143
I142
NC_SDIO0_WL_CLK
I76
NC_SDIO0_WL_CMD
I75
NC_SDIO0_WL_DATA<0>
I77
NC_SDIO0_WL_DATA<1>
I80
NC_SDIO0_WL_DATA<2>
NC_SDIO0_WL_DATA<3>
I79
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_SPI3_MISO
I83
NC_SPI3_MOSI
I82
NC_SPI3_SCLK
I85
NC_SPI3_CS_L
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I145
I147
NC_AP_GPIO3
I92
NC_AP_GPIO7
I91
NC_AP_GPIO8
I94
NC_AP_GPIO11
NC_AP_GPIO13
I93
I95
NC_BOARD_ID_3
I98
NC_AP_GPIO19
NC_AP_GPIO31
I97
I96
NC_AP_GPIO35
I99
NC_AP_GPIO3V1
I101
NC_AP_GPIO185
I100
NC_AP_GPIO186
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
5
5
5
5
I152
I151
I150
I153
I154
I157
I104
I107
NC_UART2_RXD
NC_UART2_TXD
NC_UART4_CTS_L
I106
NC_UART4_RTS_L
I105
NC_UART4_RXD
I108
NC_UART4_TXD
I110
NC_UART6_CTSN
I109
NC_UART6_RTSN
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I190
I193
NC_DDR0_CKE<1>
NC_DDR1_CKE<1>
NC_DDR2_CKE<1>
NC_DDR3_CKE<1>
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I227
I228
I229
I230
I231
NC_FMI2_CE1_L
NC_FMI2_CE2_L
NC_FMI2_CE3_L
NC_FMI2_CE5_L
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_FMI2_AD<0>
NC_FMI2_AD<1>
NC_FMI2_AD<2>
NC_FMI2_AD<3>
NC_FMI2_AD<4>
NC_FMI2_AD<5>
NC_FMI2_AD<6>
NC_FMI2_AD<7>
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_FMI2_ALE
NC_FMI2_CLE
NC_FMI2_WE_L
NC_FMI2_RE_L
NC_FMI2_DQS
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_FMI3_CE0_L
NC_FMI3_CE1_L
NC_FMI3_CE2_L
NC_FMI3_CE3_L
NC_FMI3_CE4_L
NC_FMI3_CE5_L
NC_FMI3_CE6_L
NC_FMI3_CE7_L
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I156
NC_FMI3_AD<0>
NC_FMI3_AD<1>
NC_FMI3_AD<2>
NC_FMI3_AD<3>
NC_FMI3_AD<4>
NC_FMI3_AD<5>
NC_FMI3_AD<6>
NC_FMI3_AD<7>
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_FMI3_ALE
NC_FMI3_CLE
NC_FMI3_WE_L
NC_FMI3_RE_L
NC_FMI3_DQS
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NC_BON_L1
NC_BON_L3
NC_BON_L5
NC_EAROUT_AP
NC_EAROUT_AN
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
18
18
18
19
19
6
6
6
6
I196
I195
I198
I200
NC_DDR0_CSN<1>
NC_DDR1_CSN<1>
NC_DDR2_CSN<1>
NC_DDR3_CSN<1>
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
8
8
8
8
I232
I233
I234
I235
I236
I238
6
6
6
I205
I204
I226
6
6
I207
I209
NC_PMU_VBUCK0_SW0_G
NC_PMU_VBUCK0_SW0_S
NC_VBUS_A_OV_L
NC_BOARD_TEMP7
NC_BOARD_TEMP8
NET_SPACING_TYPE=ANLG
NET_SPACING_TYPE=ANLG
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
36
I210
I212
37
I240
I241
NC_PMU_GPIO12
NC_PMU_GPIO13
NO_TEST=TRUE
NO_TEST=TRUE
37
I243
37
I244
I245
I214
NC_PMU_GPIO16
NC_PMU_GPIO17
NO_TEST=TRUE
NO_TEST=TRUE
NC_PMU_AMUX_A0
NC_PMU_AMUX_A1
NC_PMU_AMUX_A2
NC_PMU_AMUX_A3
NC_PMU_AMUX_AY
NC_PMU_AMUX_B0
NC_PMU_AMUX_B1
NC_PMU_AMUX_B2
NC_PMU_AMUX_B3
NC_PMU_AMUX_BY
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
19
19
19
19
19
19
19
19
36
37
I242
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
36
I239
NC_LINE_IN1_CODEC
NC_LINE_IN1_REF_CODEC
NC_LINE_IN2_CODEC
NC_LINE_IN2_REF_CODEC
NC_MIC1_BIAS_CODEC
NC_MIC1P_CODEC
NC_MIC1N_CODEC
NC_MIC1_FILT_CODEC
NC_D5703_6
NC_D5700_6
NC_D5701_6
NC_D5702_6
NC_LCM2_EN
NC_VLCM1
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
37
37
37
37
6
6
6
I216
I218
I217
I219
I221
I224
I223
I222
I225
37
37
37
37
37
37
37
37
37
37
6
6
5
5
5
5
5
5
5
I160
I159
I162
I164
I163
I166
I165
5
5
5
5
5
I170
I169
I168
I171
I173
I102
I191
I220
I161
I90
I189
I213
I144
I155
I81
I148
I73
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I146
NC_SWI_AP
I72
NC_FMI1_CE2_L
NC_FMI1_CE3_L
NC_FMI1_CE4_L
NC_FMI1_CE5_L
NC_FMI1_CE6_L
NC_FMI1_CE7_L
I237
I135
I63
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I132
NC_FMI0_CE2_L
NC_FMI0_CE3_L
NC_FMI0_CE4_L
NC_FMI0_CE5_L
NC_FMI0_CE6_L
NC_FMI0_CE7_L
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
I174
5
5
5
I176
I179
5
5
5
I177
I180
I181
I184
I183
I185
NC_MIPI_VSYNC_H4
NO_TEST=TRUE
NC_MIPI0C_AP_DATA_P<2>
NC_MIPI0C_AP_DATA_N<2>
NO_TEST=TRUE
NO_TEST=TRUE
NC_MIPI0C_AP_DATA_P<3>
NC_MIPI0C_AP_DATA_N<3>
NO_TEST=TRUE
NO_TEST=TRUE
NC_MIPI1C_AP_DATA_P<1>
NC_MIPI1C_AP_DATA_N<1>
NO_TEST=TRUE
NO_TEST=TRUE
NC_ISP_AP_1_FLASH
NC_ISP_AP_1_PRE_FLASH
NO_TEST=TRUE
NO_TEST=TRUE
7 43
7 43
7 43
7 43
7 43
7 43
7
7
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PAGE TITLE
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DRAWING NUMBER
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