EXP NO.

14 Automatic layout generation of a 10 Bit number controlled oscillator

AIM:
To generate the layout of 10 Bit number controlled oscillator and simulate it.
PROCEDURE:
Following are the steps for Schematic Driven Layout:

Open the 10 bit NCOs spice netlist(extracted from schematic)

Change NMOS25 to NMOS and PMOS25 to PMOS

Delete the line that has the path to library.

Open RingVCO s layout in L-Edit. It is located at My Documents-> Tanner EDA->tanner tools->

Design->ringvco->ringvco.tdb

In L-Edit we get the layout of ringvco. Goto cell->new view->Show SDL Navigator

SDL Navigator Window pops up. Click on folder icon to load netlist.

Browse to location where 10 bit NCOs netlist is available and load it.

We will get a message 0 warnings and 24 instances added. And go to windows and choose
cell0

Now all the ports will get listed in sdl navigator window. Choose a port and click on blue

flyline button to make show connections.

Follow the fly-lines and complete the connections.

Routed layout will be as below

Give the path of generic 250.ext in tools->extract setup.and extract

Netlist for the layout.

MMn1 Out In

PD=4.3u $ $x=1193
+$y=3400 $w=414 $h=600

MMn2 N_1 Vdd Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=1193
+$y=2500 $w=414 $h=600

N_1 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f

MMn3 N_1 D0 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=1893
+$y=2500 $w=414 $h=600

MMn4 N_1 D1 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=2493

+$y=2500 $w=414 $h=600

MMn5 N_1 D2 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=3093

+$y=2500 $w=414 $h=600

MMn6 N_1 D3 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=3793
+$y=2500 $w=414 $h=600
MMp5 N_2 D3 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=3793 $y=5400 $w=414 $h=600 MMn7 N_1 D4 Gnd 0 NMOS25 W=1.5u L=250n
M=1 AS=975f PS=4.3u AD=975f PD=4.3u $ $x=4493
+$y=2500 $w=414 $h=600
MMn8 N_1 D5 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=5093
+$y=2500 $w=414 $h=600
MMn9 N_1 D6 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=5793
+$y=2500 $w=414 $h=600
MMn10 N_1 D7 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=6593
+$y=2500 $w=414 $h=600
MMn11 N_1 D8 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=7293
+$y=2500 $w=414 $h=600
MMn12 N_1 D9 Gnd 0 NMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $ $x=8093
+$y=2500 $w=414 $h=600
MMp1 N_2 Gnd Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=1193 $y=5400 $w=414 $h=600
MMp2 N_2 D0 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=1893 $y=5400 $w=414 $h=600
MMp3 N_2 D1 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=2493 $y=5400 $w=414 $h=600
MMp4 N_2 D2 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=3093 $y=5400 $w=414 $h=600
MMp6 N_2 D4 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=4493 $y=5400 $w=414 $h=600
MMp7 N_2 D5 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=5093 $y=5400 $w=414 $h=600
MMp8 N_2 D6 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=5793 $y=5400 $w=414 $h=600
MMp9 N_2 D7 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u
AD=975f PD=4.3u $
+$x=6593 $y=5400 $w=414 $h=600
MMp10 N_2 D8 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u

AD=975f PD=4.3u $
+$x=7293 $y=5400 $w=414 $h=600
MMp11 N_2 D9 Vdd Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $
+$x=8093 $y=5400 $w=414 $h=600
MMp12 Out In N_2 Vdd PMOS25 W=1.5u L=250n M=1 AS=975f PS=4.3u AD=975f
PD=4.3u $
+$x=1193 $y=4400 $w=414 $h=600
VVoltageSource_1 Vdd
VVoltageSource_2 In
$y=3600 $w=400 $h=600

Gnd
DC 5 $$x=500 $y=5100 $w=400 $h=600
Gnd PULSE(05 0 5n 5n 95n 200n) $ $x=800

Getting output is similar to inverter layout.

Result:
Thus the Layout of a 10 Bit number controlled oscillator is generated and simulated.