3

Computer-Aided Design

Ajoy Opal 3.1 Introduction ........................................................................................ 43

Department of Electrical and 3.2 Modified Nodal Analysis ........................................................................ 43
Computer Engineering, 3.3 Formulation of MNA Equations of Nonlinear Circuits ................................ 46
University of Waterloo,
Waterloo, Ontario, Canada 3.4 A Direct Current Solution of Nonlinear Circuits ........................................ 47
3.5 Transient Analysis of Nonlinear Circuits ................................................... 49
References ........................................................................................... 51

3.1 Introduction
Hand analysis of large circuits, especially if they contain
nonlinear elements, can be tedious and prone to error. In
such cases, computer-aided design (CAD) is necessary to
speed up the analysis procedure and to obtain accurate
results. This chapter describes the algorithms used in
CAD programs. Such programs are available from com-
mercial companies, such as M e n t o r Graphics, C a d e n c e , and
Avant!
Typically, CAD programs are based on formulating the
equations using matrix methods, and the equations are
then solved using numerical methods. For ease in pro-
gramming, methods that are general and straightforward
are preferred. This chapter assumes that the reader is familiar
with methods for solving a set of simultaneous linear equa-
tions.
3.2 Modified Nodal Analysis
The first step in circuit analysis is formulation of equations.
This section modifies the nodal analysis method described in
Chapter 1 of this book's Section 1 to include different types of
elements in the formulation. Recall that in nodal analysis,
Kirchhoff's current law (KCL) is used to write equations at
each node in terms of the nodal voltages and element values.
The equations are written for one node at a time, and the node
voltages are unknown variables. In CAD, it is useful to consider
one element at a time and to develop the matrix equations on
this basis. Assume that the nodes in a circuit are labeled by
consecutive integers from 1 to N such that there are the N
nodal voltages in the circuit. The reference node is usually
labeled zero. This presentation uses the lowercase letters j, k,
I, and m to denote nodes in the circuit. Voltages will be
denoted by V and branch currents by L Consider a linear
resistor R connected between nodes j and k as in Figure 3.1.
This element will affect the KCL equations at nodes j and k,
and the contributions will be:
KCL at Node j: . . . + G V j - G V k .... O.
KCL at Node k: . . . - G V j + GVk .... O.
The Vj and Vk are the nodal voltages at the two nodes
V = Vj - Vk and G = I / R , and the ellipses ( . . . ) denote con-
tributions from other elements connected to that node. Thus,
the entries in the nodal admittance matrix due to the resistor
are in four locations:
Col. Col.
v; vk
Row k:
[ -G
Row and Col. denote the row and the column in the matrix,
respectively. If one end of the resistor, for example node k,
is connected to the reference or ground node, then the

Copyright © 2005 by Academic Press. 43

All rights of reproduction in any form reserved.
44 Ajoy Opal

Q R @ types of elements in the formulation. The circuit stamps for

other common elements are given in Table 3.1 and can be
V/V found in CAD books. In this table, rows labeled with lowercase
+ V - letters j, k, l, and m represent KCL equations at that node, and
! Vj, Vk, V/, and V,~ represent nodal voltages at the corre-
sponding nodes. All rows and columns labeled by a current I
FIGURE 3.1 LinearResistor
represent additional rows and columns required for MNA.
corresponding column and row are not present in the admit- As examples, the MNA equations for the linear circuit are in
tance matrix, and there is only one entry in the matrix at Figure 3.3.
location (j, j). The above is called the circuit stamp for the Scanning of the circuit shows that it has three nodal voltages
element and can be used for all elements that can be written in and that it needs three branch currents for MNA formulation.
admittance form (i.e., the current through the element can be The branch currents are required, one each, for the voltage
written in terms of nodal voltages and the element value). source, the inductor in impedance form, and the VVT. The
Next, consider an independent voltage source for which total number of variables is six and can be computed before
the current through it cannot be written in terms of nodal the matrices are formulated. The MNA equations are as follows:
voltages, such as in Figure 3.2.
G -G 0 1 0 0" vi
-G G 0 0 1 0 ½
o 0 0 0 0 0 1 ½
+ g - 1 0 0 0 0 0
0 1 0 0 0 0 IL
IE
0 -p~ 1 0 0 0 IWT
FIGURE 3.2 Independent Voltage Source 0 0 0 0 0 0- Vl
In this case, the KCL equations at nodes j and k are listed as: 0 C -C 0 0 0 V2
+
0 -C C 0 0 o d V3
KCL at node j : . . . + IE . . . . 0. 0 0 0 0 0 o IE
(3.1)
KCL at node k : . . . - IE . . . . O. 0 0 0 0 -L 0 k
0 0 0 0 0 0 . IVVT
The current IE is included in the formulation. This increases
-07 Vl(0)
the number of unknown variables by one. Hence, another
equation is needed so that the number of unknowns and the o l v2(0)
number of equations are the same and can be solved. The 01 v3(0)
additional equation for the voltage source is the following: E, v ( 0 ) =
I I 18(0)
O] IL(O)
Vj - Vk = E. (3.2)
.0 J . IwT(O)
The circuit stamp for this element includes both equations 3.1
and 3.2 and becomes: The first three rows represent KCL equations at the three
nodes. The last three rows represent the characteristic equa-
Col. Col. Col. tions from the independent voltage source, inductor in imped-
RHS ance form, and VVT, respectively. The equations for linear
v~ vk IE
time-invariant circuits are in the form:

Row k: - d
Row 16: 1 -1 E Gv(t) + C - ; : v ( t ) = du(t) and v(0) = Vo, (3.3)
at

Row 1E denotes the additional equation 3.2 added to nodal
analysis, and Col. 1E is the additional column in matrix due to
the current through the voltage source. The vector RHS denotes
the right-hand side and contains known values of sources. This
method is called modified nodal analysis (MNA) because of
the modifications made to nodal analysis to allow different
where all conductances and constants arising in the formula-
tion are stored in the matrix G and all capacitor and inductor
values are stored in the matrix (7. In addition, the connection
of the input source to the circuit is in d, the vector of nodal
voltages and some branch currents needed for MNA is v ( t ) ,
and the initial condition vector is v0.
3 Computer-Aided Design 45

TABLE 3.1 Circuit Stamps for MNA

Element Symbol Matrix entries

Current source Vk RHS

Row k: I I-;]
Voltage source Vk IL RHS

/E
)
Row j:
Row k:
Row IE: l _, -I 1 [l
Admittance vi v~
I = Y(V) - Uk)

Row k:
)
/

Impedance v, ½ /z
v; - vk = Ztz

Iz
)
R o w j:
Row k:
Row Iz:
[ :lj,
1 -1

Voltage-controlled current source (VCT)

J = g(V) - Vk) ©
.+ © Row j:
Row k:
Row h
[~v;. ½

g
v~ V,,,

Row m: g

Voltage-controlled voltage source (VVT) v, vk

0'1%
VI V,, IL
v~ - v~ = ~(~ - v~) ® O)
Row j: y
Row k:
Row h
Row m:
Row IE: Ix li 1 _, '11
Current-controlled current source (CCT) v,. ½ Vl Vm ljk
l = J3/jk

-il
Row j:
Row k:
Row h
Row m:
Row Iik: 1 -1

Current-controlled voltage source (CVT) v~ v~ Vt V,, Iik IE

V i - V m = rljk
ROW j: 1
ROW k: 1
Row h 1
Row m: 1
Row I)k : 1
Row IE: 1 1 r
46 Ajoy Opal

c ® The magnitude is also plotted in decibels [dB] and computed

as:
I(
%(0) [V(jm)[dB = 20 log [V(jto)[.
+
IE L IL (o) IVVT ~_ ['1"1/2 Using the values L = 1 H, G = 1 S, C = 1 F, ~ = 0.5, the
magnitude of V2 is plotted in Figure 3.4.

3.3 Formulation of MNA Equations

l of Nonlinear Circuits
FIGURE 3.3 Linear Circuit Example
For sinusoidal steady state response of a linear time invari-
ant circuit, the input is:
u( t ) = e jot
Here, the initial conditions v0 are ignored, and phasor analysis
is used for computing the results. In this case, equation 3.3
becomes:
( G + floC) V( j~o) = d,
where V ( j o ) is the phasor representation of v(t). The matrix
equation 3.4 is a set of simultaneous linear equations and are
solved numerically for V(jo~). The solution, in general, is a com-
plex quantity with magnitude [V(flo) I and phase angle/V(jo):
V(jco) = I v(jo)lzv(yo~).
Formulation of MNA equations of nonlinear circuits follows
the same steps as equation formulation for linear circuits.
Consider the circuit in Figure 3.5 with a nonlinear resistor
defined by IR = g(VR) = 0.001 (VR) 3 and a nonlinear capacitor
defined by Qc = q ( V c ) = 0.001(Vc) 3. The current through
the capacitor is given by Ic = ( d / d t ) Q o Both the nonlinear
elements are called voltage-controlled elements because the
current through the resistor and charge on the capacitor are
nonlinear functions of the voltage across the individual elem-
ents. Let the input be a DC source E(t) = 1 V.
The MNA equations for the circuit in Figure 3.5 are the
(3.4) following:
½-½
~I~=O=A.
lO00
V2 - V1 ~- (V2)3 d (3.5)
i066 ~ q- Z Qc(V2) = 0 = ~ .
V~-E=O=3S.

10

-10

-20

-30

-40

-50 , i , , , i , , , i

0.001 0.01 0.1 1 10 100

Frequency [Hz]

FIGURE 3.4 Frequency Response of a Linear Circuit

3 Computer-Aided Design 47

1 kD @ For example, the equations for the circuit in Figure 3.5 are the
following:

"Xl(gl, V2, IE) ]

x(v) = x2(V~, V2, 18) I
+ + +
x3(Vl, V2, IE)J
IE ½ Vc Ic
(3.7)

% l+o.ooliv2/ r : =0.

v~-~ j
The nonlinear equation 3.7 is solved numerically using an
iterative method called the Newton-Raphson (NR) method.
FIGURE 3.5 Nonlinear Circuit Let v ° denote the initial guess and Vi the result of the /th
iteration for the solution of equation 3.7. The calculation of
the next iteration value v i+1 is attempted such that X(V i+l ) ,~ O.
The first two equations are the KCL equations at nodes 1 and 2 Expanding x(v i+]) in a Taylor series around the point v i gives
respectively, and the last equation is the characteristic equation Equation 3.8.
for the voltage source. In general, all the equations are nonlinear Equation 3.8 shows that only the first two terms in the series
and are collectively written in the form have been used and other higher order terms have been
ignored. Equation 3.8 can be rewritten in the form:
)~(/,, v, t)
f(il, v, t) = )~(/,, v, t) = O, (3.6) l i A r i = --x(vi), (3.9)

iS(/', v, t) where

where the unknown vector and initial conditions are the "Oxl Oxl OXl 1 -1
following: OV~ or2 1000 1000
ji = Ox2 Ox2 Ox2
--1 1 + 3(V~) 2
O½ O½0~ 0
V= V2 and v(O) = Vo. 1000 1000
Om O~ Om
ovl OrE 018 1 0 0

3.4 A Direct Current Solution AF i = v?'-v~ I,

of Nonlinear Circuits i~+1 - I ~i1

For a direct current (dc) solution of nonlinear circuits, the
derivatives of the network variables and time are set to zero,
and equation 3.6 reduces to:
f(o, v, o) = x(v) = o.
and ]i is called the ]acobian of the system, and Av i is the
change in the solution at the ith iteration. From the solution
of equation 3.9, Av i is obtained and v i+1 = v i + Av i is com-
puted. Note that equation 3.9 is a linear system of equations,
and the Jacobian can be created using circuit stamps, as done

" OXl (vi+l -- vii) -J- OX1 ' OX1 (1i;1

x1(¢) + b-~7,, ~ 892(v?1- vj)+~ - ~)i
x (v i+~) Ox~ ,v~+l vb + Ox~ (vj+ ~ _ vj) + Ox2 u{+l o (3.8)
X2(Vi)-}-~ll ( -- ~22 ~EE E --/E)

OX3 "V~+I Vil)~- oX3 "V~+I V~) J- OX3 (i~+I i

x~(¢) + 8>7~ - b-~7 ~ - hi7 -~)
48 Ajoy Opal

previously for linear circuits. The MNA circuit stamp for a Under fairly general conditions, it can be shown that if the
nonlinear voltage-controlled resistor IR = g(VR), shown in initial guess is close to the solution, then the Newton-Raphson
Figure 3.1, is as follows: method converges quadratically to the solution. For the circuit
in Figure 3.6, if the initial guess v ° = [0 0 0] T is used, then
Col. Col. the iterations for nodal voltage V2 are given in Table 3.2.
Vk RHS Note that the last column in the table shows that the right-

I
hand side of equation 3.9 approaches zero with each iteration,
Og
Row j: 0Vj indicating that the final value is being reached and the iter-
ations can be stopped when the value is sufficiently close to
Row k: Og zero. Also note that with each iteration, the change in the
solution is becoming smaller, indicating that one is getting
closer to the exact solution. Since the circuit is nonlinear, the
The VR = Vj - Vk and the linear resistor are special cases of Iacobian must be computed for each iteration and is usually
the nonlinear resistor. The difference from MNA formulation the most expensive portion of the entire solution method. If a
of linear circuits is that, for nonlinear circuits, there exists an better initial guess is made, such as v ° = [ 1.0 0.7 - 0 . 0 0 3 ] T,
entry in RHS for all elements. For a current-controlled non- then the NR method will converge to the final value in fewer
linear resistor in the form VR = r(Ig), the impedance form of iterations.
MNA formulation is used, and the current through the resistor The algorithm just described is the basic Newton-Raphson
IR is added to the vector of the unknowns. The additional method that works well in most, but not all, cases. Modifica-
equation is Vj - Vk -- r(IR) = O. tions to this method as well as to other methods for solving
The Newton-Raphson method is summarized in the nonlinear equations can be found in references listed at the end
following steps: of this chapter.
1. Set the iteration count i = 0, and estimate the initial
guess of v °.
2. Calculate the Jacobian ]i and right-hand side of equa- TABLE 3.2 Newton-Raphson Iterations
tion 3.9, which is - x ( v i ) .
3. Solve equation 3.9 for A v i. Iteration
i v~+1 AVj iix(¢+l)lh
4. Update the solution vector v i+1 = v i + A v i.
5. Calculate the error in the solution as the norm of 0 1.0000 l.O000 0.0316
the vector ][x(vi+l)[[. A c o m m o n method is to use 1 0.7500 -0.2500 0.0131
2 0.6860 -0.0640 0.0030
the n o r m defined as L2 = [[x(vi+l)][2 = ~ j ( x j ) e.
3 0.6823 -0.0037 0.0002
If the error is small then stop, or instead set i = i + 1 4 0.6823 -0.0000 0.0000
and go to step 2.

0.7

0.6

0.5
/
0.4

0.3

0.2

0.1

0
0 1 2 3 4
Time Is]

F I G U R E 3.6 Time Response of a Nonlinear Circuit

3 Computer-Aided Design 49

3.5 Transient Analysis which is a nonlinear equation in the variable v(t + h) and
is solved using the Newton-Raphson method. The last
of Nonlinear Circuits step is called the discretization of the differential equation,
and this step changes it into an algebraic equation. For
Another very useful analysis is the time response of nonlinear
example, substituting equation 3.11 in equation 3.5 results
circuits. This requires the solution of the differential equation
in:
3.6, and once again numerical methods are used. Usually the
solution of the network at time t = 0 is known, and the
Vl(t + h) - g2(t + h)
response is calculated after a time step of h at t + h. All + IE(t + h)
1000
numerical solution methods replace the time derivative in V2(t + h) - V l ( t + h) (V2(t q h)) 3 Qc(V2(t + h)) Qc(V2(t)) =0,
equation 3.6 with a suitable approximation, and then the 1000
-~
1000
4
h
resulting equations are solved. Expanding the solution in a V~(t + h) E(t + h)

:]
Taylor series, the following is obtained:
where the Jacobian will be:
v(t ÷ h) = v(t) + h ddt v(t) + . . higher order terms.
1 --1
Assuming that the time step h is small and ignoring the higher 1000 1000
order terms as being small, the method called the Euler forward ]i z -1 1 + 3(Vj) 2 3(Vd) 2
method is used. The method approximates the derivative with: 1000 1000 I- 1000~
1 0
d v ( t + h ) - v(t) (3.10)
~(t)=~v(t)~ h
The explicit dependence on time has been dropped for sim-
plicity. The Jacobian can be created using circuit stamps for the
Substituting equation 3.10 in equation 3.6 yields:
nonlinear elements as done in the case of dc solution of non-
linear circuits. For a nonlinear voltage-controlled capacitor,
f{v(t+h) - v(t) such as:
v(t), t ) = 0 = x(v(t ÷ h)),
k h

which is a nonlinear equation with the unknown value

v(t + h). It can be written in the form x(v(t + h)) = 0 and
solved using the Newton-Raphson method given previously.
--t(
+ Vc -
Experience has shown that this method works well with small
step sizes; however, large step sizes give results that diverge
from the true solution of the network. Such methods are called
unstable and are generally not used in integration of differen- defined by the equation Qc = q ( V c ) = 0 . 0 0 1 ( g c ) 3 where
tial equations. A better solution method is to use the Euler Vc = Vj - Vk, the circuit stamp is obtained by writing KCL
backward method for which the derivative is approximated by equations at nodes j and k:
a Taylor series expansion around the time point v(t + h):
d
KCL at node j : . . . + ~ Q c ( t + h) . . . . 0.
d
v(t) = v(t + h) + ( - h ) ~ t v ( t + h) + . . . d
KCL at node k : . . . - - - Q c ( t + h) . . . . O.
higher order terms. dt

Using the Euler backward method, the differentials are discre-

This equation can be rewritten in the form: tized by:
d v ( t + h ) - v(t)
i~(t + h) = ~ v ( t + h) (3.11) Qc(t + h) - Qc(t)
at KCL at node j : . . . + ,,, z0,
h
Substituting equation 3.11 in equation 3.6 results in:
Qc(t + h) - Qc(t)
KCL at node k:... - ,.. z0,
h

f(v(t+h)h v(t), v ( t + h ) , t + h ) = O = x ( v ( t + h ) ) , (3.12) The Iacobian and RHS entries become:

50 Ajoy Opal

Col. Col. Figure 3.6. The final value V2 = 0.6823 V is reached at about
vj vk RHS t = 8 s. Note that the final value is the same as that obtained in
the dc solution above.
10Qc 10Qc] -Oc(V~(t + h)) - Qc( Vc( t ))
ROW j" Choosing a large step size h = 10 s and calculating the time
h OVj I h
response will give the results V2(10)= 0.6697V, V2(20)=
1 0Qc 10Qc [
Row k: Qc(V~(t + h)) - Qc(Vc(t)) 0.6816V, V2(30)=0.6823V . . . . . Note that even though
h OVj ~ j h
the result at t = 10s is not accurate, the error does not
(3.13)
grow with each time step and the correct value is reached
after a few more steps. Such time domain integration
Note that in deriving equation 3.13, the use of the chain rule of
methods are called stable and are preferred over the Euler
differentiation and then discretizing (d/dr) Vc has been avoided:
Forward method that may not give correct results for large
time steps.
d Qc d d Finally, this section discusses some issues concerning the
use of numerical methods for the solution of differential equa-
tions and gives some recommendations for obtaining correct
The value o f ( d / & ) V c has also been discretized. Discretization
results:
applied directly to the charge of the capacitor (and flux in case
of inductors) leads to better results that maintain charge (and 1. The discretization equation 3.11 is an approximation,
flux) conservation in the numerical solution of electrical cir- since only the first two terms in the Taylor series expan-
cuits. Additional details can be found in work by Kundert sion are induded. As a result of this approximation, the
(1995). numerically computed results contain an error at each
For the circuit in Figure 3.5, let the capacitor be initially time step, called the local truncation error (LTE). In
discharged such that V2(O)= 0 and the correct initial con- general, the smaller the time step used, the smaller will
dition vector is v(0) = [ 1.0 0.0 - 0.001 ]r. For this circuit, it is be the LTE. The normal expectation is that if the error
expected that the capacitor will charge up from 0 V to a finite is reduced at each time step, then the overall error in
value with time. All nodal voltages in the circuit will remain the numerical results will also be small.
less than the source voltage of 1 V. If step h = 0.1 s is taken, 2. This discussion concerning the LTE suggests that if
and the initial guess is v°(h)= v(0), the Newton-Raphson a discretization formula is used that matches more
iteration results will be obtained as shown in Table 3.3. than two terms in the Taylor series expansion, then
Once the solution at t = 0.1 s is obtained, the values from more accurate results will be obtained. This is also
the circuit conditions at that time are used, another time step correct, provided the same step size is used for both
is taken, and the response at t = 2h = 0.2 s is calculated. This discretization methods, or alternatively the second
procedure is repeated until the end time of interest is reached method will allow larger step sizes for a given error.
for computing the response. Although the circuit has a con- 3. This discussion also suggests that it is not necessary to
tinuous response, the numerical methods are used to compute use the same time step when determining the time
the response at discrete instants of time. It is expected that if domain solution of a circuit over a long period of
small time steps are taken, then no interesting features of the time. It is possible to change the time step during the
response will be missed. Note that at each time step, the computation based on error and accuracy requirements.
Newton-Raphson method is used to solve a set of nonlinear 4. The Newton-Raphson method is used at each time
equations. Moreover, since the circuit is nonlinear, the Jaco- step to solve a set of nonlinear equations. For this
bian has to be recomputed at each iteration and each time step. method, a good initial guess gives the solution in
The complete time domain response of the circuit is given in fewer iterations. Such formulae, called predictor for-
mulae, are available and reduce the overall computa-
tion needed for the solution.
TABLE 3.3 Newton-Raphson Iterations for t = 0 and h = 0.1 s 5. The issue of stability of the response with large step
sizes has already been mentioned. A stable integration
Iteration
i Vj+1 AV~ method is preferred. Stable methods ensure that the
error at each time step does not accumulate over time
0 1.0000 1.0000 and reasonably accurate results are obtained.
1 0.6765 -0.3235
2 0.4851 -0.1914 Additional reasons for these recommendations, as well as other
3 0.4006 -0.0845 integration methods for time domain solution of nonlinear
4 0.3835 -0.0171
circuits, can be found in the references at the end of this
5 0.3828 -0.0007
chapter.
3 Computer-Aided Design 51

References Vlach, J. and Singhal, K. (1994). Computer methods for circuit analysis
Kundert, K. (1995). The designer's guide to Spice and Spectre. Boston: and design. New York: Van Nostrand Reinhold.
Kluwer Academic Publishers.
Ruehli, A. (Ed.). (1986). Circuit analysis, simulation, and design vol. 3:
Advances in CAD for VLSI parts 1 and 2. Amsterdam: North-
Holland.