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6, NOVEMBER 2003
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I. INTRODUCTION
Fig. 1.
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Fig. 2. Converter forming the interface between the dc bus and its three-phase
ac network, source or load.
Fig. 3. -link model for the dc cable. Note that the cable capacitance is
included in the converter dc side capacitors, C and C .
Fig. 4. Control structure for dc bus voltage control. The source converter
current is denoted I and the cable current I
.
(2)
(3)
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(13)
Consequently, the converter dc bus capacitor is selected from
(14)
(5)
The stationary droop impedance or resistance is thus
and the actual and desired characteristic polynomials of
the closed loop transfer function are given by
(6)
which is fulfilled for
(7)
It is clearly seen that a high damping of the closed loop transfer
function poles requires a large dc distribution system capacitance. Here, the poles are chosen to give a performance corresponding to the one of a Butterworth filter, which means that
. This choice requires a
the damping is selected as
rather moderate dc distribution bus capacitance without making
the system oscillatory. The last point is important since the dc
distribution bus is not purely capacitive, which implies that it
is not advisory to make the simplified system oscillatory and
then introduce nonidealities into the system. For the selected
damping, the gain is
(8)
Assume that each converter corresponds to a virtual resistance,
with a base value equal to
(9)
In the case of droop control, the dc current at rated load for
rectifier operation increases due to the decreased output voltage
caused by the droop characteristic
(10)
is the relative converter output voltage drop at rated
where
power. The droop resistance is inversely proportional to the gain,
which yields
(11)
(12)
A. Stationary Characteristics
This is rewritten to
Now it is assumed that only half of the required dc bus capacitance is located at the source converter. The other half is lo-
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Fig. 5.
where
is the pu value of the line-to-line receiving end
voltage. Together with (17), this gives the maximum cable
resistance
(16)
The stable solution to this equation is written
(17)
Since the resistors form a voltage-dividing network, the sender
side pu voltage drop is
(23)
The pu line reactance used in [5] is approximately equal to
for the pu base given in Appendix A, which meets
the requirements of the standard IEC 1000-3-2, if
,
and
at a switching
gives
frequency of 4.95 kHz. Assuming
(18)
The risk of entering converter over-modulation due to a too low
dc link voltage is the main reason for investigating the dc bus
voltages at different points in the network. The minimum dc
link voltage is determined from the required load voltage at the
converter output terminals, including the voltage drop across the
ac side filter. The line-to-neutral RMS voltage at the converter
output feeding a three-phase ac load is expressed as
(19)
The maximum RMS line-to-neutral voltage allowable for
avoiding over-modulation at stationary operation is
(20)
for symmetrical voltage references, i.e. when space vector pulse
width modulation (SVPWM) is used. If it is assumed that the
reactive power equals zero, the limiting case for the inverter,
i.e., receiver side, of the dc network is written
(21)
which gives
(22)
(24)
Furthermore, this corresponds to a source voltage given by
(25)
This means that the power supplied from the source equals
(26)
Cable losses approximately equal to 0.2 pu seems very high.
Fig. 6 illustrates the pu droop characteristic, expressed in pu
power scale, for a three-phase converter based on Semikron
SKM300GB123D modules, including over-modulation and loss
limits.
From Fig. 6 the increased power handling capability for rectifier operation at a semiconductor loss level equal to the rated appears to be close to 17%. This is not enough to cover cable losses
of 0.2 pu but on the other hand, a dc network design without margins to avoid over-modulation is not likely. The characteristic
,
,
shown in Fig. 6 is based on
, 50 Hz,
, and operation at unity
power factor for the ac network. The converter losses are calculated according to [8].
B. Stability
An impedance specification for individual loads of dc distribution systems, based on the small signal stability criterion,
is presented in [9]. Here, stability is studied for varying cable
parameters by investigation of the root locus. Therefore, the cables are from now on modeled as resistive and inductive, with
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where
(31)
denotes pu time constant. The impedance is written
Fig. 7. DC bus voltage (top) and ac side output power (bottom) for the sending
(black) and receiving (grey) end converters at an output power step from zero
to rated power.
(40)
The pu time constant of the considered case is given by
(33)
Assuming complex poles, the characteristic polynomial is
(41)
(34)
The cable resistance and inductance are thus
for a 750 V, 100 kW system. The simulation result for this case
is shown in Fig. 7. The cable data investigated are
and
, i.e.
. All timesimulations are made in DYMOLA with switch-mode converter
models utilizing vector current controllers according to [5] and
voltage droop controllers according to (3). The voltage droop
controller gain (8) for each source converter is calculated based
, since a load converter of the same rated power
on
. The ac side current reference for each one
will have
of the source converters is calculated from the droop current
reference based on the assumption that the converter is loss-less.
The measured dc bus voltage is low-pass filtered according to
Fig. 4.
In Fig. 7 it is seen that the stationary voltage is somewhat
lower than expected (a few Volts). This is due to the fact that
rated power is transmitted to the three-phase grid, i.e. the losses
in the line side filter have to be added to the power supplied to
the dc side of the converter. This also implies that the equivalent
, is lower than expected from the previous
load resistance,
calculations.
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(a)
Fig. 8.
Pole-zero map for the case investigated earlier, i.e., with cable data
r
= 0:06 pu and l
= 0:0024 pu which gives
= 0:04 pu.
The small markings denote no load (p = 0) and the large markings denote
receiver output power equal to rated sender power (p = 1:0).
(b)
Fig. 9. Root locus for poles (a) and (b) at p = 1:0. The traces are from
top to bottom: r
= 0:01, 0.06 and 0.12 pu. The dotted lines show constant
= 0:02, 0.04, 0.05, 0.1, 0.2 and 0.4 pu from left to right. Note that the
pole is real valued for low l
when r
= 0:12.
Fig. 10. DC bus voltage (top) and ac side output power (bottom) for the
sending (black) and receiving (grey) end converters at an output power step
= 0:01 pu, l
= 0:0002 pu and
from zero to rated power when r
thus
= 0:02.
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Fig. 11. DC bus voltage (top) and ac side output power (bottom) for the
sending (black) and receiving (grey) end converters at an output power step
= 0:01 pu, l
= 0:004 pu and,
from zero to rated power when r
thus,
= 0 :4 .
TABLE I
SIMULATION MODEL DATA
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Fig. 12. DC bus voltage (top) and ac side output power (bottom) for an
output power increase equal to 0.5 pu of rated load converter power at 100 ms
for converter 2 and 200 ms for converter 4 starting from 0 pu in both cases.
Quantities belonging to converter subsystem 1 are solid black, 2 are solid grey,
3 are dashed black, 4 are dashed grey, and 5 are dash-dotted black.
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(A1)
(A2)
(A3)
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(A4)
(A5)
(A6)
(A7)
[6] G. S. Thandi, R. Zhang, K. Xing, F. C. Lee, and D. Boroyevich, Modeling, control and stability analysis of a PEBB based dc DPS, IEEE
Trans. Power Delivery, vol. 14, pp. 497505, Apr. 1999.
[7] F. Blaabjerg, U. Jaeger, S. Munk-Nielsen, and J. K. Pedersen, Power
losses in PWM-VSI inverter using NPT or PT IGBT devices, in Proc.
IEEE-PESC Conf. (PESC94), vol. 1, Taipei, Taiwan, June 2024, 1994,
pp. 434441.
[8] Semikron Application ManualPower Modules, Apr. 2000.
[9] X. Feng, Z. Ye, K. Xing, F. C. Lee, and D. Borojevic, Individual load
impedance specification for a stable dc distributed power system, in
Proc. IEEE-APEC Conf. (APEC99), vol. 2, Dallas, TX, Mar. 1418,
1999, pp. 923929.
ACKNOWLEDGMENT
The authors wish to thank Dr. S. Lindahl, Department of Industrial Electrical Engineering and Automation, Lund University, Sweden, for his contributions, kind support, and sharing of
ideas and thoughts on the problems addressed in this work.
REFERENCES
[1] S. Luo, Z. Ye, R.-L. Lin, and F. C. Lee, A classification and evaluation
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[5] M. Bojrup, Advanced control of active filters in a battery charger application, Licentiates thesis, Dept. Ind. Elect. Eng. Automat., Lund Inst.
Technol., Lund, Sweden, Nov. 1999.
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