Project Format and Weightage

Analog Subsystem Design, EEE C443

February 6, 2012
Abstract
This document will describe how to approach the assignment. It has the
report format chronologically arranged. It will give you an idea of how a
professional analog (or mixed-signal) design is carried out.
1 Introduction
What follows this section is a break-up of the pages to be included in the report.
You will be asked to submit various pages on dierent dates. This will ensure
that you do not fall behind. You are requested not to share your work with
each other.
By now you would have made your groups and submitted the choice of
your assignment. Please read all the documents pertaining to this assignment
thoroughly before embarking upon your design.
For the next few classes, the lectures will focus on various dierent opera-
tional amplier topologies. Pay heed to the material in the same as you will
eventually have to design your opamp based on one of those.
You are encouraged to use a self-modied architecture (note that you cannot
lift it o from any published source!). If you do come up with a novel idea, there
will be 15 mark bonus for you for the same.
2 Report Format
Please adhere strictly to the format that is given to you. You will be penalised
by marks in case of deviation.
Remember that your eventual marks will depend crucially upon the clarity
of thought that you present in the report.
As in case of the last assignment, your report may either be typed or legibly
hand written on A4 sheets.
2.1 Pagewise Breakup
What follows is a pagewise breakup of your report.
2.1.1 Page 0
This will be the cover page and should include the choice of assignment, your
name(s) and id number(s) and your tutorial instructors name.
1
2.1.2 Page 1
Given circuit diagram and the design specs only. Remember that these
design specs are to be decided by you in accordance with the typical values and
will be evaluated competitively.
2.1.3 Page 2
Mathematical expressions for all the design specs - the schematic components
that they depend upon etc. If possible, then relations between the input and
output variables for your chosen subsystem are to be derived in terms of the
components shown on the schematic.
2.1.4 Page 3
Here you will need to derive and explain the relationship between each system
level design spec that you have been given and the opamp specs. For each
system design spec, list the related opamp spec(s) and quantify mathematically
what the amplier specs have to be such that the design specs are met.
You may use upto 3 pages maximum for this. Please label them 3.1, 3.2, 3.3
in that case.
2.1.5 Page 4
Transistor level schematic of the operational amplier. You are encouraged
to use the g
m
/I
d
method for this. Note that using trial-and-error as a method
for design will fetch you not more than 25% of the credit allotted to this design
phase.
Each transistor should have mentioned beside it on the schematic the g
m
/I
d
value and the (W/L) ratio. There should be no lookup tables for this and
for every transistor this information should be found clearly marked on the
schematic.
2.1.6 Page 5
Bode plot of the amplier transfer function - both magnitude and phase. Please
label the low frequency gain and phase margin.
This page should end with a table of the measured (simulated) values of
the relevant opamp specs.
2.1.7 Page 6
Graphical simulation results and tabulation of all the design specs. Name pages
as 6.1, 6.2 etc. if necessary.
2.1.8 Page 7
Any other simulation results that you feel are pertinent to your design. Please
include a blank Page 7 if there is nothing to report.
2
2.1.9 Page 8
PVT results.
2.1.10 Page 9
Conclusion of assignment. Mention the meeting of specs or the failure to do so.
Failure to meet any specs should be justied.
Also mention in this section, the problems that you might have encountered
during the course of this assignment.
3