Alarm System of Railway Gate Crossing Based On Gps and GSM

ALARM SYSTEM OF RAILWAY GATE CROSSING
BASED ON GPS AND GSM/GPRS

AIM
The aim of this project is to give the safety management system at railway crossing
The railroad industrys own desire to maintain their ability to provide safe and secure
transport of their customers hazardous materials, has introduced new challenges in rail security.
BLOCK DIAGRAM
DESCRIPTION:
IR
S!S"RS
#I$R"
$"!TR"
%%R
#"T"R
&RI'R
(")R
S*((%+
IR
S!S"RS
,-T
#"T"R
,-T
,S# ,(S
The present project is designed to satisfy the security needs of the railways. This system
provides the security in four ways. automatic gate opening/closing system at trac0 crossing,
signaling for the train driver, trac0ing the signals, and the trac0 protection. The automatic gate
opening/closing system is provided with the IR sensors placed at a distance of few 0ilometers on
the both sides from the crossing road. These sensors give the train reaching and leaving status to
the embedded controller at the gate to which they are connected. The controller operates
1open/close2 the gate as per the received signal from the IR sensors. If there is any danger the
system will alert immediately with an alarm and intimated the place of danger using the ,S#
and ,(S facility. It can also be used for continues monitoring of the crossings.
The present project is designed around a microcontroller as a control unit. The
microcontroller senses the incoming of train through IR sensors and controls the railway gate.
-nd it continuously monitors the outgoing of train and opens the railway gate automatically with
out the intervention of human personnel.
Hardware Compoe!":
#icro $ontroller
IR Sensor
,ate control system
,(S
,S#
#otor 3 driver
%cd
4uzzer
So#!ware Too$":
5eil u6'ision
mbedded 7$
8press ($4
App$%&a!%o":
Railway Sector
RES'LT:
The present project is designed to satisfy the security needs of the railways
The railroad industrys own desire to maintain their ability to provide safe and
secure transport of their customers hazardous materials, has introduced new
challenges in rail security. -ddressing these challenges is important, as railroads,
and the efficient delivery of their cargo, play a vital role in the economy of the
country.
The present project is designed to satisfy the security needs of the railways.
This system provides the security in four ways. automatic gate opening/closing
system at trac0 crossing, signaling for the train driver, trac0ing the signals, and the
trac0 protection. The automatic gate opening/closing system is provided with the
IR sensors placed at a distance of few 0ilometers on the both sides from the
crossing road. These sensors give the train reaching and leaving status to the
embedded controller at the gate to which they are connected. The controller
operates 1open/close2 the gate as per the received signal from the IR sensors.
The present project is designed around a microcontroller as a control
unit. The microcontroller senses the incoming of train through IR sensors and
controls the railway gate. -nd it continuously monitors the outgoing of train and
opens the railway gate automatically with out the intervention of human personnel.
.
INTROD'CTION
EMBEDDED SYSTEM:
-n em(edded ")"!em is a special6purpose system in which the computer is completely
encapsulated by or dedicated to the device or system it controls. *nli0e a general6purpose computer, such
as a personal computer, an embedded system performs one or a few predefined tas0s, usually with very
specific re9uirements. Since the system is dedicated to specific tas0s, design engineers can optimize it,
reducing the size and cost of the product. mbedded systems are often mass6produced, benefiting from
economies of scale.
(ersonal digital assistants 1(&-s2 or handheld computers are generally considered embedded
devices because of the nature of their hardware design, even though they are more e8pandable in software
terms. This line of definition continues to blur as devices e8pand. )ith the introduction of the ":"
#odel ; with the )indows <( operating system and ports such as a *S4 port = both features usually
belong to >general purpose computers>, = the line of nomenclature blurs even more.
(hysically, embedded systems ranges from portable devices such as digital watches and #(?
players, to large stationary installations li0e traffic lights, factory controllers, or the systems controlling
nuclear power plants.
In terms of comple8ity embedded systems can range from very simple with a single
microcontroller chip, to very comple8 with multiple units, peripherals and networ0s mounted inside a
large chassis or enclosure.
E*amp$e" o#
Em(edded
S)"!em":
-vionics, such as inertial guidance systems, flight control hardware/software and other
integrated systems in aircraft and missiles
$ellular telephones and telephone switches
ngine controllers and antiloc0 bra0e controllers for automobiles
@ome automation products, such as thermostats, air conditioners, sprin0lers, and security
monitoring systems
@andheld calculators
@andheld computers
@ousehold appliances, including microwave ovens, washing machines, television sets,
&'& players and recorders
#edical e9uipment
(ersonal digital assistant
'ideogame consoles
$omputer peripherals such as routers and printers.
Industrial controllers for remote machine operation.
EMBEDDED SYSTEM DEFINITION
Intelligent, programmable, and computing electronic device designed to perform specific
tas0s based on a fi8ed time frame.
-n mbedded System is a combination of hardware and software, perhaps with some
mechanical and other components, designed to perform a specific
In general, >embedded system> is not an e8actly defined term, as many systems have some
element of programmability. Aor e8ample, @andheld computers share some elements with
embedded systems = such as the operating systems and microprocessors which power them =
but are not truly embedded systems, because they allow different applications to be loaded and
peripherals to be connected.
HISTORY
In the earliest years of computers in the BC?D6EDs, computers were sometimes dedicated
to a single tas0, but were far too large and e8pensive for most 0inds of tas0s performed by
embedded computers of today. "ver time however, the concept of programmable controllers
evolved from traditional electromechanical se9uencers, via solid d state devices, to the use of
computer technology.
"ne of the first recognizably modern embedded systems was the -pollo ,uidance
$omputer, developed by $harles Star0 &raper at the #IT Instrumentation %aboratory. -t the
projectFs inception, the -pollo guidance computer was considered the ris0iest item in the -pollo
project as it employed the then newly developed monolithic integrated circuits to reduce the size
and weight. -n early mass6produced embedded system was the -utonetics &6BG guidance
computer for the #inuteman missile, released in BCHB. It was built from transistor logic and had
a hard dis0 for main memory. )hen the #inuteman II went into production in BCHH, the &6BG
was replaced with a new computer that was the first high6volume use of integrated circuits. This
program alone reduced prices on 9uad nand gate I$s from IBDDD/each to I?/each, permitting
their use in commercial products.
Since these early applications in the BCHDs, embedded systems have come down in price
and there has been a dramatic rise in processing power and functionality. The first
microprocessor for e8ample, the Intel EDDE was designed for calculators and other small systems
but still re9uired many e8ternal memory and support chips. In BCGJ !ational ngineering
#anufacturers -ssociation released a >standard> for programmable microcontrollers, including
almost any computer6based controllers, such as single board computers, numerical, and event6
based controllers.
-s the cost of microprocessors and microcontrollers fell it became feasible to replace
e8pensive 0nob6based analog components such as potentiometers and variable capacitors with
up/down buttons or 0nobs read out by a microprocessor even in some consumer products. 4y the
mid6BCJDs, most of the common previously e8ternal system components had been integrated into
the same chip as the processor and this modern form of the microcontroller allowed an even
more widespread use, which by the end of the decade were the norm rather than the e8ception for
almost all electronics devices.
CHARACTERISTIC FEAT'RES
mbedded systems are designed to do some specific tas0, rather than be a general6
purpose computer for multiple tas0s. Some also have real6time performance constraints
that must be met, for reason such as safety and usabilityK others may have low or no
performance re9uirements, allowing the system hardware to be simplified to reduce costs.
mbedded systems are not always separate devices. #ost often they are physically built6
in to the devices they control.
The software written for embedded systems is often called firmware, and is stored in
read6only memory or Alash memory chips rather than a dis0 drive. It often runs with
limited computer hardware resources. small or no 0eyboard, screen, and little memory.
'"er %!er#a&e"
mbedded systems range from no user interface at all = dedicated only to one tas0 = to full
user interfaces similar to des0top operating systems in devices such as (&-s.
S%mp$e ")"!em"
Simple embedded devices use buttons, %eds, and small character6 or digit6only displays, often
with a simple menu system.
I more &omp$e* ")"!em"
- full graphical screen, with touch sensing or screen6edge buttons provides fle8ibility while
minimizing space used. the meaning of the buttons can change with the screen, and selection
involves the natural behavior of pointing at whatFs desired.The rise of the )orld )ide )eb has
given embedded designers another 9uite different option. providing a web page interface over a
networ0 connection. This avoids the cost of a sophisticated display, yet provides comple8 input
and display capabilities when needed, on another computer. This is successful for remote,
permanently installed e9uipment such as (an6Tilt6Loom cameras and networ0 routers.
CP' p$a!#orm"
mbedded processors can be bro0en into two broad categories. ordinary microprocessors 1M(2
and microcontrollers 1M$2, which have many more peripherals on chip, reducing cost and size.
$ontrasting to the personal computer and server mar0ets, a fairly large number of basic $(*
architectures are usedK there are 'on !eumann as well as various degrees of @arvard
architectures, RIS$ as well as non6RIS$ and '%I)K word lengths vary from E6bit to HE6bits and
beyond 1mainly in &S( processors2 although the most typical remain J/BH6bit. #ost architecture
comes in a large number of different variants and shapes, many of which are also manufactured
by several different companies.
Per%p+era$"
mbedded Systems tal0 with the outside world via peripherals, such as.
Serial $ommunication Interfaces 1S$I2. RS6;?;, RS6E;;, RS6EJN etc
Synchronous Serial $ommunication Interface. I;$, OT-,, S(I, SS$ and SSI
*niversal Serial 4us 1*S42
!etwor0s. thernet, $ontroller -rea !etwor0, %on )or0s, etc
Timers. (%%1s2, $apture/$ompare and Time (rocessing *nits
&iscrete I". a0a ,eneral (urpose Input/output 1,(I"2
-nalog to &igital/&igital to -nalog 1-&$/&-$2

,-, BLOCK DIAGRAM OF EMBEDDED SYSTEM
Aigure shows one possible organization for an embedded system
In addition to the $(* and memory hierarchy, there are a variety of interfaces that enable the
system to measure, manipulate, and otherwise interact with the e8ternal environment. Some
differences with des0top computing may be.
The human interface may be as simple as a flashing light or as complicated as real6time
robotic vision.
The diagnostic port may be used for diagnosing the system that is being controlled 66 not
just for diagnosing the computer.
Special6purpose field programmable 1A(,-2, application specific 1-SI$2, or even non6
digital hardware may be used to increase performance or safety.
Software often has a fi8ed function, and is specific to the application.
<-#(%S "A #4&&& S+ST#S
I- S%.a$ Pro&e""%. S)"!em E*amp$e
@igh6performance in small volume
B ,A%"(S, B ,b/sec I/", ?;6B;J #4 R-#
#any high6speed &S( processors
@igh speed bus/switch interconnects
Software tuned for high performance
Tens to hundreds of units sold
'ery high development costs
BN6?D year lifetime

6 Rea$/$%#e ")"!em":
o Synthetic aperture Radar 1S-R2
o Sonar
o Real6time video
o #edical Imaging
II- M%""%o Cr%!%&a$ S)"!em E*amp$e
@igh6reliability, high6end design
BD6BDD #I(S, BH6?; #4 R-#
#id6 to high6range ?;6bit $IS$ uniprocessor
-nalog I/" channels with real6time control loopsK BD #b/sec
#ission6critical system
&ual6redundant hardware
(ainsta0ing software development 3 certification
@igh development costs
@undreds of units sold
;D6?D year lifetime

6 Rea$/$%#e ")"!em":
o Oet engine control
o #anned spacecraft control
o !uclear power plant control
III- D%"!r%(0!ed Co!ro$ S)"!em E*amp$e
#oderately ine8pensive, mid6range design
B6BD #I(S, B6BH #4 R-# 66 times several $(*s per system
#id6range BH6 and ?;6bit $IS$ distributed processors
- few real6time I/" control loops for each $(*
%ow6speed networ0ing among $(*s and among systems
#ission6critical system
!on6redundant hardwareK ordinary software development
lectromechanical safeties provide failure protection
#oderate development costs 1IB# 6 IBD#2
@undreds to thousands of systems sold
;N6ND year lifetime
6 Rea$/$%#e ")"!em":
o @igh6rise elevators
o %arge6building air handling
o (ublic transit systems
I1- 2Sma$$2 S)"!em E*amp$e
Ine8pensive, low6end design
BDD 5ilo6I(S, B6BD 5ilo6bits memory
Single6chip J6bit microcontroller is only digital I$
"ne real6time loop for $(*
!ot considered mission6critical, but indirectly affects
(ersonal safety
4are minimum hardware, small hand6coded assembly software
!o redundancy, is e8pected not to brea0 within lifetime
%ow development costs 1IBDD5 6 IB#2
#illions of units sold
BD6BN year lifetime

6 Rea$/$%#e ")"!em"
o -utomotive au8iliary components
o $onsumer electronics
o 5itchen appliances
o @ome automation
o >Smart> I/" for distributed control systems
,-3 EMBEDDED PRODUCT DEVELOPMENT LIFE CYCLE
SOFTWARE TOOLS
Integrated &evelopment nvironment
Stand -lone &evice -ssemblers
Stand -lone Remote &ebuggers
Stand -lone Simulators
In $ircuit mulators
HARDWARE TOOLS
$-& 3 Simulation tools
"r$-&
(S(I$
#ultisim / #odelsim
-((%I$-TI"!S "A #4&&& S+ST#
)e are living in the mbedded )orld. +ou are surrounded with many embedded products
and your daily life largely depends on the proper functioning of these gadgets. Television, Radio,
$& player of your living room, )ashing #achine or #icrowave "ven in your 0itchen, $ard
readers, -ccess $ontrollers, (alm devices of your wor0 space enable you to do many of your
tas0s very effectively. -part from all these, many controllers embedded in your car ta0e care of
car operations between the bumpers and most of the times you tend to ignore all these
controllers.
In recent days, you are showered with variety of information about these embedded
controllers in many places. -ll 0inds of magazines and journals regularly dish out details about
latest technologies, new devicesK fast applications which ma0e you believe that your basic
survival is controlled by these embedded products. !ow you can agree to the fact that these
embedded products have successfully invaded into our world. +ou must be wondering about
these embedded controllers or systems.
,-4 DESCRIPTION
W+a! %" !+%" Em(edded S)"!em5
The computer you use to compose your mails, or create a document or analyze the
database is 0nown as the standard des0top computer. These des0top computers are manufactured
to serve many purposes and applications.
+ou need to install the relevant software to get the re9uired processing facility. So, these
des0top computers can do many things. In contrast, embedded controllers carryout a specific
wor0 for which they are designed. #ost of the time, engineers design these embedded controllers
with a specific goal in mind. So these controllers cannot be used in any other place.
Theoretically, an embedded controller is a combination of a piece of microprocessor based
hardware and the suitable software to underta0e a specific tas0.
These days designers have many choices in microprocessors/microcontrollers. specially,
in J bit and ?; bit, the available variety really may overwhelm even an e8perienced designer.
Selecting a right microprocessor may turn out as a most difficult first step and it is getting
complicated as new devices continue to pop6up very often.
In the J bit segment, the most popular and used architecture is IntelFs JD?B. #ar0et
acceptance of this particular family has driven many semiconductor manufacturers to develop
something new based on this particular architecture. ven after ;N years of e8istence,
semiconductor manufacturers still come out with some 0ind of device using this JD?B core.
Military and aerospace software applications
Arom in6orbit embedded systems to jumbo jets to vital battlefield networ0s, designers of
mission6critical aerospace and defense systems re9uiring real6time performance, scalability, and
high6availability facilities consistently turn to the %yn8"SP RT"S and the %yn8"S6BGJ RT"S
for software certification to &"6BGJ4.
Rich in system resources and networ0ing services, %yn8"S provides an off6the6shelf
software platform with hard real6time response bac0ed by powerful distributed computing
1$"R4-2, high reliability, software certification, and long6term support options.
The %yn8"S6BGJ RT"S for software certification, based on the RT$- &"6BGJ4
standard, assists developers in gaining certification for their mission6 and safety6critical systems.
Real6time systems programmers get a boost with %ynu8 )or0sF &"6BGJ4 RT"S training
courses.
%yn8"S6BGJ is the first &"6BGJ4 and *R"$-/&6B;4 certifiable, ("SI<P6
compatible RT"S solution.
Communications applications
>Aive6nines> availability, $ompact($I hot swap support, and hard real6time response=
%yn8"S delivers on these 0ey re9uirements and more for todayFs carrier6class systems. Scalable
0ernel configurations, distributed computing capabilities, integrated communications stac0s, and
fault6management facilities ma0e %yn8"S the ideal choice for companies loo0ing for a single
operating system for all embedded telecommunications applications=from comple8 central
controllers to simple line/trun0 cards.
%ynu8 )or0s Oumpstart for $ommunications pac0age enables "#s to rapidly develop
mission6critical communications e9uipment, with pre6integrated, state6of6the6art, data
networ0ing and porting software components=including source code for easy customization.
The %yn8 $ertifiable Stac0 1%$S2 is a secure T$(/I( protocol stac0 designed especially
for applications where standards certification is re9uired.
Electronics applications and consumer devices
-s the number of powerful embedded processors in consumer devices continues to rise,
the 4lue$atP %inu8P operating system provides a highly reliable and royalty6free option for
systems designers.
-nd as the wireless appliance revolution rolls on, web6enabled navigation systems,
radios, personal communication devices, phones and (&-s all benefit from the cost6effective
dependability, proven stability and full product life6cycle support opportunities associated with
4lue$at embedded %inu8. 4lue$at has teamed up with industry leaders to ma0e it easier to build
%inu8 mobile phones with Oava integration.
Aor ma0ers of low6cost consumer electronic devices who wish to integrate the %yn8"S
real6time operating system into their products, we offer special #SR(6based pricing to reduce
royalty fees to a negligible portion of the deviceFs #SR(.
Industrial automation and process control software
&esigners of industrial and process control systems 0now from e8perience that %ynu8)or0s
operating systems provide the security and reliability that their industrial applications re9uire.
Arom IS" CDDB certification to fault6tolerance, ("SI< conformance, secure partitioning and
high availability, weFve got it all. Ta0e advantage of our ;D years of e8perience.
MICROCONTROLLER VERSUS MICROPROCESSOR
)hat is the difference between a #icroprocessor and #icrocontrollerQ 4y microprocessor is
meant the general purpose #icroprocessors such as IntelFs <JH family 1JDJH, JD;JH, JD?JH,
JDEJH, and the (entium2 or #otorolaFs HJD<D family 1HJDDD, HJDBD, HJD;D, HJD?D, HJDED, etc2.
These microprocessors contain no R-#, no R"#, and no I/" ports on the chip itself. Aor this
reason, they are commonly referred to as general6purpose #icroprocessors.
- system designer using a general6purpose microprocessor such as the (entium or the HJDED
must add R-#, R"#, I/" ports, and timers e8ternally to ma0e them functional. -lthough the
addition of e8ternal R-#, R"#, and I/" ports ma0es these systems bul0ier and much more
e8pensive, they have the advantage of versatility such that the designer can decide on the amount
of R-#, R"# and I/" ports needed to fit the tas0 at hand. This is not the case with
#icrocontrollers.
- #icrocontroller has a $(* 1a microprocessor2 in addition to a fi8ed amount of R-#,
R"#, I/" ports, and a timer all on a single chip. In other words, the processor, the R-#, R"#,
I/" ports and the timer are all embedded together on one chipK therefore, the designer cannot add
any e8ternal memory, I/" ports, or timer to it. The fi8ed amount of on6chip R"#, R-#, and
number of I/" ports in #icrocontrollers ma0es them ideal for many applications in which cost
and space are critical.
In many applications, for e8ample a T' remote control, there is no need for the computing
power of a EJH or even an JDJH microprocessor. These applications most often re9uire some I/"
operations to read signals and turn on and off certain bits.
MICROCONTROLLERS FOR EMBEDDED SYSTEMS
In the %iterature discussing microprocessors, we often see the term mbedded System.
#icroprocessors and #icrocontrollers are widely used in embedded system products. -n
embedded system product uses a microprocessor 1or #icrocontroller2 to do one tas0 only. -
printer is an e8ample of embedded system since the processor inside it performs one tas0 onlyK
namely getting the data and printing it. $ontrast this with a (entium based ($. - ($ can be used
for any number of applications such as word processor, print6server, ban0 teller terminal, 'ideo
game, networ0 server, or Internet terminal. Software for a variety of applications can be loaded
and run. "f course the reason a pc can perform myriad tas0s is that it has R-# memory and an
operating system that loads the application software into R-# memory and lets the $(* run it.
In an mbedded system, there is only one application software that is typically burned into
R"#. -n 8JH ($ contains or is connected to various embedded products such as 0eyboard,
printer, modem, dis0 controller, sound card, $&6R"# drives, mouse, and so on. ach one of
these peripherals has a #icrocontroller inside it that performs only one tas0. Aor e8ample, inside
every mouse there is a #icrocontroller to perform the tas0 of finding the mouse position and
sending it to the ($. Table B6B lists some embedded products.
3. HARDWARE MODULE DISCRIPTION
3-6 MICROCONTROLLER 789:6;
In this project wor0 the micro6controller is playing a major role. #icro6controllers were
originally used as components in complicated process6control systems. @owever, because of
their small size and low price, #icro6controllers are now also being used in regulators for
individual control loops. In several areas #icro6controllers are now outperforming their analog
counterparts and are cheaper as well.
The purpose of this project wor0 is to present control theory that is relevant to the analysis
and design of #icro6controller system with an emphasis on basic concept and ideas. It is
assumed that a #icrocontroller with reasonable software is available for computations and
simulations so that many tedious details can be left to the #icrocontroller. The control system
design is also carried out up to the stage of implementation in the form of controller programs in
assembly language "R in $6%anguage.
3-6-6 INTROD'CTION
- #icro controller consists of a powerful $(* tightly coupled with memory, various I/"
interfaces such as serial port, parallel port timer or counter, interrupt controller, data ac9uisition
interfaces6-nalog to &igital converter, &igital to -nalog converter, integrated on to a single
silicon chip.
If a system is developed with a microprocessor, the designer has to go for e8ternal
memory such as R-#, R"#, (R"# and peripherals. 4ut controller is provided all these
facilities on a single chip. &evelopment of a #icro controller reduces ($4 size and cost of
design.
"ne of the major differences between a #icroprocessor and a #icro controller is that a controller
often deals with bits not bytes as in the real world application.
Intel has introduced a family of #icro controllers called the #$S6NB.
-R# G 1%($;BEJ2.
Geera$ de"&r%p!%o o# LPC ,648:
The %($;BEJ microcontrollers is based on a ?;6bit -R#GT&#I6S $(* with real6
time emulation and embedded trace support, that combine microcontrollers with embedded high6
speed flash memory ranging from ?; 04 to NB; 04. - B;J6bit wide memory interface and uni9ue
accelerator architecture enable ?;6bit code e8ecution at the ma8imum cloc0 rate. Aor critical
code size applications, the alternative BH6bit Thumb
mode reduces code by more than ?D R with minimal performance penalty.
&ue to their tiny size and low power consumption, %($;BEB/E;/EE/EH/EJ are ideal
for applications where miniaturization is a 0ey re9uirement, such as access control and point6of6
sale. Serial communications interfaces ranging from a *S4 ;.D Aull6speed device, multiple
*-RTs, S(I, SS( to I;$6bus and on6chip SR-# of J 04 up to ED 04, ma0e these devices very
well suited for communication gateways and protocol converters, soft modems, voice
recognition and low end imaging, providing both large buffer size and high processing power.
'arious ?;6bit timers, single or dual BD6bit -&$s, BD6bit &-$, ()# channels and EN fast ,(I"
lines with up to nine edge or level sensitive e8ternal interrupt pins ma0e these microcontrollers
suitable for industrial control and medical systems.
Geera$ o<er<%ew o# % ")"!em pro.ramm%. 7ISP;:
In6System (rogramming 1IS(2 is a process whereby a blan0 device mounted to a circuit board
can be programmed with the end6user code without the need to remove the device from the
circuit board. -lso, a previously programmed device can be erased and Re programmed without
removal from the circuit board. In order to perform IS( operations the microcontroller is
powered up in a special SIS( modeT. IS( mode allows the microcontroller to communicate with
an e8ternal host device through the serial port, such as a ($ or terminal. The microcontroller
receives commands and data from the host, erases and reprograms code memory, etc. "nce the
IS( operations have been completed the device is reconfigured so that it will operate normally
the ne8t time it is either reset or power removed and reapplied. -ll of the (hilips
microcontrollers shown in Table B and Table ; have a B 0byte factory6mas0ed R"# located in
the upper B 0byte of code memory space from A$DD to AAAA. This B 0byte R"# is in addition to
the memory bloc0s shown in Table B and Table ;. This R"# is referred to as the S4ootromT.
This 4ootrom contains a set of instructions which allows the microcontroller to perform a
number of Alash programming and erasing functions. The 4ootrom also provides
communications through the serial port. The use of the 4ootrom is 0ey to the concepts of both
IS( and In6-pplication (rogramming 1I-(2. The contents of the bootrom are provided by (hilips
and mas0ed into every device. )hen the device is reset or power applied, and the -/ pin is high
or at the '(( voltage, the microcontroller will start e8ecuting instructions from either the user
code memory space at address DDDDh 1Snormal modeT2 or will e8ecute instructions from the
4ootrom 1IS( mode2.
Geera$ O<er<%ew o# IN APPLICATION PROGRAMMING:
Some applications may have a need to be able to erase and program code memory under the
control fo the application. Aor e8ample, an application may have a need to store calibration
information or perhaps need to be able to download new code portions. This ability to erase and
program code memory in the end6user application is SIn6-pplication (rogrammingT 1I-(2. The
4ootrom routines which perform functions on the Alash memory during IS( mode such as
programming, erasing, and reading, are also available to end6user programs. Thus it is possible
for an end6user application to perform operations on the Alash memory. - common entry point
1AAADh2 to these routines has been provided to simplify interfacing to the end6users application.
Aunctions are performed by setting up specific registers as re9uired by a specific operation and
performing a call to the common entry point. %i0e any other subroutine call, after completion of
the function, control will return to the end6users code. The 4ootrom is shadowed with the user
code memory in the address range from A$DDh to AAAAh. This shadowing is controlled by the
!4""T bit 1-*<RB.N2. )hen set, accesses to internal code memory in this address range will
be from the boot R"#. )hen cleared, accesses will be from the users code memory. It will be
!$SS-R+ for the end6users code to set the !4""T bit prior to calling the common entry
point for I-( operations, even for devices with BH 0byte, ?; 0byte, and HE 0byte of internal code
memory. 1IS( operation is selected by certain hardware conditions and control of the !4""T
bit is automatic when IS( mode is activated2.
FEAT'RES OF LPC,6487ARM=; ARCHITECT'RE
Ke) #ea!0re":
BH6bit/?;6bit -R#GT&#I6S microcontroller in a tiny %:A(HE pac0age
J 04 to ED 04 of on6chip static R-# and ?; 04 to NB; 04 of on6chip flash memoryK B;J6
bit wide interface/accelerator enables high6speed HD #@z operation
In6System (rogramming/In6-pplication (rogramming 1IS(/I-(2 via on6chip boot loader
software, single flash sector or full chip erase in EDD ms and programming of ;NH 4 in B
ms.
mbedded I$ RT and mbedded Trace interfaces offer real6time debugging with the
on6chip Real #onitor software and high6speed tracing of instruction e8ecution
*S4 ;.D Aull6speed compliant device controller with ; 04 of endpoint R-#
In addition, the %($;BEH/EJ provides J 04 of on6chip R-# accessible to *S4 by &#-
"ne or two 1%($;BEB/E; vs, %($;BEE/EH/EJ2 BD6bit -&$s provide a total of H/BE analog
inputs, with conversion times as low as ;.EE ms per channel Single BD6bit &-$ provides
variable analog output 1%($;BE;/EE/EH/EJ only2
Two ?;6bit timers/e8ternal event counters 1with four capture and four compare
channels each2, ()# unit 1si8 outputs2 and watchdog.
%ow power Real6Time $loc0 1RT$2 with independent power and ?; 0@z cloc0 input
#ultiple serial interfaces including two *-RTs 1BH$NND2, two Aast I;$6bus 1EDD 0bit/s2,
S(I and SS( with buffering and variable data length capabilities
'ectored Interrupt $ontroller 1'I$2 with configurable priorities and vector addresses
*p to EN of N ' tolerant fast general purpose I/" pins in a tiny %:A(HE pac0age
*p to ;B e8ternal interrupt pins available
HD #@z ma8imum $(* cloc0 available from programmable on6chip (%% with settling
time of BDD ms
"n6chip integrated oscillator operates with an e8ternal crystal from B #@z to ;N #@z
(ower saving modes include Idle and (ower6down
Individual enable/disable of peripheral functions as well as peripheral cloc0 scaling for
additional power optimization
(rocessor wa0e6up from (ower6down mode via e8ternal interrupt or 4"&
Single power supply chip with ("R and 4"& circuits.
$(* operating voltage range of ?.D ' to ?.H ' 1?.? ' U BD R2 with N ' tolerant I/" pads.
BLOCK DIAGRAM:
PIN CONFIG'RATION:
P% De"&r%p!%o:
P9-9 !o P9-36 I/O Por! 9: (ort D is a ?;6bit I/" port with individual direction controls for each
bit. Total of ?B pins of the (ort D can be used as a general purpose bidirectional digital I/"s
while (D.?B is output only pin. The operation of port D pins depends upon the pin function
selected via the pin connect bloc0.
P9-9/T>D9/PWM6:

P9-9 ? ,eneral purpose input/output digital pin 1,(I"2
T>D9 ? Transmitter output for *-RTD
PWM6 ? (ulse )idth #odulator output B
P9-6/R>D9/PWM3/EINT9:
R>D9 ? Receiver input for *-RTD
PWM3 ? (ulse )idth #odulator output ?
EINT9 ? 8ternal interrupt D input
P9-,/SCL9/ CAP9-9:
P9-, ? ,eneral purpose input/output digital pin 1,(I"2
SCL9 ? I;$D cloc0 input/output, open6drain output 1for I;$6bus compliance2
CAP9-9 ? $apture input for Timer D, channel D
P9-3/SDA9/ MAT9-9/EINT6.
SDA9 ? I;$D data input/output, open6drain output 1for I;$6bus compliance2
MAT9-9 ? #atch output for Timer D, channel D
EINT6 ? 8ternal interrupt B input
P9-4/SCK9/ CAP9-6/AD9-@

SCK9 ? Serial cloc0 for S(ID, S(I cloc0 output from master or input to slave
AD9-@ ? -&$ D, input H.
P9-:/MISO9/ MAT9-6/AD9-=
P9-: ? ,eneral purpose input/output digital pin 1,(I"2
MISO9 ? #aster In Slave "*T for S(ID, data input to S(I master or data output from
S(I slave.
MAT9-6 ? #atch output for Timer D, channel B
AD9-= ? -&$ D, input G
P9-@/MOSI9/ CAP9-,/AD6-9
P9-@ ? ,eneral purpose input/output digital pin 1,(I"2
MOSI9 ? #aster out Slave In for S(ID, data output from S(I master or data
Input to S(I slave
CAP9-, ? $apture input for Timer D, channel ;
AD6-9 ? -&$ B, input D, available in %($;BEE/EH/EJ only
P9-=/SSEL9/PWM,/EINT,
P9-= ? ,eneral purpose input/output digital pin 1,(I"2
SSEL9 ? Slave Select for S(ID, selects the S(I interface as a slave
PWM, ? (ulse )idth #odulator output ;
EINT, ? 8ternal interrupt ; input
P9-8/T>D6/PWM4/AD6-6
T>D6 ? Transmitter output for *-RTB
PWM4 ? (ulse )idth #odulator output E
AD6-6 ? -&$ B, input B, available in %($;BEE/EH/EJ only
P9-A/R>D6/ PWM@/EINT3:
P9-A ? ,eneral purpose input/output digital pin 1,(I"2
R>D6 ? Receiver input for *-RTB
PWM@ ? (ulse )idth #odulator output H
EINT3 ? 8ternal interrupt ? input
P9-69/RTS6/ CAP6-9/AD6-,:
RTS6 ? Re9uest to send output for *-RTB, %($;BEE/EH/EJ only
CAP6-9 ? $apture input for Timer B, channel D
AD6-, ? -&$ B, input ;, available in %($;BEE/EH/EJ only
P9-66/CTS6/ CAP6-6/SCL6:
CTS6 ? $lear to send input for *-RTB, available in %($;BEE/EH/EJ only
CAP6-6 ? $apture input for Timer B, channel B
SCL6 ? I;$B cloc0 input/output, open6drain output 1for I;$6bus compliance2
P9-6,/DSR6/MAT6-9/AD6-3:
P9-6, ? ,eneral purpose input/output digital pin 1,(I"2
DSR6 ? &ata Set Ready input for *-RTB, available in %($;BEE/EH/EJ only
MAT6-9 ? #atch output for Timer B, channel D
AD6-3 ? -&$ input ?, available in %($;BEE/EH/EJ only
P9-63/DTR6/ MAT6-6/AD6-4:
DTR6 ? &ata Terminal Ready output for *-RTB, %($;BEE/EH/EJ only
MAT6-6 ? #atch output for Timer B, channel B
AD6-4 ? -&$ input E, available in %($;BEE/EH/EJ only
P9-64/DCD6/EINT6/SDA6:
DCD6 ? &ata $arrier &etect input for *-RTB, %($;BEE/EH/EJ only
EINT6 ? 8ternal interrupt B input
SDA6 ? I;$B data input/output, open6drain output 1for I;$6bus compliance %") on this pin
while RST is %") forces on6chip boot loader to ta0e over control of the part after reset
P9-6:/RI6/ EINT,/AD6-::
P9-6: ? ,eneral purpose input/output digital pin 1,(I"2
RI6 ? Ring Indicator input for *-RTB, available in %($;BEE/EH/EJ only
EINT, ? 8ternal interrupt ; input
AD6-: ? -&$ B, input N, available in %($;BEE/EH/EJ only
P9-6@/EINT9/MAT9-,/CAP9-,:
P9-6@ ? ,eneral purpose input/output digital pin 1,(I"2
EINT9 ? 8ternal interrupt D input
MAT9-, ? #atch output for Timer D, channel ;
P9-6=/CAP6-,/ SCK6/MAT6-,:
P9-6= ? ,eneral purpose input/output digital pin 1,(I"2
CAP6-, ? $apture input for Timer B, channel ;
SCK6 ? Serial $loc0 for SS(, cloc0 output from master or input to slave
MAT6-, ? #atch output for Timer B, channel ;
P9-68/CAP6-3/MISO6/MAT6-3:
CAP6-3 ? $apture input for Timer B, channel ?
MISO6 ? #aster In Slave "ut for SS(, data input to S(I master or data output from SS( slave
MAT6-3 ? #atch output for Timer B, channel ?
P9-6A/MAT6-,/MOSI6/CAP6-,:
P9-6A ? ,eneral purpose input/output digital pin 1,(I"2
MAT6-, ? #atch output for Timer B, channel ;
MOSI6 ? #aster out Slave In for SS(, data output from SS( master or data Input to SS( slave
CAP6-, ? $apture input for Timer B, channel ;
P9-,9/MAT6-3/SSEL6/EINT3:
P9-,9 ? ,eneral purpose input/output digital pin 1,(I"2
MAT6-3 ? #atch output for Timer B, channel ?
SSEL6 ? Slave Select for SS(, selects the SS( interface as a slave
P9-,6/PWM:/AD6-@/CAP6-3:
PWM: ? (ulse )idth #odulator output N
AD6-@ ? -&$ B, input H, available in %($;BEE/EH/EJ only
CAP6-3 ? $apture input for Timer B, channel ?
P9-,,/AD6-=/CAP9-9/MAT9-9:
P9-,, ? ,eneral purpose input/output digital pin 1,(I"2
AD6-= ? -&$ B, input G, available in %($;BEE/EH/EJ only
MAT9-9 ? #atch output for Timer D, channel D
P9-,3/1B'S:
1B'S ? Indicates the presence of *S4 bus power
This signal must be @I,@ for *S4 reset to occur
P9-,:/AD9-4/AO'T:
P9-,: ? ,eneral purpose input/output digital pin 1,(I"2
AD9-4 ? -&$ D, input E
AO'T ? &-$ output, available in %($;BE;/EE/EH/EJ only
P9-,8/AD9-6/CAP9-,/MAT9-,:
AD9-6 ? -&$ D, input B
MAT9-, ? #atch output for Timer D, channel ;
P9-,A/AD9-,/CAP9-3/MAT9-3:
P9-,A ? ,eneral purpose input/output digital pin 1,(I"2
AD9-, ? -&$ D, input ;
CAP9-3 ? $apture input for Timer D, $hannel ?
MAT9-3 ? #atch output for Timer D, channel ?
P9-39/AD9-3/EINT3/CAP9-9:
AD9-3 ? -&$ D, input ?
P9-36/'PBLED/CONNECT
P9-36 ? ,eneral purpose output only digital pin 1,("2
'PBLED ? *S4 ,ood %in0 %& indicator, it is %") when device is configured 1non6control
endpoints enabled2, it is @I,@ when the device is not configured or during global suspend
CONNECT ? Signal used to switch an e8ternal B.N 0ohms resistor under the
Software control, used with the Soft $onnect *S4 feature
Impor!a!: This is a digital output only pin, this pin #*ST !"T be e8ternally pulled %")
when RST pin is %") or the OT-, port will be disabled (B.D to (B.?B I/" Por! 6: (ort B is a
?;6bit bidirectional I/" port with individual direction controls for each bit, the operation of port B
pins depends upon the pin function selected via the pin connect bloc0, pins D through BN of port
B are not
-vailable.
P6-6@/TRACEPKT9
P6-6@ ? ,eneral purpose input/output digital pin 1,(I"2
TRACEPKT9 ? Trace (ac0et, bit D, standard I/" port with internal pull6up
P6-6=/TRACEPKT6
P6-6= ? ,eneral purpose input/output digital pin 1,(I"2
TRACEPKT6 ? Trace (ac0et, bit B, standard I/" port with internal pull6up
P6-68/TRACEPKT,
TRACEPKT, ? Trace (ac0et, bit ;, standard I/" port with internal pull6up
P6-6A/TRACEPKT3
P6-6A ? ,eneral purpose input/output digital pin 1,(I"2
TRACEPKT3 ? Trace (ac0et, bit ?, standard I/" port with internal pull6up
P6-,9/TRACESYNC
TRACESYNC ? Trace Synchronization, standard I/" port with internal pull6up
No!e: %") on this pin while RST is %") enables pins (B.;N.BH to operate as Trace port
after reset
P6-,6/PIPESTAT9
PIPESTAT9 ? (ipeline Status, bit D, standard I/" port with internal pull6up
P6-,,/PIPESTAT6
P6-,, ? ,eneral purpose input/output digital pin 1,(I"2
PIPESTAT6 ? (ipeline Status, bit B, standard I/" port with internal pull6up
P6-,3/PIPESTAT,
PIPESTAT, ? (ipeline Status, bit ;, standard I/" port with internal pull6up
P6-,4/TRACECLK
TRACECLK ? Trace $loc0, standard I/" port with internal pull6up
P6-,:/E>TIN9
P6-,: ? ,eneral purpose input/output digital pin 1,(I"2
E>TIN9 ? 8ternal Trigger Input, standard I/" with internal pull6up
P6-,@/RTCK
P6-,@ ? ,eneral purpose input/output digital pin 1,(I"2
RTCK ? Returned Test $loc0 output, e8tra signal added to the OT-, port, assists debugger
synchronization when processor fre9uency varies, bidirectional pin with internal pull6up
No!e: %") on RT$5 while RST is %") enables pins (B.?B.;H to operate a &ebug port after
reset
P6-,=/TDO
P6-,= ? ,eneral purpose input/output digital pin 1,(I"2
TDO ? Test &ata out for OT-, interface
P6-,8/TDI
TDI ? Test &ata in for OT-, interface
P6-,A/TCK
P6-,A ? ,eneral purpose input/output digital pin 1,(I"2
TCK ? Test $loc0 for OT-, interface
P6-39/TMS
TMS ? Test #ode Select for OT-, interface
(B.?B/TRST
TRST ? Test Reset for OT-, interface
DC. *S4 bidirectional &V line
D/ . *S4 bidirectional &6 line
RESET E*!era$ re"e! %p0!: - %") on this pin resets the device, causing I/" ports and
peripherals to ta0e on their default states, and processor e8ecution to begin at address D, TT%
with hysteretic, N ' tolerant
>TAL6. Input to the oscillator circuit and internal cloc0 generator circuits
>TAL,. "utput from the oscillator amplifier
RTC>6. I Input to the RT$ oscillator circuit
RTC>,. "utput from the RT$ oscillator circuit
1SS. H, BJ, ;N, E;, ND pins are for supply voltage.
Gro0d: D ' reference.
1SSA Aa$o. .ro0d: D ' reference, this should nominally be the same voltage as
'SS, but should be isolated to minimize noise and error
1DD ,3D 43D :6 I 3-3 1 power "0pp$): This is the power supply voltage for the core and I/"
ports.
1DDA = I Aa$o. 3-3 1 power "0pp$): This should be nominally the same voltage as
'&& but should be isolated to minimize noise and error, this voltage is only used to power the
on6chip -&$1s2 and &-$
1REF ADC re#ere&e <o$!a.e: This should be nominally less than or e9ual to the
'&& voltage but should be isolated to minimize noise and error, level on this
(in is used as a reference for -&$1s2 and &-$
1BAT RTC power "0pp$) <o$!a.e: ?.? ' on this pin supplies the power to the RT$.
F0&!%oa$ De"&r%p!%o:
Ar&+%!e&!0ra$ O<er<%ew:
The -R#GT&#I6S is a general purpose ?;6bit microprocessor, which offers high
performance and very low power consumption. The -R# architecture is based on Reduced
Instruction Set $omputer 1RIS$2 principles, and the instruction set and related decode
mechanism are much simpler than those of micro programmed $omple8 Instruction Set
$omputers 1$IS$2. This simplicity results in a high instruction throughput
-nd impressive real6time interrupt response from a small and cost6effective processor core.
(ipeline techni9ues are employed so that all parts of the processing and memory systems can
operate continuously. Typically, while one instruction is being e8ecuted, its successor is being
decoded, and a third instruction is being fetched from memory. The -R#GT&#I6S processor
also employs a uni9ue architectural strategy 0nown as Thumb, which ma0es it ideally suited to
high6volume applications with memory restrictions, or applications where code density is an
issue. The 0ey idea behind Thumb is that of a super6reduced instruction set.
ssentially, the -R#GT&#I6S processor has two instruction sets.
E The standard ?;6bit -R# set
E - BH6bit Thumb set
The Thumb sets BH6bit instruction length allows it to approach twice the density of standard
-R# code while retaining most of the -R#s performance advantage over a traditional BH6
bit processor using BH6bit registers. This is possible because Thumb code operates on the
same ?;6bit register set as -R# code. Thumb code is able to provide up to HN R of the code
size of -R#, and BHD R of the performance of an e9uivalent -R# processor connected to a
BH6bit memory system. The particular flash implementation in the %($;BEB/E;/EE/EH/EJ
allows for full speed e8ecution also in -R# mode. It is recommended to program
performance critical and short code sections 1such as interrupt service routines and &S(
algorithms2 in -R# mode. The impact on the overall code size will be minimal but the speed
can be increased by ?D R over Thumb mode.
O/C+%p F$a"+ Pro.ram memor):
The %($;BEB/E;/EE/EH/EJ incorporate a ?; 04, HE 04, B;J 04, ;NH 04 and NB; 04
flash memory system respectively. This memory may be used for both code and data storage.
(rogramming of the flash memory may be accomplished in several ways. It may be programmed
In System via the serial port. The application program may also erase and/or program the flash
while the application is running, allowing a great degree of fle8ibility for data storage field
firmware upgrades, etc. &ue to the architectural solution chosen for an on6chip boot loader, flash
memory available for users code on %($;BEB/E;/EE/EH/EJ is ?; 04, HE 04, B;J 04, ;NH 04 and
NDD 04 respectively.
The %($;BEB/E;/EE/EH/EJ flash memory provides a minimum of BDDDDD erase/write
cycles and ;D years of data6retention.
O/C+%p S!a!%& RAM:
"n6chip static R-# may be used for code and/or data storage. The SR-# may be
accessed as J6bit, BH6bit, and ?;6bit. The %($;BEB, %($;BE;/EE and %($;BEH/EJ provide J 04,
BH 04 and ?; 04 of static R-# respectively. In case of %($;BEH/EJ only, an J 04 SR-# bloc0
intended to be utilized mainly by the *S4 can also be used as a general purpose R-# for data
storage and code storage and e8ecution.
Memor) Map:
The %($;BEB/E;/EE/EH/EJ memory map incorporates several distinct regions, as shown
below.
I!err0p! &o!ro$$er:
The 'ectored Interrupt $ontroller 1'I$2 accepts all of the interrupt re9uest
inputs and categorizes them as Aast Interrupt Re9uest 1AI:2, vectored Interrupt Re9uest 1IR:2,
and non6vectored IR: as defined by programmable settings. The programmable assignment
scheme means that priorities of interrupts from the various peripherals can be dynamically
assigned and adjusted.
Aast interrupt re9uest 1AI:2 has the highest priority. If more than one re9uest is
assigned to AI:, the 'I$ combines the re9uests to produce the AI: signal to the -R# processor.
The fastest possible AI: latency is achieved when only one re9uest is classified as AI:, because
then the AI: service routine does not need to branch into the interrupt service routine but can run
from the interrupt vector location. If more than one re9uest is assigned to the AI: class, the AI:
service routine will read a word from the 'I$ that identifies which AI: source1s2 is 1are2
re9uesting an interrupt.
'ectored IR:s have the middle priority. Si8teen of the interrupt re9uests can be
assigned to this category. -ny of the interrupt re9uests can be assigned to any of the BH vectored
IR: slots, among which slot D has the highest priority and slot BN has the lowest. !on6vectored
IR:s have the lowest priority.
The 'I$ combines the re9uests from all the vectored and non6vectored IR:s to
produce the IR: signal to the -R# processor. The IR: service routine can start by reading a
register from the 'I$ and jumping there. If any of the vectored IR:s are pending, the 'I$
provides the address of the highest6priority re9uesting IR:s service routine, otherwise it
provides the address of a default routine that is shared by all the non6vectored IR:s. The default
routine can read another 'I$ register to see what IR:s are active.
I!err0p! So0r&e":
ach peripheral device has one interrupt line connected to the 'ectored Interrupt
$ontroller, but may have several internal interrupt flags. Individual interrupt flags may also
represent more than one interrupt source.
P% Coe&! B$o&F:
The pin connect bloc0 allows selected pins of the microcontroller to have more than
one function. $onfiguration registers control the multiple8ers to allow connection between the
pin and the on chip peripherals. (eripherals should be connected to the appropriate pins prior to
being activated, and prior to any related interrupt1s2 being enabled. -ctivity of any enabled
peripheral function that is not mapped to a related pin should be considered undefined.
The (in $ontrol #odule with its pin select registers defines the functionality of the
microcontroller in a given hardware environment. -fter reset all pins of (ort D and (ort B are
configured as input with the following e8ceptions. If debug is enabled, the OT-, pins will
assume their OT-, functionalityK if trace is enabled, the Trace pins will assume their trace
functionality. The pins associated with the I;$D and I;$B interface are open drain.
Fa"! Geera$ p0rpo"e Para$$e$ I/O:
&evice pins that are not connected to a specific peripheral function are controlled
by the ,(I" registers. (ins may be dynamically configured as inputs or outputs. Separate
registers allow the setting or clearing of any number of outputs simultaneously. The value of the
output register may be read bac0, as well as the current state of the port pins.
%($;BEB/E;/EE/EH/EJ introduces accelerated ,(I" functions over prior %($;DDD devices.
E ,(I" registers are relocated to the -R# local bus for the fastest possible I/" timing
E #as0 registers allow treating sets of port bits as a group, leaving other bits unchanged
E -ll ,(I" registers are byte addressable
E ntire port value can be written in one instruction
E 4it6level set and clear registers allow a single instruction to set or clear any number of bits in
one port
E &irection control of individual bits
E Separate control of output set and clear
E -ll I/" default to inputs after reset
69 (%! ADC:
The %($;BEB/E; contain one and the %($;BEE/EH/EJ contain two analog to digital
converters. These converters are single BD6bit successive appro8imation analog to digital
converters. )hile -&$D has si8 channels, -&$B has eight channels. Therefore, total number of
available -&$ inputs for %($;BEB/E; is H and for %($;BEE/EH/EJ is BE.
69 (%! DAC:
The &-$ enables the %($;BEB/E;/EE/EH/EJ to generate a variable analog output. The
ma8imum &-$ output voltage is the 'RA voltage.
'SB ,-9 De<%&e &o!ro$$er:

The *S4 is a E6wire serial bus that supports communication between a host and a
number 1B;G ma82 of peripherals. The host controller allocates the *S4 bandwidth to
-ttached devices through a to0en based protocol. The bus supports hot plugging, unplugging,
and dynamic configuration of the devices. -ll transactions are initiated by the host controller.
The %($;BEB/E;/EE/EH/EJ is e9uipped with a *S4 device controller that enables B;
#bit/s data e8change with a *S4 host controller. It consists of a register interface, serial
interface engine, endpoint buffer memory and &#- controller. The serial interface engine
decodes the *S4 data stream and writes data to the appropriate end point buffer memory. The
status of a completed *S4 transfer or error condition is indicated via status registers. -n
interrupt is also generated if enabled. - &#- controller 1available in %($;BEH/EJ only2 can
transfer data between an endpoint buffer and the *S4 R-#.

'ARTS:
The %($;BEB/E;/EE/EH/EJ each contains two *-RTs. In addition to standard transmit
and receive data lines, the %($;BEE/EH/EJ *-RTB also provide a full modem control handsha0e
interface. $ompared to previous %($;DDD microcontrollers, *-RTs in %($;BEB/E;/EE/EH/EJ
introduce a fractional baud rate generator for both *-RTs, enabling these microcontrollers to
achieve standard baud rates such as BBN;DD with any crystal fre9uency above ; #@z. In
addition, auto6$TS/RTS flow6control functions are fully implemented in hardware 1*-RTB in
%($;BEE/EH/EJ only2-
I,C B0" Ser%a$ I/O Co!ro$$er
The %($;BEB/E;/EE/EH/EJ each contains two I;$6bus controllers.
The I;$6bus is bidirectional, for inter6I$ control using only two wires. a serial cloc0 line 1S$%2,
and a serial data line 1S&-2. ach device is recognized by a uni9ue address and can operate as
either a receiver6only device 1e.g., an %$& driver or a transmitter with the capability to both
receive and send information 1such as memory22. Transmitters and/or receivers can operate in
either master or slave mode, depending on whether the chip has to initiate a data transfer or is
only addressed. The I;$6bus is a multi6master busK it can be controlled by more than one bus
master connected to it. The I;$6bus implemented in %($;BEB/E;/EE/EH/EJ supports bit rates up
to EDD 0bit/s 1Aast I;$6bus2-
SPI Ser%a$ I/O Co!ro$$er:
The %($;BEB/E;/EE/EH/EJ each contain one S(I controller. The S(I is a full duple8
serial interface, designed to handle multiple masters and slaves connected to a given bus. "nly a
single master and a single slave can communicate on the interface during a given data transfer.
&uring a data transfer the master always sends a byte of data to the slave, and the slave always
sends a byte of data to the master.
SSP Ser%a$ I/O Co!ro$$er
The %($;BEB/E;/EE/EH/EJ each contains one SS(. The SS( controller is capable of
operation on a S(I, E6wire SSI, or #icro wire bus. It can interact with multiple masters and
slaves on the bus. @owever, only a single master and a single slave can communicate on the bus
during a given data transfer. The SS( supports full duple8 transfers, with data frames of E bits to
BH bits of data flowing from the master to the slave and from the slave to the master. "ften only
one of these data flows carries meaningful data.
Geera$ P0rpo"e !%mer"/e*!era$ e<e! &o0!er"
The Timer/$ounter is designed to count cycles of the peripheral cloc0 1($%52 or an
e8ternally supplied cloc0 and optionally generate interrupts or perform other actions at specified
timer values, based on four match registers. It also includes four capture inputs to trap the timer
value when an input signals transitions, optionally generating an interrupt. #ultiple pins can be
selected to perform a single capture or match function, providing an application with 7or and
7and, as well as 7broadcast functions among them. The %($;BEB/E;/EE/EH/EJ can count
e8ternal events on one of the capture inputs if the minimum e8ternal pulse is e9ual or longer than
a period of the ($%5. In this configuration, unused capture lines can be selected as regular timer
capture inputs, or used as e8ternal interrupts.
Wa!&+do. T%mer
The purpose of the watchdog is to reset the microcontroller within a reasonable
amount of time if it enters an erroneous state. )hen enabled, the watchdog will generate a
system reset if the user program fails to 7feed 1or reload2 the watchdog within a predetermined
amount of time.
Rea$ T%me C$o&F:
The RT$ is designed to provide a set of counters to measure time when normal or
idle operating mode is selected. The RT$ has been designed to use little power, ma0ing it
suitable for battery powered systems where the $(* is not running continuously 1Idle mode2.
P0$"e w%d!+ mod0$a!or
The ()# is based on the standard timer bloc0 and inherits all of its features,
although only the ()# function is pinned out on the %($;BEB/E;/EE/EH/EJ. The timer is
designed to count cycles of the peripheral cloc0 1($%52 and optionally generate interrupts or
perform other actions when specified timer values occur, based on seven match registers. The
()# function is also based on match register events.

The ability to separately control rising and falling edge locations allows the ()# to be
used for more applications. Aor instance, multi6phase motor control typically re9uires three non6
overlapping ()# outputs with individual control of all three pulse widths and positions.

Two match registers can be used to provide a single edge controlled ()# output.
"ne match register 1#RD2 controls the ()# cycle rate, by resetting the count upon match. The
other match register controls the ()# edge position. -dditional single edge controlled ()#
outputs re9uire only one match register each, since the repetition rate is the same for all ()#
outputs. #ultiple single edge controlled ()# outputs will all have a rising edge at the
beginning of each ()# cycle, when an #RD match occurs.
Three match registers can be used to provide a ()# output with both edges
controlled. -gain, the #RD match register controls the ()# cycle rate. The other match
registers control the two ()# edge positions. -dditional double edge controlled ()# outputs
re9uire only two matches registers each, since the repetition rate is the same for all ()#
outputs. )ith double edge controlled ()# outputs, specific match registers control the rising
and falling edge of the output. This allows both positive going ()# pulses 1when the rising
edge occurs prior to the falling edge2, and negative going ()# pulses 1when the falling edge
occurs prior to the rising edge2.
S)"!em Co!ro$
6- Cr)"!a$ O"&%$$a!or.
"n6chip integrated oscillator operates with e8ternal crystal in range of B #@z
to ;N #@z. The oscillator output fre9uency is called fosc and the -R# processor cloc0
fre9uency is referred to as $$%5 for purposes of rate e9uations, etc. fosc and $$%5 are the
same value unless the (%% is running and connected.
,- PLL:
The (%% accepts an input cloc0 fre9uency in the range of BD #@z to ;N #@z.
The input fre9uency is multiplied up into the range of BD #@z to HD #@z with a $urrent
$ontrolled "scillator 1$$"2. The multiplier can be an integer value from B to ?; 1in practice, the
multiplier value cannot be higher than H on this family of microcontrollers due to the upper
fre9uency limit of the $(*2. The $$" operates in the range of BNH #@z to ?;D #@z, so there is
an additional divider in the loop to 0eep the $$" within its fre9uency range while the (%% is
providing the desired output fre9uency. The output divider may be set to divide by ;, E, J, or BH
to produce the output cloc0. Since the minimum output divider value is ;, it is insured that the
(%% output has a ND R duty cycle. The (%% is turned off and bypassed following a chip reset and
may be enabled by software. The program must configure and activate the (%%, wait for the (%%
to %oc0, then connect to the (%% as a cloc0 source. The (%% settling time is BDD ms.
3- Re"e! ad WaFe 0p T%mer:
Reset has two sources on the %($;BEB/E;/EE/EH/EJ. the RST pin and
watchdog reset. The RST pin is a Schmitt trigger input pin with an additional glitch filter.
-ssertion of chip reset by any source starts the )a0e6up Timer 1see )a0e6up Timer description
below2, causing the internal chip reset to remain asserted until the e8ternal reset is de6asserted,
the oscillator is running, a fi8ed number of cloc0s have passed, and the on6chip flash controller
has completed its initialization.

)hen the internal reset is removed, the processor begins e8ecuting at address
D, which is the reset vector. -t that point, all of the processor and peripheral registers have been
initialized to predetermined values.
The )a0e6up Timer ensures that the oscillator and other analog functions
re9uired for chip operation are fully functional before the processor is allowed to e8ecute
instructions. This is important at power on, all types of reset, and whenever any of the
aforementioned functions are turned off for any reason. Since the oscillator and other functions
are turned off during (ower6down mode, any wa0e6up of the processor from (ower6down mode
ma0es use of the )a0e6up Timer.
The )a0e6up Timer monitors the crystal oscillator as the means of chec0ing
whether it is safe to begin code e8ecution. )hen power is applied to the chip, or some event
caused the chip to e8it (ower6down mode, some time is re9uired for the oscillator to produce a
signal of sufficient amplitude to drive the cloc0 logic. The amount of time depends on many
factors, including the rate of '&& ramp 1in the case of power on2, the type of crystal and its
electrical characteristics 1if a 9uartz crystal is used2, as well as any other e8ternal circuitry 1e.g.
capacitors2, and the characteristics of the oscillator itself under the e8isting ambient conditions.
4- Brow o0! De!e&!or

The %($;BEB/E;/EE/EH/EJ includes ;6stage monitoring of the voltage on the '&&
pins. If this voltage falls below ;.C ', the 4"& asserts an interrupt signal to the 'I$. This signal
can be enabled for interruptK if not, software can monitor the signal by reading dedicated register.
The second stage of low voltage detection asserts reset to inactivate the
%($;BEB/E;/EE/EH/EJ when the voltage on the '&& pins falls below ;.H '. This reset prevents
alteration of the flash as operation of the various elements of the chip would otherwise become
unreliable due to low voltage. The 4"& circuit maintains this reset down below B ', at which
point the ("R circuitry maintains the overall reset.
4oth the ;.C ' and ;.H ' thresholds include some hysteresis. In normal operation, this hysteresis
allows the ;.C ' detection to reliably interrupt, or a regularly6e8ecuted event loop to sense the
condition.
:- Code Se&0r%!)
This feature of the %($;BEB/E;/EE/EH/EJ allows an application to control whether it
can be debugged or protected from observation. If after reset on6chip boot loader detects a valid
chec0sum in flash and reads D8JGHN E?;B from address D8BA$ in flash, debugging will be
disabled and thus the code in flash will be protected from observation. "nce debugging is
disabled, it can be enabled only by performing a full chip erase using the IS(.
@- E*!era$ I!err0p! Ip0!":

The %($;BEB/E;/EE/EH/EJ include up to nine edge or level sensitive 8ternal
Interrupt Inputs as selectable pin functions. )hen the pins are combined, e8ternal events can be
processed as four independent interrupt signals. The 8ternal Interrupt Inputs can optionally be
used to wa0e6up the processor from (ower6down mode. -dditionally capture input pins can also
be used as e8ternal interrupts without the option to wa0e the device up from (ower6down mode.
=- Memor) Mapp%. Co!ro$
The #emory #apping $ontrol alters the mapping of the interrupt vectors that appear
beginning at address D8DDDD DDDD. 'ectors may be mapped to the bottom of the on6chip flash
memory, or to the on6chip static R-#. This allows code running in different memory spaces to
have control of the interrupts.
8- Power Co!ro$
The %($;BEB/E;/EE/EH/EJ supports two reduced power modes. Idle mode and
(ower6down mode.

In Idle mode, e8ecution of instructions is suspended until either a reset or interrupt
occurs. (eripheral functions continue operation during idle mode and may generate interrupts to
cause the processor to resume e8ecution. Idle mode eliminates power used by the processor
itself, memory systems and related controllers, and internal buses.
In (ower6down mode, the oscillator is shut down and the chip receives no internal
cloc0s. The processor state and registers, peripheral registers, and internal SR-# values are
preserved throughout (ower6down mode and the logic levels of chip output pins remain static.
The (ower6down mode can be terminated and normal operation resumed by either a reset or
certain specific interrupts that are able to function without cloc0s. Since all dynamic operation of
the chip is suspended, (ower6down mode reduces chip power consumption to nearly zero.
Selecting an e8ternal ?; 0@z cloc0 instead of the ($%5 as a cloc06source for the on6chip RT$
will enable the microcontroller to have the RT$ active during (ower6down mode. (ower6down
current is increased with RT$ active. @owever, it is significantly lower than in Idle mode. -
(ower $ontrol for (eripherals feature allows individual peripherals to be turned off if they are
not needed in the application, resulting in additional power savings during active and Idle mode.
A- 1PB B'S:

The '(4 divider determines the relationship between the processor cloc0
1$$%52 and the cloc0 used by peripheral devices 1($%52. The '(4 divider serves two
purposes. The first is to provide peripherals with the desired ($%5 via '(4 bus so that they can
operate at the speed chosen for the -R# processor. In order to achieve this, the '(4 bus may be
slowed down to BW; to BWE of the processor cloc0 rate. 4ecause the '(4 bus must wor0 properly
at power6up 1and its timing cannot be altered if it does not wor0 since the '(4 divider control
registers reside on the '(4 bus2, the default condition at reset is for the '(4 bus to run at BWE of
the processor cloc0 rate. The second purpose of the '(4 divider is to allow power savings when
an application does not re9uire any peripherals to run at the full processor rate. 4ecause the '(4
divider is connected to the (%% output, the (%% remains active 1if it was running2 during Idle
mode.
69- Em0$a!%o ad De(0..%.:
The %($;BEB/E;/EE/EH/EJ support emulation and debugging via a OT-, serial port.
- trace port allows tracing program e8ecution. &ebugging and trace functions are multiple8ed
only with ,(I"s on (ort B. This means that all communication, timer and interface peripherals
residing on (ortD are available during the development and debugging phase as they are when
the application is run in the embedded system
66- Em(edded ICE

Standard -R# mbedded I$ logic provides on6chip debug support. The
debugging of the target system re9uires a host computer running the debugger software and an
mbedded I$ protocol converter. mbedded I$ protocol converter converts the remote debug
protocol commands to the OT-, data needed to access the -R# core.
The -R# core has a &ebug $ommunication $hannel 1&$$2 function built6in. The
&$$ allows a program running on the target to communicate with the host debugger or another
separate host without stopping the program flow or even entering the debug state. The &$$ is
accessed as a co6processor BE by the program running on the -R#GT&#I6S core. The &$$
allows the OT-, port to be used for sending and receiving data without affecting the normal
program flow. The &$$ data and control registers are mapped in to addresses in the mbedded
I$ logic.

6,- Em(edded Tra&e:
Since the %($;BEB/E;/EE/EH/EJ have significant amounts of on6chip memory, it is not possible
to determine how the processor core is operating simply by observing the e8ternal pins. The
mbedded Trace #acro cell 1T#2 provides real6time trace capability for deeply embedded
processor cores. It outputs information about processor e8ecution to the trace port. The T# is
connected directly to the -R# core and not to the main -#4- system bus. It compresses the
trace information and e8ports it through a narrow trace port. -n e8ternal trace port analyzer must
capture the trace information under software debugger control. Instruction trace 1or ($ trace2
shows the flow of e8ecution of the processor and provides a list of all the instructions that were
e8ecuted. Instruction trace is significantly compressed by only broadcasting branch addresses as
well as a set of status signals that indicate the pipeline status on a cycle by cycle basis. Trace
information generation can be controlled by selecting the trigger resource. Trigger resources
include address comparators, counters and se9uencers. Since trace information is compressed the
software debugger re9uires a static image of the code being e8ecuted. Self6modifying code can
not be traced because of this restriction.
63- Rea$ Mo%!or:
Real #onitor is a configurable software module, developed by -R# Inc., which enables real6
time debug. It is a lightweight debug monitor that runs in the bac0ground while users debug their
foreground application. It communicates with the host using the &$$, which is present in the
mbedded I$ logic. The %($;BEB/E;/EE/EH/EJ contains a specific configuration of Real
#onitor software programmed into the on6chip flash memory
IR SENSOR
This sensor can be used for most indoor applications where no important ambient light is present.
Aor simplicity, this sensor doesnFt provide ambient light immunity, but a more complicated, ambient light
ignoring sensor should be discussed in a coming article. @owever, this sensor can be used to measure the
speed of object moving at a very high speed, li0e in industry or in tachometers. In such applications,
ambient light ignoring sensor, which rely on sending ED 5hz pulsed signals cannot be used because there
are time gaps between the pulses where the sensor is FblindF.
The solution proposed doesnFt contain any special components, li0e photo6diodes, photo6
transistors, or IR receiver I$s, only a couple if IR leds, an "p amp, a transistor and a couple of resistors.
In need, as the title says, a standard IR led is used for the purpose of detection. &ue to that fact, the circuit
is e8tremely simple, and any novice electronics hobbyist can easily understand and build it.
"bject &etection using IR light.
It is the same principle in -%% Infra6Red pro8imity sensors. The basic idea is to send infra red
light through IR6%&s, which is then reflected by any object in front of the sensor.
Then all you have to do is to pic06up the reflected IR light. For de!e&!%. !+e re#$e&!ed IR $%.+!D
we are .o%. !o 0"e a <er) or%.%a$ !e&+%G0e: we are .o%. !o 0"e ao!+er IR/LED, to detect the IR
light that was emitted from another led of the e8act same typeX
This is an electrical property of %ight mitting &iodes 1%&s2 which is the fact that a led (roduce a
voltage difference across its leads when it is subjected to light. -s if it was a photo6cell, but with much
lower output current. In other words, the voltage generated by the leds canFt be 6 in any way 6 used to
generate electrical power from light, It can barely be detected. thatFs why as you will notice in the
schematic, we are going to use a "p6-mp 1operational -mplifier2 to accurately detect very small voltage
changes.
3.4 LIQUID CRYSTAL DISPLAY
%i9uid crystal displays 1%$&s2 have materials which combine the properties of both
li9uids and crystals. Rather than having a melting point, they have a temperature range within
which the molecules are almost as mobile as they would be in a li9uid, but are grouped together
in an ordered form similar to a crystal.
-n %$& consists of two glass panels, with the li9uid crystal material sand witched in
between them. The inner surface of the glass plates are coated with transparent electrodes which
define the character, symbols or patterns to be displayed polymeric layers are present in between
the electrodes and the li9uid crystal, which ma0es the li9uid crystal molecules to maintain a
defined orientation angle.
"ne each polarisers are pasted outside the two glass panels. These polarisers would rotate
the light rays passing through them to a definite angle, in a particular direction
)hen the %$& is in the off state, light rays are rotated by the two polarisers and the
li9uid crystal, such that the light rays come out of the %$& without any orientation, and hence
the %$& appears transparent.
)hen sufficient voltage is applied to the electrodes, the li9uid crystal molecules would be
aligned in a specific direction. The light rays passing through the %$& would be rotated by the
polarisers, which would result in activating / highlighting the desired characters.
The %$&s are lightweight with only a few millimeters thic0ness. Since the %$&s
consume less power, they are compatible with low power electronic circuits, and can be powered
for long durations.
The %$& s doesnt generate light and so light is needed to read the display. 4y using
bac0lighting, reading is possible in the dar0. The %$&s have long life and a wide operating
temperature range.
$hanging the display size or the layout size is relatively simple which ma0es the %$&s
more customer friendly.
The %$&s used e8clusively in watches, calculators and measuring instruments are the
simple seven6segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range. These have resulted in the %$&s being e8tensively used in
telecommunications and entertainment electronics. The %$&s have even started replacing the
cathode ray tubes 1$RTs2 used for the display of te8t and graphics, and also in small T'
applications.
This section describes the operation modes of %$&s then describe how to program and
interface an %$& to JDNB using -ssembly and $.
LCD OPERATION:
In recent years the %$& is finding widespread use replacing %& s 1seven6segment %& s or
other multi6segment %& s2.This is due to the following reasons.
B. The declining prices of %$&s.
;. The ability to display numbers, characters and graphics. This is in contrast to %& which
is limited to numbers and a few characters.
?. Incorporation of a refreshing controller into the %$&, there by relieving the $(* of the
tas0 of refreshing the %$&. In the case of %& s, they must be refreshed by the $(* to
0eep on displaying the data.
E. ase of programming for characters and graphics.
LCD PIN DESCRIPTION:
The %$& discussed in this section has BE pins. The function of each pin is given in table.
TABLE 1: Pin de!"i#$i%n &%" LCD

P% ")m(o$ I/O De"&r%p!%o
B 'ss 66 ,round
; 'cc 66 VN' power supply
? ' 66 (ower supply to
control contrast
E RS I RSYD to select
command register
RSYB to select
data register
N R/) I R/)YD for write
R/)YB for read
H I/" nable
G &4D I/" The J6bit data bus
J &4B I/" The J6bit data bus
C &4; I/" The J6bit data bus
BD &4? I/" The J6bit data bus
BB &4E I/" The J6bit data bus
B; &4N I/" The J6bit data bus
B? &4H I/" The J6bit data bus
BE &4G I/" The J6bit data bus

The %$& can display a character successfully by placing the
B. &ata in &ata Register
;. $ommand in $ommand Register of %$&
B. &ata corresponds to the -S$II value of the character to be printed. This can be done by
placing the -S$II value on the %$& &ata lines and selecting the &ata Register of the
%$& by selecting the RS 1Register Select2 pin.
;. ach and every display location is accessed and controlled by placing respective
command on the data lines and selecting the $ommand Register of %$& by selecting the
1Register Select2 RS pin.
The commonly used commands are shown below with their operations.
TABLE ,: LCD Commad Code"
Code 7+e*; Commad !o LCD I"!r0&!%o Re.%"!er
B $lear display screen
; Return home
E &ecrement cursor
H Increment cursor
N Shift display right
G Shift display left
J &isplay off, cursor off
- &isplay off, cursor on
$ &isplay on, cursor off
&isplay on, cursor on
A &isplay on, cursor blin0ing
BD Shift cursor position to left
BE Shift cursor position to right
BJ Shift the entire display to the left
B$ Shift the entire display to the right
JD Aorce cursor to beginning of B
st
line
$D Aorce cursor to beginning of ;
nd
line
?J ; lines and N8G matri8

USES:
The %$&s used e8clusively in watches, calculators and measuring instruments are the
simple seven6segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range. These have resulted in the %$&s being e8tensively used in
telecommunications and entertainment electronics.
So in this project, the %$& is used to display the instantaneous
information. The information may be prompting or alerting or instructing the user.
MOTOR DRI1ER
H/BRIDGE:
&$ motors are typically controlled by using a transistor configuration called an >@6bridge>. This
consists of a minimum of four mechanical or solid6state switches, such as two !(! and two (!(
transistors. "ne !(! and one (!( transistor are activated at a time. 4oth !(! and (!( transistors can
be activated to cause a short across the motor terminals, which can be useful for slowing down the motor
from the bac0 #A it creates.
Basic Theory
@6bridge. Sometimes called a >full bridge> the @6bridge is so named because it has four
switching elements at the >corners> of the @ and the motor forms the cross bar. The 0ey fact to note is that
there are, in theory, four switching elements within the bridge. These four elements are often called, high
side left, high side right, low side right, and low side left 1when traversing in cloc0wise order2.
The switches are turned on in pairs, either high left and lower right, or lower left and high
right, but never both switches on the same >side> of the bridge. If both switches on one side of a
bridge are turned on it creates a short circuit between the battery plus and battery minus
terminals. If the bridge is sufficiently powerful it will absorb that load and your batteries will
simply drain 9uic0ly. *sually however the switches in 9uestion melt.
To power the motor, you turn on two switches that are diagonally opposed. In the picture
to the right, imagine that the high side left and low side right switches are turned on. The current
flows and the motor begins to turn in a >positive> direction. Turn on the high side right and low
side left switches, then $urrent flows the other direction through the motor and the motor turns
in the opposite direction.
-ctually it is just that simple, the tric0y part comes in when you decide what to use for
switches. -nything that can carry a current will wor0, from four S(ST switches, one &(&T
switch, relays, transistors, to enhancement mode power #"SATs.
"ne more topic in the basic theory section, 9uadrants. If each switch can be controlled
independently then you can do some interesting things with the bridge, some fol0s call such a
bridge a >four 9uadrant device> 1E:& get itQ2. If you built it out of a single &(&T relay, you can
really only control forward or reverse. +ou can build a small truth table that tells you for each of
the switchFs states, what the bridge will do. -s each switch has one of two states, and there are
four switches, there are BH possible states. @owever, since any state that turns both switches on
one side on is >bad> 1smo0e issues forth. (2, there are in fact only four useful states 1the four
9uadrants2 where the transistors are turned on.
H%.+ S%de Le#!
H%.+ S%de
R%.+!
Low S%de
Le#!
Low S%de
R%.+!
H0adra! De"&r%p!%o
"n "ff "ff "n Aorward Running
"ff "n "n "ff 4ac0ward Running
"n "n "ff "ff 4ra0ing
"ff "ff "n "n 4ra0ing
The last two rows describe a maneuver where you >short circuit> the motor which causes
the motors generator effect to wor0 against itself. The turning motor generates a voltage which
tries to force the motor to turn the opposite direction. This causes the motor to rapidly stop
spinning and is called >bra0ing> on a lot of @6bridge designs."f course there is also the state
where all the transistors are turned off. In this case the motor coasts freely if it was spinning and
does nothing if it was doing nothing.
Implementation
B. *sing Relays:
- simple implementation of an @ 4ridge using four S(ST relays is shown. Terminal - is
@igh Side %eft, Terminal 4 is @igh Side Right, Terminal $ is %ow Side %eft and
Terminal & is %ow Side Right. The logic followed is according to the table above.
)arning. !ever turn on - and $ or 4 and & at the same time. This will lead to a short circuit of
the battery and will lead to failure of the relays due to the large current.
,- '"%. Tra"%"!or":
)e can better control our motor by using transistors or Aield ffect Transistors 1ATs2.
#ost of what we have discussed about the relays @64ridge is true of these circuits. See
the diagram showing how they are connected. +ou should add diodes across the
transistors to catch the bac0 voltage that is generated by the motorFs coil when the power
is switched on and off. This fly bac0 voltage can be many times higher than the supply
voltageX
Aor information on building an @64ridge using Transistors, have a loo0 here.
)arning: If you donFt use diodes, you could burn out your transistors. -lso the same
warning as in the diode case. &onFt turn on - and $ or 4 and & at the same time.
Transistors, being a semiconductor device, will have some resistance, which causes them
to get hot when conducting much current. This is called not being able to sin0 or source
very much power, i.e.. !ot able to provide much current from ground or from plus
voltage.
#osfets are much more efficient, they can provide much more current and not get as hot.
They usually have the fly bac0 diodes built in so you donFt need the diodes anymore. This
helps guard against fly bac0 voltage frying your I$s.
To use #osfets in an @64ridge, you need (6$hannel #osfets on top because they can
>source> power, and !6$hannel #osfets on the bottom because then can >sin0> power.
It is important that the four 9uadrants of the @64ridge circuits be turned on and off
properly. )hen there is a path between the positive and ground side of the @64ridge,
other than through the motor, a condition e8ists called >shoot through>. This is basically a
direct short of the power supply and can cause semiconductors to become ballistic, in
circuits with large currents flowing. There are @6bridge chips available that are much
easier, and safer, to use than designing your own @64ridge circuit.
B. *sing @64ridge &evices
The %;C? has ; @64ridges 1actually E @alf @64ridges2, can provide about B amp to each
and occasional pea0 loads to ; amps.
The %;CJ has ; h6bridges on board, can handle Bamp and pea0 current draws to about
?amps. The %#&BJ;DD has one h6bridge on board, can handle about ; or ? amps and can
handle a pea0 of about H amps. There are several more commercially designed @64ridge
chips as well.
"nce a @alf @6bridge is enabled, it truth table is as follows.
INP'T
A
O'TP'T
Y
% %
@ @
So you just give a @igh level when you want to turn the @alf @64ridge on and %ow level
when you want to turn it off. )hen the @alf @64ridge is on, the voltage at the output is
e9ual to 'cc;.If you want to ma0e a Aull @64ridge, you connect the motor 1or the load2
between the outputs of two @alf @64ridges and the inputs will be the two inputs of the
@alf @64ridges.
Suppose we have connected @alf @64ridges B and ; to form a Aull @64ridge. !ow the
truth table is as follows.
INP'T
6A
INP'T
,A
O'TP'T
6Y
O'TP'T
,Y
De"&r%p!%o
% % % %
4ra0ing 1both terminals of
motor are ,nd2
% @ % @ Aorward Running
@ % @ % 4ac0ward Running
@ @ @ @
4ra0ing 1both terminals of
motor at 'cc;
2) L293D Motor Driver IC:
Since two motors are used to drive The bac0 wheels of the robot independently, there is a need
for Two @6bridges. Instead of implementing the above @6bridge control$ircuit twice, an alternative is to
use an integrated circuit 1I$2, which (rovides more than one @6bridges. "ne such I$ is %;C?&, which has
; @64ridges in it. It can supply HDDMa continuous and B.;A pea0 $urrents. It is suitable for switching
applications up to N kHz. These Aeatures ma0e it ideal for our application. -nother option is to use I$
%;CJ, which can drive ;A continually and ?A pea0 currents. The &iagram of %;C?& is shown in Aigure
;It can be observed from the figure that %;C?& has a similar configuration to the circuit in
F%.0re 6
3) Mo!or Dr%<er Coe&!%o": The motor driver re9uires ; control inputs for each motor. Since we drive
; motors, we need E controls
Inputs from the microcontroller. Since it has many pins which can be configured as outputs, there
are many options for implementation.Aor e8ample, in our robot the last E bits of (ort 4 1R4E, R4N,
R4H,R4G 6 (ins ?G to ED2 are used to control the rotation direction of the motors . The enable pins of the
motor driver are connected to the ()# outputs of the microcontroller 1(ins BHand BG2. This is because,
as was mentioned above, by changing the width of the pulse 1implying changing the enable time of the
driver2 one can change the speed of the motor. The truth table for motor driver is as shown in Table II,
where @ Y high, % Y low, and L Yhigh output impedance state.
Since the motors are reverse aligned, in order to have the robot #ove forward they must be
configured such that one of them turns forward and the other one turns bac0ward. In case of any
re9uirement for the robot to move bac0ward, it is sufficient to just reverse the
T@ TR*T@ T-4% "A T@ #"T"R &RI'R
&RI'R $"!TR"% I!(*TS
"utputs of the control pins. Aor e8ample, in our robot while moving forward, inputs of the motor
driver have states shown in the first row "f Table III, whereas for bac0ward movement, the states shown
in the second row of Table III is applied.
DC Mo!or :
&$ motors are configured in many types and sizes, including brush less, servo, and gear motor
types. - motor consists of a rotor and a permanent magnetic field stator. The magnetic field is maintained
using either permanent magnets or electromagnetic windings. &$ motors are most commonly used in
variable speed and tor9ue.
#otion and controls cover a wide range of components that in some way are used to generate
and/or control motion. -reas within this category include bearings and bushings, clutches and bra0es,
input enable output
@ @ @
% @ %
@ % z
% % z
&irection Input B Input ; Input ? Input E
Aorward @ % % @
4ac0ward % @ @ %
controls and drives, drive components, encoders and resolves, Integrated motion control, limit switches,
linear actuators, linear and rotary motion components, linear position sensing, motors 1both -$ and &$
motors2, orientation position sensing, pneumatics and pneumatic components, positioning stages, slides
and guides, power transmission 1mechanical2, seals, slip rings, solenoids, springs.
#otors are the devices that provide the actual speed and tor9ue in a drive system. This family
includes -$ motor types 1single and multiphase motors, universal, servo motors, induction, synchronous,
and gear motor2 and &$ motors 1brush less, servo motor, and gear motor2 as well as linear, stepper and air
motors, and motor contactors and starters.
In any electric motor, operation is based on simple electromagnetism. - current6carrying
conductor generates a magnetic fieldK when this is then placed in an e8ternal magnetic field, it will
e8perience a force proportional to the current in the conductor, and to the strength of the e8ternal
magnetic field. -s you are well aware of from playing with magnets as a 0id, opposite 1!orth and South2
polarities attract, while li0e polarities 1!orth and !orth, South and South2 repel. The internal
configuration of a &$ motor is designed to harness the magnetic interaction between a current6carrying
conductor and an e8ternal magnetic field to generate rotational motion.
%etFs start by loo0ing at a simple ;6pole &$ electric motor 1here red represents a magnet or
winding with a >!orth> polarization, while green represents a magnet or winding with a >South>
polarization2.
Aig ;N. 4loc0 &iagram of the &$ motor
very &$ motor has si8 basic parts 66 a8le, rotor 1a.0.a., armature2, stator, commutator, field
magnet1s2, and brushes. In most common &$ motors 1and all that 4eamers will see2, the e8ternal
magnetic field is produced by high6strength permanent magnets
B
. The stator is the stationary part of the
motor 66 this includes the motor casing, as well as two or more permanent magnet pole pieces. The rotor
1together with the a8le and attached commutator2 rotates with respect to the stator. The rotor consists of
windings 1generally on a core2, the windings being electrically connected to the commutator. The above
diagram shows a common motor layout 66 with the rotor inside the stator 1field2 magnets.
The geometry of the brushes, commutator contacts, and rotor windings are such that
when power is applied, the polarities of the energized winding and the stator magnet1s2 are
misaligned, and the rotor will rotate until it is almost aligned with the statorFs field magnets. -s
the rotor reaches alignment, the brushes move to the ne8t commutator contacts, and energize the
ne8t winding. ,iven our e8ample two6pole motor, the rotation reverses the direction of current
through the rotor winding, leading to a >flip> of the rotorFs magnetic field, and driving it to
continue rotating.
In real life, though, &$ motors will always have more than two poles 1three is a very common
number2. In particular, this avoids >dead spots> in the commutator. +ou can imagine how with our
e8ample two6pole motor, if the rotor is e8actly at the middle of its rotation 1perfectly aligned with the
field magnets2, it will get >stuc0> there. #eanwhile, with a two6pole motor, there is a moment where the
commutator shorts out the power supply 1i.e., both brushes touch both commutator contacts
simultaneously2. This would be bad for the power supply, waste energy, and damage motor components
as well. +et another disadvantage of such a simple motor is that it would e8hibit a high amount of tor9ueT
ripple> 1the amount of tor9ue it could produce is cyclic with the position of the rotor2.
Aig ;H. 4loc0 &iagram of the &$ motor having two poles only
So since most small &$ motors are of a three6pole design, letFs tin0er with the wor0ings of one
via an interactive animation 1OavaScript re9uired2.
Aig ;G. 4loc0 &iagram of the &$ motor having Three poles
+ouFll notice a few things from this 66 namely, one pole is fully energized at a time 1but two others
are >partially> energized2. -s each brush transitions from one commutator contact to the ne8t, one coilFs
field will rapidly collapse, as the ne8t coilFs field will rapidly charge up 1this occurs within a few
microsecond2. )eFll see more about the effects of this later, but in the meantime you can see that this is a
direct result of the coil windingsF series wiring.
Aig ;J. Internal 4loc0 &iagram of the Three pole &$ motor
ThereFs probably no better way to see how an average dc motor is put together, than by just
opening one up. *nfortunately this is tedious wor0, as well as re9uiring the destruction of a perfectly
good motor. This is a basic ?6pole dc motor, with ; brushes and three commutator contacts.
GLOBAL SYSTEM FOR MOBILE COMM'NICATIONS
De#%%!%o:
,lobal system for mobile communication 1,S#2 is a globally accepted standard for digital
cellular communication. ,S# is the name of a standardization group established in BCJ; to
create a common uropean mobile telephone standard that would formulate specifications for a
pan6uropean mobile cellular radio system operating at CDD #@z. It is estimated that many
countries outside of urope will join the ,S# partnership.
De"&r%p!%o:
,S#, the ,lobal System for #obile communications, is a digital cellular communications
system, which has rapidly gained acceptance and mar0et share worldwide, although it was
initially developed in a uropean conte8t. In addition to digital transmission, ,S# incorporates
many advanced services and features, including IS&! compatibility and worldwide roaming in
other ,S# networ0s. The advanced services and architecture of ,S# have made it a model for
future third6generation cellular systems, such as *#TS. This paper will give an overview of the
services offered by ,S#, the system architecture, the radio transmission
F%. 6:: "!r0&!0re o# a GSM e!worF
GSM Modem"
- ,S# modem can be an e8ternal modem device, such as the )avecom A-STR-$5 #odem.
Insert a ,S# SI# card into this modem, and connect the modem to an available serial port on
your computer.
- ,S# modem can be a ($ $ard installed in a noteboo0 computer, such as the !o0ia $ard
(hone.
- ,S# modem could also be a standard ,S# mobile phone with the appropriate cable and
software driver to connect to a serial port on your computer. (hones such as the !o0ia GBBD with
a &%R6? cable, or various ricsson phones, are often used for this purpose.
- dedicated ,S# modem 1e8ternal or ($ $ard2 is usually preferable to a ,S# mobile phone.
This is because of some compatibility issues that can e8ist with mobile phones. Aor e8ample, if
you wish to be able to receive inbound ##S messages with your gateway, and you are using a
mobile phone as your modem, you must utilize a mobile phone that does not support )-( push
or ##S. This is because the mobile phone automatically processes these messages, without
forwarding them via the modem interface. Similarly some mobile phones will not allow you to
correctly receive S#S te8t messages longer than BHD bytes 10nown as Sconcatenated S#ST or
Slong S#ST2. This is because these long messages are actually sent as separate S#S messages,
and the phone attempts to reassemble the message before forwarding via the modem interface.
1)eve observed this latter problem utilizing the ricsson R?JD, while it does not appear to be a
problem with many other ricsson models.2
)hen you install your ,S# modem, or connect your ,S# mobile phone to the computer, be
sure to install the appropriate )indows modem driver from the device manufacturer. To simplify
configuration, the !ow S#S/##S ,ateway will communicate with the device via this driver.
-n additional benefit of utilizing this driver is that you can use )indows diagnostics to ensure
that the modem is communicating properly with the computer.
The !ow S#S/##S gateway can simultaneously support multiple modems, provided that your
computer hardware has the available communications port resources.
Aig.BH ,S# smart modem
SMART MODEM 7GSM/GPRS; SMART MODEM 7GSM/GPRS;
INTROD'CTION:
-nalogics ,S# Smart #odem is a multi6functional, ready to use, rugged and versatile modem
that can be embedded or plugged into any application. The Smart #odem can be customized to
various applications by using the standard -T commands. The modem is fully type6approved and
can directly be integrated into your projects with any or all the features of 'oice, &ata, Aa8,
S#S, and Internet etc.
Smart #odem 0it contain the following items.
-nalogics ,S#/,(RS Smart #odem
S#(S based power supply adapter.
? d4i antenna with cable 1optional. other types2
&ata cable 1RS;?;2
*ser #anual
I"!a$$%. !+e modem:
To install the modem, plug the device on to the supplied S#(S -dapter. Aor -utomotive
applications fi8 the modem permanently using the mounting slots 1optional as per your
re9uirement dimensions2.
I"er!%./ Remo<%. !+e SIM Card:
To insert or Remove the SI# $ard, it is necessary to press the SI# holder ejector button with
Sharp edged object li0e a pen or a needle. )ith this, the SI# holder comes out a little, then pulls
it out and insert or remove the SI# $ard
#a0e sure that the ejector is pushed out completely before accessing the SI# $ard holder do not
remove the SI# card holder by force or tamper it 1it may permanently damage2. (lace the SI#
$ard (roperly as per the direction of the installation. It is very important that the SI# is placed
in the right direction for its proper wor0ing condition
Coe&!%. E*!era$ A!ea:
$onnect ,S# Smart #odem to the e8ternal antenna with cable end with S#- male. The
Are9uency of the antenna may be ,S# CDD/BJDD #@z. The antenna may be 1 D dbi, ? dbi or
short length %6type antenna2 as per the field conditions and signal conditions.
DC S0pp$) Coe&!%o
The #odem will automatically turn "! when connection is given to it. The following is the
(ower Supply Re9uirement.
Coe&!%. Modem !o e*!era$ de<%&e":
RS;?; can be used to connect to the e8ternal device through the &6S*4/ *S4 1for *S4 model
only2 device that is provided in the modem.
Coe&!or":
Coe&!or F0&!%o
S#- RA -ntenna connector
BN pin or C pin &6S*4 *S4 1optional2 RS;?; lin0 -udio lin0 1only for BN &6
S*42 Reset 1only for BN &6S*42 *S4
communication port 1optional2
; pin (hoeni8
tm
(ower Supply $onnector
SI# $onnector SI# $ard $onnection
ROBB 1Aor C &6S*4 and *S4 only2 -udio lin0 Simple hand set connection
1E wire2 ; wire des0top phone
(arameters #I! -vg #a8
Supply 'oltage N ' C ' B; '
(ea0 $urrent at N ' supply B.J - 1during
transmission2
-verage $urrent at N ' supply in idle
#ode
?N m-
-verage $urrent at N ' supply in idle
#ode and RS;?; (ower Saving
-ctivated
B? m-
connection
De"&r%p!%o o# !+e %!er#a&e":
The modem comprises several interfaces.
%& Aunction including operating Status
8ternal antenna 1via S#-2
Serial and control lin0
(ower Supply 1'ia ; pin (hoeni8
tm
contact2
SI# card holder
LED S!a!0" Id%&a!or:
The %& will indicate different status of the modem.
"AA #odem Switched off
"! #odem is connecting to the networ0
Alashing Slowly #odem is in idle mode
Alashing rapidly #odem is in transmission/communication 1,S# only2
A / PIN D/S'B Fema$e Coe&!or
(I! !-# &esignation Type
B < !one !$ !$
; T< Transmit &ata Input
? R8 Receive &ata "utput
E &SR &ata Set Ready "utput
N ,!& ,round ,round
H &TR &ata Terminal Ready Input
G $TS $lear to send "utput
J RTS Re9uest to send Input
C < !one !$ !$
Pro!e&!%. Modem:
&o not e8pose to the modem to e8treme conditions such as @igh temperatures, direct sunlight, @igh
@umidity, Rain, $hemicals, )ater, &ust etc. Aor these details see the specifications given.
&o not drop, Sha0e or hit the #odem. 1)arranty may void2
The #odem should not be used in e8treme vibrating conditions
@andle the -ntenna and cable with care.
AT &ommad" #ea!0re":
L%e "e!!%.":
- serial lin0 handler is set with the following default values -utobaud, J bits data, B stop bit, no parity,
flow control.
Commad $%e
$ommands always start with -T 1which means attention2 and finish with a Z$R[ character.
I#orma!%o re"po"e" ad re"0$! &ode"
Responses start and end with Z$R[Z%A[,.
If command synta8 is incorrect, an RR"R string is returned.
If command synta8 is correct but with some incorrect parameters, the V$# RR"R. Zrr[ or V$#S
RR"R. ZSmsrr[ strings are returned with different error codes.
If the command line has been performed successfully, an "5 string is returned.
In some cases, such as S-TV$(I!QT or 1unsolicited2 incoming events, the product does not return the "5
string as a response.
Ser<%&e" pro<%ded () GSM
,S# was designed having interoperability with IS&! in mind, and the services provided by ,S# are a
subset of the standard IS&! services. Speech is the most basic, and most important, teleservice provided
by ,S#.
In addition, various data services are supported, with user bit rates up to CHDD bps. Specially e9uipped
,S# terminals can connect with (ST!, IS&!, (ac0et Switched and $ircuit Switched (ublic &ata
!etwor0s, through several possible methods, using synchronous or asynchronous transmission. -lso
supported are ,roup ? facsimile service, videote8, and telete8. "ther ,S# services include a cell
broadcast service, where messages such as traffic reports, are broadcast to users in particular cells.
- service uni9ue to ,S#, the Short #essage Service, allows users to send and receive point6to6point
alphanumeric messages up to a few tens of bytes. It is similar to paging services, but much more
comprehensive, allowing bi6directional messages, store6and6forward delivery, and ac0nowledgement of
successful delivery.
Supplementary services enhance the set of basic teleservices. In the (hase I specifications, supplementary
services include variations of call forwarding and call barring, such as $all Aorward on 4usy or 4arring
of "utgoing International $alls. #any more supplementary services, including multiparty calls, advice of
charge, call waiting, and calling line identification presentation will be offered in the (hase ;
specifications.
A"!'i$e!$("e %& $'e )SM ne$*%"+
- ,S# networ0 is composed of several functional entities, whose functions and interfaces are specified.
Aigure B shows the layout of a generic ,S# networ0. The ,S# networ0 can be divided into three broad
parts. The #obile Station is carried by the subscriber. The 4ase Station Subsystem controls the radio lin0
with the #obile Station. The !etwor0 Subsystem, the main part of which is the #obile services
Switching $enter 1#S$2, performs the switching of calls between the mobile users, and between mobile
and fi8ed networ0 users. The #S$ also handles the mobility management operations. !ot shown are the
"perations
- ,S# networ0 is composed of several functional entities, whose functions and interfaces are specified.
Aigure B shows the layout of a generic ,S# networ0. The ,S# networ0 can be divided into three broad
parts. Subscriber carries the #obile Station. The 4ase Station Subsystem controls the radio lin0 with the
#obile Station. The !etwor0 Subsystem, the main part of which is the #obile services Switching $enter
1#S$2, performs the switching of calls between the mobile users, and between mobile and fi8ed networ0
users. The #S$ also handles the mobility management operations. !ot shown is the "perations
intendance $enter, which oversees the proper operation and setup of the networ0. The #obile Station and
the 4ase Station Subsystem communicate across the *m interface, also 0nown as the air interface or radio
lin0. The 4ase Station Subsystem communicates with the #obile services Switching $enter across the -
interface.
Aig ;D. ,eneral architecture of a ,S# networ0
Mo(%$e S!a!%o:
The mobile station 1#S2 consists of the mobile e9uipment 1the terminal2 and a smart card called the
Subscriber Identity #odule 1SI#2. The SI# provides personal mobility, so that the user can have access
to subscribed services irrespective of a specific terminal. 4y inserting the SI# card into another ,S#
terminal, the user is able to receive calls at that terminal, ma0e calls from that terminal, and receive other
subscribed services.
The mobile e9uipment is uni9uely identified by the International #obile 9uipment Identity 1I#I2. The
SI# card contains the International #obile Subscriber Identity 1I#SI2 used to identify the subscriber to
the system, a secret 0ey for authentication, and other information. The I#I and the I#SI are
independent, thereby allowing personal mobility. The SI# card may be protected against unauthorized
use by a password or personal identity number.
Ba"e S!a!%o S0(")"!em:
The 4ase Station Subsystem is composed of two parts, the 4ase Transceiver Station 14TS2 and the 4ase
Station $ontroller 14S$2. These communicate across the standardized -bis interface, allowing 1as in the
rest of the system2 operation between components made by different suppliers.
The 4ase Transceiver Station houses the radio transceivers that define a cell and handles the radio6lin0
protocols with the #obile Station. In a large urban area, there will potentially be a large number of 4TSs
deployed, thus the re9uirements for a 4TS are ruggedness, reliability, portability, and minimum cost.
The 4ase Station $ontroller manages the radio resources for one or more 4TSs. It handles radio6channel
setup, fre9uency hopping, and handovers, as described below. The 4S$ is the connection between the
mobile station and the #obile service Switching $enter 1#S$2.
Netor! "u#system
The central component of the !etwor0 Subsystem is the #obile services Switching $enter 1#S$2. It acts
li0e a normal switching node of the (ST! or IS&!, and additionally provides all the functionality needed
to handle a mobile subscriber, such as registration, authentication, location updating, handovers, and call
routing to a roaming subscriber. These services are provided in conjunction with several functional
entities, which together form the !etwor0 Subsystem. The #S$ provides the connection to the fi8ed
networ0s 1such as the (ST! or IS&!2. Signalling between functional entities in the !etwor0 Subsystem
uses Signalling System !umber G 1SSG2, used for trun0 signalling in IS&! and widely used in current
public networ0s.
The @ome %ocation Register 1@%R2 and 'isitor %ocation Register 1'%R2, together with the #S$,
provide the call6routing and roaming capabilities of ,S#. The @%R contains all the administrative
information of each subscriber registered in the corresponding ,S# networ0, along with the current
location of the mobile. The location of the mobile is typically in the form of the signalling address of the
'%R associated with the mobile as a distributed database. station. The actual routing procedure will be
described later. There is logically one @%R per ,S# networ0, although it may be implemented
The 'isitor %ocation Register 1'%R2 contains selected administrative information from the @%R,
necessary for call control and provision of the subscribed services, for each mobile currently located in
the geographical area controlled by the '%R. -lthough each functional entity can be implemented as an
independent unit, all manufacturers of switching e9uipment to date implement the '%R together with the
#S$, so that the geographical area controlled by the #S$ corresponds to that controlled by the '%R,
thus simplifying the signalling re9uired. !ote that the #S$ contains no information about particular
mobile stations 666 this information is stored in the location registers.
The other two registers are used for authentication and security purposes. The 9uipment Identity
Register 1IR2 is a database that contains a list of all valid mobile e9uipment on the networ0, where each
mobile station is identified by its International #obile 9uipment Identity 1I#I2. -n I#I is mar0ed as
invalid if it has been reported stolen or is not type approved. The -uthentication $enter 1-u$2 is a
protected database that stores a copy of the secret 0ey stored in each subscriberFs SI# card, which is used
for authentication and encryption over the radio channel.
DM,4LS-44
O!$./ 30STATE B(&&e"1Line D"i2e"1Line Re!ei2e"
)ene"./ De!"i#$i%n
These buffers/line drivers are designed to improve both the performance and ($ board density of ?6
ST-T buffers/ drivers employed as memory6address drivers, cloc0 drivers,
and bus6oriented transmitters/receivers. Aeaturing EDD m' of hysteresis at each low current (!( data line
input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated
lines down to B?? ohms.
Fea!0re"
?6ST-T outputs drive bus lines directly
(!( inputs reduce &$ loading on bus lines
@ysteresis at data inputs improves noise margins
Typical I"% 1sin0 current2 ;E m-
Typical I"@ 1source current2 \BN m-
Typical propagation delay times
Inverting BD.N ns
!oninverting B; ns
Typical enable/disable time BJ ns
Typical power dissipation 1enabled2
Inverting B?D m)
!oninverting B?N m)

GLOBAL POSITION SYSTEM
A(o0! GPS
,lobal (ositioning System 1,(S2 technology is changing the way we wor0 and play. +ou can use
,(S technology when you are driving, flying, fishing, sailing, hi0ing, running, bi0ing, wor0ing, or
e8ploring. )ith a ,(S receiver, you have an amazing amount of information at your fingertips. @ere are
just a few e8amples of how you can use ,(S technology.
5now precisely how far you have run and at what pace while trac0ing your path so you can find
your way home.
(inpoint the perfect fishing spot on the water and easily relocate it.
,et the closest location of your favorite restaurant when you are out6of6town.
Aind the nearest airport or identify the type of airspace in which you are flying
W+a! %" GPS5
The ,lobal (ositioning System 1,(S2 is a satellite6based navigation system that sends and
receives radio signals. - ,(S receiver ac9uires these signals and provides you with information. *sing
,(S technology, you can determine location, velocity, and time, ;E hours a day, in any weather conditions
anywhere in the world=for free.
,(S, formally 0nown as the !-'ST-R 1!avigation Satellite Timing and Ranging2. ,lobal (ositioning
System originally was developed for the military. 4ecause of its popular navigation capabilities and
because you can access ,(S technology using small, ine8pensive e9uipment, the government made the
system available for civilian use. The *S- owns ,(S technology and the &epartment of &efense
maintains it.
,(S technology re9uires the following three segments.
Space segment.
$ontrol segment.
*ser segment
Spa&e Se.me!
-t least ;E ,(S satellites orbit the earth twice a day in a specific pattern. They travel at
appro8imately G,DDD miles per hour about B;,DDD miles above the earths surface. These satellites are
spaced so that a ,(S receiver anywhere in the world can receive signals from at least four of them.
ach ,(S satellite constantly sends coded radio signals 1pseudorandom code) to the earth. These
,(S satellite signals contain the following information.
The particular satellite that is sending the information.
)here that satellite should be at any given time 1the precise location of the satellite is. called
ephemeris data2.
)hether or not the satellite is wor0ing properly.
The date and time that the satellite sent the signal.
The signals can pass through clouds, glass, and plastic. #ost solid objects such as buildings
attenuate 1decrease the power of2 the signals. The signals cannot pass through objects that contain a lot of
metal or objects that contain water 1such as underwater locations2. The ,(S satellites are powered by solar
energy. If solar energy is unavailable, for e8ample, when the satellite is in the earths shadow, satellites use
bac0up batteries to continue running. ach ,(S satellite is built to last about BD years. The &epartment of
&efense monitors and the satellites to ensure that ,(S technology continues to run smoothly for years to
come.
F%.6,: GPS MODEM
Co!ro$ Se.me!
The control segment is responsible for constantly monitoring satellite health, signal integrity, and
orbital configuration from the ground control segment includes the following sections.
#aster control station
#onitor stations
,round antennas
Mo%!or S!a!%o"
-t least si8 unmanned monitor stations are located around the world. ach station constantly
monitors and receives information from the ,(S satellites and then sends the orbital and cloc0 information
to the master control station 1#$S2.
Ma"!er Co!ro$ S!a!%o 7MCS;
The #$S2 is located near $olorado Springs in $olorado. The #$S constantly receives ,(S
satellite orbital and cloc0 information from monitor stations. The controllers in the #$S ma0e precise
corrections to the data as necessary, and send the information 10nown as ephemeris data2 to the ,(S
satellites using the ground antennas.
Gro0d A!ea"
,round antennas receive the corrected orbital and cloc0 information from the #$S, and then send
the corrected information to the appropriate satellites.
'"er Se.me!
The ,(S user segment consists of your ,(S receiver. +our receiver collects and processes signals
from the ,(S satellites that are in view and then uses that information to determine and display your
location, speed, time, and so forth. +our ,(S receiver does not transmit any information bac0 to the
satellites.
How Doe" GPS Te&+o$o.) WorF5
The following points provide a summary of the technology at wor0.
The control segment constantly monitors the ,(S constellation and uploads information to
satellites to provide ma8imum user accuracy
+our ,(S receiver collects information from the ,(S satellites that are in view.
+our ,(S receiver accounts for errors. Aor more information, refer to the Sources of rrors.
+our ,(S receiver determines your current location, velocity, and time.
+our ,(S receiver can calculate other information, such as bearing, trac0, trip distance, and
distance to destination, sunrise and sunset time so forth.
+our ,(S receiver displays the applicable information on the screen.
W+o '"e" GPS5
,(S technology has many amazing applications on land, at sea, and in the air. +ou might be
surprised to learn about the following e8amples of how people or professions are already using ,(S
technology
A.r%&0$!0re
In precision farming, ,(S technology helps monitor the application of fertilizer and pesticides.
,(S technology also provides location information that helps farmers plow, harvest, map fields, and mar0
areas of disease or weed infestation.
A<%a!%o
-ircraft pilots use ,(S technology for en route navigation and airport approaches. Satellite navigation
provides accurate aircraft location anywhere on or near the earth.
E<%rome!
,(S technology helps survey disaster areas and maps the movement of environmental phenomena
1such as forest fires, oil spills, or hurricanes2. It is even possible to find locations that have been submerged
or altered by natural disasters.
Gro0d Tra"por!a!%o
,(S technology helps with automatic vehicle location and in6vehicle navigation systems. #any
navigation systems show the vehicles location on an electronic street map, allowing drivers to 0eep trac0
of where they are and to loo0 up other destinations. Some systems automatically create a route and give
turn6by6turn directions. ,(S technology also helps monitor and plan routes for delivery vans and
emergency vehicles.
Mar%e
,(S technology helps with marine navigation, traffic routing, underwater surveying, navigational
hazard location, and mapping. $ommercial fishing fleets use it to navigate to optimum fishing locations
and to trac0 fish migrations.
M%$%!ar)
#ilitary aircraft, ships, submarines, tan0s, jeeps, and e9uipment use ,(S technology for many
purposes including basic navigation, target designation, close air support, weapon technology, and
rendezvous.
P0($%& Sa#e!)
mergency and other specialty fleets use satellite navigation for location and status information.
Ra%$
(recise 0nowledge of train location is essential to prevent collisions, maintain smooth traffic flow, and
minimize costly delays. &igital maps and onboard inertial units allow fully6automated train control.
Re&rea!%o
"utdoor and e8ercise enthusiasts use ,(S technology to stay apprised of location, heading,
bearing, speed, distance, and time. In addition, they can accurately mar0 and record any location and return
to that precise spot.
Spa&e
,(S technology helps trac0 and control satellites in orbit. Auture booster roc0ets and reusable
launch vehicles will launch, orbit the earth. Return, and land, all under automatic control. Space shuttles
also use ,(S navigation.
S0r<e)%.
Surveyors use ,(S technology for simple tas0s 1such as defining property lines2 or for comple8 tas0s
1such as building infrastructures in urban centers2. %ocating a precise point of reference used to be very
time consuming. )ith ,(S technology, two people can survey dozens of control points in an hour.
Surveying and mapping roads and rail systems can also be accomplished from mobile platforms to save
time and money.
T%m%.
&elivering precise time to any user is one of the most important functions of ,(S technology. This
technology helps synchronize cloc0s events around the world. (ager companies depend on ,(S satellites
to synchronize the transmission of information throughout their systems. Investment ban0ing firms rely on
this service every day to record international transactions simultaneously.
How A&&0ra!e I" GPS5
,(S technology depends on the accuracy of signals that travel from ,(S satellites to a ,(S
receiver. +ou can increase accuracy by ensuring that when you use 1or at least when you turn on2 your ,(S
receiver, you are in an area with few or no obstacles between you and the wide open s0y. )hen you first
turn on your ,(S receiver, stand in an open area for a few moments to allow the unit to get a good fi8 on
the satellites 1especially if you are heading into an obstructed area2. This gives you better accuracy for a
longer period of time 1about E6H hours2.
It ta0es between HN and JN milliseconds for a signal to travel from ,(S satellite to a ,(S receiver on
the surface of the earth.
AI, B?. ,(S sample module 1,-R#I!2
The signals are so accurate that time can be figured to much less than a millionth of a second, velocity
can be figured to within a fraction of a mile per hour, and location can be figured to within a few meters.
WAAS/EGNOS
The )ide -rea -ugmentation System 1)--S2 is a system of satellites and ground stations that provides
even better position accuracy than the already highly accurate ,(S. uropes version of this system is the
uropean ,eostationary !avigation "verlay Service 1,!"S2. The Aederal -viation -dministration
1A--2 developed the )--S program. It ma0es more airspace usable to pilots, provides more direct end
route paths, and provides new precision approach services to runways, resulting in safety and capacity
improvements in all weather conditions at all locations throughout the *.S. !ational -irspace System
1!-S2.
-lthough it was designed for aviation users, )--S supports a wide variety of other uses, for
e8ample, more precise marine navigation. To ta0e advantage of )--S technology, you must have a
)--S6capable ,(S receiver in an area where )--S satellite coverage is available such as !orth
-merica. !o additional e9uipment or fees are re9uired to ta0e advantage of )--S.
So0r&e" o# Error"
rrors can affect the accuracy of the ,(S signal. Ta0e your ,(S receiver to an area with a wide
and unobstructed view of the s0y to reduce the possibility and impact of some errors. @ere are some of the
most common ,(S errors.
Ioo"p+ere ad Tropo"p+ere De$a)"
=the satellite signal slows down as it passes through the atmosphere. The system uses a built6in model
that calculates an average delay to partially correct this type of error.
Or(%!a$ Error"
=this terminology refers to inaccuracies of the satellites reported location.
Re&e%<er C$o&F Error"
=the ,(S receiver has a built6in cloc0 that can have small timing errors.
N0m(er o# Sa!e$$%!e" 1%"%($e
=obstructions can bloc0 signal reception, causing position errors or no position reading. The more
satellites that your ,(S receiver can view, the better the fi8 is.
Sa!e$$%!e Geome!r)/S+ad%.
=refers to the relative position of the satellites at any given time. Ideal satellite geometry e8ists when the
satellites are located at wide angles relative to each other. (oor geometry results when the satellites are
located in a line or in a tight grouping.
S%.a$ M0$!%pa!+
=the ,(S signal bounces off of objects, such as tall buildings or large roc0 surfaces, before it reaches the
,(S receiver. This increases the travel time of the signal and, therefore, causes errors.
B0)%. a GPS Re&e%<er
&eciding which ,(S receiver to buy can be overwhelming. Thin0 about how you want to use the unit, for
e8ample, traveling or running. 5eep the following considerations in mind.
Prod0&! Le<e$
=do you want the basics, or do you want all of the bells and whistlesQ +ou can find a unit that fits your
needs and budget.
Power So0r&e
=will you be using the unit away from an au8iliary power sourceQ +ou might need to carry e8tra batteries.
)ith some you can use a vehicle adapter or -$ power source.
Por!a(%$%!)
=do you have a preference between a portable or a built6in unitQ Some units mount directly in the
dashboard of your boat or aircraft.
Mapp%. Capa(%$%!)
=do you want to 0now the general direction or street6level details of your chosen pathQ #ap data can
include streets restaurants, tourist attractions, marine data, topography, and so forth.
Mo0!"
=a mount for your ,(S can be useful to 0eep your hands free while navigating your bi0e, boat, car, or
airplane. #any units
with a mount, and several additional mounts are available.
Ea"e o# '"e
=some receivers provide a tutorial or an easy6to6use touch screen interface. Some even have turn6by6turn
voice instructions you are navigating your route.
A!ea Co#%.0ra!%o
=where are you going to use the unitQ )ith some units, you use only the built6in antenna. )ith other
units, you attach an e8ternal antenna to give you better reception
Pr%&e
=which units fit your price rangeQ -n ine8pensive entry6level unit can be a great way to enter the ,(S
world.
So#!ware
=whether you want to save your favorite locations or plan a trip, map software can help. +ou can use your
($ or go directly your ,(S receiver. +our preference for map detail and your specific activities determine
which software is right for you.
Comp$eme!ar) Na<%.a!%o A%d"
Remember, a ,(S receiver is a complement to navigation and should not be the only navigational
tool that you use. *sing a paper map, a simple compass, and having 0nowledge of manual navigation is a
good, safe practice.
AarLogic GPS 3A
Pin assignment

AI, BE. ,(S ?- pin assignment

Aor more information about the current status of the ,(S satellites, visit
B'IIER
- (0JJer or (eeper is a signalling device, usually electronic, typically used in automobiles,
household appliances such as a microwave oven, or game shows. It most commonly consists of a
number of switches or sensors connected to a control unit that determines if and which button
was pushed or a preset time has lapsed, and usually illuminates a light on the appropriate button
or control panel, and sounds a warning in the form of a continuous or intermittent buzzing or
beeping sound. Initially this device was based on an electromechanical system which was
identical to an electric bell without the metal gong 1which ma0es the ringing noise2. "ften these
units were anchored to a wall or ceiling and used the ceiling or wall as a sounding board.
-nother implementation with some -$6connected devices was to implement a circuit to ma0e
the -$ current into a noise loud enough to drive a loudspea0er and hoo0 this circuit up to a
cheap J6ohm spea0er. !owadays, it is more popular to use a ceramic6based piezoelectric sounder
li0e a Sonalert which ma0es a high6pitched tone. *sually these were hoo0ed up to >driver>
circuits, which varied the pitch of the sound or pulsed the sound, on and off.
E$e&!ro%& ")m(o$ #or a (0JJer-
Me!a$ d%"F w%!+ p%eJoe$e&!r%& d%"F a!!a&+edD a" #o0d % a (0JJer
In game shows it is also 0nown as a >loc0out system,> because when one person signals 1>buzzes
in>2, all others are loc0ed out from signalling.Several game shows have large buzzer buttons
which are identified as >plungers>.
The word >buzzer> comes from the rasping noise that buzzers made when they were
electromechanical devices, operated from stepped6down -$ line voltage at ND or HD cycles.
"ther sounds commonly used to indicate that a button has been pressed are a ring or a beep.
4- SOFTWARE TOOLSK INTIGRATION
ABO'T SOFTWARE
Softwares used are.
]5eil software for c programming
]8press ($4 for lay out design
]8press S$@ for schematic design
W'.$3 Ne* in 4Vii%n35
^'ision? adds many new features to the ditor li0e Te8t Templates, :uic0 Aunction
!avigation, and Synta8 $oloring with brace high lighting $onfiguration )izard for dialog based
startup and debugger setup. ^'ision? is fully compatible to ^'ision; and can be used in parallel
with ^'ision;.
W'.$ i 4Vii%n35
^'ision? is an I& 1Integrated &evelopment nvironment2 that helps you write, compile,
and debug embedded programs. It encapsulates the following components.
- project manager.
- ma0e facility.
Tool configuration.
ditor.
- powerful debugger.
To help you get started, several e8ample programs 1located in the LC:6LE*amp$e",
LC,:6LE*amp$e", LC6@@LE*amp$e", and LARML---LE*amp$e"2 are provided.
o HELLO is a simple program that prints the string >@ello )orld> using the Serial
Interface.
o MEAS'RE is a data ac9uisition system for analog and digital systems.
o TRAFFIC is a traffic light controller with the RT< Tiny operating system.
o SIE1E is the SI' 4enchmar0.
o DHRY is the &hrystone 4enchmar0.
o WHETS is the Single6(recision )hetstone 4enchmar0.
-dditional e8ample programs not listed here are provided for each device architecture.
B(i/din6 .n A##/i!.$i%n in 4Vii%n-
To build 1compile, assemble, and lin02 an application in ^'ision;, you must.
B. Select (roject 61fore8ample,6@@LE>AMPLESLHELLOLHELLO-'1,2.
;. Select (roject 6 Rebuild all target files or 4uild target.
^'ision; compiles, assembles, and lin0s the files in your project.
Crea!%. Yo0r Ow App$%&a!%o % M1%"%o,
To create a new project in Vision2, you must:
B. Select (roject 6 !ew (roject.
;. Select a directory and enter the name of the project file.
?. Select (roject 6 Select &evice and select an JDNB, ;NB, or $BH8/STBD device from the
&evice &atabase_.
E. $reate source files to add to the project.
N. Select (roject 6 Targets, ,roups, Ailes. -dd/Ailes, select Source ,roupB, and add the
source files to the project.
H. Select (roject 6 "ptions and set the tool options. !ote when you select the target device
from the &evice &atabase_ all special options are set automatically. +ou typically only
need to configure the memory map of your target hardware. &efault memory model
settings are optimal for most applications.
G. Select (roject 6 Rebuild all target files or 4uild target.
De(0..%. a App$%&a!%o % M1%"%o,
To debug an application created using ^'ision;, you must.
B. Select &ebug 6 Start/Stop &ebug Session.
;. *se the Step toolbar buttons to single6step through your program. +ou may enter GD
ma% in the "utput )indow to e8ecute to the main $ function.
?. "pen the Serial )indow using the Ser%a$ N6 button on the toolbar.
&ebug your program using standard options li0e Step, ,o, 4rea0, and so on.
S!ar!%. M1%"%o, ad Crea!%. a ProOe&!
^'ision; is a standard )indows application and started by clic0ing on the program icon.
To create a new project file select from the ^'ision; menu.
ProOe&! ` !ew (rojecta. This opens a standard )indows dialog that as0s you
for the new project file name.
)e suggest that you use a separate folder for each project. +ou can simply use the icon
$reate !ew Aolder in this dialog to get a new empty folder. Then select this folder and enter the
file name for the new project, i.e. (rojectB. ^'ision; creates a new project file with the name
(R"O$TB.*'; which contains a default target and file group name. +ou can see these names
in the (roject.
W%dow P F%$e"-
!ow use from the menu (roject ` Select &evice for Target and select a $(* for your project.
The Select &evice dialog bo8 shows the ^'ision; device database. Oust select the micro
controller you use. )e are using for our e8amples the (hilips JD$NBR&V $(*. This selection
sets necessary tool options for the JD$NBR&V device and simplifies in this way the tool
$onfiguration.
B0%$d%. ProOe&!" ad Crea!%. a HE> F%$e"
Typical, the tool settings under "ptions ` Target are all you need to start a new application. +ou
may translate all source files and line the application with a clic0 on the 4uild Target toolbar
icon. )hen you build an application with synta8 errors, ^'ision; will display errors and warning
messages in the "utput )indow ` 4uild page. - double clic0 on a message line opens the source
file on the correct location in a ^'ision; editor window. "nce you have successfully generated
your application you can start debugging.
-fter you have tested your application, it is re9uired to create an Intel @< file to
download the software into an (R"# programmer or simulator. ^'ision; creates @< files
with each build process when $reate @< files under "ptions for Target ` "utput is enabled.
+ou may start your (R"# programming utility after the ma0e process when you specify the
program under the option Run *ser (rogram bB.
CP' S%m0$a!%o
^'ision; simulates up to BH #bytes of memory from which areas can be mapped for
read, write, or code e8ecution access. The ^'ision; simulator traps and reports illegal memory
access.
In addition to memory mapping, the simulator also provides support for the integrated
peripherals of the various JDNB derivatives. The on6chip peripherals of the $(* you have
selected are configured from the &evice.
Da!a(a"e "e$e&!%o
you have made when you create your project target. Refer to page NJ for more
Information about selecting a device. +ou may select and display the on6chip peripheral
components using the &ebug menu. +ou can also change the aspects of each peripheral using the
controls in the dialog bo8es.
S!ar! De(0..%.
+ou start the debug mode of ^'ision; with the &ebug ` Start/Stop &ebug Session command.
&epending on the "ptions for Target ` &ebug $onfiguration, ^'ision; will load the application
program and run the startup code ^'ision; saves the editor screen layout and restores the screen
layout of the last debug session. If the program e8ecution stops, ^'ision; opens an editor
window with the source te8t or shows $(* instructions in the disassembly window. The ne8t
e8ecutable statement is mar0ed with a yellow arrow. &uring debugging, most editor features are
still available.
Aor e8ample, you can use the find command or correct program errors. (rogram source te8t of
your application is shown in the same windows. The ^'ision; debug mode differs from the edit
mode in the following aspects.
The S&ebug #enu and &ebug $ommandsT described on page ;J are -vailable. The
additional debug windows are discussed in the following.
The project structure or tool parameters cannot be modified. -ll build $ommands are
disabled.
D%"a""em($) W%dow
The &isassembly window shows your target program as mi8ed source and assembly program or
just assembly code. - trace history of previously e8ecuted instructions may be displayed with
&ebug ` 'iew Trace Records. To enable the trace history, set &ebug ` nable/&isable Trace
Recording.
If you select the &isassembly )indow as the active window all program step commands wor0 on
$(* instruction level rather than program source lines. +ou can select a te8t line and set or
modify code brea0points using toolbar buttons or the conte8t menu commands.
+ou may use the dialog &ebug ` Inline -ssemblya to modify the $(* instructions.
That allows you to correct mista0es or to ma0e temporary changes to the target program you are
debugging.
Steps for executing the Keil programs:
6- $lic0 on the 5eil u'ision Icon on &es0top
,- The following fig will appear
3- $lic0 on the (roject menu from the title bar
4- Then $lic0 on !ew (roject
:- Save the (roject by typing suitable project name with no e8tension in u r own folder
sited in either $.c or &.c
@- Then $lic0 on Save button above.
=- Select the component for u r project. i.e. -tmelaa
8- $lic0 on the V Symbol beside of -tmel.
A- Select -TJC$NB as shown below
69- Then $lic0 on S"5T
66- The Aollowing fig will appear
6,- Then $lic0 either +S or !"aaamostly S!"T
63- !ow your project is ready to *S
64- !ow double clic0 on the TargetB, you would get another option SSource group BT as
shown in ne8t page.
6:- $lic0 on the file option from menu bar and select SnewT
6@- The ne8t screen will be as shown in ne8t page, and just ma8imize it by double
clic0ing on its blue boarder.
6=- !ow start writing program in either in S$T or S-S#T
68- Aor a program written in -ssembly, then save it with e8tension S. asmT and for S$T
based program save it with e8tension S .$T
6A- !ow right clic0 on Source group B and clic0 on SAdd #%$e" !o Gro0p So0r&eT
,9- !ow you will get another window, on which by default S$T files will appear.
,6- !ow select as per your file e8tension given while saving the file
,,- $lic0 only one time on option SADDT
,3- !ow (ress function 0ey AG to compile. -ny error will appear if so happen.
,4- If the file contains no error, then press $ontrolVAN simultaneously.
,:- The new window is as follows
,@- Then $lic0 S"5T
,=- !ow $lic0 on the (eripherals from menu bar, and chec0 your re9uired port as shown in fig
below
,8- &rag the port a side and clic0 in the program file.
,A- !ow 0eep (ressing function 0ey SABBT slowly and observe.
39- +ou are running your program successfully
E7#"e PCB
8press ($4 is a $ircuit &esign Software and ($4 manufacturing service. "ne can learn
almost everything you need to 0now about 8press ($4 from the help topics included with the
programs given.
&etails.
8press ($4, 'ersion N.H.D

Alarm System of Railway Gate Crossing Based On Gps and GSM

Caricato da

Informazioni sul documento

Titolo originale

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

Alarm System of Railway Gate Crossing Based On Gps and GSM

Caricato da

Copyright:

Formati disponibili

ALARM SYSTEM OF RAILWAY GATE CROSSING

BASED ON GPS AND GSM/GPRS

Potrebbero piacerti anche