SASIDHAR SAJJA

DEPARTMENT OF ECE

1
UNIT VII
BIASING & STABILIZATION
AMPLIFIER:

- A circuit that increases the amplitude of given signal is an amplifier
- Small ac signal applied to an amplifier is obtained as large a.c. signal of same
frequency at output.

Biasing a Transistor Amplifier.

- Input signal is applied between base and emitter
- Output is taken out between Collector and emitter.

I
CC
3.5mA
Icmax 3mA AC load line

1.5mA DC load line

V
CE

12V D VCE max 24V.
DC LOAD LINE:
- V
CC
= V
CE
+ I
C
R
L

- 24V = V
CE
+ 0.
VCE Max = V
CE
= 24V
- For Ic max, transistor is in saturation.
V
CE
drop is 0.2V, Ideally V
CE
= 0
V
CC
= V
CE
+ I
CRC

V
CC
= 0 + I
C
R
C
or I
cmax
=
CC
C
V
R
= 24/8k = 3mA

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SASIDHAR SAJJA
DEPARTMENT OF ECE

2
Optimum operating point
point is called Quiescent point

max 24
2
max 3
2
12
2
1.5
2
CE
CEQ
C
CQ
V
V Volts
I
I mA
= = =
= = =

max
max
24
12
2 2
3
1.5
2 2
CE
CE
c
C
V
V Q volts
I
I Q mA
= = =
= = =

Ac load Rac = R
C
R
L
=
8 24
6
8 24
k

=
+

Max V
CE
= V
CE
Q + IcQ R
ac

(Point D) = 12 + 1.5 x 10
-3
x 6 x 10
3
= 21 volts
Max collector current =
12
15 3.5 .
6
CE
ac
V
V
IcQ mA mA
R k

+ = =
I
C
max = 3.5mA (Point C)
Line joining C & D is called ac load line.

1Q) Determine the quiescent current and collector to emitter voltage for germanium
transistor with = 50 in self-biasing arrangement draw the circuit with given
component value V
CC
= 20V, R
C
= 2K, R
E
= 100, R
2
= 5K (Also find out
stability factor). (May 2005)
Solution: - +20V

For drawing DC load line we must
know
a) V
CE
max when Ic = 0

b) Ic max when V
CE
= 0
V
CE
max = VC
C
= 20V





20
max 9.52
2000 100
CC
C E C
C E
V
I I I mA
R R
= = = =
+ +
5K
Quiescent V
CE
Q =
max 20
10
2 2
CE
V
V = =
Quiescent I
C
Q =
max 9.52
4.76
2 2
Ic
mA = =
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SASIDHAR SAJJA
DEPARTMENT OF ECE

3
Quiescent I
B
Q =
4.76
0.0952
50
C
I
mA

= =
Quiescent I
E
Q = I
C
Q + I
B
Q = 4.855mA.

Q2) For transistor amplifier shown in the fig. RL = 1.5k and V
BE
= 0.7V
Solution:

i) Draw DC load line
ii) Determine operating point
iii) Draw AC load line

i) DC load line









DC load line

V
CC
= V
CE
+ I
C
(R
C
+ R
E
) (I
C
I
E
)
V
CEmax
+ V
CC
= 12V

( )
12
max 6
1 1
CC
C E
V
Ic mA
R R K
= = =
+ +


ii) Operating Point
Voltage across R
2
,
( )
2
2
1 2
4
, 12 4
8 4
R CC
R K
V V volts
R R K
= = =
+ +

VR
2
= V
BE
+ I
E
R
E
or
2
3
4 0.7
1 10
BC
VR V
IE
RE

= =

I
E
= V
CC
I
C
(R
C
+ R
E
)
= 12 3.3 x 10
-3
(2 x 10
3
) = 5.4 volts
Therefore operating point or quiescent point Q (5.4 V1 3.3mA)
iii) AC load line
We should V
CE
max & I
C
max.
AC load resistance
1 1.5
0.6
2.5
C L
ac C L
C L
R R
R R R k
R R

= = = =
+

V
CE
max = V
CE
Q + IcQ. Rac.
= 5.4 + 3.3 x 10
-3
x 0.6 x 10
3
= 7.38 Volts (Point C)
max
CE
ac
V Q
Ic IcQ
R
= + =
3
3
5.4
3.3 10 12.3
0.6 10
mA

+ =

(Point D)

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SASIDHAR SAJJA
DEPARTMENT OF ECE

4
THERMAL RUN AWAY:

- Collector current I
C
= I
B
+ (+1) I
CBO

- , I
B
, I
CBO
all increase with temperature
- I
CBO
doubles for every 10C rise in temperature
- Collector current causes junction temperature to rise, which in term rises
- I
CBO
rise in Ic.
- This cumulative process leads to collector current to increase further and
transistor may be destroyed.
- This phenomenon is called thermal Run away.
- Remedy:
- 1) To reduce base current with rise in temperature using NTC components
- 2) Making collector larger in size and using heat sink to dissipate heat.
-
STABILITY FACTOR (S)

- The extent to which the collector current I
C
is stabilized with varying Ico is
measured by stability factor S.
- It is defined as the rate of change of collector current to the change in Ico,
keeping I
B
and B as constant.
- , &
C
B
CO
I
S I
I

Constant Or
C
co
dI
S
dI
=
- Collector current Ic = I
B
+ (+1) I
CO
- (1)
Differencing eqn. (1) with repeat to Ic.
( 1)
c co B
c c c
dI d I d I
dI dI dI
+
= =
1 ( 1)
CO B
C C
DI dI
dI dI
= + +
1
1
B
c
dI
dI S

+
=
Or
1
1
S
dIB
dIc

+
=
(

(


- S should be as small as possible to have better stability
Stability Factor S and S.
' , &
c c
BE BE
dI I
S Ico
dV V

constant
" , &
c c
co BE
dI I
S I V
d

constant
Methods of Transistor Biasing: -
Types of Biasing: -
a) Fixed Bias or base resistor Bias
b) Collector to Base bias or biasing with feet back resistor
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SASIDHAR SAJJA
DEPARTMENT OF ECE

5
c) Self-bias or emitter bias or potential divides Bias.

a) Fixed Bias:



By DC analysis
. CC B B BE
V I R V = + - (1)
CC BE
B
B
V V
I
R

= - (2)
Stability Factor S =
1
1
dIB
dIC

+
| |

|
\

Since IB is not depending on Ic as per equation (2).
1
1
1 (0)
S

+
= = +

- (3)
Since is a large quality and varies from device to device. This is very poor
circuit for stability for bias.
Advantages of fixed Bias: -
a) Simple circuit
b) Small number of components
c) If V
CC
is very large, compared to V
BE
then (as per equation 2)
I
B
is independent of V
BE
.
COLLECTOR TO BASE BIAS:

- V
CE
= I
B
R
B
+ V
BE

-
- V
CE BE
B
B
V
I
R
| |
=
|
\

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SASIDHAR SAJJA
DEPARTMENT OF ECE

6
- If the collector current increases due to increase in temperature or the transistor
is replaced by one with higher , the voltage drop across R
C
increases.
- So, less V
CE
and less I
B
, to compensate increase in Ic i.e., greater stability



( )
CC B C C B B BE
V I I R I R V = + + + - (1)
=
B C C C B B BE
I R I R I R V + + +
= ( )
B C B C C BE
I R R I R V + + +
Or
CC BE C C
B
V V I R
I
RC RB

=
+
- (2)

C IB
IC C B
R d
d R R
=
+
- (3)

Stability Factor:

1
1
B
C
S
dI
dI

+
=
| |

|
\

Putting the value of dI
B
/ dI
C
from equation (3)

1 1
1 1
C C
C B C B
S
R R
R R R R


+ +
= =
| | | |
+
| |
+ +
\ \


Note: - 1) Value of S is less than that of fixed bias (which is S = 1+)
1) S can be made small and stability improved by making R
B
small or R
C

large.
- If Rc is small S = 1 + , i.e., stability is port.
-
-
- This collector to base bias is not satisfactory for transformer coupled
amplifier.
-
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SASIDHAR SAJJA
DEPARTMENT OF ECE

7
Self bias or Potential Divider Bias: -

- Required base bias is obtained from the power supply through potential
divider R
1
& R
2
.
- In this circuit voltage across Reverse biases base emitter junction. Whenever
there is increase in this collector circuit voltage across R
E
increases causing
base current to diverse which compensate the increase in collector current.
- This circuit can be used with low collector resistance.






2
1 2
B
R Vcc
V
R R
=
+
By applying thevenins
theorem, the cut can be replaced and

1 2
1 2
B
R R
R
R R
=
+
.

.


Equivalent Circuit: -
Writing loop equation for the basic
loop shown

= I
B
R
B
+ V
BE
+ R
E
(I
B
+I
C
)


= I
B
R
B
+ V
BE
+ I
B
R
E
+ I
C
R
E

= I
B
(R
B
+R
E
) + V
BE
+ I
C
R
E

Or I
B
(R
B
+R
E
) = V
B
V
BE
- I
C
R
E

I
C
R
E


Differencing wrt. Ic,
( )
C E B B BE
B E
C C C C
dI R dI dV dV
R R
dI dI dI dI
+ =
Or ( ) 0 0
B
B E E
c
dI
R R R
dI
+ =

Or
B E
c B E
dI R
dI R R

=
+
- (1)

Stability Factor
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SASIDHAR SAJJA
DEPARTMENT OF ECE

8

1
1
B
c
S
dI
dI

+
=
| |

|
\

Putting the value of
B
C
DI
DI
from equation (1)

1 1 1
1 1
B E E
E E
B E
B E B E
S
R R R
R R
R R
R R R R

+ + +
= = =
+ +
| | | |
+
| |
+
+ +
\ \


Dividing N & D by R
E


( ) 1 1
(1 ) (2)
1
B E B
E E
B E E B
E E
R R R
R R
S
R R R R
R R

+
+ +
= = +
+ +
+ +

If
( )
1 0 1
0, (1 ) 1
1 0 1
B
E
R
S
R

+ +
= = + = =
+ +
(3)
If ( ) ( )
1
, 1 1
1
B
E
R
S
R

+
= = + = +
+ +


So, (a) for smaller value of RB stability is better, but large power will be wasted
in R1 & R2. S is independent of B.
(b) For fixed RB/RE, S increases with (see eqn. 2) i.e., stability decreases
with increase in .
Bias compensation
a) Diode bias compensation

I
R
= I
D
+ I
B
(I
D
is reverse saturation Current increases with temp.)
When temperature increases, I
C
increases at the time, I
D
also increases,
making I
B
to Reduce and controlling I
C
.
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SASIDHAR SAJJA
DEPARTMENT OF ECE

9
b) Thermistor Bias compensation: -
- RT is having negative temp. Coefficient

i.e., temperature RT .RT



- When temperature increases RT decreases
thereby reducing base bias voltage &
base current and hence collect to current.






c) Sensistor Bias compensation.

- Rs is sensistor (resistance) having

positive temperature coefficient.
- When temp. Rs. VR
2


Base bias voltage Base current .

Collector current controlled.

Biasing of FET
Source self-Bias circuit:

This configuration can be used
to bias JFET pr depletion mode
MOS FET.
- Voltage across R
S
is used to reverse
bias the gate as voltage across R
E
is
used for self-bias of C
E
amplifier.
- Relation of drain current, V
GS
, Vp is given
by I
DS
= I
DSS
(1 V
GS
/V
P
) 2.
- Since gate current in negligible, source resistance can be
found as R
S
=
GS
D
V
I

-






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SASIDHAR SAJJA
DEPARTMENT OF ECE

10
Biasing against device variation: -

V
GS
= V
GG
I
DRS
. (Gate current is very small & V
RG
is small)
- V
GS
is always negative
- There may be a change in the drain current I
d
, when even a device is changed
- If a device change results in increase in I
d
, it leads to more voltage drop across
R
S
and V
GS
increases. So, I
d
will be reduced.
- In this way the circuit takes care of device variations.


FET as a voltage variable Resistor: - ID

- When V
DS
< V
P
V
GS
= 0V
Id V
DS
, when V
GS
is constant. V
GS
= 1V
i.e., FET acts as a resistance. V
GS
= 2V
- In this region FET is used as a V
GS
= 3V
Voltage controlled resistor. Or
Voltage variable resistor. Or
Voltage dependant resistor. 0 V
P
V
DS


-
-
- Application: - There many applications. Automatic gain control of RF
amplifier of a receiver is one of the applications.


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SASIDHAR SAJJA
DEPARTMENT OF ECE

11
- FET is biased in such a way that when transistors conducts more, then the
resistance offered by FET is more.
- The causes more reverse bias to emitter base junction of transistor
and it conducts less.
- In this way Automatic gain control (AGS) is achieved.

Q) Find out stability factor of the circuit given below: (May 2005)

Stability factor of self-biased
Circuit given by:




( )
1
1
1
B
E
B
E
R
R
S
R
R

+
= +
| |
+ +
|
\


1 2
1 2
B
R R
R
R R
=
+

5 50 50
4.5 4500
5 50 11
k k

= =
+


4500
45
100
B
E
R
R
= =
( )
1 45
50 1 24.54
1 50 45
S
+ | |
= + =
|
+ +
\


Q2) For the circuit shown, determine the value of Ic and VCE. Assume VBE = 0.7V
and = 100 (Sep.06)




( )
2
1 2
. 10 5 50
3.33
10 5 15
10 5 50
3.33 .
10 5 15
cc
in
th
V R k
V volts
R R k
R k k k

= = = =
+ +

= = =
+




V
th
= I
B
R
B
+ V
BE
+ I
E
R
E

= I
B
R
B
+ V
BE
+ (+1)I
B
R
E


V
th
V
BE
= I
B
(R
B
+( + 1)R
E
)
Or
( ) 1
th BE
B
B E
V V
I
R R

=
+ +

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SASIDHAR SAJJA
DEPARTMENT OF ECE

12

=
3.33 0.7
3.3 101 500 K

+

2.63 2.63
48.88 .
3300 50500 53800
. 4888 .
B
C B
I A
I I A

= = =
+
= =

4888 48.88 49.6
E C B
I I I A = + = + =

Part (b) V
CE
= ?

V
CC
= I
C
R
C
+ V
CE
+ I
E
R
E

Or V
CE
= V
CC
I
C
R
C
I
E
R
E

= 10 4888 x 10
-6
x 10
3
4937 x 10
-6
x 500
= 10 04.888 2.468
= 2.64 volts
I
C
= 4.89 mA
V
CE
2.64 Volts

Q3) For the JFET shown in the circuit with the voltage divides bias as shown below.
Calculate V
G
, V
S
, V
D
and V
DS
if V
GS
= -2V. (Sep. 2006)

Solution:

( )
2
1 2
. 15 4 15
3.75
12 4 4
DD
V R k
VG V
R R k

= = = =
+ +

Since gate circuit is negligible
Voltage drop across R
G
= 0
V
GS
= V
G
I
d
Rs.
- 2 V = 3.75 - I
d
R
S

I
d
R
S
= 3.75 + 2 = 5.75V = Vs.
Id = 5.75/1k = 5.75mA.
Voltage drop across RL = I
D
R
2

= 5.75 x 10-3 x 500 = 2.875 V
V
DS
= V
DD
I
D
R
2
I
D
R
S
.
= 15 2.875 8.75 = 6.375 volts
V
D
= V
DD
I
D
R
L
= 15 2.875 = 12.125V.

3Q) For the circuit shown, calculate V
E
, I
E
, Ic and Vc. Assume V
BE
= 0.7V.
(Sep. 2006)
Solution:

V
B
= V
BE
+ V
E
or V
E
= V
B
V
BE
= 4 0.7 = 3.3V
3.3
1
3.3
E
E
E
V
I mA
R k
= = =
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SASIDHAR SAJJA
DEPARTMENT OF ECE

13
Since is not given, assume Ic I
E
= 1mA.
V
C
= V
CC
I
C
R
L
= 10 1 x 10
-3
x 4.7 x 10
3
= 5.3 volts


4 Q) In the circuit shown, if I
C
= 2mA and V
CE
= 3V, calculate R
1
& R
3

(Sep. 2006)
Solution:
2
0.02
100
B
Ic mA
I mA

= = =
2 0.02 2.02
E C B
I I I mA = + = + =
2.02 500 1.01
E E E
V I R mA volts = = =
2
1.01 0.6 1.61
R E BE
V V V volts = + = + =
2
2
1.61
0.161
10
R
V
I mA
R k
= = =
V
R1
= V
CC
V
R2
= 15 1.61 = 13.39 volts
( )
1
1
13.39
73.97
0.161 0.02
R
B
V
R k
I I mA
= = =
+ +

V
R3
= V
CC
V
E
V
CE
; V
CE
= 3V
V
R
3 = 15 1.01 3 = 10.99 volts
3
3
1099
5.49
2
R
C
V
R k
I mA
= = =

5Q) Design a self-bias circuit for the following specifications.
VCC = 12V, VCE = 2V, I
C
= 4mA, h
fc
= 80. (Sep. 2006)

Solution:

I
B
=
C
I

= 4mA / 80 = 0.05mA
I
E
= I
C
+ I
B
= 4 + 0.05 = 4.05 mA
Let V
B
= 4V.
R
2
= 4k and R
1
= 8K

1 2
1 2
4 8 32
2667
4 8 12
B
R R
R k k
R R
| |
= = = =
|
+ +
\

V
B
= I
B
R
B
+ V
BE
+ V
RE

Or V
RE
= V
B
I
B
R
B
V
BE
= 4 0.05 x 10
-3
x 2667 0.7
= 4 0.133 0.7 = 3.167 volts

3.167
7.82
4.05
RE
E
E
V
R
I mA
= = =
V
CC
= V
RC
+ V
CE
+ V
RE
(OR)
V
RC
= V
CC
V
CE
- V
RE

= 12 2 3.167 = 6.833 volts
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SASIDHAR SAJJA
DEPARTMENT OF ECE

14
R
c
=
RC
C
V
I
=
6.833
4 mA
= 1708.
R
1
= 8k, R
2
= 4k, Rc = 1708 and Rc = 782.
But resistor of 1708 and 782 are not available commercially. We have to choose
commercially available resistors, which are nearest to these values.

Numerical of Unit III Question Bank
1 Q) A 15 0 15 volts (rms) ideal transformer is used with a FWR with diodes
having fwd drop of 1 volt. The load resistance in 100 and capacitor of 10,000 f
is used on filter. Calculate the Dc load current and voltage.
(JNTU 2005)








Solution: -

4
DC
DC m
I
V V
fc
= where f is power line frequency. C in farads.
Vrms = 15V, Assume voltage drop (rms) across diode as 1V.
Vrms across load = 14V.

dc dc
dc m
dc dc
dc
4170 I 4170 I
V = V - = 19.8 -
C 10,000
100 I ; 19.8 (or) I ; 0.198 Amp
V = 19.8 Volts.

Vm = Vrms 2 = 142 = 19.8 volts.

2 Q) A FWR is used to supply power to a 2000 load, choke of 20H and capacitor of
16f are available. Compute ripple factor using filter 1 (i) one inductor (ii) one
capacitor (iii) single L type.

Solution: R
L
= 2000; C = 16f; L = 20H.

i) One Inductor Filter

3
2000 1
6.25 10 0.006
16000 16000 20 160
L
R
r
L

= = = = =

(ii) One capacitor filter:

3
2410 2410
75.31 10 0.075
16 2000
L
r
CR

= = = =

(iii) Single LC Type Filter
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SASIDHAR SAJJA
DEPARTMENT OF ECE

15

0.83 0.83
0.0025
20 16
r
LC
= = =

(iv) Selection 20
16 16


6
1 1
3330 3330
325 10 .000325
16 16 20 2000
L
r
CC L R

= = = =


Filter in the Order of Merit:
a) Capacitor Filter (b) Inductor Filter
c) L Section (d) Section.
3 Q) Design a full wave rectifier with an LC filter to provide 9V DC at 100mA with a
max ripple of 2%. Given line frequency f = 60Hz. (JNTU 2000)

Solution: -
Given V
DC
= 9V, f = 60Hz.
I
L
100mA, r = 2% = 0.02
To find: L, C.


0.83 r = when f = 60 Hz. (1) (1)
Else
2 1 1
. .
3 2 2 .
r
wc wL
=
Where L
C
= R
L
/ 1130.
Or
0.83
41.5
0.02
LC = = (2)
Critical Inductance (value of Inductance for which diode conducts continuously)

9
.; 90
1130 100
DC L
C L
DC
V R
L R
I mA
= = = =
Lc = 41.5 - (2)

3
41.5
521
79.6 10
C f

= =

Transformer rating Vrms = ?

Diode ratings Piv = Vm
current rating = load current
L = 796mH
C = 521f

4 Q) A FWR operating at 50 Hz i.e., to provide DC current of 50mA at 30V with a
80f, C type filter. Calculate (i) V
m
the peak secondary voltage of the
transformer (ii) Ratio of surge to mean currents of diode (iii) The ripple factor of
the output. (JNTU 2002)




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DEPARTMENT OF ECE

16
S C
d S
V -V
Current through the diode at any time
R +R
Solution: -

Given f = 50 Hz, C = 80f
I
DC
= 50mA To find V
m
= ? ratio of surge to mean current
V
DC
= 30V.

Part (i) V
m
= ?
V
DC
= 0.636 V
m
. Or V
m
= V
DC
/0.636 = 30/0.636 = 47.17 volts.
Part ii Ratio of surge to mean current
----------------------------------------X-------------------------X--------------------------------------
Surge Current






It is the current flowing through the diode, when the power supply is just switched
on i.e., at time t = 0+. At time t = 0+. Voltage across capacitor will be zero.
--------------------------------X-------------------------------------X --------- X---------------------



When Vc = 0, Id will be max =
max S m
d S d S
V V
R R R R
=
+ +

This is called surge current.
Mean diode current
S dc
d
d S
V V
I
R R

=
+

Ratio of surge current to mean current =
( )
( )
d s m
d s m dc
R R V
R R V V
+

+

=
47.17 47.17
2.75
47.17 30 17.17
m
m DC
V
V V
= = =



Note: Designer must cater for 3 times the required average current.
Part III : Ripple factor
2410
L
r
CR
= f = 60 Hz.
Or Ripple factor
1
4 3
L
r
fcR
=

2
300
30
50
L
Vdc V
R V
Idc mA
= = = = 600

6
6
1 10
0.006
16627687.75 4 3.50.80 10 600
r

= = =


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SASIDHAR SAJJA
DEPARTMENT OF ECE

17

5 Q) For a FWR circuit AC voltage input to transformer primary is 115V. Transformer
secondary voltage is 50V, R
L
=25. Determine
i) Peak DC component, RMS and AC component of load voltage
ii) Peak DC component, RMS and AC component of load current.
(June 2002)
Solution:

Given Vrms = 50V, to find V
m
, V
r
, I
m
, I
r
.
R
L
= 25
2
r
V
Vm Vdc
| |
=
|
\

Part (i)
2
2; 2, 50 70.7
Rms Rms
Vm
V orVm V Volts
V
= = = =
,
r
V
r
Vdc
= r of FWR (without filter) = 0.48
V
dc
= 0.637
V
m
= 0.637x7.07=45 volts

Vr = , Vdc = 0.48 x 45 = 21.6 volts
Peak DC component = VDC + Ripple voltage = 45+21.6 = 66.6 volts
66.6
V = = = 47 Volts
2 2
rms
peak

Part II

m
70.7
I 2.828 .
25
21.6
0.864 .
25
L
L
Vm
Amps
R
Vr
Ir Amps
R
= = =
= = =

Peak DC current component = 66.6/25 = 2.664 Amps.
Runs DC current component = 47/25 = 1.8 Amps.

6 Q) Calculate ripple factor of capacitor filter with peak rectified voltage of 20V and C
= 50 f and I
DC
= 50mA. (June 2004)
Solution: -
Vm = 20V, Idc = 50mA, C = 50f. V
DC

V
r
Vm = 20V


4
DC
Idc
V Vm
fc
=
Suppose f = 50Hz, Then
3
6
50 10
20
4 50 50 10
DC
V

=


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DEPARTMENT OF ECE

18
=
1000
20 20 5 15
200
volts = =

15 150 1000
300
50 50
L
VDC
R
Idc mA

= = = =

6
1 1 10 100 1
= 0.192
4 3 4 3 50 50 300 4 3 25 3 3 3
L
r
fcR

= = = =



Photo Transistor:
Phototransistor is a BJT for which no base bias is given. When light falls on the
junction base current flows and transistor conducts.



Ic(mA)
Symbol.
7.0
6.0
5.0
4.0
Base 3.0
current H = 1.25 mw/Cm
2

I
B
A
0 20 40 60 Vcc(V)
- Collector current does not vary much with Vcc
- Collector current increases with light intensity.
Radiation flux
Density H(mw/in
2
)

Advantages of photo diode.

- Will produce I
C
much higher ( times) I
C
(by photo diode)

Applications:

Capt. isolators are used to isolate input source and load i.e., high isolation logic
gates etc.,









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SASIDHAR SAJJA
DEPARTMENT OF ECE

19
Numerical of Question Bank Unit IV


1 Q) In a CB connection current amplification factor is 0.9. If emitter current is 1mA,
determine the value of base current.

Given = 0.9 I
B
= ?
I
E
= 1 mA.

Solution:
= Ic/IE or IC = . I
E
= 0.9 x 1 = 0.9mA
I
B
= I
E
Ic = 1-0.9 = 0.1 mA.

2 Q) For a transistor collector current is 20mA and current gain factor is 50. Determine
emitter current. (May 2000)

Given Ic = 20mA IE = ?
= 50

Solution:

B
Ic
I
= Or
20
0.4 .
50
B
Ic
I mA mA

= = =
IE = I
C
+ IB = 20 + 0.4 = 20.4 mA.

3 Q) In a transistor collector current is 0.98 mA and base current is 20A. Determine
the value of
i) Emitter current (ii) Current amplification factor
iii) Current gain factor (May 2000)

Given I
C
= 0.98mA To find: I
E
= ?
I
B
= 20A = ?
= ?
Solution: -

I
E
= Ic + I
B
= 0.98 mA + 20A = 980A + 20A = 1000A

980
49
20
980
0.98
1000
Ic
A
IB
Ic
A
IE


= = =
= = =


4 Q) A BJT has IB = 10A, = 0.99 and I
co
= 1A. What is the collector current.
Solution:
Ic = IB + ( + 1) Ico;
0.99 0.99
99
1 1 0.99 0.01

= = = =


Ic = (99 x 10 + 100 x 1)A = 990 + 100 = 1090A = 1.09 mA.
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DEPARTMENT OF ECE

20

5 Q) The readings obtained from a JFET are as follows: -
Drain to source voltage (volts) = 5 12 12
Gate to source voltage (volts) = 0 0 -0.25
Drain current Id (mA) = 8 8.2 7.5
Determine (i) AC drain resistance (ii) Trans. Conductance (iii) Amplification
Factor
SOLUTION:
(i) Ac Drain Resistance / constant
DS
d GS
V
R V
ID

V
GS
constant
=
3
12 5( ) 7
35
8.2 8( ) 0.2 10
Volts
k
mA

= =


(ii) Trans conductance
d
m
I
g
VGS

VDS constant
=
8.2 7.5 0.7 70
2.8
0 ( 0.25) 0.25 25
mA
m m

= = =


(iii) Amplification factor = g
m
. Rd = 2.8 x 10
-3
x 35 10
3
= 98

6 Q) An SCR is used as a switch to supply an inductive load of L = 20H and negligible
resistance from a DC source of 100V. If the latching current of SCR is 100mA,
find the min. pulse width of trigger pulse.
i
Solution:

SCR L R
V V V V = + + VSCR
= 0 + VL + 0

.
di
V L
dt
= VL 20

L
dt di
V
= 100V
Integrating both sides VR 0

3
20
. .100 10 0.02sec.
100
L
t i
V

= = =
Minimum pulse width required is 0.02 sec.











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SASIDHAR SAJJA
DEPARTMENT OF ECE

21
NUMERICAL OF QUESTION BANK.

1 Q) An NPN transistor used in self-bias CE amplifier has a value of = 49 at
temperature of 25c. The circuit has R1 = 90k. Vcc and Rc are adjusted to
establish Ic = 2mA. Calculate stability factor. (JNTU 2001)

Solution:
Stability factor
( ) 1 1
1
RB
RE
S
RB
RE

| |
+ +
|
\
=
+ +

& RE are given:
1 2
1 2
90 10 900 9
9 ; 9
90 10 100 1
R R RB k
RB k
R R RE k

= = = = = =
+ +

( )( )
( )
1 49 1 9 50 10
8.47
1 49 9 59
S
+ +
= = =
+ +

2 Q) In the self-biased CE amplifier Rc = 4k, R1 = 90k, R2 = 10k, B = 45 and
VBE = 0.6V. Compute stability factor for RE (i)1k (ii) 1.5K (iii) 1.8k.
(Dec. 2003)
Solution: -
Stability factor of self-bias circuit
( ) 1 1
1
B
E
B
E
R
R
S
R
R

| |
+ +
|
\
=
+ +

Given, = 45, RE =
1 2
1 2
90 10 900
9
90 10 100
R R
RB k
R R

= = = =
+ +

Case (i) RE = 1K
( )( ) 1 45 1 9
460
8.36
1 45 9 55
S
+ +
= = =
+ +


9
9
1
RB
RE
= =
Case (ii)
9
1.5 , 6
1.5
KB k
RE k
KE k
= = =
( )( ) 1 45 1 6
6.19
1 45 6
S
+ +
= =
+ +

Case (iii)
9
1.8 , 5
1.8
RB k
RE k
RE k
= = =
( )( ) 1 45 1 5
5.41
1 45 5
S
+ +
= =
+ +







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SASIDHAR SAJJA
DEPARTMENT OF ECE

22
BIAS CONPENSATION:
1 Q) Explain Bias compensation using sensistors.
Ic = ( + 1) ICBO + IB.
For correct operation of transistor as an amplifier collector current should be
independent of temperature variations.

But when temperature increases ICBO increases. So to keep the collector current
Ic constant, we must reduce current IB to compensate increase in ICBO. The technique
used is called Bias compensation.

+VCE
1. Sensistor compensation
R
1
Rs RE
As shown in the diagram Rs can be
Connected across Rs (or it can be
Connected across RE).
R
2
RE
Sensistor (Rs) in a positive temperature
Coefficient resistance i.e., value of Rs increases with rise
in temperature. So, when temperature increases resistance offered by Rs (sensistor)
increases. So, parallel combination of Rs and R1 with also offer more resistance. More
voltage will be dropped across than and less voltage is applied to base. This reduces the
base emitter bias voltage resulting in reduction of base current. In this way sensistor
reduces the base current to compensate increase in ICBO due to rise in temperature.




1 b) In the circuit shown, if Ic = 2mA and VCE = 3V, calculate R1 and R3.
(May 07, Aug. 06, 07)








+ Vcc 15V

Solution: R
1
R
3

I+IB Ic
I

R
2
10k R
4
500
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DEPARTMENT OF ECE

23
3
2 10
0.02
100
Ic
IB mA

= = =
2 0.02 2.02 IE Ic IB mA = + = + =
VE = IC RE = 2.02mA x 500 = 1.01 volts

2
1.01 0.6 1.61
E BE
VR V V volts = + = + =

2
2
1.61
0.161
10
VR
I mA
R k
= = =

1 2
15 1.61 13.39
CC
VR V VR volts = = =

( )
1
1
13.39
73.97
0.161 0.02
B
VR
R K
I I mA
= = =
+ +


3 CC E CE
VR V V V =
= 15 1.01 3 = 10.99 volts

3
3
10.99
5.49
2
VR
R k
Ic mA
= = =

1 c) Compare BJT, JFET and MOS FET in all respects. (Aug 06, 07)

S.No. BJT JFET MOS FET
1 Types NPN, PNP, Bipolar Nch JET, Pch
JFET, Unipolar
Enhancement &
depletion type, Unipolar
2 Current Both majority
&minority charge
carriers are used
Only majority
charge carriers are
used
Only majority charge
carriers are used.
3 Input
impedance
Low (k) High (100 M) Very high (10
15
)
4 Control Current controlled
device input current
controls output
current
Voltage controlled
device. Input
voltage controls
output current
Voltage controlled
device.
5 Fabrication Difficult Easy Easy
6 Handling Easy No, preached
required
Easy Difficult, special
precautions to be taken
7 Power
Dissipation
High Low Very low
8 Lifetime Less More Less
9 Switching
speed
Less High High

4 Q) Explain in detail about Thermal runaway and Thermal resistance.
(May 07)

Thermal Run away:

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DEPARTMENT OF ECE

24
Ic = IB + (+1) IcBo.

Leakage current IcBo increases with temperature and also increases with rise in
temperature. IcBo doubles with every 10c rise in temperature. Therefore collector
current also increases with temperature. More collectors current in turn will give rise to
more temperature at the junction. This problem of self-heating is called Thermal run
away and may result in damaging the transistor.
Thermal Resistance (P 288 MMH)

The steady state temperature rise at the collector junction is proportional to the
power dissipated at the junction.

T = T
J
T
A
= k P
D

Where T = rise in temperature
T
J
= Temperature at junction
T
A
= Ambient temperature
P
D
= Power dissipated
K = Proportionality constant, called Thermal resistance.
The value of Thermal resistance depends on size of transistor, on convection or
radiation to the surroundings, on forced air cooling and on Thermal connection of the
device to metallic chassis or heat sink. The value of Thermal resistance varies from
0.2c/w for a high power transistor with efficient heat sink to 1000c / w for a low power
transistor in free air.







4 b) Q) For the circuit shown in figure, determine I
E
, V
C
and V
CE
. Assume VBE = 0.7V.
(May 2007)
V
EE
= - 8V




Si
Rc = 1.8k

V
CC
= 10V

= 100
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