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CMSIS-RTOS
An API interface standard for
Real-Time Operating Systems
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What is CMSIS?
Vendor-independent hardware abstraction layer for the Cortex-
M processor series
Enables consistent and simple software interfaces to the
processor and its peripherals
Simplifies software re-use, reduces the learning curve for new
MCU developers
ARM

Cortex

Microcontroller Software Interface Standard

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CMSIS Components
CMSIS-CORE: Standard API for all ARM

Cortex

-M Processors
Standardized software interface for Cortex-M0, Cortex-M3, Cortex-M4 and future
processors
CMSIS-DSP: DSP Library Collection with 61 Functions
Optimized for Cortex-M4, but also available for Cortex-M0, and Cortex-M3
CMSIS-RTOS: Standard API for Real-Time OS Vendors
Enables Software Templates, Middleware, Libraries, etc.
CMSIS-SVD: System View Description for Peripherals
Peripheral Awareness for Debuggers and Header file generation
CMSIS-DAP: Standard Debug Interface for all Cortex Processors
Access to all registers of the ARMCoreSight

Debug Access Port

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CMSIS Structure
Debugger
(3
rd
Party)
U
S
E
R
C
M
S
I
S
M
C
U
Cortex
CPU
SysTick
RTOS Kernel
Timer
NVIC
Nested Vectored
Interrupt Controller
Debug
+ Trace
Device Peripheral
Functions
(Silicon Vendor)
SIMD
Cortex-M4
Real Time Kernel
(3
rd
Party)
CMSIS-RTOS
API
Peripheral Register & Interrupt Vector Definitions
CMSIS-CORE
Core Peripheral Functions
CoreSight
CMSIS
SVD
CMSIS
DAP
Other
Peripherals
CMSIS-DSP
DSP-Library
Application Code
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CMSIS-RTOS API: Motivation
Provide a standardized API for software components
Stimulate standard middleware development
Enable standard project templates from silicon vendors
Simplify usage of CMSIS-DSP Library
Simplify programming of Cortex-M processor-based devices
Provide SiPs and middleware industry with standard RTOS APIs
Reduce learning curve for programmers
API designed with the vision for:
MPU access protection and multi-processor systems
Software eco system that allows application sharing
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Issues with Proprietary RTOS
No common API for available RTOS
Requires multiple adaptations of middleware and project templates
Software architects may try to avoid using an RTOS Kernel if it makes
software components more complex
Device developers need to learn new RTOS APIs
Proprietary RTOS Kernels are frequently generic
Do not use Cortex-M Architecture features like LDEX/STEX
Proprietary RTOS Kernels can have complex licensing
Is it possible to re-distribute example projects?
Free might impose some restrictions on usage
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CMSIS-RTOS: Minimum Requirements
Preemptive context switching with multiple priorities
Mutex, Semaphore, Event signal, and Time management
Message queue and Mail queue that works with interrupts
Optional features that allow differentiation:
Generic Wait function; i.e. with support of time intervals
Support of MPU
Zero-copy mail queue to support multi-processor systems
Deterministic context switching; round-robin context switching
Dead lock avoidance i.e. with priority inversion
No interrupt disable on Cortex-M3/M4
Usage of Cortex-M3/M4 instructions (i.e. LDEX, STEX)
Suitable for all Cortex-M processor variants;
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CMSIS-RTOS: API Structure
API Design Considerations
Suitable for all Cortex-M Processors
Small memory foot print
Scalable functionality
Prepared for MPU support
Prepared for multi-processor systems
Object Definition
With type information that allows type checking and debug views
Abstracted via macros to allow efficient call translation
Real Time Kernel
(3
rd
Party)
Function call
translation
Application Code
main thread interrupt
Object definition
via macros
CMSIS-RTOS API
Objects
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CMSIS-RTOS: Thread Definition
Thread Definition
Thread description defines: thread
function, initial priority, stack size
Thread ID created at thread starts;
multiple thread instances possible
Thread ID refer an active thread
Pre-emptive context switching with
seven easy to understand
priorities:
Idle, Low, BelowNormal, Normal,
AboveNormal, High, Realtime
Thread State Changes
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CMSIS-RTOS: Thread Management
Thread Management
Create: start a thread
Terminate: stop a thread
GetPriority: obtain current thread
priority
SetPrioirty: change priority of tread
Thread ID specifies any active
thread
Thread ID = NULL allows to refer
the current running thread
Thread State Changes
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CMSIS-RTOS: Mutex & Semaphore
Resource Sharing
Mutex: for thread only
- for classic thread synchronization
Semaphore: for thread
- counting semaphore
- manages index for direct
resource access
- semaphores can be also released
in ISR
#0
shared resource
Mutex: Synchronization
Semaphore: Shared Access
Semaphore
#1
#2
#3
#4
#5
Thread
Thread
Thread
Thread
wait
release
shared resource
Mutex
Thread Thread
wait
release
wait
release
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CMSIS-RTOS: Message & Mail I
Message/Mail Queues
Buffered information exchange
between threads or interrupt
service routines (ISR)
Queue operations:
- put info to queue (Thread, ISR)
- get info from queue (Thread, ISR)
- wait for info (Thread only)
Suited for multi-processor
architectures
Memory blocks used for mail
might be access protected via
MPU
Thread
or
ISR
Thread
or
ISR
put get
Message Queue
int / pointer values
Thread
or
ISR
Thread
or
ISR
put get
Mail Queue
memory blocks
. . . . . .
Message: Integer or Pointer
Mail: Memory Blocks
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CMSIS-RTOS: Message & Mail II
Message/Mail Description
Contain data type for run-time
type checking and kernel aware
debugging
Define queue size and
optionally the receiving thread
Thread
or
ISR
Thread
or
ISR
put get
Message Queue
int / pointer values
Thread
or
ISR
Thread
or
ISR
put get
Mail Queue
memory blocks
. . . . . .
Message: Integer or Pointer
Mail: Memory Blocks
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RTX Reference Implementation
First implementation of CMSIS-RTOS API based on Keil

RTX
Available free of charge
BSD 3-clause license
Short and concise license
Allows commercial and proprietary use
Compiles with ARM Compiler, GCC and IAR
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CMSIS-API: RTOS Potential
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Operating
Systems
(kernels) for
deeply
embedded
(Cortex-M
processor-
based MCU)
All have similar basic features
But no common API
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CMSIS-RTOS: Making it a Success
CMSIS has already created a large community
Cortex-M Processors are an Industry Standard MCU Platform
Simplifies creation of new devices and tool support
CMSIS-RTOS API will extend this to more complex software
API specification defined and agreed with CMSIS community
A strong statement to drive standardization in the industry
Allow superset products with more functionality
(MPU support, certification suites, etc.)
CMSIS-RTOS Reference Implementation based on Keil RTX
Free BSD license including source code: allows flexible usage &
distribution