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Simple PWM DAC design considerations

Many single chip microprocessors include a PWM (Pulse Width Modulation) output and its
tempting to use this as a DAC (Digital to Analogue Converter) for generating waveforms etc.
however there are a few design aspects to consider efore doing so.
PWM output is a rectangular waveform of constant fre!uency where the duty cycle (the ratio of on
to off) is varied. "n order to use the PWM as a DAC the output must e passed through a low pass
filter (#P$) to remove the PWM fundamental fre!uency and average the output voltage.
%he simplest form of low pass filter is a &C networ' ( which gives a )
st
order filter. More comple*
filters can e used (and will improve results) ut re!uire additional circuitry. +ne should consider
the worth of the additional circuitry re!uired vs the use of a real DAC.
#ets e*amine DAC !uanti,ation step si,e in terms of d-s.
/umer of DAC its 0uanti,ation step (voltage) in terms of d-s (power)
) )12 3d-
2 )14 )2d-
5 )16 )6d-
4 )1)3 24d-
"n general we get a figure of 3d- per DAC it. "n order to use a PWM DAC properly we need to
set the #P$ cutoff fre!uency such that the residual voltage ripple is less than the !uanti,ation step
si,e of the DAC. 7ere we will set the ripple to half the !uanti,ation step si,e.
A simple &C ()
st
order) filter has a cutoff fre!uency of ) 1 (2&C) and a roll off of 3d- (power) per
octave (a halving or douling of fre!uency). We must set the #P$ cutoff fre!uency low enough that
the PWM fundamental is filtered to a value less than the !uanti,ation step we can see from the
aove that for every DAC it we introduce we must half the &C filter cutoff fre!uency.
"f we ma'e PWM ripple half the amplitude of the !uanti,ation step si,e we need to set the #P$ one
further octave less than the PWM fre!uency (PWMfre!). 7ence.
#P$ cutoff fre!uency 8 PWMfre! 1 2
() 9 DACits)
8 ) 1 (2 &C)
&C 8 2
DACits
1 ( : PWMfre!)
We can improve the fre!uency response of the DAC (i.e. increase the #P$ cutoff fre!uency) y
increasing the PWM fre!uency however the upper limit of the PWM fre!uency is typically set y
the processor cloc' and the numer of PWM its re!uired. /ote. the downside of increasing the
processor cloc' is that it drives up the current consumption.
R
C
PWM output
1
st
order low pass filter characteristics and choice of DAC frequency.
#ets loo' at some e*amples assuming a 4M7, processor cloc'.
PWM its PWM fre!uency #P$ cutoff fre!uency
); 5<;3.2= 7, (4M7, 1 );24) ).<7,
< >6)2.=7, >.37,
6 )=32=7, (4M7, 1 2=3) 5;.=7,
> 5)2=;7, )227,
3 32=;;7, (4M7, 1 34) 4667,
= )2=;;;7, ).<=?7,
4 2=;;;;7, (4M7, 1 )3) >.6)?7,
indicating that only 4 or = it DAC resolution is achievale at voice fre!uencies with a 4M7, cloc'.
@sing as )3M7, processor cloc'.
PWM its PWM fre!uency #P$ cutoff fre!uency
); )=32= 7, >.37,
< 5)2=;7, 5;.=7,
6 32=;;7, )227,
> )2=;;;7, 4667,
3 2=;;;;7, ).<=?7,
= =;;;;;7, >.6)?7,
4 );;;;;;7, 5).2=?7,
Ahowing that a !uadrupling of processor speed only results in a single it DAC improvement. %his
is ecause we need half of the fre!uency increase to provide the e*tra octave of )
st
order #P$
filtering needed for the e*tra DAC it and the other half is used to increase the PWM resolution y
) it.
@sing a 2;M7, processor cloc'.
0dB
-6dB
-12dB
-18dB
-24dB
-30dB
-36dB
-42dB
fc 2fc 4fc 8fc
-3dB
-6dB per octave
(-20dB per decade)
rolloff
16fc 32fc 64fc fc/2 fc/4
1bt 2bt 3bt 4bt
!bt
128fc
6bt
PWM "#C fre$ue%c&
PWM its PWM fre!uency #P$ cutoff fre!uency
); )<.=?7, <.=7,
< 5<?7, 56.)7,
6 >6?7, )=57,
> )=3?7, 3);7,
3 5)2?7, 2.4?7,
= 32=?7, <.6?7,
4 ).2=M7, 5<?7,

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