Micro-Controller Based Robotic Vaccum Cleaner (89c51)

Contents
1. Introduction
2. Block Diagram & its Description
3. Circuit Diagram & its Description
4. Data Sheets
5. General Components
6. Construction Guidelines
7. Applications & Future Developments

NOTE: Due to continuous improvement and development in the proect desi!n" proect reports
provided are accurate #$ %&'. The di((erence o( 1&' )i( an$* +ill #e in(ormed durin! proect theor$
classes.
Source: Magnum Technologies. 1
Micro-controller Based
Robotic Vacuum Cleaner
Micro-controller Based Robotic Vaccum Cleaner
1. Introduction
, ro#ot is de(ined as a -re.pro!ramma#le multi.(unctional manipulator/. 0n simple +ords" it is a mechanical
s$stem +hich consists o( sensin! and e1ecutin! or!ans2 controlled #$ an electronic -#rain/ that can per(orm
a num#er o( operations independentl$ +ithin a con(ined space. The ro#ot movements are controlled #$ a
computer and (uture movements can #e stored in micro.controller" and thus its o# assi!nments can #e
chan!ed #$ repro!rammin! micro.controller.
, computer controls the ro#ot movements" and thus repro!rammin! can chan!e its o# assi!nments. The
ro#ot descri#ed here is a vehicle +hose movements are controlled #$ computer. The main (eature o( this
ro#otic s$stem is that" this s$stem adopts a +ireless radio. lin3 #et+een the 4ontroller i.e." 4omputer and
the micro.controller resided inside the 5o#ot. 6ere all the command si!nals (rom the computer are
conve$ed to the remotel$ located ro#ot +ith the aid o( 57 communication. The commands received (rom
the computer are veri(ied #$ micro.controller and (inds suita#le then onl$ e1ecutes them.
5o#otic vacuum cleaners in lar!e (actor$ halls (ind the57 +a$ +ith the aid o( sensors and a trac3 in or on
the (loor. The trac3 ma$ consist o( a +hite line painted on a dar3 (loor" or another re(lective su#stance.
8uch trac3s can #e detected +ith optical sensors. To avoid collisions +ith personnel and o#ects" most
ro#otic vacuum cleaners have additional sensors" (or instance" in(rared detectors" cameras" or a 3ind o(
radar #ased on ultra.sonic +aves" laser li!ht or radio +aves. To ena#le them to #e stopped in the event o(
a collision or mal(unction" these ro#ot vehicles usuall$ have a num#er o( easil$ accessi#le s+itches.
5o#ots toda$ are #ein! emplo$ed to release man (rom heav$" tedious" monotonous +or3 li3e arc +eldin!
or to +or3 under conditions +here human #ein!s cannot (unction e((ectivel$. This proect demonstrates the
operation o( an electric vehicle (itted +ith 9accum 4leaner" +hich is capa#le o( cleanin! the intended area
+ithout an$ human intervention. This 5o#otic 9accum 4leaner is ver$ use(ul in (actor$ or lar!e halls or
premises +here cleanin! the (loor is maor headache.
0n :rie(: The -;icro.controller :ased 5o#otic 9accum 4leaner/ proect has t+o parts: Transmitter and
5eceiver. The Transmitter part consists o( 4omputer < 8o(t+are ;odule" 0nter(ace ;odule and 967
Transmitter. The commands are sent #$ the user throu!h 4omputer and the intended so(t+are. These
commands are in 967 )5ecommended 4ode* (orm" and are transmitted to the 5o#otic 9ehicle throu!h
0n(ra.5ed = 57>ac3ets.
The 5eceiver part receives the 967 coded si!nals and (ed to >04 micro.controller chip. This ;icro.
controller decodes 967 codes #ac3 to ori!inal commands and e1ecutes them as needed. 6ere the
decoded si!nals are properl$ routed usin! s+itchin! circuit. The output o( the s+itchin! circuit controls the
movement o( the 5o#otic 9ehicle. 0( the command sa$s to turn 5i!ht= ?e(t or move 7or+ard=5everse it
does so #$ activatin! the respective motor" and thus (ul(illin! the need. The 5eceiver part thus has three
motors: to and (ro movement2 ?e(t=5i!ht turn2 and last one (or vaccum cleanin!.
The proect +or3s in t+o modes: ,uto < ;anual. 0n ,uto mode" one can pro!ram the schedule o( 5o#otic
9ehicle/s movement and move it accordin!l$. 0n ;anual mode user can interact +ith the 5o#otic 9ehicle in
real time and move it accordin! to his need.
Introduction of Robotics
5o#otic s$stems have developed much #e$ond the (irst dea(" #lind and dum# !eneration o( ro#ots used in
the industrial (loor in the earl$ da$s. 5o#ots developed toda$ are used in areas +hich +ould previousl$
have #een unima!ina#le: in sur!er$" in the a(ter care o( patients in hospitals" in !uardin! prisons" in space
e1ploration" under+ater e1peditions" in restaurants and #ars" in industries and even at homes.
9ie+ers o( the recentl$ screened movies" vi@." 0ndependence Da$" ;ars ,ttac3" ,rti(icial 0ntelli!ence" 8tar
Aars" The :lac3 6ole" The Empire 8tri3es :ac3" and 7or Bour E$es Onl$" +ere thrilled #$ the per(ormance
and capacit$ o( the ro#ots. One o( the (astest developin! technolo!ies toda$ is ro#otics" and companies
+ell 3no+n in other (ields" such as car manu(acturin!" are no+ contri#utin! to the !ro+th o( industrial
ro#ots. 5o#ots have assumed a !reat si!ni(icance in the industrial +orld toda$" +hat (ollo+s is a #rie(
introduction o( this electronicall$ controlled marvel.
The 4@ech +riter Carel 4ape3 coined the +ord -5o#ot/ in 1%2& to denote a machine in the (orm o( a man.
6is pla$ -5ossum/s Dniversal 5o#ots/ had a human named 5ossum +ho created a race to serve the
man3ind. ?ater these ro#ots discovered that the$ too had emotions li3e human #ein!s" a sense o( (eelin!
Ethe$ cared (or each otherF" and decidin! that the$ could no lon!er serve the man3ind" proceeded to ta3e
over the +orld.
5o#ots toda$ are #ein! emplo$ed to release man (rom heav$" tedious" monotonous +or3 line arc +eldin!
or to +or3 under conditions +here human #ein!s cannot (unction e((ectivel$" such as under+ater
e1planation" space e1ploration" no1ious !aseous environments" hi!h operatin! temperatures shi(tin!
humidit$" inaccessi#le locations li3e nuclear reactors etc.
5o#ots have #een on the industrial scene since the earl$ si1ties. 6o+ever" the57 hi!h cost precluded
+ider accepta#ilit$. Toda$" #$ incorporatin! microprocessors" the cost is (allin! +hile the57 accurac$ is
increasin!.
4ountries li3e Gapan" the D8," the D885" Aest Herman$ and 7rance have over 15&& ro#ots each
installed in the57 various (actories" +ith the Dnited 8tates and Gapan accountin! (or nearl$ 75 percent o(
the57 use. The (actors responsi#le (or this hi!h percenta!e are shorta!e o( la#or in Gapan and hi!h la#or
cost in the D8,. 0n 0ndia" 6;T in :an!alore and Telco in >une have #e!un manu(acture o( industrial
ro#ots.
MICRO-CONTROLLER IN ROBOTICS
;icro.controller has elevated electronics to a !reat hei!ht. 0t is #ein! used in man$ industrial instruments"
medical eIuipment" microcomputers and pro!ramma#le lo!ic controllers. 0ts speed o( operations is
ama@in!. Earl$ ei!hties sa+ the advent o( ro#ots" especiall$ in industries. The automatic industries o(
Gapan" the D8, and the DC have installed man$ ro#ots in the57 assem#l$ lines. This has improved the
Iualit$ o( the57 +or3 and speed. ;an$ t$pes o( ro#ots +ere displa$ed in EJ>O K5 o( Gapan in Tsu3u#a.
Aith the help o( micro.controllers and ro#ots" a ne+ -;icro.controller :ased 0ndustrial ,utomation/ concept
has developed. Electronic eIuipment can #e used in e((icient man.machine inter(ace" ma3in! the
communications (aster.
6avin! helped the industr$" electronics has entered the /house/. Transistor" radio" tape recorders" television
sets" to$ and educational eIuipment are commonl$ household items. ,ll these products have made the li(e
more com(orta#le. >ersonal computers are #ein! used in homes in man$ countries to 3eep trac3 o(
accounts" (amil$ health details and such other in(ormation.
5emote controllers (or T9/s and 945/s ena#le vie+ers to s+itch o(( the set or chan!e the channel (rom a
distance. :i!!er houses have intercoms so that a person need not !et to another room (or communication.
:ur!lar alarm is ener!i@ed #e(ore leavin! the house. Ahoever enters the house has to (irst put o(( the
s$stem #$ resettin! it. The location is 3no+n availa#le to disa#le it is onl$ 1& to 25 seconds. ,n
unauthori@ed visitor +ill not #e a#le to reset the s+itch in that time and the alarm +ill alert the nei!h#ors.
7ire sensors" !as alarm are the other !ad!ets" +hich ta3e care o( (ire mishaps. Time s+itches turn on and
o(( an$ electrical appliance at the preset time.
9ideo !ames and electronic to$s help in providin! leisure and com(ort at home. 6o+ever" these s$stems
cannot !enerall$ #e com#ined to!ether (or economical compati#ilit$.
AUTOMATION AT INDUTRI!
;icro.controller #ased 0ndustrial ,utomation is aimed to reduce supervision o( human and to create a
com(orta#le < sa(e +or3in! environment. There are several #i! companies +ho are en!a!ed in this ;icro.
controller :ased 0ndustrial ,utomation (ield. 7or e1ample ,llen :randel$" ,::" 8imens are producin!
>ro!ramma#le ?o!ic 4ontrollers )>??s* and the57 related instruments" so(t+are" hard+are and controllin!
panels. These >??s are capa#le o( controllin! the small" medium or #i! industries +ith less human
intervention.
;icro.controller #ased 0ndustrial ,utomation E0,F comprises (our su#.s$stems to per(orm di((erent (unctions
)o( course +ith the help o( 4omputer*:
Industrial keeping system: -
, module called 6ome Terminal L +hich comprises a telephone=intercom master unit" master and room
monitor controller" T9" door and phone controllers and indicators L is the heart o( securit$ < sa(et$ 3eepin!
s$stem.
This su#.s$stem controls temperature o( +ater in (urnace" 3eeps record o( the consumption o( electricit$
and +ater !ets si!nals (rom #ur!lar alarms" !as lea3s" (lame sensors etc" and !ives +arnin!. :esides" it
receives the incomin! phone calls" ans+ers or sends messa!es at appropriate time and turns on=o(( time.
punch machines (or attendance purpose" li!htin! < vi!ilant cameras etc. 0ntercom at the main door lets the
securit$ person 3no+ the identit$ o( a visitor. 0t ensures that the emplo$ee has enou!h sa(et$ and com(ort
#$ ta3in! care o( securit$ o( the industr$" ener!$ control" eIuipment control etc. 0t has modular construction
and should #e installed cent rall$" mainl$ in ne+ #uildin!s as the +irin! involved is to #e ta3en care o(.
INTERFACE SSTEM
,lso 3no+n as communication s$stem" it allo+s the user to communicate +ith others. 0t +or3s +ith hi!h
de(inite T9" ca#le T9 E4,T9F" direct #roadcastin! s$stem ED:8F etc. one can !et the ne+s or special
announcements throu!h video or audio or te1t (orm.
>eople in some countries no+ do (ield +or3 sittin! in the com(ort o( the57 cham#er throu!h a personal
computer connected to the o((ice. On can also use it to control the instruments and share the status o( the
instruments +ith another (ield en!ineer +ho is (ar a+a$ < connected to the computer data#ase s$stem.
8D;;,5B
The latest development in ro#otics in 0ndustrial environment has #een discussed here. , lot o( research
and development is #ein! done in this (ield. 0ndustrial ro#ots +ill #e doin! most o( the industrial hold
chores and the +or3ers +ill #e rela1in! Eand occasionall$ scoldin! the ro#otsMF or ta3e up more productive
o#s.
;,0N 7E,TD5E8 O7 T6E >5OGE4T:
1. 8imple in desi!n"
2. ?o+ po+er consumption" and compact si@e"
4. ?inear" smooth < eas$ control o( the vehicle due to emplo$ o( computer
5. 6i!h relia#ilit$" due to the usa!e o( po+er semiconductor devices and pro!ramma#le ;icro.controller"
6. Hreater control ran!e due the usa!e o( 0n(ra 5ed communication.
". B#OC$ DIA%RAM D!CRI&TION'
This -;icro.controller :ased 5o#otic 9accum 4leaner/ proect is divided into t+o parts: Transmitter <
5eceiver. The Transmitter part transmits the command si!nals to the 5o#otic 9ehicle" +here as 5eceiver
part decodes this commands and e1ecutes them. This proect +or3s in t+o mode: ,uto ;ode" +here
movement o( the 5o#otic 9ehicle is pre.pro!rammed and in ;anual ;ode user controls the 5o#otic
vehicle in real.time. :oth these modes ma3e no chan!e in hard+are part o( this proect" onl$ so(t+are
chan!es its modes accordin! to the mode.
TRANSMITTER !ART
The Transmitter >art" as sho+n in 7i! 2.1" consists o( su#.#loc3s: >4 < 8o(t+are ;odule" 0nter(ace 8ta!e
)made o( :u((er and Driver=8+itchin! sta!e*" 967 Transmitter and >o+er 8uppl$ Dnit. ?et us see +hat this
part actuall$ does and each #loc3 in detail.
0n :rie(: The user enters his reIuirement or pro!rammes his schedule usin! the so(t+are. This
pro!ram is converted into command si!nals and (ed to 967 Transmitter to transmit the
commands. 6ere the computer accepts or deals +ith TT? 4ompati#le si!nal levels onl$" 0nter(ace
8ta!e is reIuired #et+een the Transmitter and 4omputer. 7or transmission o( si!nals 0n(ra 5ed
ra$s are used.

>4 < 8o(t+are ;odule: The 4omputer pla$s the role o( main controller unit" and allo+s the user
to pro!ram or control the movement o( the 5o#otic 9ehicle. The user interactive so(t+are
provides t+o options to control the 5o#otic 9ehicle. 0( user chooses ,uto mode" then he is
allo+ed to enter (or+ard or reverse movement time" ri!ht or le(t turn command and ON=O77 time
o( the 9accum 4leaner. Once the schedule is prepared +ith speci(ied On=O(( time" then so(t+are
module chan!es it into command si!nals and sent to transmitter. 0( user is in ;anual mode" then
real.time interaction +ith 5o#otic 9ehicle is possi#le. That means user can move the 5o#otic
9ehicle 7or+ard=5everse or 5i!ht=?e(t turn +ith vaccum cleaner ON=O77 #$ pressin! num#er
3e$s )(rom 1 to 5* on the numeric 3e$ pad.
There are totall$ (ive command si!nals comin! out o( the computer: 7or+ard < 5everse
;ovement" ?e(t < 5i!ht Turn" and 9accum 4leaner On=O(( si!nal. These commands are (ed to
967 Transmitter throu!h 0nter(ace 8ta!e.
0nter(ace 8ta!e: The command si!nals comin! out o( the computer are in TT? 4ompati#le levels.
8o the outer hard+are part" +hich deals +ith various si!nal levels" must #e properl$ isolated (rom
the sensitive output port o( the computer. This sta!e provides isolation #et+een the computer and
Source: Magnum Technologies.
Fig 2.1 BLOCK DIAGRAM OF TRANSMITTER
0NTE57,4E 8T,HE
8O7TA,5E
;ODD?E
:D77E5
D509E5
8A0T460NH
8T,HE
967
T5,N8;0TTE5
>OAE5
8D>>?B
DN0T
K
rest o( the hard+are circuit. Not onl$ this" it drives the s+itchin! sta!e" +hich in turn produces
di((erent command si!nal codes in 967 (ormat. These 967 coded (ive commands are read$ to
transmit.
?et us see each su#.#loc3s description in separate headin!.
:u((er: This sta!e provides the isolation #et+een computer and rest o( the e1ternal hard+are
part. ,nd also #oosts the +ea3 command si!nals to su((icient level" such that it can #e used (or
(urther processin!.
Driver < 8+itchin! 8ta!e: The #oosted command si!nals are (ed to driver section" +hich in turn
drives the rela$s. The 8+itchin! sta!e per(ormed #$ rela$s produces respective (ive 967 codes
and (ed to ne1t sta!e (or transmission.
967 Transmitter: These (ive 967 coded command si!nals are transmitted to 5o#otic 9ehicle in
the (orm 57 pac3ets.
>o+er 8uppl$ Dnit: This section provides the +or3in! volta!e to this Transmitter part. This
transmitter part needs N129" N59 +ith 65milli ,mperes current consumption. This speciall$
constructed po+er suppl$ provides #oth volta!es +ith accurac$.
RECEI"ER !ART
The 5eceiver >art" as sho+n in 7i! 2.2" consists o( su#.#loc3s: >4 < 8o(t+are ;odule" 0nter(ace 8ta!e
)made o( :u((er and Driver=8+itchin! sta!e*" 967 Transmitter and >o+er 8uppl$ Dnit. This 5eceiver part is
(itted on the 5o#otic 9ehicle and receives the command si!nal (or e1ecution. ?et us see +hat this part
actuall$ does and each #loc3 in detail.
0n :rie(: The 967 coded (ive command si!nals are received throu!h 967 5eceiver #loc3. These
(ive 967 coded si!nals are decoded and (ed to ;icro.controller 04. This ;icro.controller process
this command si!nals and (ed to driver sta!e (or (urther e1ecution. The driver sta!e #oosts the
command si!nals comin! out o( >04 micro.controller 04 and actuates respective rela$s. 6ere the
0ndicator sta!e !ives the indication to sho+ +hich rela$ is activated. The rela$s (orm s+itchin!
sta!e +hich smartl$ actuate respective rela$ and helps to e1ecute the command. The (ive
command si!nals helps user to control the movement o( 5o#otic 9ehicle: in (or+ard or reverse
direction2 le(t or ri!ht turn2 and vaccum cleaner ON=O77.
Source: Magnum Technologies. %
Fig 2.2 BLOCK DIAGRAM OF RECEIER
);045O.4ONT5O??E5*
D509E5
0ND04,TO5
8A0T460NH
8T,HE
967 5E4E09E5
;1
;2
;3
7+d=5ev ;otor
?e(t=5i!ht ;otor
9=4 ;otor
;otor 8ta!e
>OAE5
8D>>?B
DN0T
1&
The #loc3 dia!ram e1planation !oes li3e this:
967 5eceiver: The (ive command si!nals are received #$ this sta!e. This sta!e decodes that
967 coded si!nals and (ed to >04 micro.controller chip (or command e1ecution.
>04 );icro.controller*: The heart o( the 5o#otic 9ehicle is this >04 micro.controller chip. This chip
receives the decoded command si!nals and veri(ies +hether the$ are valid one or not. 0( the$ are
valid commands then process it and then (ed to driver sta!e (or s+itchin! proper rela$s.
Driver: ,s the s+itchin! sta!e per(ormed #$ rela$s need stron!er si!nals to !et actuate" this
driver sta!e #oosts the command si!nals to su((icient level. The output o( this driver sta!e is (ed
to indicator section and to s+itchin! sta!e.
0ndicator: This sta!e provides visual indication o( +hich rela$ is actuated and deactivated" #$
!lo+in! respective ?ED.
8+itchin! 8ta!e: The rela$s (orm this s+itchin! sta!e and actuate themselves" +henever
respective command si!nal is sent #$ the transmitter part. This s+itchin! sta!e controls the
movement o( the 5o#otic 9ehicle and causes it to move (or+ard=reverse or to ta3e le(t=ri!ht turn
and to ma3e vaccum cleaner ON=O77.
;otor 8ta!e: This sta!e has three motors: ;1 (or 7or+ard < 5everse direction movement o( the
5o#otic 9ehicle" ;2 (or ?e(t or 5i!ht Turn o( the 9ehicle" and (inall$ ;3 to s+itch ON=O77 the
9accum 4leaner ;achine.

>o+er 8uppl$ Dnit: This sta!e provides +or3in! volta!e to this 5eceiver part. ,s Transmitter >art" this part
too needs t+o supplies" N%9 < N59 (or proper +or3in! volta!e o( the part. The N%9 is produced #$ usin! a
>o+er >ac3 +hich can hold si1 ,l3aline #atteries. The N59 is provided #$ re!ulated po+er suppl$
constructed on three terminal re!ulator 04 7K&5.
(. Circuit Descri)tion
,ccordin! to circuit construction this -;icro.controller :ased 5o#otic vaccum 4leaner/ proect is divided
into t+o parts: Transmitter < 5eceiver part. The transmitter part is 3ept +ith the controllin! unit" a
computer" to transmit the command si!nals. ,nd the receiver part is (itted on the 5o#otic 9ehicle to receive
the command si!nal and e1ecutes them.
TRANMITT!R &ART
This part is constructed on the copper #oard as sin!le module onl$" e1cept the 967 Transmitter section.
The :u((er" Driver < 8+itchin! 8ta!es are inte!rated in sin!le printed circuit #oard to avoid an$ data loss
and +ea3enin! o( si!nal level. The 967 Transmitter section is separatel$ #uilt to avoid an$ si!nal or noise
inter(erence +ith the command si!nals. The >o+er 8uppl$ is speciall$ #uilt to provide N59olts and N12
volts as +or3in! volta!e.
BUFFER, DRIVER & SWITCHING MODULE
Ahen the user pro!rams the schedule (or the automation usin! HD0 )Hraphical Dser 0nter(ace* so(t+are" it
actuall$ sends 5.#it control si!nals to the circuit. The present circuit provides inter(acin! +ith the printer
port o( the >ersonal 4omputer and the controllin! circuitr$. This circuit ta3es the 5.#it control si!nal"
isolates the >4 (rom this circuitr$" #oosts control si!nals (or reIuired level and (inall$ (ed to the driver
section to actuate rela$. These (ive rela$s in turn sends 967
coded commands +ith respect to the57 rela$ position.
7irst the components used in this ;odule are discussed and then
the actual circuit is dealt in detail.
#E$ B%FFER & CON"ERTER 'NON-IN"ERTER( IC )*+*:
:u((ers does not a((ect the lo!ical state o( a di!ital si!nal Ei.e. lo!ic
1 input results into lo!ic 1 output +here as lo!ic & input results
into lo!ic & outputF. :u((ers are normall$ used to provide e1tra
current drive at the output" #ut can also #e used to re!ularise the
lo!ic present at an inter(ace. ,nd 0nverters are used to
complement the lo!ical state Ei.e. lo!ic 1 input results into lo!ic &
output and vice versaF. ,lso 0nverters are used to provide e1tra
current drive and" li3e #u((ers" are used in inter(acin! applications.
This 16.pin D0? pac3a!ed 04 4&5& acts as :u((er as.+ell.as a
4onverter. The input si!nals ma$ #e o( 2.5 to 59 di!ital TT?
compati#le or D4 analo!ue the 04 !ives 59 constant si!nal
output. The 04 acts as #u((er and provides isolation to the main
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circuit (rom var$in! input si!nals. The +or3in! volta!e o( 04 is 4 to 16 9olts and propa!ation dela$ is 3&
nanoseconds. 0t consumes &.&1 mill Aatt po+er +ith noise immunit$ o( 3.7 9 and to!!le speed o( 3
;e!ahert@.
%LN ,**): 8ince the di!ital outputs o( the some
circuits cannot sin3 much current" the$ are not capa#le
o( drivin! rela$s directl$. 8o" hi!h.volta!e hi!h.current
Darlin!ton arra$s are desi!ned (or inter(acin! lo+.level
lo!ic circuitr$ and multiple peripheral po+er loads. The
series D?N2&&&,=? 04s drive seven rela$s +ith
continuous load current ratin!s to 6&&m, (or each
input. ,t an appropriate dut$ c$cle dependin! on
am#ient temperature and num#er o( drivers turned ON
simultaneousl$" t$pical po+er loads totallin! over
26&A )4&&m, 1 7" %59* can #e controlled. T$pical
loads include rela$s" solenoids" steppin! motors"
ma!netic print hammers" multiple1ed ?ED and
incandescent displa$s" and heaters. These Darlin!ton
arra$s are (urnished in 16.pin dual in.line plastic
pac3a!es Esu((i1 ,F and 16.lead sur(ace.mounta#le
8O04s Esu((i1 ?F. ,ll devices are pinned +ith outputs
opposite inputs to (acilitate ease o( circuit #oard la$out.
The input o( D?N 2&&4 is TT?.compati#le open.collector outputs. ,s each o( these outputs can sin3 a
ma1imum collector current o( 5&& m," miniature >4: rela$s can #e easil$ driven. No additional (ree.
+heelin! clamp diode is reIuired to #e connected across the rela$ since each o( the outputs has in#uilt
(ree.+heelin! diodes. The 8eries D?N2&14,=? (eatures series input resistors (or operation directl$ (rom 6
to 159 4;O8 or >;O8 lo!ic outputs.
-N)-). signal di/de: 8i!nal diodes are used to process in(ormation Eelectrical si!nalsF in circuits" so the$
are onl$ reIuired to pass small currents o( up to 1&&m,. Heneral purpose si!nal diodes such as the
1N414K are made (rom silicon and have a (or+ard volta!e drop o( &.79.
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IC U#N "**+
13
CIRCUIT DIA%RAM O, BU,,!R- DRIV!R . /ITC0IN% TA%!
5
3
%
7
K
1
11
4
2
1&
6
12
14
15
5?2 5?3 5?4 5?5
041
042
2
1
4
3
K
%
5
15
16
13
12
6 11
14
7
1&
51 TO 55
D1 TO D5
N59
Hnd
N12 9
4ommands
(rom >4
D6.D1&
56.51&
5?1
N=4
4O;.1
N=4
4O;.2
N=4
4O;.3
N=4
4O;.4
N=4
4O;.5
14
>arts ?ist:
Circuit Descri)tion'
The 6e1 :u((er=0nverter 041/s +or3in! volta!e o( N59 is applied at pin.1 and (ive control si!nals are
applied at input pins 3" 5" 7" % < 11. Thus the si!nal suppl$in! circuit )i.e. >4* is isolated (rom this :u((er
< Driver circuit. 7urther the !roundin! resistors 51 to 55 prevents the a#normal volta!e levels passin!
inside the 041. The #u((ered outputs are acIuired at pins 2" 4" 6" 1&" < 12. Thus the var$in! input is
(urther sta#ili@ed and (ed to si!nal diodes )D1 to D5*. ,s the load is inductive" there is a chance o(
producin! #ac3 e.m.(. 8o to cope +ith this #ac3 e.m.(" si!nal diodes are used. :ut this si!nal level is not
stron! enou!h to drive the lo+ impedance rela$. 8o" 042 Darlin!ton driver is used. 0ts +or3in! volta!e is
N12 9 and onl$ (ive input=output pins are used. The output si!nal (rom the Darlin!ton driver 04 is stron!
enou!h to actuate (ive rela$s.
These rela$s +ith N129 +or3in! volta!e can #e used to produce (ive command si!nals +ith 967 (ormat.
The N=O )Normall$ Open* contact o( each rela$ produces one command si!nal +ith the help o( 967
Transmitter 4ircuit. The (ive rela$s activation +ith the57 correspondin! command si!nal production is
ta#ulated as #elo+:
5E?,B 4O;;,ND ND;:E5 4O;;,ND 80HN,?
5?1 4O;.1 TD5N ?E7T
5?2 4O;.2 TD5N 50H6T
5?3 4O;.3 ;O9E :,4CA,5D
5?4 4O;.4 ;O9E 7O5A,5D
5?5 4O;.5
8A0T46 ON=O77 T6E
8D4C0NH DE904E
MOT0!R BOARD 12C31
8ource: ;a!num Te01n/l/gies2
!MICONDUCTOR
041 4&5& 6EJ :D77E5=4ON9E5TE5ENON.0N9E5TE5F 1
042 2&&4 D,5?0NHTON ,55B 1
R!ITOR
51 to 55 22& Ohm O Aatt 4ar#on 5esistors 5
56 to 51& 2.2 C Ohm O Aatt 4ar#on 5esistors 5
DIOD!
D1to D5 1N414K 80HN,? Diodes 5
D6 to D1& 5ed 0ndicator ?EDs 5
MIC!##AN!OU
5?1.5?5 12 9" 7&& Ohm D>DT 5eed 5ela$s 5
15
The K%451 ;icro.controller is heart o( this proect. 0t is the chip that processes the %ser 3ata
and e1ecutes the same. The so(t+are inherited in this chip manipulates the data and sends the
result (or visual displa$.
INTRODUCTION O, Micro-controller
/4at is a microcontroller5
The !eneral de(inition o( a microcontroller is a single chip c!p"#e$" +hich re(ers to the (act that the$
contain all o( the (unctional sections E4>D" 5,;" 5O;" 0=O" ports and timersF o( a traditionall$ de(ined
computer on a sin!le inte!rated circuit. 8ome e1perts even descri#e them as special p"$pse
c!p"#e$s +ith several Iuali($in! distinctions that separate them (rom other computers.

;icrocontrollers are Pem#eddedP inside some other device Eo(ten a consumer productF so that the$ can
control the (eatures or actions o( the product. ,nother name (or a microcontroller" there(ore" is
Pe!%e&&e& cn#$lle$.P

;icrocontrollers are dedicated to one tas3 and run one speci(ic pro!ram. The pro!ram is stored in 5O;
Eread.onl$ memor$F and !enerall$ does not chan!e.

;icrocontrollers are o(ten lo+.po+er devices. , des3top computer is almost al+a$s plu!!ed into a +all
soc3et and mi!ht consume 5& +atts o( electricit$. , #atter$.operated microcontroller mi!ht consume 5&
mill +atts.

, microcontroller has a dedicated input device and o(ten E#ut not al+a$sF has a small ?ED or ?4D
displa$ (or output. , microcontroller also ta3es input (rom the device it is controllin! and controls the
device #$ sendin! si!nals to di((erent components in the device.
, microcontroller is o(ten small and lo+ cost. The components are chosen to minimi@e si@e and to #e as
ine1pensive as possi#le.
, microcontroller is o(ten" #ut not al+a$s" ru!!edi@ed in some +a$. The microcontroller controllin! a
carQs en!ine" (or e1ample" has to +or3 in temperature e1tremes that a normal computer !enerall$ cannot
handle. , carQs microcontroller in Cashm57 re!ions has to +or3 (ine in .3& de!ree 7 E.34 4F +eather"
+hile the same microcontroller in Huarat re!ion mi!ht #e operatin! at 12& de!rees 7 E4% 4F. Ahen $ou
add the heat naturall$ !enerated #$ the en!ine" the temperature can !o as hi!h as 15& or 1K& de!rees 7
8ource: ;a!num Te01n/l/gies2 16
E65.K& 4F in the en!ine compartment. On the other hand" a microcontroller em#edded inside a 945
hasnQt #een ru!!edi@ed at all.
4learl$" the distinction #et+een a computer and a microcontroller is sometimes #lurred. ,ppl$in! these
!uidelines +ill" in most cases" clari($ the role o( a particular device.
/46 are t4e6 so )o)ular5
The pro!ramma#ilit$ o( modern des3top >4s ma3es them e1traordinaril$ versatile. The (unctionalit$ o(
the entire machine can #e altered #$ merel$ chan!in! its pro!rammin!. ;icrocontrollers share this
attri#ute +ith the57 des3top relatives. The chips are manu(actured +ith po+er(ul capa#ilities and the
end user determines e1actl$ ho+ the device +ill (unction. O(ten" this ma3es a dramatic di((erence in the
cost and comple1it$ o( a particular desi!n. The true impact o( this statement is #est illustrated #$
e1ample.
7or ever$ cloc3 pulse" the circuit produces one o( the three #it num#ers in the seIuence &&&" 1&&" 111"
&1&" &11. This desi!n has #een implemented +ith three (lip.(lops and seven discrete !ates as +ell as a
si!ni(icant amount o( +irin!.
The desi!n o( this s$stem can #e Iuite la#orious. One must #e!in +ith a state !raph (ollo+ed #$ a state
ta#le. Then" the (lip.(lop T input eIuations must #e derived (rom a set o( Carnau!h maps. Ne1t" the t
input eIuations must #e trans(ormed into the actual T input net+or3. ,ll o( this circuitr$ must then #e
+ired to!ether2 a tas3 thatQs time consumin! and sometimes error prone. On the other hand" this can #e
accomplished +ith a simpler" less costl$ microcontroller desi!n. Notice the dramatic di((erence in the
amount o( hard+are and +irin!. This simple circuit" alon! +ith a#out a do@en lines o( code" +ill per(orm
the same tas3 as the (irst circuit. There are other #ene(its as +ell. The microcontroller implementation
does not have to contend +ith the undetermined states that sometimes occur +ith discrete desi!ns. ,lso
consider (or a moment +hat +ould #e reIuired to chan!e the seIuence o( num#ers in the (irst circuit .
Ahat i( the output needs to #e chan!ed to ei!ht #its instead o( threeM These are trivial modi(ications (or
the microcontroller +hile the discrete circuit +ould reIuire a complete redesi!n.
The e1ample a#ove is not an o#scure case. The e((ects o( this device are #ein! (elt in almost ever$ (acet
o( di!ital desi!n. , sure method o( determinin! the popularit$ o( an electronic device is to note +hen the$
attain +idespread use #$ ho##$ists. 0t there(ore #ecomes essential that the electronics en!ineer or
ho##$ist learn to pro!ram these microcontrollers to maintain a level o( competence and to !ain the
advanta!es microcontrollers provide in his or her o+n circuit desi!ns.
Introducin7 t4e Intel8s Microcontroller K%451
,eatures
R 4ompati#le +ith ;48.51S >roducts
R KC :$tes o( 0n.8$stem 5epro!ramma#le 7lash ;emor$
R Endurance: 1"&&& Arite=Erase 4$cles
R 7ull$ 8tatic Operation: & 6@ to 24 ;6@
R Three.level >ro!ram ;emor$ ?oc3
R 256 1 K.#it 0nternal 5,;
R 32 >ro!ramma#le 0=O ?ines
R Three 16.#it Timer=4ounters
R Ei!ht 0nterrupt 8ources
R >ro!ramma#le 8erial 4hannel
R ?o+.po+er 0dle and >o+er.do+n ;odes
Descri)tion
The ,TK%452 is a lo+.po+er" hi!h.per(ormance 4;O8
K.#it microcomputer +ith KC #$tes o( 7lash
pro!ramma#le and erasa#le read onl$ memor$
E>E5O;F. The device is manu(actured usin! ,tmel/s
hi!h.densit$ nonvolatile memor$ technolo!$ and is
compati#le +ith the industr$.standard K&451 and K&452
instruction set and pin out.
The on.chip 7lash allo+s the pro!ram memor$ to #e
repro!rammed in.s$stem or #$ a conventional
nonvolatile memor$ pro!rammer. :$ com#inin! a
versatile K.#it 4>D +ith 7lash on a monolithic chip" the
,tmel ,TK%452 is a po+er(ul microcomputer +hich
provides a hi!hl$.(le1i#le and cost.e((ective solution to
man$ em#edded control applications.
The ,TK%452 provides the (ollo+in! standard (eatures:
KC #$tes o( 7lash" 256 #$tes o( 5,;" 32 0=O lines" three 16.#it timer=counters" a si1.vector t+o.level
interrupt architecture" a (ull.duple1 serial port" on.chip oscillator" and cloc3 circuitr$.
8ource: ;a!num Te01n/l/gies2 1K
0n addition" the ,TK%452 is desi!ned +ith static lo!ic (or operation do+n to @ero (reIuenc$ and supports
t+o so(t+are selecta#le po+er savin! modes. The 0dle ;ode stops the 4>D +hile allo+in! the 5,;"
timer=counters" serial port" and interrupt s$stem to continue (unctionin!.
The >o+er.do+n mode saves the 5,; contents #ut (ree@es the oscillator" disa#lin! all other chip
(unctions until the ne1t hard+are reset.
&in Descri)tion
8ource: ;a!num Te01n/l/gies2 1%
VCC
8uppl$ volta!e.
%ND
Hround.
&ort *
>ort & is an K.#it open drain #i.directional 0=O port. ,s an output port" each pin can sin3 ei!ht TT? inputs.
Ahen 1s are +ritten to port & pins" the pins can #e used as hi!h impedance inputs.
>ort & can also #e con(i!ured to #e the multiple1ed lo+ order address=data #us durin! accesses to
e1ternal pro!ram and data memor$. 0n this mode" >& has internal pull ups.

>ort & also receives the code #$tes durin! 7lash pro!rammin! and outputs the code #$ test durin!
pro!ram veri(ication. E1ternal pull ups are reIuired durin! pro!ram veri(ication.
&ort 1
>ort 1 is an K.#it #i.directional 0=O port +ith internal pull ups. The >ort 1 output #u((ers can sin3=source
(our TT? inputs. Ahen 1s are +ritten to >ort 1 pins" the$ are pulled hi!h #$ the internal pull ups and can
#e used as inputs. ,s inputs" >ort 1 pins that are e1ternall$ #ein! pulled lo+ +ill source current E00?F
#ecause o( the internal pull ups.
0n addition" >1.& and >1.1 can #e con(i!ured to #e the timer=counter 2 e1ternal count input E>1.&=T2F and
the timer=counter 2 tri!!er input E>1.1=T2EJF" respectivel$.
>ort 1 also receives the lo+.order address #$tes durin! 7lash pro!rammin! and veri(ication. >ort >in
,lternate 7unctions >1.& T2 Ee1ternal count input to Timer=4ounter 2F" cloc3.out >1.1 T2 EJ
ETimer=4ounter 2 capture=reload tri!!er and direction controlF ,TK%452
&ort "
#ecause o( the internal pull ups. >ort 2 emits the hi!h.order address #$te durin! (etches (rom e1ternal
8ource: ;a!num Te01n/l/gies2 2&
pro!ram memor$ and durin! accesses to e1ternal data memor$ that uses 16.#it addresses E;O9J T
D>T5F. 0n this application" >ort 2 uses stron! internal pull ups +hen emittin! 1s. Durin! accesses to
e1ternal data memor$ that uses K.#it addresses E;O9J T 50F" >ort 2 emits the contents o( the >2
8pecial 7unction 5e!ister.
>ort 2 also receives the hi!h.order address #its and some control si!nals durin! 7lash >ro!rammin!
and veri(ication.
&ort (
#ecause o( the pull ups.
>ort 3 also receives some control si!nals (or 7lash pro!rammin! and veri(ication.
>ort >in ,lternate 7unctions
>3.& 5JD Eserial input portF
>3.1 TJD Eserial output portF
>3.2 0NT& Ee1ternal interrupt &F
>3.3 0NT1 Ee1ternal interrupt 1F
>3.4 T& Etimer & e1ternal inputF
>3.5 T1 Etimer 1 e1ternal inputF
>3.6 A5 Ee1ternal data memor$ +rite stro#eF
>3.7 5D Ee1ternal data memor$ read stro#eF
RT
5eset input. , hi!h on this pin (or t+o machine c$cles +hile the oscillator is runnin! resets the device.
A#!9&RO%
,ddress ?atch Ena#le is an output pulse (or latchin! the lo+ #$te o( the address durin! accesses to
e1ternal memor$. This pin is also the pro!ram pulse input E>5OHF durin! 7lash pro!rammin!. 0n normal
operation" ,?E is emitted at a constant rate o( 1=6 the oscillator (reIuenc$ and ma$ #e used (or e1ternal
timin! or cloc3in! purposes. Note" ho+ever" that one ,?E pulse is s3ipped durin! each access to
e1ternal data memor$.
0( desired" ,?E operation can #e disa#led #$ settin! #it & o( 875 location KE6. Aith the #it set" ,?E is
active onl$ durin! a ;O9J or ;O94 instruction. Other+ise" the pin is +ea3l$ pulled hi!h. 8ettin! the
,?E.disa#le #it has no e((ect i( the microcontroller is in e1ternal e1ecution mode.
&!N
>ro!ram 8tore Ena#le is the read stro#e to e1ternal pro!ram memor$. Ahen the ,TK%452 is e1ecutin!
code (rom e1ternal pro!ram memor$" >8EN is activated t+ice each machine c$cle" e1cept that t+o
>8EN activations are s3ipped durin! each access to e1ternal data memor$.
!A9V&&
E1ternal ,ccess Ena#le. E, must #e strapped to HND in order to ena#le the device to (etch code (rom
e1ternal pro!ram memor$ locations startin! at &&&&6 up to 77776.
Note" ho+ever" that i( loc3 #it 1 is pro!rammed" E, +ill #e internall$ latched on reset. E, should #e
strapped to 944 (or internal pro!ram e1ecutions.
This pin also receives the 12.volt pro!rammin! ena#le volta!e E9>>F durin! 7lash pro!rammin! +hen
12.volt pro!rammin! is selected.
:TA#1
0nput to the invertin! oscillator ampli(ier and input to the internal cloc3 operatin! circuit.
8pecial 7unction 5e!isters
, map o( the on.chip memor$ area called the 8pecial 7unction 5e!ister E875F space. Note that not all o(
the addresses are occupied" and unoccupied addresses ma$ not #e implemented on the chip. 5ead
accesses to these addresses +ill in !eneral return random data" and +rite accesses +ill have an
indeterminate e((ect.
Dser so(t+are should not +rite 1s to these unlisted locations" since the$ ma$ #e used in (uture products
to invo3e ,TK%452 ne+ (eatures. 0n that case" the reset or inactive values o( the ne+ #its +ill al+a$s #e
&.
Timer 2 5e!ister/s 4ontrol and status #its are contained in re!isters T24ON and T2;OD (or Timer2. The
re!ister pa57 E54,>26" 54,>2?F is the 4apture=5eload re!isters (or Timer 2 in 16.#it capture mode or
16.#it auto.reload mode.
Interru)t Re7ister
The individual interrupt ena#le #its are in the 0E re!ister. T+o priorities can #e set (or each o( the si1
interrupt sources in the 0> re!ister.r
8$m#ol 7unction
T72 Timer 2 over(lo+ (la! set #$ a Timer 2 over(lo+ and must #e cleared #$ so(t+are. T72 +ill
not #e set +hen either 54?C U 1 or T4?C U 1.
EJ72 Timer 2 e1ternal (la! set +hen either a capture or reload is caused #$ a ne!ative transition
on T2EJ and EJEN2 U 1. Ahen Timer 2 interrupt is ena#led" EJ72 U 1 +ill cause the 4>D
to vector to the Timer 2 interrupt routine. EJ72 must #e cleared #$ so(t+are. EJ72 does
not cause an interrupt in up=do+n counter mode ED4EN U 1F.
54?C 5eceive cloc3 ena#le. Ahen set" causes the serial port to use Timer 2 over(lo+ pulses (or
it/s receive cloc3 in serial port ;odes 1 and 3. 54?C U & causes Timer 1 over(lo+ to #e
used (or the receive cloc3.
T4?C Transmit cloc3 ena#le. Ahen set" causes the serial port to use Timer 2 over(lo+ pulses (or
it/s transmit cloc3 in serial port ;odes 1 and 3. T4?C U & causes Timer 1 over(lo+s to #e
used (or the transmit cloc3.
EJEN2 Timer 2 e1ternal ena#le. Ahen set" allo+s a capture or reload to occur as a result o( a
ne!ative transition on T2EJ i( Timer 2 is not #ein! used to cloc3 the serial port. EJEN2 U &
causes Timer 2 to i!nore events at T2EJ.
T52 8tart=8top control (or Timer 2. T52 U 1 starts the timer.
4=T2 Timer or counter select (or Timer 2. 4=T2 U & (or timer (unction. 4=T2 U 1 (or e1ternal event
counter E(allin! ed!e tri!!eredF.
4>=5?2 4apture=5eload select. 4>=5?2 U 1 causes captures to occur on ne!ative transitions at
T2EJ i( EJEN2 U 1. 4>=5?2 U & causes automatic reloads to occur +hen Timer 2
over(lo+s or ne!ative transitions occur at T2EJ +hen EJEN2 U 1. Ahen either 54?C or
T4?C U 1" this #it is i!nored and the timer is (orced to auto.reload on Timer 2 over(lo+.
Data Memor6
The ,TK%452 implements 256 #$tes o( on.chip 5,;. The upper 12K #$tes occup$ a parallel address
space to the 8pecial 7unction 5e!isters. That means the upper 12K #$tes have the same addresses as
the 875 space #ut are ph$sicall$ separate (rom 875 space.
Ahen an instruction accesses an internal location a#ove address 776" the address mode used in the
instruction speci(ies +hether the 4>D accesses the upper 12K #$tes o( 5,; or the 875 space.
0nstructions that use direct addressin! access 875 space.
7or e1ample" the (ollo+in! direct addressin! instruction accesses the 875 at location &,&6 E+hich is
>2F.
MOV *A*0- ;data
0nstructions that use indirect addressin! access the upper 12K #$tes o( 5,;. 7or e1ample" the (ollo+in!
indirect addressin! instruction" +here 5& contains &,&6" accesses the data #$te at address &,&6"
rather than >2 E+hose address is &,&6F.
;O9 T5&" Vdata
Note that stac3 operations are e1amples o( indirect addressin!" so the upper 12K #$tes o( data 5,; are
availa#le as stac3 space.
Timer * and 1
Timer & and Timer 1 in the ,TK%452 operate the same +a$ as Timer & and Timer 1 in the ,TK%451.
Timer "
Timer 2 is a 16.#it Timer=4ounter that can operate as either a timer or an event counter. The t$pe o(
operation is selected #$ #it 4=T2 in the 875 T24ON. Timer 2 has three operatin! modes: capture" auto.
reload Eup or do+n countin!F" and #aud rate !enerator. The modes are selected #$ #its in T24ON. Timer
2 consists o( t+o K.#it re!isters" T62 and T?2. 0n the Timer (unction" the T?2 re!ister is incremented
ever$ machine c$cle. 8ince a machine c$cle consists o( 12 oscillator periods" the count rate is 1=12 o(
the oscillator (reIuenc$.
0n the 4ounter (unction" the re!ister is incremented in response to a 1.to.& transition at its correspondin!
e1ternal input pin" T2. 0n this (unction" the e1ternal input is sampled durin! 85>2 o( ever$ machine c$cle.
Ahen the samples sho+ a hi!h in one c$cle and a lo+ in the ne1t c$cle" the count is incremented. The
ne+ count value appears in the re!ister durin! 83>1 o( the c$cle (ollo+in! the one in +hich the transition
+as detected. 8ince t+o machine c$cles E24 oscillator periodsF are reIuired to reco!ni@e a 1.to.&
transition" the ma1imum count rate is 1=24 o( the oscillator (reIuenc$. To ensure that a !iven level is
sampled at least once #e(ore it chan!es" the level should #e held (or at least one (ull machine c$cle.
Ca)ture Mode
0n the capture mode" t+o options are selected #$ #it EJEN2 in T24ON. 0( EJEN2 U &" Timer 2 is a 16.#it
timer or counter +hich upon over(lo+ sets #it T72 in T24ON.
This #it can then #e used to !enerate an interrupt. 0( EJEN2 U 1" Timer 2 per(orms the same operation"
#ut a 1.to.& transition at e1ternal input T2EJ also causes the current value in T62 and T?2 to #e
captured into 54,>26 and 54,>2?" respectivel$. 0n addition" the transition at T2EJ causes #it EJ72 in
T24ON to #e set. The EJ72 #it" li3e T72" can !enerate an interrupt.
Auto-reload <U) or Do=n Counter>
Timer 2 can #e pro!rammed to count up or do+n +hen con(i!ured in its 16.#it auto.reload mode. This
(eature is invo3ed #$ the D4EN EDo+n 4ounter Ena#leF #it located in the 875 T2;OD. Dpon reset" the
D4EN #it is set to & so that timer 2 +ill de(ault to count up. Ahen D4EN is set" Timer 2 can count up or
do+n" dependin! on the value o( the T2EJ pin.
Baud Rate %enerator
Timer 2 is selected as the #aud rate !enerator #$ settin! T4?C and=or 54?C in T24ON ETa#le 2F. Note
that the #aud rates (or transmit and receive can #e di((erent i( Timer 2 is used (or the receiver or
transmitter and Timer 1 is used (or the other (unction. 8ettin! 54?C and=or T4?C puts Timer 2 into its
#aud rate !enerator mode.

The #aud rate !enerator mode is similar to the auto.reload mode" in that a rollover in T62 causes the
Timer 2 re!isters to #e reloaded +ith the 16.#it value in re!isters 54,>26 and 54,>2?" +hich are
preset #$ so(t+are. The #aud rates in ;odes 1 and 3 are determined #$ Timer 2/s over(lo+ rate
accordin! to the (ollo+in! eIuation.
The Timer can #e con(i!ured (or either timer or counter operation. 0n most applications" it is con(i!ured
(or timer operation E4>=T2 U &F. The timer operation is di((erent (or Timer 2 +hen it is used as a #aud
rate !enerator. Normall$" as a timer" it increments ever$ machine c$cle Eat 1=12 the oscillator (reIuenc$F.
Note that +hen Timer 2 is runnin! ET52 U 1F as a timer in the #aud rate !enerator mode" T62 or T?2
should not #e read (rom or +ritten to. Dnder these conditions" the Timer is incremented ever$ state time"
and the results o( a read or +rite ma$ not #e accurate. The 54,>2 re!isters ma$ #e read #ut should not
#e +ritten to" #ecause a +rite mi!ht overlap a reload and cause +rite and=or reload errors. The timer
should #e turned o(( Eclear T52F #e(ore accessin! the Timer 2 or 54,>2 re!isters.
&ro7rammable Cloc? Out
, 5&' dut$ c$cle cloc3 can #e pro!rammed to come out on >1.&. This pin" #esides #ein! a re!ular 0=O
pin" has t+o alternate (unctions. 0t can #e pro!rammed to input the e1ternal cloc3 (or Timer=4ounter 2
or to output a 5&' dut$ c$cle cloc3 ran!in! (rom 61 6@ to 4 ;6@ at a 16 ;6@ operatin! (reIuenc$.
To con(i!ure the Timer=4ounter 2 as a cloc3 !enerator" #it 4=T2 ET24ON.1F must #e cleared and #it
T2OE ET2;OD.1F must #e set. :it T52 ET24ON.2F starts and stops the timer.
UART
The D,5T in the ,TK%452 operates the same +a$ as the D,5T in the ,TK%451.
Interru)ts
The ,TK%452 has a total o( si1 interrupt vectors: t+o e1ternal interrupts E0NT& and 0NT1F" three timer
interrupts ETimers &" 1" and 2F" and the serial port interrupt. Each o( these interrupt sources can #e
individuall$ ena#led or disa#led #$ settin! or clearin! a #it in 8pecial 7unction 5e!ister 0E. 0E also
contains a !lo#al disa#le #it" E," +hich disa#les all interrupts at once.
Note that Ta#le sho+s that #it position 0E.6 is unimplemented. 0n the , TK% 45 1" #it position 0E.5 is also
unimplemented. Dser so(t+are should not +rite 1s to these #it positions" since the$ ma$ #e used in
(uture ,TK% products.
Timer 2 interrupt is !enerated #$ the lo!ical O5 o( #its T72 and EJ72 in re!ister T24ON. Neither o(
these (la!s is cleared #$ hard+are +hen the service routine is vectored to. 0n (act" the service routine
ma$ have to determine +hether it +as T72 or EJ72 that !enerated the interrupt" and that #it +ill have to
#e cleared in so(t+are.
Oscillator C4aracteristics
JT,?1 and JT,?2 are the input and output" respectivel$" o( an invertin! ampli(ier that can #e con(i!ured
(or use as an on.chip oscillator" as sho+n in 7i!ure 7. Either a Iuart@ cr$stal or ceramic resonator ma$
#e used. To drive the device (rom an e1ternal cloc3 source" JT,?2 should #e le(t unconnected +hile
JT,?1 is driven.
There are no reIuirements on the dut$ c$cle o( the e1ternal cloc3 si!nal" since the input to the internal
cloc3in! circuitr$ is throu!h a divide.#$.t+o (lip.(lop" #ut minimum and ma1imum volta!e hi!h and lo+
time speci(ications must #e o#served.
Idle Mode
0n idle mode" the 4>D puts itsel( to sleep +hile all the on chip peripherals remain active. The mode is
invo3ed #$ so(t+are. The content o( the on.chip 5,; and all the special (unctions re!isters remain
unchan!ed durin! this mode. The idle mode can #e terminated #$ an$ ena#led interrupt or #$ a
hard+are reset.
Note that +hen idle mode is terminated #$ a hard+are reset" the device normall$ resumes pro!ram
e1ecution (rom +here it le(t o((" up to t+o machine c$cles #e(ore the internal reset al!orithm ta3es
control. On.chip hard+are inhi#its access to internal 5,; in this event" #ut access to the port pins is not
inhi#ited. To eliminate the possi#ilit$ o( an une1pected +rite to a port pin +hen idle mode is terminated
:$ a reset" the instruction (ollo+in! the one that invo3es idle mode should not +rite to a port pin or to
e1ternal memor$.
&o=er-do=n Mode
0n the po+er.do+n mode" the oscillator is stopped" and the instruction that invo3es po+er.do+n is the
last instruction e1ecuted. The on.chip 5,; and 8pecial 7unction 5e!isters retain the57 values until the
po+er.do+n mode is terminated. The onl$ e1it (rom po+er.do+n is a hard+are reset. 5eset rede(ines
the 875s #ut does not chan!e the on.chip 5,;. The reset should not #e activated #e(ore 944 is
restored to its normal operatin! level and must #e held active lon! enou!h to allo+ the oscillator to
restart and sta#ili@e.
&ro7rammin7 t4e ,las4
The ,TK%452 is normall$ shipped +ith the on.chip 7lash memor$ arra$ in the erased state Ethat is"
contents U 776F and read$ to #e pro!rammed. The pro!rammin! inter(ace accepts either a hi!h.volta!e
E12.voltF or a lo+.volta!e E944F pro!ram ena#le si!nal. The ?o+.volta!e pro!rammin! mode provides a
convenient +a$ to pro!ram the ,TK%452 inside the user/s s$stem" +hile the hi!h.volta!e pro!rammin!
mode is compati#le +ith conventional third part$ 7lash or E>5O; pro!rammers.
The ,TK%452 is shipped +ith either the hi!h.volta!e or lo+.volta!e pro!rammin! mode ena#led. The
,TK%452 code memor$ arra$ is pro!rammed #$te.#$.#$te in either pro!rammin! mode. To pro!ram an$
non#lan3 #$te in the on.chip 7lash ;emor$" the entire memor$ must #e erased usin! the
C4i) !rase Mode.
>ro!rammin! ,l!orithm :e(ore pro!rammin! the ,TK%452" the address" data and control si!nals should
#e set up accordin! to the 7lash pro!rammin! mode ta#le and 7i!ure % and 7i!ure 1&. To pro!ram the
,TK%452" ta3e the (ollo+in! steps.
1. 0nput the desired memor$ location on the address lines.
2. 0nput the appropriate data #$te on the data lines.
3. ,ctivate the correct com#ination o( control si!nals.
4. 5aise E,=9>> to 129 (or the hi!h.volta!e pro!rammin! mode.
5. >ulse ,?E=>5OH once to pro!ram a #$te in the 7lash arra$ or the loc3 #its. The #$te.+rite c$cle is
sel(.timed and t$picall$ ta3es no more than 1.5 ms.

5epeat steps 1 throu!h 5" chan!in! the address and data (or the entire arra$ or until the end o( the
o#ect (ile is reached.
Data &ollin7
The ,TK%452 (eatures Data >ollin! to indicate the end o( a +rite c$cle. Durin! a +rite c$cle" an
attempted read o( the last #$te +ritten +ill result in the complement o( the +ritten data on >O.7. Once
the +rite c$cle has #een completed" true data is valid on all outputs" and the ne1t c$cle ma$ #e!in. Data
>ollin! ma$ #e!in an$ time a(ter a +rite c$cle has #een initiated. 5ead$=:us$ The pro!ress o( #$te
pro!rammin! can also #e monitored #$ the 5DB=:8B output si!nal. >3.4 is pulled lo+ a(ter ,?E !oes
hi!h durin! pro!rammin! to indicate
BU@.
>3.4 is pulled hi!h a!ain +hen pro!rammin! is done to indicate 5E,DB. >ro!ram 9eri($ 0( loc3 #its ?:1
and ?:2 have not #een pro!rammed" the pro!rammed code data can #e read #ac3 via the address and
8ource: ;a!num Te01n/l/gies2 2K
data lines (or veri(ication. The loc3 #its cannot #e veri(ied directl$. 9eri(ication o( the loc3 #its is achieved
#$ o#servin! that the57 (eatures are ena#led.
C4i) !rase
The entire 7lash arra$ is erased electricall$ #$ usin! the proper com#ination o( control si!nals and #$
holdin! ,?E=>5OH lo+ (or 1& ms. The code arra$ is +ritten +ith all 1s. The chip erase operation must
#e e1ecuted #e(ore the code memor$ can #e repro!rammed.
Readin7 t4e i7nature B6tes
The si!nature #$tes are read #$ the same procedure as a normal veri(ication o( locations &3&6" &316"
and &326" e1cept that >3.6 and >3.7 must #e pulled to a lo!ic lo+. The values returned are as (ollo+s.
E&3&6F U 1E6 indicates manu(actured #$ ,tmel
E&316F U 526 indicates K%452
E&326F U 776 indicates 129 pro!rammin!
E&326F U &56 indicates 59 pro!rammin!
,las4 &ro7rammin7 Modes
&ro7rammin7 Interface
Ever$ code #$te in the 7lash arra$ can #e +ritten" and the entire arra$ can #e erased" #$ usin! the
appropriate com#ination o( control si!nals. The +rite operation c$cle is sel( timed and once initiated" +ill
automaticall$ time itsel( to completion.
DC C4aracteristics
,#solute ;a1imum 5atin!sW
Operatin! Temperature.................................. .55X4 to N125X4
8tora!e Temperature ..................................... .65X4 to N15&X4
9olta!e on ,n$ >in +ith 5espect to Hround ......................................1.&9 to N7.&9
;a1imum Operatin! 9olta!e............................................ 6.69
D4 Output 4urrent...................................................... 15.& m,
8ource: ;a!num Te01n/l/gies2 2%
8ource: ;a!num Te01n/l/gies2
&arts #ist of &o=er u))l6
J1 12.&.129 Trans(ormer 1
041 7K&5 5e!ulator 04 1
D1 < D2 1N4&&7 5ecti(ier Diode 2
D3 5ed 0ndicator ?ED 1
51 1&& CY 4ar#on 5esistor 1
41 1&&&;7D=259
Electrol$tic 4apacitor 1
42 < 43 &.1Z7 4eramic 4apacitor 2
4O;>?ETE 4054D0T D0,H5,; );OT6E5 :O,5D* O7 K%451
N9cc
>&.7
32
>&.6
33
>&.5
34
>&.4
35
>&.3
36
>&.2
37
>&.1
3K
>&.&
3%
>2.7
2K
>2.6
27
>2.5
26
>2.4
25
>2.3
24
>2.2
23
>2.1
22
>2.&
21 1
>1.7
K
>1.6
7
>1.5
6
>1.4
5
>1.3
4
>1.2
3
>1.1
2
>1.&
1 1
1%
JT,?1
1K
JT,?2
3& p7
12 ;6@
3& p7
12C31
9
88
2&
2%
>8EN
3&
,?E
31
E,
%
58T

N9
44
1& ;7D=639
2&CY
5E8ET

8A0T46

4&
9
44
K 1 2.2 CY
,D7
,D6
,D5
,D4
,D3
,D2
,D1
,D&
5D
A5
T1
T&
0NT1
0NT&
TJD
5JD
17
>3.7

16
>3.6

15
>3.5

14
>3.4

13
>3.3

12
>3.2

11
>3.1

1&
>3.&

,15
,14
,13
,12
,11
,1&
,%
,K
23& ,4
J1
D1 < D2 041
N9
44
51
D3
41 42 43
>O5T &
>O5T 1
>O5T 2
>O5T 3
3&
4054D0T DE8450>T0ON
The mother #oard o( K%451 has (ollo+in! sections: >o+er 8uppl$" K%451 04" Oscillator" 5eset 8+itch <
0=O ports. ?et us see these sections in detail.
>OAE5 8D>>?B:
This section provides the clean and harmonic (ree po+er to 04 to (unction properl$. The output o( the (ull
+ave recti(ier section" +hich is #uilt usin! t+o recti(ier diodes" is !iven to (ilter capacitor. The electrol$tic
capacitor 41 (ilters the pulsatin! dc into pure dc and !iven to 9in pin.1 o( re!ulator 04 7K&5.This three
terminal 04 re!ulates the recti(ied pulsatin! dc to constant N5 volts. 42 < 43 provides !round path to
harmonic si!nals present in the inputted volta!e. The 9out pin.3 !ives constant" re!ulated and spi3es (ree
N5 volts to the mother #oard.
The allocation o( the pins o( the K%451 (ollo+s a D.shape distri#ution. The top le(t hand corner is >in 1 and
do+n to #ottom le(t hand corner is >in 2&. ,nd the #ottom ri!ht hand corner is >in 21 and up to the top
ri!ht hand corner is >in 4&. The 8uppl$ 9olta!e pin 9cc is 4& and !round pin 9ss is 2&.
O840??,TO5:
0( the 4>D is the #rain o( the s$stem then the oscillator" or cloc3" is the heart#eat. 0t provides the critical
timin! (unctions (or the rest o( the chip. The !reatest timin! accurac$ is achieved +ith a cr$stal or ceramic
resonator. 7or cr$stals o( 2.& to 12.& ;6@" the recommended capacitor values should #e in the ran!e o(
15 to 33p(2.
,cross the oscillator input pins 1K < 1% a cr$stal 11 o( 4.7 ;6@ to 2& ;6@ value can #e connected. The
t+o ceramic disc t$pe capacitors o( value 3&p7 are connected across cr$stal and !round" sta#ili@es the
oscillation (reIuenc$ !enerated #$ cr$stal.
0=O >O5T8:
There are a total o( 32 i=o pins availa#le on this chip. The ama@in! part a#out these ports is that the$ can
#e pro!rammed to #e either input or output ports" even Pon the (l$P durin! operation[ Each pin can source
2& m, Ema1F so it can directl$ drive an ?ED. The$ can also sin3 a ma1imum o( 25 ;a current.
8ome pins (or these 0=O ports are multiple1ed +ith an alternate (unction (or the peripheral (eatures on the
device. 0n !eneral" +hen a peripheral is ena#led" that pin ma$ not #e used as a !eneral purpose 0=O pin.
The alternate (unction o( each pin is not discussed here" as port accessin! circuit ta3es care o( that.
This K%451 04 has (our 0=O ports and is discussed in detail:
>&.& TO >&.7
31
>2.7
2K
>2.6
27
>2.5
26
>2.4
25
>2.3
24
>2.2
23
>2.1
22
>2.&
21 1
17
>3.7

16
>3.6

15
>3.5

14
>3.4

13
>3.3

12
>3.2

11
>3.1

1&
>3.&

>O5T& is an K.#it )pins 32 to 3%* open drain #i.directional 0=O port. ,s an output port" each pin can sin3
ei!ht TT? inputs and con(i!ured to #e multiple1ed lo+ order address=data #us then has internal pull ups.
E1ternal pull ups are reIuired durin! pro!ram veri(ication.
>1.& TO >1.7
>O5T1 is an K.#it +ide )pins 1 to K*" #i.directional port +ith internal pull ups. >1.& and >1.1 can #e
con(i!ured to #e the timer=counter 2 e1ternal count input and the timer=counter 2 tri!!er input respectivel$.
>2.& TO >2.7
>O5T2 is an K.#it +ide )pins 21 to 2K*" #i.directional port +ith internal pull ups. The >O5T2 output #u((ers
can sin3=source (our TT? inputs. 0t receives the hi!h.order address #its and some control si!nals durin!
7lash pro!rammin! and veri(ication.
>3.& TO >3.7
>O5T3 is an K.#it +ide )pins 1& to 17*" #i.directional port +ith internal pull ups. The >ort3 output #u((ers
can sin3=source (our TT? inputs. 0t also receives some control si!nals (or 7lash pro!rammin! and
veri(ication.
>8EN
>ro!ram 8tore Ena#le )>in 2%* is the read stro#e to e1ternal pro!ram memor$.
,?E
,ddress ?atch Ena#le )>in 3&* is an output pulse (or latchin! the lo+ #$te o( the address durin! accesses
to e1ternal memor$.
E,
E1ternal ,ccess Ena#le )>in 31* must #e strapped to HND in order to ena#le the device to (etch code (rom
e1ternal pro!ram memor$ locations startin! at &&&&6 upto 77776.
58T
5eset input )>in %* must #e made hi!h (or t+o machine c$cles to resets the device/s oscillator. The
potential di((erence is created usin! 1&;7D=639 electrol$tic capacitor and 2&COhm resistor +ith a reset
s+itch.
32
#CD INT!R,ACIN%

?4Ds can add a lot to an$ application in terms o( providin! an use(ul inter(ace (or the user" de#u!!in! an
application or ust !ivin! it a Ppro(essionalP loo3. The most common t$pe o( ?4D controller is the 6itatchi
447K& +hich provides a relativel$ simple inter(ace #et+een a processor and an ?4D. Dsin! this inter(ace
is o(ten not attempted #$ ine1perienced desi!ners and pro!rammers #ecause it is di((icult to (ind !ood
documentation on the inter(ace" initiali@in! the inter(ace can #e a pro#lem and the displa$s themselves are
e1pensive.
The most common connector used (or the 447K& #ased ?4Ds is 14 pins in a ro+" +ith pin centers &.1&&P
apart. The pins are +ired as:
>ins Description
1 Hround
2 9cc
3 4ontrast 9olta!e
4 P5=8P \0nstruction=5e!ister 8elect
5 P5=AP \5ead=Arite ?4D 5e!isters
6 PEP 4loc3
7 . 14 Data 0=O >ins
The inter(ace is a parallel #us" allo+in!
simple and (ast readin!=+ritin! o( data to
and (rom the ?4D.
The ?4D Data Arite Aave(orm +ill +rite an ,8400 :$te out to the ?4DQs screen. The ,8400 code to #e
displa$ed is ei!ht #its lon! and is sent to the ?4D either (our or ei!ht #its at a time. 0( (our #it mode is used"
t+o Pni##lesP o( data E8ent hi!h (our #its and then lo+ (our #its +ith an PEP 4loc3 pulse +ith each ni##leF
are sent to ma3e up a (ull ei!ht #it trans(er. The PEP 4loc3 is used to initiate the data trans(er +ithin the
?4D.
8endin! parallel data as either (our or ei!ht #its are the t+o primar$ modes o( operation. Ahile there are
secondar$ considerations and modes" decidin! ho+ to send the data to the ?4D is most critical decision to
#e made (or an ?4D inter(ace application.
Ei!ht #it mode is #est used +hen speed is reIuired in an application and at least ten 0=O pins are availa#le.
7our #it mode reIuires a minimum o( si1 #its. To +ire a microcontroller to an ?4D in (our #it mode" ust the
top (our #its ED:4.7F are +ritten to.
33
D,T,
5=\8
5=\A
E
45&
n8ec
#CD DATA /RIT! /AV!,ORM
The P5=8P #it is used to select +hether data or an instruction is #ein! trans(erred #et+een the
microcontroller and the ?4D. 0( the :it is set" then the #$te at the current ?4D P4ursorP >osition can #e
read or +ritten. Ahen the :it is reset" either an instruction is #ein! sent to the ?4D or the e1ecution status
o( the last instruction is read #ac3 E+hether or not it has completedF.
The di((erent instructions availa#le (or use +ith the 447K& are sho+n in the ta#le #elo+:
5=8 5=A D7 D6 D5 D4 D3 D2 D1 D& 0nstruction=Description
4 5 14 13 12 11 1& % K 7 >ins
& & & & & & & & & 1 4lear Displa$
& & & & & & & & 1 W 5eturn 4ursor and ?4D to 6ome >osition
& & & & & & & 1 0D 8 8et 4ursor ;ove Direction
& & & & & & 1 D 4 : Ena#le Displa$=4ursor
& & & & & 1 84 5? W W ;ove 4ursor=8hi(t Displa$
& & & & 1 D? N 7 W W 8et 0nter(ace ?en!th
& & & 1 , , , , , , ;ove 4ursor into 4H5,;
& & 1 , , , , , , , ;ove 4ursor to Displa$
& 1 :7 W W W W W W W >oll the P:us$ 7la!P
1 & D D D D D D D D Arite a 4haracter to the Displa$ at the 4urrent 4ursor
>osition
1 1 D D D D D D D D 5ead the 4haracter on the Displa$ at the 4urrent
4ursor >osition
The #it descriptions (or the di((erent commands are:
PWP . Not Dsed=0!nored. This #it can #e either P1P or P&P
8et 4ursor ;ove Direction:
0D . 0ncrement the 4ursor ,(ter Each :$te Aritten to Displa$ i( 8et
8 . 8hi(t Displa$ +hen :$te Aritten to Displa$
Ena#le Displa$=4ursor
D . Turn Displa$ OnE1F=O((E&F
4 . Turn 4ursor OnE1F=O((E&F
: . 4ursor :lin3 OnE1F=O((E&F
;ove 4ursor=8hi(t Displa$
84 . Displa$ 8hi(t OnE1F=O((E&F
5? . Direction o( 8hi(t 5i!htE1F=?e(tE&F
8et 0nter(ace ?en!th
D? . 8et Data 0nter(ace ?en!th KE1F=4E&F
N . Num#er o( Displa$ ?ines 1E&F=2E1F
7 . 4haracter 7ont 511&E1F=517E&F
>oll the P:us$ 7la!P
:7 . This #it is set +hile the ?4D is processin!
34
;ove 4ursor to 4H5,;=Displa$
, . ,ddress
5ead=Arite ,8400 to the Displa$
D . Data

:e(ore $ou can send commands or data to the ?4D module" the ;odule must #e initiali@ed. 7or ei!ht #it
mode" this is done usin! the (ollo+in! series o( operations:
Aait more than 15 m8ecs a(ter po+er is applied.
Arite &1&3& to ?4D and +ait 5 m8ecs (or the instruction to complete
Arite &1&3& to ?4D and +ait 16& Zsecs (or instruction to complete
Arite &1&3& ,H,0N to ?4D and +ait 16& Zsecs or >oll the :us$ 7la!
8et the Operatin! 4haracteristics o( the ?4D
Arite P8et 0nter(ace ?en!thP
Arite &1&1& to turn o(( the Displa$
Arite &1&&1 to 4lear the Displa$
Arite P8et 4ursor ;ove DirectionP 8ettin! 4ursor :ehaviour :its
Arite PEna#le Displa$=4ursorP < ena#le Displa$ and Optional 4ursor
0n descri#in! ho+ the ?4D should #e initiali@ed in (our #it mode" e1perts +ill speci($ +ritin! to the ?4D in
terms o( ni##les. This is #ecause initiall$" ust sin!le ni##les are sent Eand not t+o" +hich ma3e up a #$te
and a (ull instructionF. ,s mentioned a#ove" +hen a #$te is sent" the hi!h ni##le is sent #e(ore the lo+
ni##le and the PEP pin is to!!led each time (our #its is sent to the ?4D. To initiali@e in (our #it mode:
Aait more than 15 m8ecs a(ter po+er is applied.
Arite &1&3 to ?4D and +ait 5 m8ecs (or the instruction to complete
Arite &1&3 to ?4D and +ait 16& Zsecs (or instruction to complete
Arite &1&3 ,H,0N to ?4D and +ait 16& Zsecs Eor poll the :us$ 7la!F
8et the Operatin! 4haracteristics o( the ?4D
Arite &1&2 to the ?4D to Ena#le 7our :it ;ode
,ll (ollo+in! instruction=Data Arites reIuire t+o ni##le +rites.
Arite P8et 0nter(ace ?en!thP
Arite &1&1=&1&& to turn o(( the Displa$
Arite &1&&=&1&1 to 4lear the Displa$
Arite P8et 4ursor ;ove DirectionP 8ettin! 4ursor :ehaviour :its
Arite PEna#le Displa$=4ursorP < ena#le Displa$ and Optional 4ursor
35
Once the initiali@ation is complete" the ?4D can #e +ritten to +ith data or instructions as reIuired. Each
character to displa$ is +ritten li3e the control #$tes" e1cept that the P5=8P line is set. Durin! initiali@iation"
#$ settin! the P8=4P #it durin! the P;ove 4ursor=8hi(t Displa$P command" a(ter each character is sent to
the ?4D" the cursor #uilt into the ?4D +ill increment to the ne1t position Eeither ri!ht or le(tF. Normall$" the
P8=4P #it is set EeIual to P1PF alon! +ith the P5=?P #it in the P;ove 4ursor=8hi(t Displa$P command (or
characters to #e +ritten (rom le(t to ri!ht Eas +ith a PTelet$peP video displa$F.
;ost ?4D displa$s have a 447K& and support chip to control the operation o( the ?4D. The 447K& is
responsi#le (or the e1ternal inter(ace and provides su((icient control lines (or si1teen characters on the
?4D. The support chip enhances the 0=O o( the 447K& to support up to 12K characters on an ?4D. 7rom
the ta#le a#ove" it should #e noted that the (irst t+o entries EPK11P" P1611PF onl$ have the 447K& and not the
support chip. This is +h$ the ninth character in the 1611 does not PappearP at address K and sho+s up at
the address that is common (or a t+o line ?4D.
6ere it is included the 4& character #$ 4 line EP4&14PF ?4D #ecause it is Iuite common. Normall$" the ?4D
is +ired as t+o 4&12 displa$s. The actual connector is normall$ si1teen #its +ide +ith all the (ourteen
connections o( the 447K& in common" e1cept (or the PEP E8tro#eF pins. The PEP stro#es are used to address
#et+een the areas o( the displa$ used #$ the t+o devices. The actual pinouts and character addresses (or
this t$pe o( displa$ can var$ #et+een manu(acturers and displa$ part num#ers.
Note that +hen usin! an$ 3ind o( multiple 447K& ?4D displa$" pro!rammer should pro#a#l$ onl$ displa$
one 447K&Qs 4ursor at a time.
4ursors (or the 447K& can #e turned on as a simple underscore at an$ time usin! the PEna#le
Displa$=4ursorP ?4D instruction and settin! the P4P #it. E1pert donQt recommend usin! the P:P EP:loc3
;odePF #it as this causes a (lashin! (ull character sIuare to #e displa$ed and it reall$ isnQt that attractive.
The ?4D can #e thou!ht o( as a PTelet$peP displa$ #ecause in normal operation" a(ter a character has
#een sent to the ?4D" the internal P4ursorP is moved one character to the ri!ht. The P4lear Displa$P and
P5eturn 4ursor and ?4D to 6ome >ositionP instructions are used to reset the 4ursorQs position to the top
ri!ht character on the displa$.
To move the 4ursor" the P;ove 4ursor to Displa$P instruction is used. 7or this instruction" #it 7 o( the
instruction #$te is set +ith the remainin! seven #its used as the address o( the character on the ?4D the
cursor is to move to. These seven #its provide 12K addresses" +hich matches the ma1imum num#er o(
?4D character addresses availa#le. The ta#le a#ove should #e used to determine the address o( a
character o((set on a particular line o( an ?4D displa$.
36
The 4haracter 8et availa#le in the 447K& is #asicall$ ,8400. 0t is P#asicall$P #ecause some characters do
not (ollo+ the ,8400 convention (ull$ Epro#a#l$ the most si!ni(icant di((erence is &1&5: or P]P is not
availa#leF. The ,8400 4ontrol 4haracters E&1&&K to &1&17F do not respond as control characters and ma$
displa$ (unn$ EGapaneseF characters.
The last aspect o( the ?4D to discuss is ho+ to speci($ a contrast volta!e to the Displa$. E1perts t$picall$
use a
potentiometer +ired as a volta!e divider. This +ill provide an
easil$ varia#le volta!e #et+een Hround and 9cc" +hich +ill #e used
to speci($ the contrast Eor Pdar3nessPF o( the characters on the ?4D screen. Bou ma$ (ind that di((erent
?4Ds +or3 di((erentl$ +ith lo+er volta!es providin! dar3er characters in some and hi!her volta!es do the
same thin! in others.
There are a variet$ o( di((erent +a$s o( +irin! up an ?4D. ,#ove" it is noted that the 447K& can inter(ace
+ith (our or ei!ht #its. To simpli($ the demands in microcontrollers" a shi(t re!ister is o(ten used Eas is
sho+n in the dia!ram #elo+F to reduce the num#er o( 0=O pins to three.
0t is evident that usin! this circuit +ith the >04;icro" K&51 and ,95 and it reall$ ma3es the +irin! o( an
?4D to a microcontroller ver$ simple. , si!ni(icant advanta!e o( usin! a shi(t re!ister" li3e the t+o circuits
sho+n here" data to the ?4D is the lac3 o( timin! sensitivit$ that +ill #e encountered. The #i!!est issue to
+atch (or is to ma3e sure the PEP 8tro#eQs timin! is +ithin speci(ication Ei.e." !reater than 45& n8ecsF" the
shi(t re!ister loads can #e interrupted +ithout a((ectin! the actual +rite. This circuit +ill not +or3 +ith Open.
Drain onl$ outputs.
One note a#out the ?4DQs PEP 8tro#e is that in some documentation it is speci(ied as Phi!hP level active
+hile in others" it is speci(ied as (allin! ed!e active. 0t seems to #e (allin! ed!e active" +hich is +h$ the 2.
+ire ?4D inter(ace presented #elo+ +or3s even i( the line ends up #ein! hi!h at the end o( data #ein!
shi(ted in. 0( the (allin! ed!e is used Eli3e in the 2.+ire inter(aceF then ma3e sure that #e(ore the PEP line is
output on P&P" there is at least a 45& n8ecs dela$ +ith no lines chan!in! state.
Ne1t the pro!ram is !iven in K&51 assem#l$ lan!ua!e +ith necessar$ comments that can displa$ a
37
#CD Contrast Circuit
N9cc
>in.3 4ontrast
#CD
1&C pot
4ift Re7ister #CD Data /rite
56
D&
D1
Dn
E
#CD
E 4loc3
9R
&rocess
or
Data
Data
4loc3
&
&
^Numerous instructions Displa$ clear" 4ursor home" Displa$ ON=O77" 4ursor ON=O77" :lin3 character"
4ursor shi(t" Displa$ shi(t
^The unit operates (rom a sin!le 59 po+er suppl$
?iIuid cr$stal panel service li(e 1&&"&&& hours minimum at 25
o
4 .1&
o
4
3.3 de(inition o( panel service li(e
^4ontrast #ecomes 3&' o( initial value
^4urrent consumption #ecomes three times hi!her than initial value
^5emar3a#le ali!nment deterioration occurs in ?4C cell la$er
^Dnusual operation occurs in displa$ (unctions
8a(et$
^0( the ?4D panel #rea3s" #e care(ul not to !et the liIuid cr$stal in $our mouth. 0( the liIuid cr$stal touches
$our s3in or clothes" +ash it o(( immediatel$ usin! soap and plent$ o( +ater.
6andlin!
^,void static electricit$ as this can dama!e the 4;O8 ?80.
^The ?4D panel is plate !lass2 do not hit or crush it.
^Do not remove the panel or (rame (rom the module.
^The polari@in! plate o( the displa$ is ver$ (ra!ile2 handle it ver$ care(ull$
;ountin! and Desi!n
^;ount the module #$ usin! the speci(ied mountin! part and holes.
^To protect the module (rom e1ternal pressure" leave a small !ap #$ placin! transparent plates Ee.!. acr$lic
or !lassF on the displa$ sur(ace" (rame" and polari@in! plate
^Desi!n the s$stem so that no input si!nal is !iven unless the po+er.suppl$ volta!e is applied.
^Ceep the module dr$. ,void condensation2 other+ise the transparent electrodes ma$ #rea3.
8tora!e
^8tore the module in a dar3 place" +here the temperature is 25
o
4 . 1&
o
4 and the humidit$ #elo+ 65' 56.
^Do not store the module near or!anic solvents or corrosive !ases.
^Do not crush" sha3e" or olt the module Eincludin! accessoriesF.
-2 Step-d/4n Trans5/rmer: The conventional suppl$" +hich is !enerall$ availa#le to the user" is 23&9 ,4. 0t
is necessar$ to step do+n the mains suppl$ to the desired level. This is achieved #$ usin! suita#l$ rated
step.do+n trans(ormer. Ahile desi!nin! the po+er suppl$" it is necessar$ to !o (or little hi!her ratin!
trans(ormer than the reIuired one. The reason (or this is" (or proper +or3in! o( the re!ulator 04 Esa$ C0,
7K&5F it needs at least 2.59 more than the e1pected output volta!e
3K
,2 Re0ti5ier stage: Then the step.do+ned ,lternatin! 4urrent is converted into Direct 4urrent. This
recti(ication is achieved #$ usin! passive components such as diodes. 0( the po+er suppl$ is desi!ned (or
lo+ volta!e=current dra+in! loads=circuits Esa$ N59F" it is su((icient to emplo$ (ull.+ave recti(ier +ith centre.
tap trans(ormer as a po+er source. Ahile choosin! the diodes the >09 ratin! is ta3en into consideration.
62 Filter stage: :ut this recti(ied output contains some percenta!e o( superimposed a.c. ripples. 8o to (ilter
these a.c. components (ilter sta!e is #uilt around the recti(ier sta!e. The cheap" relia#le" simple and
e((ective (ilterin! (or lo+ current dra+in! loads Esa$ upto 5& m,F is done #$ usin! shunt capacitors. This
electrol$tic capacitor has polarities" ta3e care +hile connectin! the circuit.
)2 "/ltage Regulati/n: The (iltered d.c. output is not sta#le. 0t varies in accordance +ith
the (luctuations in mains suppl$ or var$in! load current. This variation o( load current is
o#served due to volta!e drop in trans(ormer +indin!s" recti(ier and (ilter circuit. These
variations in d.c. output volta!e ma$ cause inaccurate or erratic operation or even
mal(unctionin! o( man$ electronic circuits. 7or e1ample" the circuit #oards +hich are
implanted #$ 4;O8 or TT? 04s.
The sta#ili@ation o( d.c. output is achieved #$ usin! the three terminal volta!e re!ulator
04. This re!ulator 04 comes in t+o (lavors: 7K11 (or positive volta!e output and 7%11 (or
ne!ative volta!e output. 7or e1ample 7K&5 !ives N59 output and 7%&5 !ives .59
sta#ili@ed output. These re!ulator 04s have in.#uilt short.circuit protection and auto.thermal cutout
provisions. 0( the load current is ver$ hi!h the 04 needs -heat sin3/ to dissipate the internall$ !enerated
po+er.
Circuit Descri)tion' , d.c. po+er suppl$ +hich maintains the output volta!e constant irrespective o(
a.c. mains (luctuations or load variations is 3no+n as re7ulated d.c. )o=er su))l6. 0t is also re(erred as
(ull.+ave re!ulated po+er suppl$ as it uses (our diodes in #rid!e (ashion +ith the trans(ormer. This
la#orator$ po+er suppl$ o((ers e1cellent line and load re!ulation and output volta!es o( N59 < N12 9 at
output currents up to one amp.
3%
1 2 3
$IA A1BB
eries
CIRCUIT DIA%RAM O, C3V . C1"V ,U## /AV! R!%U#AT!D &O/!R U&&#@
>arts ?ist:
1. te)-do=n Transformer' The trans(ormer ratin! is 23&9 ,4 at >rimar$ and 12.&.129" 1,mpers
across secondar$ +indin!. This trans(ormer has a capa#ilit$ to deliver a current o( 1,mpere" +hich is more
than enou!h to drive an$ electronic circuit or var$in! load. The 129,4 appearin! across the secondar$ is
the 5;8 value o( the +ave(orm and the pea3 value +ould #e 12 1 1.414 U 16.K volts. This value limits our
choice o( recti(ier diode as 1N4&&7" +hich is havin! >09 ratin! more than 169olts.
". Rectifier ta7e' The t+o diodes D1 < D2 are connected across the secondar$ +indin! o( the
trans(ormer as a (ull.+ave recti(ier. Durin! the positive hal(.c$cle o( secondar$ volta!e" the end , o( the
secondar$ +indin! #ecomes positive and end : ne!ative. This ma3es the diode D1 (or+ard #iased and
diode D2 reverse #iased. There(ore diode D1 conducts +hile diode D2 does not. Durin! the ne!ative hal(.
8E;04ONDD4TO58
041
042
7K12 5e!ulator 04
7K&5 5e!ulator 04
1
1
D1< D2 1N4&&7 5ecti(ier Diodes 2
4,>,40TO58
41 1&&& Z(=259 Electrol$tic 1
42 to 44 &.1Z7 4eramic Disc t$pe 3
;084E??,NEOD8
J1 23&9 ,4 >ri"14.&.14 1,mp 8ec Trans(ormer 1
4&
23&,4
:
1
41
D2
1
42 43
041
7K12
D1
1
%9
44
041
7K&5
N129
N59
c$cle" end , o( the secondar$ +indin! #ecomes ne!ative and end : positive. There(ore diode D2 conducts
+hile diode D1 does not. Note that current across the centre tap terminal is in the same direction (or #oth
hal(.c$cles o( input a.c. volta!e. There(ore" pulsatin! d.c. is o#tained at point -4/ +ith respect to Hround.
(. ,ilter ta7e' 6ere 4apacitor 41 is used (or (ilterin! purpose and connected across the recti(ier
output. 0t (ilters the a.c. components present in the recti(ied d.c. and !ives stead$ d.c. volta!e. ,s the
recti(ier volta!e increases" it char!es the capacitor and also supplies current to the load. Ahen capacitor is
char!ed to the pea3 value o( the recti(ier volta!e" recti(ier volta!e starts to decrease. ,s the ne1t volta!e
pea3 immediatel$ rechar!es the capacitor" the dischar!e period is o( ver$ small duration. Due to this
continuous char!e.dischar!e.rechar!e c$cle ver$ little ripple is o#served in the (iltered output. ;oreover"
output volta!e is hi!her as it remains su#stantiall$ near the pea3 value o( recti(ier output volta!e. This
phenomenon is also e1plained in other (orm as: the shunt capacitor o((ers a lo+ reactance path to the a.c.
components o( current and open circuit to d.c. component. Durin! positive hal( c$cle the capacitor stores
ener!$ in the (orm o( electrostatic (ield. Durin! ne!ative hal( c$cle" the (ilter capacitor releases stored
ener!$ to the load.
+. Volta7e Re7ulation ta7e' ,cross the point -D/ and Hround there is recti(ied and (iltered d.c. 0n
the present circuit C0, 7K12 three terminal volta!e re!ulator 04 is used to !et N129 and C0, 7K&5 volta!e
re!ulator 04 is used to !et N59 re!ulated d.c. output. 0n the three terminals" pin 1 is input i.e." recti(ied <
(iltered d.c. is connected to this pin. >in 2 is common pin and is !rounded. The pin 3 !ives the sta#ili@ed
d.c. output to the load. The circuit sho+s t+o more decouplin! capacitors 42 < 43" +hich provides !round
path to the hi!h (reIuenc$ noise si!nals. ,cross the point -E/ and -7/ +ith respect to !round N59 < N129
sta#ili@ed or re!ulated d.c output is measured" +hich can #e connected to the reIuired circuit.
N/te: Ahile connectin! the diodes and electrol$tic capacitors the polarities must #e ta3en into
consideration. The trans(ormer/s primar$ +indin! deals +ith 23&9 mains" care should #e ta3en +ith it.
41
'OWER SU''L( UNIT
The circuit needs t+o di((erent volta!es" N59 < N%9" to +or3. The N%9olts is provided #$ po+er pac3t"
+hich contains si1 al3aline #atteries in series. The N5 volta!e is supplied #$ this speciall$ desi!ned po+er
suppl$.
Circuit Descri)tion' , d.c. po+er suppl$ +hich maintains the output volta!e constant irrespective o(
a.c. mains (luctuations or load variations is 3no+n as regulated d202 p/4er supply. 0t is also re(erred as (ull.
+ave re!ulated po+er suppl$ as it uses t+o diodes in (ull +ave (ashion +ith centre tap trans(ormer.
-2Step-d/4n Trans5/rmer : The trans(ormer ratin! is 23&9 ,4 at >rimar$ and 12.&.129" 1,mpers
across secondar$ +indin!. This trans(ormer has a capa#ilit$ to deliver a current o( 1,mpere" +hich is more
than enou!h to drive an$ electronic circuit or var$in! load. The 129,4 appearin! across the secondar$ is
the 5;8 value o( the +ave(orm and the pea3 value +ould #e 12 1 1.414 U 16.K volts. This value limits our
choice o( recti(ier diode as 1N4&&7" +hich is havin! >09 ratin! more than 169olts.
42
CIRCUIT DIA%RAM O, C3V ,U## /AV! R!%U#AT!D &O/!R U&&#@
>arts ?ist:
,2 Re0ti5ier Stage: The t+o diodes D1 < D2 are connected across the secondar$ +indin! o( the
trans(ormer as a (ull.+ave recti(ier. Durin! the positive hal(.c$cle o( secondar$ volta!e" the end , o( the
secondar$ +indin! #ecomes positive and end : ne!ative. This ma3es the diode D1 (or+ard #iased and
diode D2 reverse #iased. There(ore diode D1 conducts +hile diode D2 does not. Durin! the ne!ative hal(.
c$cle" end , o( the secondar$ +indin! #ecomes ne!ative and end : positive. There(ore diode D2 conducts
+hile diode D1 does not. Note that current across the centre tap terminal is in the same direction (or #oth
hal(.c$cles o( input a.c. volta!e. There(ore" pulsatin! d.c. is o#tained at point -4/ +ith respect to Hround.
62 Filter Stage: 6ere 4apacitor 41 is used (or (ilterin! purpose and connected across the recti(ier output.
0t (ilters the a.c. components present in the recti(ied d.c. and !ives stead$ d.c. volta!e. ,s the recti(ier
volta!e increases" it char!es the capacitor and also supplies current to the load. Ahen capacitor is
!MICONDUCTOR
041 7K&5 5e!ulator 04 1
D1"D2 1N4&&7 5ecti(ier Diodes 2
CA&ACITOR
41 1&&& Z(=259 Electrol$tic 1
42"43 &.1Z7 4eramic Disc t$pe 2
MIC!##AN!OU
J1 23&9 ,4 >ri"12.&.12 1,mp 8ec Trans(ormer 1
43
N59
:
23& ,4
:
1
& 9
04 1
41
D2
221
42
43
D1
111
,
O
4 D
Hround
E
char!ed to the pea3 value o( the recti(ier volta!e" recti(ier volta!e starts to decrease. ,s the ne1t volta!e
pea3 immediatel$ rechar!es the capacitor" the dischar!e period is o( ver$ small duration. Due to this
continuous char!e.dischar!e.rechar!e c$cle ver$ little ripple is o#served in the (iltered output. ;oreover"
output volta!e is hi!her as it remains su#stantiall$ near the pea3 value o( recti(ier output volta!e. This
phenomenon is also e1plained in other (orm as: the shunt capacitor o((ers a lo+ reactance path to the a.c.
components o( current and open circuit to d.c. component. Durin! positive hal( c$cle the capacitor stores
ener!$ in the (orm o( electrostatic (ield. Durin! ne!ative hal( c$cle" the (ilter capacitor releases stored
ener!$ to the load.
)2 "/ltage Regulati/n Stage: ,cross the point -D/ and Hround there is recti(ied and (iltered d.c. 0n the
present circuit C0, 7K&5 volta!e re!ulator 04 is used to !et N59 re!ulated d.c. output. 0n the three
terminals" pin 1 is input i.e." recti(ied < (iltered d.c. is connected to this pin. >in 2 is common pin and is
!rounded. The pin 3 !ives the sta#ili@ed d.c. output to the load. The circuit sho+s t+o more decouplin!
capacitors 42 < 43" +hich provides !round path to the hi!h (reIuenc$ noise si!nals. ,cross the point -E/
and !round N59 sta#ili@ed or re!ulated d.c output is measured" +hich can #e connected to the reIuired
circuit.
N/te: Ahile connectin! the diodes and electrol$tic capacitors the polarities must #e ta3en into
consideration. The trans(ormer/s primar$ +indin! deals +ith 23&9 mains" care should #e ta3en +ith it.
44
IC DATA SHEET
45
04 4&5&
6EJ :D77E5 = 4ON9E5TE5 ENON.0N9E5TE5F
GENER)L CH)R)CTERISTICS*
1. 9olta!e 5atin! : 49 to 169
2. Operatin! Temperature : &4 .654
3. ;a1 >o+er Dissipation : &.&1mA
4. >ropa!ation Dela$ : 3& nsec t$picall$
5. ;a1 To!!le 8peed : 3 ;6@
6. 7an Out : _ 5&
7. Noise 0mmunit$ : 3.79
46
1
2
6
3
16
5
15
4
14
1&
11
12
13
7
9cc
9ss K %
KIA 7805
9O?T,HE 5EHD?,TO5
7eneral C1ara0teristi0s:
1. Output volta!e : &59
2. Operatin! Temperature : &c . 7&c
3. Output 4urrent : 1&&m,
4. Dropout 9olta!e : 1.79
47
MCT 2E
U#N"**(A
1
Note that the D?N2&&&, series Edual in.line pac3a!eF and D?N2&&&? series Esmall.outline 04 pac3a!eF are
electricall$ identical and share a common pin num#er assi!nment.
,:8O?DTE ;,J0;D; 5,T0NH8
Output 9olta!e" 9
4E
E D?N2&&J
W
" D?N2&13,F 5&9
E D?N2&2J
W
F %59
0nput 9olta!e" 9
0N
3&9
4ontinuous Output 4urrent" 0
c
E D?N2&&J
W
" D?N2&2J
W
F 5&&m,
ED?N2&13,F 6&&m,
4ontinuous 0nput 4urrent" 0
0N
25m,
>o+er Dissipation" >
D
Eone Darlin!ton pairF 1.&A
Operatin! Temperature 5an!e" T
,
.2&4 to NK54
8tora!e Temperature 5an!e" T
s
.554 to N15&4
4K
1
16
2
3
4
5
6
7
K
11
12
14
15
13
1&
%
cc
D. &ROE!CT CONTRUCTION %UID!#IN!
5ead these hints care(ull$ #e(ore start #uildin! $our >roect. ,llo+ su((icient time to read < #e sure $ou
understand ever$thin! per(ectl$. 8tart $our +or3 +here $ou can #e com(orta#le and can leave the >roect
spread out #et+een +irin! sessions. :e cool < have patient... proect construction should #e educative
and (un[ 8toppin! at the end o( the ever$ sta!e and chec3in!" step.#$.step" +ill help $ou avoid needless
mista3es. This can save $ou a lot o( dou#le chec3in! and time consumin! trou#le.shootin! later on. :e(ore
start assem#lin! the >roect" read some #asic electronic theor$ a#out active < passive components" ho+
the$ +or3" parameters" lead identi(ications etc. ,t one session" +or3 onl$ as lon! as $ou eno$s it.
Un)ac?in7 t4e &roFect $it'
Dnpac3 the proect care(ull$ and chec3 each component a!ainst the 4omponent ?ist.
O#serve the >4:" 4ircuit dia!ram sheet < components (or an$ ph$sical dama!es.
4hec3 that $ou !ot the >roect Cit $ou actuall$ intended (or[
Assemblin7 t4e &roFect $it'
:e(ore starts assem#lin! the proect 3eep all the necessar$ needed tools on $our +or3#ench.
4hec3 the >4: (or the #ro3en trac3s" #$ testin! continuit$ #et+een each trac3.
:$ holdin! the >4: sli!htl$ inclined to+ards the li!ht" one can chec3 the copper la$out/s ph$sical
condition on the >4:.
0denti($ each section o( the circuit on the >4: la$out < !et (amiliar +ith the #oard.
4hec3 each component < #e assurin! that the$ are in !ood and +or3in! condition.
8pecial care should #e ta3en +hile dealin! +ith the sensors or sparin!l$ availa#le components.
4lean the component leads" trac3s Ei( the$ are coated +ith corrosive la$erF" and pads.
S/ldering t1e !r/8e0t 9it
:e(ore start solderin! 3eep all the necessar$ tools reIuired (or it vi@." suita#l$ rated 8olderin! 0ron +ith
clean tip" t+ee@ers" nose.pliers" small < medium si@e scre+ drivers" (lu1" sharp 3ni(e etc.
The >4: has t+o sides. One is the copper (oil side and the other" the component side. Bou have to
mount the components on the component side" solder them on the copper la$out side.
Ceep #elo+ points in memor$ +hile solderin!
4%
5emem#er that %&' o( all non.(unctionin! o( proect are due to #ad solderin! < poor connections.
8+itch O77 the (an" i( it is runnin![ >osition the +or3 so that !ravit$ tends to 3eep the solder +here
$ou +ant it.
The ne+ solderin! irons tip should #e (iled to remove the steel or copper o1ide coatin!. Then appl$
little solder on the hot tip.
The solderin! iron +ill reach its operatin! temperature +ithin 3 to 5 minutes" a(ter it is s+itched on"
and should #e le(t on durin! the +or3in! period.
7or !ood soldered connections" $ou must 3eep the solderin! iron tip clean. +ipe it o(ten +ith a
damp spon!e or cloth.
Ceep hot tip o( the solderin! iron on a piece o( metal so that e1cess heat is dissipated.
;a3e sure that the connection to #e soldered is clean. Aa1 (ra$ed insulation/s and other (orei!n
su#stances cause poor connections. 4lean the component leads +ires" lu!s" etc." +ith a #lade or a
3ni(e to remove the rust and dust #e(ore solderin!.
:end the lead at a 45 an!le to the >4:.
Dse ust enou!h solder to cover the lead and the copper (oil area o( the connection to #e soldered.
E1cess solder can #rid!e across (rom one (oil path to another (oil and cause a short circuit.
,ppl$ enou!h heat to the (oil and the lead to allo+ the solder to spread (reel$. , !ood soldered oint
+ill loo3 smooth" shinin! and solder eIuall$ spreaded alon! the pad.
Do not over heat the components or the >4:. E1cess heat ma$ spoil the >4: or dama!e the
components. The !eneral time o( solderin! is 2 to 3 seconds.
The >4: or components should not vi#rate +hile solderin! other+ise $ou +ill have a dr$ or a cold
oint.
5emem#er lar!er metal sur(aces ta3e lon!er time to heat e.!. clamps o( 4oils" trans(ormers" heat
sin3s etc.
Ahile usin! the -de.solderin! pump/ to clear the plu!!ed holes=pads special care should #e ta3en"
as the e1cessive heat or pullin! action ma$ dama!e the copper (oils.
The leads o( resistors" capacitors" and similar components are !enerall$ much lon!er than needed to
ma3e the reIuired connections. 4ut the leads +ith a dia!onal cutter or a nail cutter to the proper len!th
#e(ore installin! the part2 the leads should #e ust lon! enou!h to reach the57 connectin! points.
,ppl$ small amount o( (lu1 to the tinned < cleaned leads o( the solderin! components.
8tart solderin! $our >roect Cit (rom the po+er.suppl$ section vi@" step.do+n trans(ormer" diodes"
capacitors < re!ulators. 7irst chec3 the components" clean them" then solder one.#$.one on the >4:.
Ne1t step is to chec3 the volta!es at di((erent points" across trans(ormer primar$ < secondar$ +indin!s"
a(ter recti(ier sta!e" (ilter sta!e < re!ulator sta!e respectivel$. ,lso chec3 that this volta!e is availa#le
at all points o( the >4:" especiall$ 04/s N9cc pins.
5&
No+ solder the ne1t section o( $our circuit and chec3 (or its inte!rit$ +ith the +hole proect. This step.
#$.step procedure must continue throu!hout the proect #uildin! session.
Ahile solderin! the order Eusuall$ (rom #i!.in.si@e to+ards small.in.si@e componentsF must #e 04
#ases" trans(ormers" transistors" electrol$tic capacitors" coils" ceramic capacitors" resistors etc.
Ahile solderin! the sensors" special modules care should #e ta3en that the$ are not connected in the
reverse order or +ron! polarit$ insertion too3 place.
To prepare a len!th o( connectin! +ire or umper +ire" $ou +ill normall$ remove 4mm o( insulation (rom
each end. 7or stranded +ire" appl$ solder to the ends to hold the strands to!ether.
5esistors should #e mounted in either vertical or hori@ontal (ashion. 4hec3 the color code (or the
proper value #e(ore solderin! them.
O#serve the polarit$ o( the electrol$tic capacitors < values o( the ;CT" 4eramic Disc t$pe capacitors.
>ush the leads o( the capacitors into the holes until $ou cannot push them (urther. :end the leads a
little" solder and cut o(( e1cess lead len!ths.
4hec3 the transistors t$pe" +hether N>N or >N>" and identi($ the pins correctl$ on the >4:.
The #and indicates 4athode in Diodes" N mar3 indicates positive polarit$ in 4apacitors" dot or notch
indicates the 4ollector lead o( the Transistor.

Cali:rati/n&Fine Tuning&Ad8usting&Aligning t1e !r/8e0t 9it
Ahen the +hole circuit is soldered and tested (or inte!rit$ in step.#$.step procedure as e1plained
a#ove" ta3e a #rea3[
This must #e a (resh" ne+ session (or $ou. :ecause this session demands $our cool and (resh mind.
set" as lot o( #ac3 trac3in! is supposed to do here.
, little time spent care(ull$ per(ormin! the stated steps +ill #e re+arded +ith e1cellent per(ormance.
:e(ore proceedin! in this session !ather all the necessar$ testin! instruments on the +or3#ench.
4are(ull$ handle the testin! instruments" as the$ are costl$ electronic.!ad!ets to !et. Cno+ ho+ to
operate them" #e(ore emplo$in! them in $our proect testin! session.
Trouble-s4ootin7 t4e &roFect $it'
7irst visuall$ chec3 (or the ph$sical disorder" improper solderin! or poor connections on the >4:.
4hec3 the mains cord" trans(ormer output and po+er.suppl$
4hec3 that all 4omponents are in the57 proper location and are installed correctl$ as per the 4ircuit
dia!ram supplied +ith the >roect Cit.
51
52
A A))lication . ,uture DeGelo)ments
A&&#ICATION
1F 0t can #e used i n i ndustri es (or heav$" monotonous o#s.
2F 0t can #e used i n stores (or movi n! o# ects (rom one pl ace to another.
3F 5o#oti c vacuum cl eaner i s used i n i ndustri es (or cl eani n!.
4F 0t can #e used i n stores (or pi c3i n! up o# ects.
,uture DeGelo)ments
The (ollo+in! modi(ications can #e made to the present circuit" +hich leads to still smarter proect #uildin!
tas3.
This proect is open (or developments (rom all sides. 0t is the users/ ima!ination +hich limits the +or3in! o(
this proect. One can !o on addin! the e1tra" rich (eatures to this proect.
53
BIB#IO%RA&0@
The K&51 ;icrocontroller < Em#edded 8$stems . ;a@idi
Desi!n +ith >04 microcontroller L >eatman
The ;icrocontroller 0dea :oo3 . ,1elson
+++.electronics(oru.com
+++.ho+stu((+or3s.com
54

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