Simlab 2

Ramesh Babu.
Darla 76
EE4128 SIMULATION OF ELECTRICAL SYSTEMS LAB (JNTU Syllabus)

The following experiments are required to be conducted as compulsory experiments:
1. Pspice simulation of transient response of RLC circuits.
a) Response to Pulse input
b) Response to step input
c) Response to sinusoidal input
2. Analysis of three-phase circuit representing the generator transmission line and load.
Plot three phase currents & neutral current using PSPICE.
3. Pspice simulation of single-phase full converter using RL & E loads and single-phase
AC voltage controller using RL & E loads.
4. Pspice simulation of resonant pulse commutation circuit and Buck chopper.
5. Pspice simulation of single phase Inverter with PWM control.
6. Plotting of Bode plots, root locus and Nyquist plots for the transfer functions of system
up to 5
th
order using MATLAB.
7. Transfer function analysis of any given system up to 3
rd
order using SIMULINK.
8. Power flow solution and Transient stability evaluation of Power system.
In addition to the above eight experiments, at least and two of the experiments from the
following list are required to be conducted:
9. Pspice simulation of DC circuit for determining Thevenins equivalent.
10. Transfer function analysis of DC circuit using PSPICE.
11. Modeling a transformer and simulation of lossy transmission line in PSPICE.
12. Step response of an RLC circuit by parametric analysis using PSPICE.
13. Pspice simulation of OP-Amp based Integrator & Differentiator circuits.
14. Short circuit studies.
15. Dynamic stability analysis of Power Systems.
16. Transfer function analysis of a given circuit using MATLAB.
17. Switching Transients using EMTP.

Ramesh Babu. Darla 77
Reference Books:

1. Pspice for circuits and electronics using PSPICE M.H. Rashid, M/s. PHI Publications.
2. Pspice A/D users manual Microsim, USA.
3. Pspice reference guide Microsim, USA.
4. MATLAB users manual Math works, USA.
5. MATLAB Control System toolbox Math works, USA.
6. SIMULINK users manual Math works, USA.
7. EMTP Users Manual.

..
EXPT NO: 1

1. STEP, PULSE AND, SINUSOIDAL RESPONSES FOR A SERIES R-L-C CIRCUIT

1. Aim: - The objective is to study the operation and characteristics of R-L-C series circuit for a
different input signals as stated in the problem.

Problem: - The R-L-C circuit R=2 OHM L=50UH and C=10UF use PSPICE to calculate and
plot the transient response from 0 to 400us.The capacitor voltages are the output which is to be
plotted. Simulate this for STEP, PULSE, and SINUSOIDAL inputs ant input voltage magnitude
is 10 volts for all signals.

2. Apparatus: -
Microsim Eval 8 PSPICE Software Package.
Components
I. Description
The following components are presented in this experiment Voltage Source, Resistor,
Capacitor, and Inductor.
Voltage Source: The voltage source can be any type i.e., ac, dc, pulse, etc. The initialization of
voltage sources is explained.
3. Circuit diagram: -

Fig 1. Series R-L-C circuit

4. Theory:
The system dynamic behavior for analysis and design is judged and compared under the
application of standard test signals like an impulse, step and, constant velocity (a ramp) input.
Another standard test signal that is of great importance is a sinusoidal signal. Steady state
response to this signal yields a great deal of information about the system.

5. Procedure
1. Represent the nodes for a given circuit.
2. Write PSPICE Program by initializing all the circuit parameters.
3. Execute the program in Microsim text editor and run the program.
4. Make the corrections if required.
5. Observe the out put and take printouts of that

6. Program

*RLC SERIES CIRCUIT WITH STEP INPUT
VS 1 0 PWL(0 1V 1US 1V 1MS 1V 2MS 1V)
R 1 2 100KOHM
L 2 3 10ML
C 3 0 1UF
.TRANS 1US 100US
.PROBE
.END

*RLC SERIES CIRCUIT WITH PULSE INPUT
VS 1 0 PULSE(0 10V 0 1NS 1NS 100US 16.67MS)
R 1 2 100KOHM
L 2 3 10ML
C 3 0 1UF
.TRANS 1US 100US
.PROBE
.END

*RLC SERIES CIRCUIT WITH SINUSOIDAL INPUT
VS 1 0 SIN(0 10V 50HZ)
R 1 2 100KOHM
L 2 3 10ML
C 3 0 1UF
.TRANS 1US 100US
.PROBE
.END

7.Graphs/Expected waveforms

Output waveform at capacitor with step input


Output waveform at capacitor with pulse input

Output waveform at capacitor with sinusoidal input
8. Inference
It is observed that by giving different inputs the behavior of the circuit and the transient and
steady state analysis of the given circuit. The step response of RLC series circuit is settling at
zero steady state error. It is also seen that the capacitor is charging when the positive pulse
appearing and discharging when negative pulse. And it is observed when the sinusoidal input is
given the system response is oscillating.

9. Questions
1. What is the resonance?
2. Why the resonance will occur in R-L-C circuits?
3. What is the delay time, rise time, settling time and peak overshoot?
4. In the circuit when all the devices except inductor and Dc supply is given what happens
at that time. Why it is give some explanation?
5. How you are defining the pulse input to the circuit?
6. Draw the existing sinusoidal wave form in PSPICE and define it for 230V, 50Hz.
7. Define the piecewise linear waveform at different timings with different magnitudes.
8. What is the difference between? . PLOT and .PROBE command?
9. In PSPICE programming what is the indication of first line?
10. Is .END command necessary to write PSPICE program?
11. What happens if .TRAN command is not presented in the program?
12. How can you write the comments in the program?
13. Write the program for parallel RLC circuit for a step input.
14. Write the program for parallel RLC circuit for a pulse input.
15. Write the program for parallel RLC circuit for a sinusoidal input.
16. Write the program for parallel RLC circuit for a ramp input.
17. Write the program for parallel RLC circuit square wave step input.
18. Write the program for series RLC circuit for a square wave input.
19. Write the program for series RLC circuit for a piecewise linear input.
20. Write the program for series RLC circuit for a triangle wave input.

10. Precautions

1. Initialize the nodes of the circuit correctly.
2. Use correct dot commands at the end of the program.
3. Dont write the program from the first line, first line is reserved for program title.
11. Applications

The analysis of different types of test signals is used in control systems analysis and design, and
to know the performance of the any systems.

12. Extension
Analyze the same circuit with Fourier by using PSPICE.

13. Trouble shooting
If the simulation is not completed successfully, verify the first line of the program and leave
other wise write title of the program. Or you can help from help menu to know the error details.

..
EXPTNO: 2
2. BUCK CHOPPER
1. Aim: - The objective is to study the operation and characteristics of a dc buck chopper under
various load conditions.

Problem: - A BJT buck chopper is shown in fig. The dc input voltage Vs=110V. The load
resistance is 3 OHM. The filter inductor Le=681.82Uh and the filter capacitor is C=8.33UF. The
chopping frequency is 20 KHz. The inductor value L=40.91 UF then simulate the chopper for a
requirement of output voltage 60V.Plot the output voltage wave forms with respect to input
waveforms. Take diode model parameters as [IS=6.73F BF=416.4 BV 1800 TT=0] and BJT
model parameters [IS=2.2E-15 BR=0.7371 CJC=3.638P CJE+4.49P TR=239.5N TF=301.2P]

2. Apparatus: -
Microsim Eval 8 PSPICE Software Package
Components
I. Description
The following components are presented in this experiment Voltage source, Step Voltage
Source, Resistor, Capacitor, Inductor, BJT, and Diode.
4. Circuit diagram: -

4. Theory:

In a buck regulator the average output voltage Va is less than the input voltage, Vs hence the
name buck a very popular regulator. The circuit operation can be divided into two modes.
Mode1 begins when the transistor is switched on at t=0. The input current, which rises, follows
through inductor L, capacitor C filters and load resistance R.
Mode2 begins when transistor Q1 is switched off at t=t1. The freewheeling diode Dm conducts
due to energy stored in the inductor and inductor current continues to flow through L, C, load
and diode Dm.
The inductor current falls until transistor Q1 is switching on again in the next cycle. Depending
on the switching frequency, filter inductance and capacitance, the inductor current could be
discontinues.

5. Procedure

5. Observe the out put and take printouts of that.
6. Calculations
Total time period of the gate pulse (T) = 1/f sec
=
Total on time of the pulse = D*T
=
Where D is duty cycle = Vout / Vin
=

7. Program

* PROGRAM FOR SIMULATION OF BUCK CONVERTER TO GET 60V OUTPUT

VS 1 0 DC 110V ; Input voltage

VY 1 2 DC 0V ;VY to measure current through node 1 2

Vg 7 3 PULSE (0V 20V 0 0.1NS 0.1NS 27.28US 50US);
RB 7 6 250 ; Load resistance

LE 3 4 681.82UH

CE 4 0 8.33UF IC=60V;Intial voltage
L 4 8 40.91UH
R 8 5 3
VX 5 0 DC 0V;Voltage source to measure load current
DM 0 3 DMOD ;Freewheeling diode

MODEL DMOD D(IS=2.2E-15 BV=1800V TT=0)
Q1 2 6 3 QMOD

. MODEL QMOD NPN (IS=6.734F BF=416.4 BR=.7371 CJC=3.638P
CJE=4.49P TR=239.5N TF=301.2P)

. TRAN 1US 1.6MS 1.5MS 1US UIC
. PROBE
. options abstol=1.00n reltol=0.01 vntol=0.1 ITL5=50000;
. END
8. Expected out put waveforms:

9. Result
Out put voltage =

10. Inference
It is observed that the buck chopper has reduced the given input to the desired output; hence it is
matching with theoretically. By doing this we can say that this buck chopper can be used to
reduce the input supply to a required value.

11. Questions
1. What is the purpose of Buck-chopper?
2. What are the types dc/dc choppers available?
3. Derive the output voltage equations with respect to duty cycle.
4. Draw the waveforms for out put voltage with respect to input voltage and gating pulses.
5. Write what are the effects while fast switching in the chopper?
6. What is the need of out put capacitor?
7. What happens if capacitor removes form the circuit?
8. What is the purpose of gate resistor?
9. What is the purpose of Diode?
10. What is the name of Diode presented in the circuit?
11. Explain about the model parameters for diode and transistor?
12. Which chopper can be used for step-up/step-down operation?
13. Simulate the system with RL load
14. Simulate the system with RLE load
15. Simulate the system with RLC load
16. In the given circuit replace BJT with SCR and write the program.
17. Observe the output for question 16 and write the comments.
18. What is the main difference when we use BJT and SCR?
19. Can we use SCR in if not why?
20. Write your comments on this experiment.

12. Precautions

13. Applications
DC/DC chopper are used in high voltage dc transmission system. These are used where the dc
regulated supply is required.

14. Extension
Analyze the switching transients of buck chopper.

Some times the circuit may not converge; at that time verify the options parameters.

..
EXPT NO: 3
3. FULL CONVERTER
1. Aim: - The objective is to study the operation and characteristics of single-phase full converter
using thyristor at various load conditions.

Problem: A single-phase full converter is shown in fig. The converter is connected through a
load inductor l is 6.5mH, and the load resistor is R 0.5 OHM. The load battery voltage is
Vx=10V. The input voltage has a peak of 169.7V 50Hz. The delay angle is 30 DEG. Write
SPICE program and plot output voltage and load current.
2. Apparatus: -
3. Components
I. Description
Capacitor, Inductor, and SCR
SCR: Initialization of SCR is explained in Appendix III
Diode: Initialization of Diode is explained in Appendix III
In this experiment we have to initialize the convergence parameters this is shown in Appendix
IV
4. Circuit diagram

5. Theory:
A bridge type full converter consists of four thyristors T1, T2, T3, and T4. By varying firing
angles of thyristors we can vary the output voltage. During positive half cycle of input cycle of
input voltage T1, T2 are forward biased through already conducting scrs T3 & T4 and block the
forward voltage. When T1, T2 are triggered at wt=, they get turned on. As a result, supply
voltage V
m
sin immediately appears across thyristors T3, T4 as a reverse bias commutation. At
the same time, load current i
0
flowing through T3, T4 is transferred to T1, T2 at wt=.
During the negative half cycle T3, T4 are forward biased. T1, T2 gets reverse biased. If the
output current i
0
is continuous, then T1, T2will continue conduction even after input voltage gets
reverse biased. After + the two thyristors T3, T4 are triggered. Thus, the supply voltage
appears across load terminals.
The average output voltage is given by,

V
o
= (2V
m
cos) /
6. Procedure

7. Program

*FULL CONVERTER CIRCUIT
VS 1 0 SIN(0V 169.7V 60HZ)
VG1 6 2 PULSE(0V 10V 2777.8US 1NS 1NS 100US 16666.7US)
R 2 4 10
L 4 5 20MH
C 2 11 793UF
RX 11 3 0.1
VX 5 3 DC 10V
VY 10 1 DC 0V

XT1 1 6 2 SCR /* initializing SCR */
XT2 0 8 2 SCR
XT3 3 7 0 SCR
XT4 3 9 1 SCR
/* subcircuit initializing for SCR equivalent circuit*/
. SUBCKT SCR 1 3 2
S1 1 5 6 2 SMOD
RG 3 4 50
VX 4 2 DC 0V
VY 5 7 DC 0V
DT 7 2 DMOD
RT 6 2 1
CT 6 2 10UF
F1 2 6 POLY (2) VX VY 0 10 11
. MODEL SMOD VSWITCH (RON=0.0125 ROFF=10E+5 VON=0.5V
VOFF=0V)

. MODEL DMOD D(IS=2.2E-15 BV=1800V TT=0 CJO=0)
. ENDS SCR
. TRAN 1US 300MS
. PROBE
. options abstol=1.00n reltol=0.01 vntol=0.1 ITL5=50000
. END

8. Expected waveforms

9. Calculations:
Time delay t1= (1 / 360) * (1000 / f) * 1000=
Time delay t2= (2 / 360) * (1000 / f) * 1000=

10. Inference
It is observed that the output of the full converter is controlled according to the requirement. It is
similar to the theoretical results.

11. Questions
1. Study the principle of operation of full converter.
2. What is the difference between full and semi converter?
3. What are the types converters available?
4. Derive the output voltage equations.
5. Draw the waveforms for out put voltage with respect to input voltage and gating pulses.
6. Write are the effects while fast switching in the converter?
7. What is the need of out put capacitor?
8. What happens if capacitor removes form the circuit?
9. What is the purpose of gate resistor?
10. Why four SCR s are using in this circuit?
11. What is the name of Diode presented in the circuit?
12. Explain about the model parameters for diode and transistor?
13. How can you define the SCR in PSPICE give an example?
14. Why the out wave is going to negative cycle?
15. Add the E load and simulate it.
16. What is your observation with and without E load?
17. Write the program by adding diodes at each SCR as protecting devices.
18. Can we use here BJT?
19. Draw the circuit diagram representation with MOSFET as switches.
20. Write the program for triangle wave input.

12. Precautions

13. Applications
The single-phase full-wave controlled rectifier is used to control power flow in many
applications (e.g., power supplies, variable-speed dc motor drives, and input stages of other
converters)

14. Extension
Analyze the full converter with Fourier analysis of each component.

Some times the circuit may not converge; at that time verify the options parameters

..
EXPTNO: 4
4. AC VOLTAGE CONTROLLER
1. Aim: - The objective is to study the operation and characteristics single-phase voltage
regulator at different load conditions.
Problem: A single-phase voltage regulator is shown in fig. The input voltage has peak of 230V
50Hz. The load inductance is 6mH and the load resistance is 2.5 OHM. The delay angles are
equal 90 deg for both SCRs. Write SPICE program for this and plot the out put waves for load
vo9ltage and current.

2. Apparatus: -
Microsim Eval 8 PSPICE software Package
Components
I. Description
The following components are presented in this experiment Gate pulse, Voltage Source,
Resistor, Capacitor, SCR, and Inductor.
SCR: Initialization of SCR is explained in Appendix III
Diode: Initialization of Diode is explained in Appendix III

3. Circuit diagram

4. Theory:
AC voltage controllers are thyristor-based devices, which convert fixed alternating voltage
directly to variable alternating voltage with out Change in frequency. Some of the applications
of the ac voltage controllers are for domestic and industrial heating, transformer tap changing,
lighting control, speed control of single phase and 3 phase ac devices and starting of induction
motors. Earlier the devices used due this applications where auto transformer, tap changing
transformer, magnetic amplifiers, saturable reactors etc. but this devices are now replaced by
thyristors and triac based ac voltage controllers, because of their high efficiency, flexibility, in
control contact size, less maintenance. A.C voltage controller is also adaptable for closed looped
control systems. Since the ac voltage controller is phase control device thyristor and triac are line
commutated and such as no complex commutation circuitry is required in this controller.
The main disadvantage of ac voltage controller is the introduction harmonics in the supply
current and bad voltage waveforms particularly at reduced output voltage levels.
5. Procedure
6.Program
* PROGRAM FOR SIMULATION OF SINGLE PHASE VOLTAGE CONTROLLER
VS 1 0 SIN(0 169.7V 60HZ)
R 4 5 2.5
L 5 6 6.5MH
VX 6 0 DC 0V
*C 4 0 1245.94UF
CS 1 7 .1UF
RS 7 4 750
*SUBCKT FOR AC THYRISTOR MODEL

.SUBCKT SCR 1 3 2
S1 1 5 6 2 SMOD;SWITCH
RG 3 4 50
VX 4 2 DC 0V
VY 5 2 DC 0V
RT 2 6 1
CT 6 2 10UF
F1 2 6 POLY (2) VX VY 0 50 11

.MODEL SMOD VSWITCH(RON=0.01 ROFF=10E+5 VON=.1V VOFF=0V)
.ENDS SCR
XT1 1 2 4 SCR
XT2 4 3 1 SCR
.TRAN 10US 33.33MS
.PROBE
.END

7. Graphs/Expected waveforms


8. Calculations

Vm=
Time delay t1 =
Time delay t2 =

9. Inference /Result
From the simulation of single-phase ac voltage regulator it is observed that the regulator is able
to control ac voltage in both the half cycles at desired range. From this we can say that the
voltage regulators can be used where variable voltage is required.

10. Questions

1. What is the need of snubber circuit?
2. What is the need of ac voltage regulators?
3. Can we use triac instead of two SCR s in the circuit?
4. Observe the output waveforms for a given circuit with and with out capacitor-using
SPICE and plot the graphs.
5. Write your comments based on question 4.
6. Write a program using BJT for regulator.
7. Observe the output waveforms of regulator with and with out L E load.
8. Write your comments based on question 7.
9. Simulate the regulator with out snubber circuit.
10. Can we use any other device rather than two SCRs? if yes give the names?
11. Can we use single gate pulse instead of two?
12. Observe the output waveforms with SCR firing angles at 90 degrees.
13. Remove the LE load and simulate it.
14. Write comments with LE and without LE load.
15. Apply triangle waveform and simulate.
16. Write the program for a single-phase voltage regulator with transistors as switching
devices.
17. Write a program for three-phase six-thysristor ac controller.
18. Draw the three-phase six-thysristor ac controller.
19. Define a pulse input command for 60 degrees at a frequency of 50Hz.
20. Show the output wave by giving dc input voltage fro regulator.

12. Precautions

13. Applications
The single-phase ac voltage controller is used to control power flow in many applications (e.g.,
industrial and induction heating, pumps and fans, light dimmers, and food blenders)

14. Extension
Analyze the ac regulator with THD and Fourier analysis.

Some times the circuit may not converge; at that time verify the options parameters

..
EXPT NO: 5
5. PWM INVERTER
1. Aim: The objective is to study the effects of sinusoidal PWM control on the total harmonic
distortion (THD) of the output voltage for a single-phase full-bridge inverter under a resistive
load.

Problem: A single-phase bridge inverter is shown in fig. The dc input voltage is 100V. It is
operated at an output frequency of f
o
=60Hz with a PWM control and four pulses per half-cycle.
The modulation index M=0.6. The load is purely resistive with R=2.5 OHM. Write SPICE
program and plot output voltage, the instantaneous carrier and reference voltages, and to
calculate Fourier coefficients of output voltage v
o
Use voltage-controlled switches to perform the
switching action.
2. Apparatus: -
Components
I. Description
3. Circuit diagram


4. Theory:
The circuit, which converts from dc to ac, is known as inverter. The output voltage and
frequency we can get according to our desire value. There are basically two types of inverters are
available 1.single-phase inverters and 2. Three-phase inverters.
5. Procedure

6.Program
*PWM CONTROL OF INVERTER
Vs 1 0 DC 100V
Vr 17 0 PULSE(50V 0V 0 833.33US 833.33US 1NS 16666.67US)
Rr 17 0 2MEG
VC1 15 0 PULSE(0 -30V 0 1NS 1NS 8333.33US 16666.67US)
RC1 15 0 2MEG
VC3 16 0 PULSE(0 -30V 8333.33US 1NS 1NS 8333.33US
16666.67US)
RC3 16 0 2MEG
R 4 5 2.5
L 5 6 10MH
VX 3 4 DC 0V
VY 1 2 DC 0V
D1 3 2 DMOD
D2 0 6 DMOD
D3 6 2 DMOD
D4 0 3 DMOD
.MODEL DMOD D (IS=2.2E-15 BV=1800V TT=0)
Q1 2 7 3 QMOD
Q2 6 9 0 QMOD
Q3 2 11 6 QMOD
Q4 3 13 0 QMOD
.MODEL QMOD NPN (IS=6.734F BF=416.4 CJC=3.638P CJE=4.493P)
Rg1 8 7 100
Rg2 10 9 100
Rg3 12 11 100
Rg4 14 13 100

*SUBCIRCUIT CALL FOR PWM CONTROL
XPW1 17 15 8 3 PWM
XPW2 17 15 10 0 PWM
XPW3 17 16 12 6 PWM
XPW4 17 16 14 0 PWM

*SUBCKT FOR PWM CONTROL
.SUBCKT PWM 1 2 3 4
R1 1 5 1K
R2 2 5 1K
RIN 5 0 2MEG
RF 5 3 100K
R0 6 3 75
C0 3 4 10PF
E1 6 4 0 5 2E+5
.ENDS PWM
.TRAN 10US 16.67MS 0 10US
.PROBE
.OPTIONS abstol=1.00n reltol=0.01 vntol=0.1 ITL5=20000
.END
7.Graphs/Expected waveforms

8. Calculations

Vc = M*Vr
Time period t1 =
Time period t2 =


It is observed that the simulation of PWM inverter is giving output according to theoretical. By
giving DC input it is converting to ac in square waveform.

10. Questions

1. Why the carrier and reference signals are required?
2. What is the THD?
3. In the given circuit diagram why we are using four gate pulses?
4. What is the purpose of diodes?
5. What happens if we put SCR s in place of BJT?
6. Write a program with MOSFET as switching devices in the given circuit.
7. What is the difference between MOSFET and BJT switching?
8. Add the E load for a given PWM inverter and observe the output.
9. Remove the gate resistors and simulate the program.
10. Repeat the simulation for a for step input.
11. Generate six pulses for same values given in the problem.
12. Remove all the diodes and simulate the inverter circuit.
13. Add RLE load and simulate the circuit.
14. Can we use two SCRs in the circuit? If yes how it is?
15. What is modulation index?
16. What are the voltage-controlled switches?
17. What are the current controlled-switches?
18. Generate two pulse signals with the modulation indes.4 write only commands.
19. Can we generate sinusoidal PWM for inverters?
20. If answer is yes explain about that.
11. Precautions
12. Applications
The single-phase full-bridge inverter is used to control power flow in many applications (e.g., ac
and dc power supplies, and input stages of other converters)
13. Extension
Analyze the v
o
and i
o
with Fourier analysis.
Some times the circuit may not converge; at that time verify the options parameters. In this
program you will get some errors due to generation of PWM so verify the circuit for PWM
generation.

EXPT NO: 6
6. ROOTLOCUS, BODE PLOT AND, NYQUIST PLOTS
1. Aim: - The objective to find the stability of a given 2
nd
3
rd
, 4th and 5
th
order Systems by
plotting root locus, bode plot and, nyquist in MATLAB Program to plot

2. Apparatus:
MATLAB/SIMULINK Software package
Problem
1. k/s(s+1)(s+2)
2. k(s+3)/s(s+3)(s^2+2s+3)

3. Theory:
Frequency response is the steady state response of a system when the input to the system is a
sinusoidal signal. Consider a LTI system H . let x (t) be an input sinusoidal signal. The response
or output of the system is also a sinusoidal signal of the same frequency, but with different
magnitude and phase angle.
Frequency domain specifications:

1) Resonant peak, m
r

2) Resonant frequency, w
r

3) Band width
4) Cutoff rate
5) Gain margin
6) Phase margin
Resonant peak:
The max. Value of the magnitude of the closed loop transfer function is called the resonant
peak. A large resonant peak corresponds to a large overshoot in the transient response.
Resonant frequency:
The frequency at which the resonant peak occurs is called resonant frequency
Bandwidth:
The bandwidth is the range of the frequencies for which the system gain is more then -
3db is called cutoff frequency.

Cutoff rate:
The slope of the log magnitude curve near the cutoff frequency is called Cutoff rate. The
Cutoff rate indicates the ability of the system to distinguish the signal from the noise.
Gain margin:
The gain margin, kg is defined as the reciprocal of the magnitude of open loop transfer
function at the phase cross over frequency
K
g
=1/(G (jw
pc
)
Phase margin:
The phase margin is that amount of additional phase log at the gain cross over frequency
require to bring the system to the verge of the stability.
Phase margin =180+
gc

gc=
angle

4. Procedure
1. Open the MATLAB M-file editor and write the program then save it.
2. Initialize all the values, which are given in the problem.
3. Simulate the program.
4. Take printouts of the response.

5. Program
%Root locus of 5th order system
num=[-3]
den=[1 13 54 82 60 0]
rlocus(num,den)
subplot(226)

%Bode plot of 5th order system
num=[-3]
den=[1 13 54 82 60 0]
bode(num,den)
subplot(224)

%Nyquist plot of 5th order system
num=[-3]
den=[1 13 54 82 60 0]
nyquist(num,den)
subplot(225)

6. Expected waveforms

7. Inference
It is observed from this simulation we can find the system stability and different time response
just by using mouse. And it is also observed we can find the system response for any order easily
by using this simulation.
8. Questions
1. What is the gain and phase margin?
2. How can you find the stability of a system by using root locus plot?
3. How can you find the stability of a system by using Nyquist plot?
4. How can you find the stability of a system by using Bode plot?
5. What is the steady state error?
6. What is the settling time?
7. Obtain all plots with out using LTI viewer.
8. Obtain all plots with LTI viewer.
9. Find the step response of give problem using simulink.
10. Show all the indications on plots.
11. How can you find the transfer function of physical model?
12. Find the step response using MATLAB program.
13. Which poles are used to draw root locus?
14. Can we draw the root locus for nonlinear systems?
15. What do you mean by BIBO?
16. Simulate the open loop system and closed loop system and comment on stability.
17. What is your opinion on question no 16?
18. Model the simple RLC circuit and find steady state value using LTI viewer.
19. How can you set the axis to draw root locus?
20. Write a simple program to draw root locus by giving desired axes.
9. Applications
Root locus technique is used to find the stability of system in time domain analysis. Bode and
nyquist techniques are used to stability of system in frequency domain. All the methods are
applicable for linear systems.
10. Extension
We can apply these methods for any real time problems to find the stability of any order system.
Error may occur due bad commands verify the commands to get different plots.

..
EXPT NO: 7

7. TRANSFER FUNCTION ANALYSIS OF GIVEN BLOCK DIAGRAM USING
SIMULINK
1. Aim: - The objective is to find the time specifications of a given 3
rd
order system using
SIMULINK

2. Apparatus
Problem: Construct a SIMULINK block diagram for a given system shown in fig and find the
time specifications of a system. Then if any steady state error is presents apply PI too reduce
steady state error.
The system parameters are
The time constant of speed governor T
g
=02.sec.
The time constant of turbine is T
t
=0.5.sec
And the transfer function of generator is =1/10s+0.8
1/R=20
PI gain=7.
Take incremental step load change P
D
=0.2.
3. Circuit diagram

Fig 1. Block diagram for a given system without PI controller


Fig 2. Block diagram for a given system with PI controller

4. Theory:
The time specifications of a system are delay time, rise time, peak overshoot, settling time and,
steady state error.
Delay time: It is the time required for the response to rise from 0% to 10% of the signal value.
Rise time: It is the time required for the response to rise from 10% to 90% of the signal value.
Peak overshoot: It indicates the normalize difference between the time response peak and the
steady output and is defined as
= C(t
p
)-C()/C() * 100
Settling time: This the time where the response settles within the specified error.

5. Procedure
1. Open the SIMULINK browser window and drag the required blocks.
2. After dragging connect it properly.
4. Simulate block diagram and open the scope to view the plots.
6. Add the PI controller and repeat the steps 4 and 5.

6. Expected time response


7. Inference
It is observed that the simulation of frequency control problem got some steady state error by
adding the PI controller it is reduced to zero. From this simulation we can say simulation of real
time systems is very easy in simulink.

8. Questions
1. What is the steady state error limit?
2. How can analyze the system stability by using time specifications?
3. What is purpose of PI controller?
4. What is the purpose of PD controller?
5. What is the purpose of PID controller?
6. Obtain the response with out step load change?
7. Add the PD controller and observe the output?
8. Add PID and observe the output?
9. How can we reduce the steady state error?
10. How can we reduce the Peak overshoot?
11. How can you add disturbance or noise to the system?
12. Can you explain how can we change simulation properties?
13. Where can we change simulation stop time?
14. How can you initialize two, three, four axes in scope to see the graphs?
15. Simulate the system with only step response.
16. Simulate the system with unity feedback.
17. Reduce the peak overshoot of the system.
18. How can set the gain of integrator?
19. Make the step change zero and simulate the system.
20. Can we reduce the disturbance? If not why?


9. Precautions
1. Initialize the values of each b block correctly.

10. Applications
Transfer function analysis used to find the performance analysis of physical systems e.g.,
Generators, Motors, and many more which has been using in electrical an d electronics
application.

11. Extension

The problem which is stated above is practical model of speed governing system used at
generating stations here we restricted only with PI controller, but we can model with PD and PID


You may see some error simulating the model at that time go to help menu you can solution for
that.

..
EXPT NO: 8
8. TRANSFER FUNCTION ANALYSIS OF GIVEN BLOCK DIAGRAM
1. Aim: - The objective is to write the MATLAB program to find the time specifications of a
given system.

2. Apparatus:

Problem: Write a MATLAB program for a given system shown in fig and find the time
specifications of a system. Then if any steady state error is presents apply PI too reduce steady
state error.
The system parameters are
The time constant of speed governor T
g
=02.sec.
The time constant of turbine is T
t
=0.5.sec
And the transfer function of generator is =1/10s+0.8
1/R=20
PI gain=7.
Take incremental step load change P
D
=0.2..

3. Circuit diagram

Fig 1. Block diagram for a given system without PI controller


Fig 2. Block diagram for a given system with PI controller

4. Theory:
The time specifications of a system are delay time, rise time, peak overshoot, settling time and,
steady state error.
Delay time: It is the time required for the response to rise from 0% to 10% of the signal value.
Rise time: It is the time required for the response to rise from 10% to 90% of the signal value.
Peak overshoot: It indicates the normalize difference between the time response peak and the
steady output and is defined as
= C(t
p
)-C()/C() * 100
Settling time: This the time where the response settles within the specified error.
5. Procedure
5. Add the PI controller and repeat the steps 4 and 5.
6. Program
% PROGRAM FOR TRANSFER FUNCTION ANALYSIS OF A GIVEN CIRCUIT
USING MATLAB WITHOUT PI CONTROLLER
PD=0.2; % STEP LOAD CHANGE
num=[0.1 0.7 1]; % TRANSFER FUNTION NUMERATOR
den=[1 7.08 10.56 20.8]; % TRANSFER FUNCTION DENOMINATOR
t=0:0.02:10; %TIME SETTING
c=-PD*step(num,den,t) %INITIALISING TOTAL TRANSFER FUNTION
plot(t,c)
xlabel('t,sec') % X - AXIS SETTING
ylabel('p.u') % Y - AXIS SETTING
title('STEP RESPONSE OF SPEED GOVERNING SYSTEM WITHOUT PI CONTROLLER')
timespec(num,den)
% PROGRAM FOR TRANSFER FUNCTION ANALYSIS OF A GIVEN CIRCUIT
USING MATLAB WITH PI CONTROLLER
PD=0.2; % STEP LOAD CHANGE
PI=7; % PI INTEGRAL GAIN
num=[0.1 0.7 1 0]; % TRANSFER FUNTION NUMERATOR
den=[1 7.08 10.56 20.8 PI]; % TRANSFER FUNCTION DENOMINATOR
t=0:0.02:12; %TIME SETTING
c=-PD*step(num,den,t) %INITIALISING TOTAL TRANSFER FUNTION
plot(t,c)
xlabel('t,sec') % X - AXIS SETTING
ylabel('p.u') % Y - AXIS SETTING
title('STEP RESPONSE OF SPEED GOVERNING SYSTEM WITH PI CONTROLLER')

7. Graphs/Expected waveforms


It is observed that the simulation of frequency control problem got some steady state error by
adding the PI controller it is reduced to zero. From this simulation we can say simulation of real
time systems also can do by writing a program as we did in simulink.

9. Questions
1. What is the steady state error?
2. What are the specifications required to find the stability of the system?
3. What is purpose of actuator?
4. What is the purpose of amplifier in control systems?
5. What is the purpose sensor?
6. Obtain the response with out step load change?
7. Add the PD controller and observe the output?
8. Add PID and observe the output?
9. How can we reduce the steady state error?
10. How can we reduce the Peak overshoot?
11. How can you add disturbance or noise to the system?
12. Can you explain how can we change simulation properties?
13. Where can we change simulation stop time?
14. How can you initialize two, three, four axes in scope to see the graphs?
15. Simulate the system with only step response.
16. Simulate the system with unity feedback.
17. Reduce the peak overshoot of the system.
18. How can set the gain of integrator?
19. Make the step change zero and simulate the system.
20. What are the disturbances normally occur?

10. Applications
Transfer function analysis used to find the performance analysis of physical systems e.g.,
Generators, Motors, and many more which has been using in electrical an d electronics
application.

11. Extension
The problem which is stated above is practical model of speed governing system used at
generating stations here we restricted only with PI controller, but we can model with PD and PID

that.

..
EXPT NO: 9
9. TRANSIENT ANALYSIS
1. Aim: - The objective to observe the transient analysis of a power system
2. Apparatus:
Circuit diagram

3. Problem and theory
This circuit is a simplified model of a 230 kV three-phase power system. Only one phase of the
transmission system is represented.
The equivalent source is modeled by a voltage source (230 kV rms/sqrt(3) or 187.8 kV peak, 60
Hz) in series with its internal impedance (Rs Ls) corresponding to a 3-phase 2000 MVA short
circuit level and X/R = 10. (X = 230e3^2/2000e6 = 26.45 ohms or L = 0.0702 H, R = X/10 =
2.645 ohms).
The source feeds a RL load through a 150 km transmission line. The line distributed parameters
(R = 0.035ohm/km, L = 0.92 mH/km, C = 12.9 nF/km) are modeled by a single pi section (RL1
branch 5.2 ohm; 138 mH and two shunt capacitances C1 and C2 of 0.967 uF).
The load (75 MW -20 Mvar per phase) is modeled by a parallel RLC load block.
A circuit breaker is used to switch the load at the receiving end of the transmission line. The
breaker which is initially closed is opened at t = 2 cycles, then it is reclosed at t = 7 cycles.
Current and Voltage Measurement blocks provide signals for visualization purpose.
4. Procedure
1. Open the SIMULINK browser window and drag the required blocks.
2. After dragging connect it properly.
3. Model the breaker-according requirement.
5. Simulate block diagram and open the scope to view the plots.
5. SIMULINK Diagram

7. Expected graphs

7. Inference
We can see the variation of a system by changing the operating conditions of the system. In this
simulation it is shown the transient response of a system by closing and opening the breaker so at
that conditions the system is disturbing and current is going to zero then the voltage across the
system varies.
8. Questions
1. Why the power will disturb?
2. On which factors the stability of system depends?
3. Do the same for T network.
4. Change the load with only resistive.
5. What is importance of transient response?
6. How can you model RLC parameters in MATLAB?
7. What is the value of inductor to remove it from series RLC block?
8. What is the value of capacitor to remove it from series RLC block?
9. What is the value of inductor to remove it from parallel RLC block?
11. How can we model circuit breaker?
12. What do you mean by subsystem?
13. What do you mean by masking of subsystem?
14. We can use only available functions in MATLAB are it true or false?
15. Can we get real time simulation in MATLAB?
16. Can you explain something about MATLAB after performing this simulation?
17. Repeat the simulation for the given system by changing times of breaker?
18. What happens if you use only resistive load?
19. Observe out put by adding capacitive load.
20. Can we use any device for switching instead of breaker?
9. Applications
Transient analysis is very important in power flow solutions by using this analysis we can
understand the transient response of the system.
10. Extension
We can use this analysis for real time models.
that.
EXPTNO: 10
10. DYNAMIC STABILITY
1. Aim: - The objective is to write a MATLAB Program to find dynamic stability of a given
system parameters and plot the response.

2. Apparatus

Problem:
A 60 Hz synchronous generator having inertia constant H=9.94 MJ/MVA and a transient
reactance Xd=0.3 per unit is connected to an infinite bus through, a purely reactive circit as fi.
Reactance is marked on the diagram on a common system base. The generator is delivering real
power of o.6 per unit, 0.8 power factor lagging to the infinite bus at a voltage of V=1 per unit.
Assume the per unit damping power coefficient is D=0.138. Consider a small disturbance of
=10 deg=0.1745 radian.
3. Circuit diagram

4. Theory:
The tendency of a power system to develop restoring forces equal to or greater than the
disturbing forces to maintain the state of equilibrium is known as stability. If the forces tending
to hold machines in synchronism with one another are sufficient to overcome the disturbing
forces, the system is said to be remain stable (to stay in synchronism).

The stability problem is concerned with the behavior of the synchronous machines after a
disturbance. For convenience of analysis, stability problems are generally divided into two major
categories-steady state stability and transient stability. Steady state-state stability refers to the
ability of the power system to regain synchronism after small and slow disturbances, such as
gradual power changes. An extension of the steady state stability is known as dynamic stability.
The dynamic stability is concerned with small disturbances lasting for a long time with the
inclusion of automatics control devices.
5.Procedure
6. Program

E = 1.35, V= 1.0; H= 9.94; X=0.65; Pm=0.6; D=0.138; f0 = 60;
Pmax = E*V/X, d0 = asin(Pm/Pmax) % Max. power
Ps = Pmax*cos(d0) % Synchronizing power coefficient
wn = sqrt(pi*60/H*Ps) % Undamped frequency of of oscillation
z = D/2*sqrt(pi*60/(H*Ps)) % Damping ratio
wd = wn*sqrt(1-z^2), fd = wd/(2*pi) %Damped frequency oscill.
tau = 1/(z*wn) % Time constant
th = acos(z) % Phase angle theta
Dp = 0.2; Du = pi*f0/H*Dp; % Small step change in power input
t = 0:.01:3;
% To plot step response
A = [0 1; -wn^2 -2*z*wn]; % wn, z and t are defined earlier
Dp = 0.1; Du = pi*f0/H*Dp; % Small step change in power input
B = [0;1]*Du;
C = [1 0; 0 1];% Unity matrix defining output y as x1 and x2
D = [0; 0];
[y, x] = step(A, B, C, D, 1, t);
Dd = x(:, 1); Dw = x(:, 2); % State variables x1 and x2
d1 = (d0 + Dd)*180/pi; % Load angle in degrees
f1 = f0 + Dw/(2*pi); % Frequency in Hz
figure(2), subplot(2,1,1), plot(t, d), grid
xlabel('t, sec'), ylabel('Delta, degrees')
subplot(2,1,2), plot(t, f), grid
xlabel('t, sec'), ylabel('Frequency, Hz')
subplot(111)

7. Expected graphs and results

8. Inference
Form the simulation it is observed that the stability of a machine in steady state.
9. Questions
1. Why the power will disturb?
2. On which factors the stability of system depends?
3. Do the same for T network.
4. Change the load with only resistive.
5. What is importance of transient response?
6. How can you model RLC parameters in MATLAB?
7. What is the value of inductor to remove it from series RLC block?
9. What is the value of inductor to remove it from parallel RLC block?
11. How can we model circuit breaker?
12. What do you mean by subsystem?
13. What do you mean by masking of subsystem?
14. We can use only an available function in MATLAB is it true or false?
15. Can we get real time simulation in MATLAB?
16. Can you explain something about MATLAB after performing this simulation?
17. Repeat the simulation for the given system by changing times of breaker?
18. What happens if you use only resistive load?
19. Observe out put by adding capacitive load.
20. Can we use any device for switching instead of breaker?

10. Applications
Dynamic stability analysis is very important in power flow solutions by using this analysis we
can understand the dynamic behavior of the system.

11. Extension
We can use this analysis for real time models.

that.

..

EXPT NO: 11
11. FAULT ANALYSIS
1. Aim: - The objective to write a MATLAB program to analyze different faults occurs in power
system

2. Apparatus

3. Theory
A fault in a circuit is any failure, which interferes with the normal flow of current. Faults are
caused the system accidentally through insulation failure of equipment or flash over of lines
initiated by lighting stoke or through accidentally faulty operation. The system must be protected
against flow of heavy short circuit currents by disconnecting the faulty part of the system by
means of circuit breakers.
4. Procedure
4. Open the command window and give the fault location bus number and bus
impedance value.
5. Then observe the out put if you want another value give command as yes(y)
otherwise give no (n).
6. Take printouts of output.
5. Program
data1 = [0 1 0 0.25
0 2 0 0.25
1 2 0 0.125
1 3 0 0.15
2 3 0 0.25];

zdata0 = [0 1 0 0.40
0 2 0 0.10
1 2 0 0.30
1 3 0 0.35
2 3 0 0.7125];
zdata2 = zdata1;
Zbus1 = zbuild(zdata1)
Zbus0 = zbuild(zdata0)
Zbus2 = Zbus1;
disp('(a) Symmetrical three-phase fault')
symfault(zdata1, Zbus1)
disp('(b) Line-to-ground fault' )
lgfault(zdata0, Zbus0, zdata1, Zbus1, zdata2, Zbus2)
disp('(c) Line-to-line fault')
llfault(zdata1, Zbus1, zdata2, Zbus2)
disp('(d) double line-to-ground fault')
dlgfault(zdata0, Zbus0, zdata1, Zbus1, zdata2, Zbus2)

6. Expected results
Zbus1 =

0 + 0.1450i 0 + 0.1050i 0 + 0.1300i
0 + 0.1050i 0 + 0.1450i 0 + 0.1200i
0 + 0.1300i 0 + 0.1200i 0 + 0.2200i
Zbus0 =
0 + 0.1820i 0 + 0.0545i 0 + 0.1400i
0 + 0.0545i 0 + 0.0864i 0 + 0.0650i
0 + 0.1400i 0 + 0.0650i 0 + 0.3500i

(a) Symmetrical three-phase fault
Enter Faulted Bus No. -> 1

Enter Fault Impedance Zf = R + j*X in complex form (for bolted fault enter 0). Zf = 0.1+1i

Balanced three-phase fault at bus No. 1

Total fault current = 0.8701 per unit

Bus Voltages during fault in per unit

Bus Voltage Angle
No. Magnitude degrees
1 0.8744 -0.7193
2 0.9090 -0.5010
3 0.8874 -0.6354

Line currents for fault at bus No. 1

From To Current Angle
Bus Bus Magnitude degrees
G 1 0.5046 -85.0087
1 F 0.8701 -85.0087
G 2 0.3654 -85.0087
2 1 0.2784 -85.0087
2 3 0.0870 -85.0087
3 1 0.0870 -85.0087
Another fault location? Enter 'y' or 'n' within single quote -> 'n'

(b) Line-to-ground fault

Line-to-ground fault analysis

complex form (for bolted fault enter 0). Zf = 0.1+1i
Single line to-ground fault at bus No. 1
Bus Voltages during the fault in per unit

Bus -------Voltage Magnitude-------
No. Phase a Phase b Phase c
1 0.8651 1.0061 1.0045
2 0.9244 0.9918 0.9939
3 0.8857 1.0016 1.0012

From To -----Line Current Magnitude----
Bus Bus Phase a Phase b Phase c
1 F 0.8608 0.0000 0.0000
2 1 0.3056 0.0301 0.0301
2 3 0.0918 0.0057 0.0057
3 1 0.0918 0.0057 0.0057

(c) Line-to-line fault
Line-to-line fault analysis

Line-to-line fault at bus No. 1
1 1.0000 0.8470 0.8291
2 1.0000 0.8876 0.8753
3 1.0000 0.8621 0.8464


1 F 0.0000 1.3387 1.3387
2 1 0.0000 0.4284 0.4284
2 3 0.0000 0.1339 0.1339
3 1 0.0000 0.1339 0.1339
(d) double line-to-ground fault
Double line-to-ground fault analysis
Double line-to-ground fault at bus No. 1

1 1.0056 0.4612 0.4612
2 0.9923 0.5388 0.5401
3 1.0015 0.4767 0.4778
1 F 0.0000 5.9980 5.9559
2 1 0.0161 1.9215 1.9051
2 3 0.0031 0.6002 0.5954
3 1 0.0031 0.6002 0.5954
>> 'n'
7. Inference
From the simulation of fault analysis it is observed that the location of fault and type faults can
easily find by using MATLAB and these are results are supporting with the theoretical values.
8. Questions
1. Why faults will occur in power system?
2. Which faults is most dangerous?
3. Can we avoid the faults? How?
4. What is the role line impedance?
5. Why we are using per unit values?
6. How may bus data are required to find the faults parameters?
7. What do you mean by Zbulid?
8. What do you mean by symfault?
9. Can we get real time values in MATLAB for faults locations?
10. How can we identify the faults in practically?

9. Applications
Transmission lines.
10. Extension
Do the simulation for symmetrical faults by considering bounded fault


You may see some error simulating the model at that time goes to help menu you can find
solution for that.


EXPTNO: 12
12. PSPICE SIMULATION OF DC CIRCUIT FOR DETERMINING THEVININ
EQUIVALENT
1. Aim - The objective is to write a PSPICE program to find the Thevinin equivalent.

Problem:

2. Apparatus: -
Components
I. Description
3. Circuit diagram

4. Theory

5. Procedure

6.Program
* THEVININ EQUIVALENT CIRCUIT ANALYSIS
VIN 1 0 DC 1V
RS 1 2 500
R1 2 0 15K
RP 2 3 1.5K
RE 4 0 250K
* CURRENT CONTROLLED
F1 5 4 VX 100
R0 5 4 50K
RL 5 6 10K
VX 3 4 DC 0V
VY 6 0 DC 0V
.TF V(5) VIN
.END

7. Expected results
VOLTAGE SOURCE CURRENTS
NAME CURRENT

VS 5.000E-01
VX -1.125E+00
TOTAL POWER DISSIPATION -5.00E+00 WATTS
**** SMALL-SIGNAL CHARACTERISTICS
V(2,4)/VS = 6.250E-01
INPUT RESISTANCE AT VS = 2.000E+01
OUTPUT RESISTANCE AT V(2,4) = 1.094E+01

JOB CONCLUDED
TOTAL JOB TIME .11
Rth = 10.94 OHM
Vth = 0.625*10 = 6.25

8. Inference
By using SPICE it is possible to find the thevinin equivalent and it is giving the total input
resistance and output resistance.

9. Questions


10 Applications

11.Extension

Give the command as .tf and find the error.

..
EXPTNO: 13

13. STEP RESPONSE OF R-L-C CIRCUIT BY PARAMETRIC ANALYSIS USING
PSPICE

1.Aim: The objective is to find the response of a RLC series circuit using parametric values by
giving step input signal

Problem: - The R-L-C circuit R=1, 2, 8 OHM L=50UH and C=10UF use PSPICE to calculate
and plot the transient response from 0 to 400us.The capacitor voltages are the output which is to
be plotted. Simulate this for STEP input by using parametric values, the input voltage magnitude
is 10 volts for all signals

2. Apparatus
Components
I. Description


3.Circuit diagram

4. Theory
Refer experiment no 1.
5. Procedure
6.Program
*TRANSIENT ANALYSIS OF A GIVEN R-L-C SERIES CIRCUIT
VS 1 0 PWL(0 0V 1NS 1V 1MS 1V )
.PARAM VAL=1
R 1 2 2
L 2 3 50UH
C 3 0 10UF
.TRAN 1US 400US
.PROBE
.END
7. Expected results

8. Inference
In this experiment it is observed that the output of the circuit same as with out parametric
command. Here the difference is we are getting all the plots at the same time in single window.
9.Questions
1. What is the power factor of series RLC if X
L
> X
C?

2. What is the resonance?
3. Why the resonance will occur in R-L-C circuits?
4. What is the delay time, rise time, settling time and peak overshoot?
5. In the circuit when all the devices except inductor and Dc supply is given what
happens at that time. Why it is give some explanation?
6. How you are defining the step input to the circuit?
7. Draw the existing sinusoidal wave form in PSPICE and define it for 230V, 50Hz.
8. Define the piecewise linear waveform at different timings with different magnitudes.
9. What do you mean by. PARAM
10. What do you mean by VAL
11. Define the command to initialize voltage sources 10, 20, 30 in one command.
12. What are types of analysis available in PSPICE?
13. What do you mean by DC Sweep analysis?
14. How can you initialize for ac analysis?
15. What do you mean by .FOUR?
16. What do you mean by .TRAN?
17. What are the required values while initializing .FOUR command?
18.
What are the required values while initializing .TRAN command?

19.
Write a simple program to find the Fourier analysis.

20.
Write a simple program to find the DC Sweep analysis.

10. Precautions
11. Applications
12. Extension

EXPT NO: 14

14. PSPICE SIMULATION OF OP-AMP BASED INTEGRATOR AND
DIFFERENTIATOR
1. Aim: The objective is to study the operation of integrator and differentiator using operational
amplifier
Problem: The integrator & differentiator circuit is shown in fig write the SPICE program to
simulate.
2. Apparatus
Components
I. Description

Op amp: Initialization of op amp is explained in Appendix III

3. Theory
Differentiator
As the name implies the circuit performs the mathematical operation of differentiation; that is the
output waveforms is the derivative of the input waveform.
Integrator
A circuit in which the output voltage waveform is the integral of the input voltage waveform is
the integrator such a circuit is obtained by using a basic inverting amplifier configuration if the
feedback resistor Rf is replaced by a capacitor Cf.

4. Circuit diagram

Integrator

Differentiator
4. Procedure

5.Program
*DIFFERENTIATOR
VS 1 0 PWL(0 0 1NS -1V 1MS -1V 1.0001MS 1V 2.MS 1V
2.001MS -1V 3MS -1V 3.0001MS 1V 4MS 1V)
R1 1 2 2.5K
RF 2 4 1MEG
RX 3 0 2.5K
RL 4 0 100K
C1 2 4 0.1UF
XA1 2 3 4 0 OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2MEG
GB 4 3 1 2 0.1M
R1 3 4 10K
C1 3 4 1.5619UF
EA 4 5 3 4 2E+5
RO 5 7 75

.ENDS OPAMP
.TRAN 50US 4MS
.PROBE
.END

*INTEGRATOR
VS 1 0 PULSE (0 10 0 500US 500US 1NS 100MS)
R1 1 2 2.5K
RF 2 4 1MEG
RX 3 0 2.5K
RL 4 0 100K
C1 2 4 0.1UF
XA1 2 3 4 0 OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2MEG
GB 4 3 1 2 0.1M
R1 3 4 10K
C1 3 4 1.5619UF
EA 4 5 3 4 2E+5
RO 5 7 75

.ENDS OPAMP
.TRAN 50US 4MS
.PROBE
.END
6. Expected results

Input and output waveforms of integrator

Input and output waveforms of differentiator

7.Inference
From the simulation of OPAMP based integrator and differentiator is working properly as we did
in theoretically. When the square wave is given to the integrator it is generating triangle wave
output. And when the triangle wave is giving to differentiator itt is generating square wave
output.
8. Questions
1. What is the common mode rejection ratio of op-amp?
2. Draw the ideal characteristics of op-amp.
3. Can we use for integrator instead of op-amp?
4. How op-amp acts as integrator?
5. How op-amp acts as differentiator?
6. What is the difference between op-amp and BJT?
7. Define CMRR.
8. Draw the output of integrator when the input is step.
9. Write the expression for voltage gain of inverting op-amp.
10. Draw the op-amp circuit for an integrator using inductor.
11. Draw the op-amp circuit for a differentiator using inductor.
12. Write the program for question no 10.
13. Write the program for question no 11.
14. Write the program to generate square wave using op-amp.
15. Write the program to triangle wave using op-amp.
16. Simulate only op-amp as an amplifier.
17. How you are initializing op-amp in SPICE?
18. What do you mean by sub circuit?
19. How can you end the sub circuit?
20. Show the op-amp sub circuit and program it.

9. Applications

Differentiator and integrators are used in communication and

10. Extension
Design op-amp based integral and differential amplifier circuits

If simulation is not completed successfully verify the subprogram for op-amp.

..
APPENDIX-I
Device Model Parameters
Each built-in semiconductor device of Spice is modeled with a sophisticated set of mathematical
equations that describe the static and dynamic terminal behavior of the device. To allow users to
customize a particular device to their applications, a set of parameters can be specified on a
.MODEL statement according to the following Spice syntax:

. MODEL model_name type (parameter_list...)

Here the field labeled model_ name is the model name, and the field labeled type is one of the
following eight device types:

Type Description

D Diode model
NPN npn BJT model
PNP pnp BJT model
NJF N-channel JFET mode
PJF P-channel JFET model
NMOS N-channel MOSFET model
PMOS P-channel MOSFET model
GASFET N-channel MESFET model

The next field, labeled parameter_.list, describes a set of parameters that characterize the
semiconductor device. A discussion of these parameters is the focus of this appendix.
In the following discussion we shall outline all the parameters that make up the various models
of Spice. This includes a description of the model parameters for semiconductor diodes, bipolar
transistors (BJTs), and junction and metal-oxidesemiconductor field-effect transistors (JFETs
and MOSFETs). Finally, we conclude with a description of the model parameters that make up
the metal-semiconductor field-effect transistor (MESFET) found in PSpice.
Table .1

Semiconductor diode model parameters.

Spice
Name Model Parameter Units Default
IS Saturation current A 1 X 10-14
RS Ohmic resistance n 0
N Emission coefficient - 1
TT Transit time s 0
CJO Zero-bias junction capacitance F 0
VJ Junction potential V 1
M Grading coefficient - 0.5
EG Activation energy eV 1.11
XTl Saturation-current temperature - 3.0
coefficient
KF Flicker noise coefficient 0
AF Flicker noise exponent -1
FC Coefficient for forward-bias -0.5
depletion capacitance formula
BV Reverse-bias breakdown voltage V 00
lBV Reverse-bias breakdown current A 1 X 10-10

Diode Model
The DC characteristics of the diode are determined by the parameters IS and N. A resistor RS
accounts for the series ohmic resistance of the diode. Charge storage effects are modeled by a
transit time TT and a nonlinear depletion-layer capacitance. The parameters that affect the
depletion layer capacitance are CIa, VI, M, and Fe. The temperature dependence of the saturation
current is defined by the parameters EG and XTI. The flicker noise behavior of the diode is
defined by the parameters KF and AF. Reverse breakdown is modeled by an exponential
increase in the reverse diode current and is determined by the parameters BV and IBY.
The parameters used to model a semiconductor diode in Spice are listed in Table I.

BJT SPICEMODEL
SPICE generates a complex model of BJTs. The model equations that are used by SPICE are
described. If a complex model is not necessary, the users can ignore many model parameters, and
PSpice assigns default values to the parameters. The PSpice model, which is based on the
integral charge control model of Gummel and roan, is shown in Fig. 1I-4(a). The static (dc)
model that is generated by PSpice is shown in Fig. (b). The model statement for NPN transistors
has the general form

. MODEL QNAMENPN (P1=V1 P2=V2 P3=V3 ... PN=VN)
And the general form for PNP transistors is
. MODELQNAMEPNP (P1=V1 P2=V2 P3=V3 ... PN=VNI
Where QNAME is the name of the BJT model. NPN and PNP are the type symbols for NPN and
PNP transistors, respectively. QNAME, which is the model name, can begin with any
character.and its word size is normally limited to eight characters. PI, P2, . . . and VI, V2, . . . are
the parameters and their values, respectively. Table shows the model parameters of BJTs. If
certain parameters are not specified, PSpice assumes the simple model of Ebers and Moll , which
is shown in Fig. (c). The area factor is used to determine the number of equivalent parallel BJTs
of the model specified. The model parameters, which are affected by the area factor, are marked
by an asterisk (*) in Table II-I. A bipolar transistor is modeled as an intrinsic transistor with
ohmic resistances in series with the collector (RCI area), the base (RB/area), and the emitter
(RE/area). [(Area) value] is the relative device area and defaults to 1. For those parameters that
have alternative names.


BJT Model
The bipolar junction trasistor model in Spice is an adaptation of the integral charge control
model of Gummel and Poon. The model will automatically simplify to the Ebers-Moll model
when certain parameters are not specified.

The forward static current gain characteristic of the BJT is defined by the parameters IS, BE NF,
ISE, IKF, and NE. The corresponding reverse current gain characteristic of the BJT is defined by
the parameters IS, BR, NR, ISC, IKR, and NC. Theoutput conductances of the forward and
reverse regions of the transistor are determined by VAP and VAR, respectively. Resistors RB,
RC, and RE represent an ohmic resistance in series with each terminal of the BJT. The current
dependence of RB can be modeled by the parameters IRB and RBM. Base charge storage is
modeled by forward and reverse transit times, TF and TR. The nonlinear depletion-layer ca-
pacitances are determined by CJE, VJE, and MJE for the base-emitter junction, by CJC, VJC,
and MJC for the base-collector junction, and by CIS, VIS, and MJS for the collector-substrate
junction. The temperature dependence of the saturation current IS is determined by parameters
EG and XTI. Additionally, base current temperature dependence is modeled by parameter XTB.
The flicker noise behavior of the diode is defined by the parameters KF and AF.
The BJT parameters used in the modified Gummel-Poon model are listed in Table.2. There
are 40 parameters associated with this model.
Table 2 BJT model parameters .
Spice
Name Model Parameter
Units
Default Example
IS
Transport saturation current
A
1 X
11*10-16
1.0 X 10-15
BF Ideal maximum forward beta - 100 100
NF Forward current emission coefficient - 1 1.0
VAF Forward Early voltage V 00 200
IKF Comer for forward beta high-current A 00 0.01
roll-off
ISE B-E leakage saturation current A 0 1.0 X 10-13
NE B-E leakage emission coefficient - 1.5 2.0
BR Ideal maximum reverse beta - 1 0.1
NR Reverse current emission coefficient - 1 1.0
VAR Reverse Early voltage V 00 200
IKR Comer for reverse beta high-current A 00 0.01
roll-off
ISC B-C leakage saturation current A 0 1.0 X 10-13
NC B-C leakeage emission coefficient - 2 1.5
RB Base ohmic resistance n 0 100
IRB Current where base resistance falls A 00 0.1
halfway to its minimum value
RBM Minimum base resistance at high cur- n RB 10
rents
RE Emitter resistance n 0 1
RC Collector resistance n 0 10
CJE B-E zero-bias depletion capacitance F 0 2pF

VJE B-E built-in potential V 0.75 0.6
MJE B-E junction exponential factor - 0.33 0.33
TF Ideal forward tansit time s 0 0.1 ns
XTF Coefficient for bias dependence of - 0.75 0.6
TF
VTF Voltage describing VBC dependence V 00
onTF
ITF High-current parameter for effect on A 0
TF
PTF Excess phase at freq = 1/(21TTF) degree 0
CJC B-C zero-bias depletion capacitance F 0 2pF
VJC B-C built-in potential V 0.75 0.5
MJC B-C junction exponential factor - 0.33 0.5
XCJC Fraction of B-C depletion capacitance - 1
connected to internal base node
TR Ideal reverse transit time s 0 10 ns
CIS Zero-bias collector-substrate capaci- F 0 2pF
tance
VIS Substrate junction built-in potential V 0.75
MJS Substrate junction expontial factor - 0 0.5
XTB Forward and reverse beta temperature - 0
exponent
EG
Energy gap for temperature effect on
IS
eV 1.11
XTI
Temperature exponent for effect on
IS
-3
KF Flicker-noise coefficient - 0
AF Flicker-noise exponent - 1
FC Coefficient for forward-bias depletion - 0.5
capacitance formula

JFET Model
The JFET model in Spice is derived from the FET model of Shichman and Hodges. The DC
characteristics are defined by the parameters VTO, BETA, LAMBDA, and IS. Two ohmic
resistances RD and RS are included in series with the drain and source terminals of the JFET.
Charge storage is modeled by a nonlinear depletion-layer capacitance for both gate junctions
using parameters CGS, CGD, PB, and Fc. The flicker noise behavior of the JFET is defined by
the parameters KF and AF.
The JFET model parameters are listed in Table 3.

MOSFET Model
Table 3

JFET model parameters.
Spice
Name
Model Parameter
Units
Default
VTO Threshold voltage V -2.0
BETA Transconductance parameter AN2 I X 10-4
LAMBD
A
Channel length modulation
parameter
IN 0
RD Drain ohmic resistance n 0
RS Source ohmic resistance n 0
CGS Zero-bias G-S junction capacitance F 0
CGD Zero-bias G-D junction capacitance F 0
PB Gate junction potential V 1
IS Gate junction saturation current A 1 X 10-14
KF Flicker noise coefficient - 0
AF Flicker noise exponent - 1
FC
Coefficient for forward-bias
depletion
- 0.5
capacitance formula

MOSFET Model

Spice provides three MOSFET device models that have different large-signal i-v characteristics.
The variable LEVEL specifies the model that is to be used to represent a particular MOSFET:
LEVEL = 1 Shichman-Hodges
LEVEL = 2 MOS2, an analytical model (as described in [A. Vladimirescu et aI., 1981])
LEVEL = 3 MOS3, a semi-empirical model (see [A. Vladimirescu et aI., 1981])
The DC characteristics of the MOSFET are defined by the device parameters VTO, KP,
LAMBDA, PHI, and GAMMA. These parameters are computed by Spice if process parameters
(NSUB, TOX,. . . ) are given and user-specified values are not given instead. Two ohmic
resistances RD and RS are included in series with the drain and source terminals of the
MOSFET. Charge storage is modeled by a nonlinear thinoxide capacitance, several nonlinear
depletion-layer capacitances, and overlap capacitances. There are two built-in models of the
charge storage effects associated with the thin-oxide. The flag/coefficient XQC determines
which of the two models will be used; a voltage-dependent or a charge-controlled capacitance
model [A. Vladimirescu et aI., 1981]. Other parameters of the MOSFET model that determine
the charge storage effects are CBD, CBS, CJ, CJSW, MJ, MJSW, PB, and FC. The overlap
capacitances are set by the parameters CGSO, CGDO, and CGBO. The flicker noise behavior of
the diode is defined by the parameters KF and AF.
The MOSFET parameters used for the three different MOSFET models in Spice are listed in
Table 4. There are 42 parameters associated with the three models of the MOSFBT. I


Spice
Name Model Parameter Units Default Example
LEVEL Model index (e.g., 1,2, or 3) - I
VTO Zero-bias threshold voltage V 0 1.0
KP Transconductance parameter AJV2 2.0 X 10-5 3.1 X 10-5
GAMMA Bulk threshold parameter V 112 0 0.37
PHI Surface potential V 0.6 0.65
LAMBDA Channel-length modulation IN 0 0.02
(level 1 and 2 only)
RD Drain ohmic resistance n 0 1.0
RS Source ohmic resistance n 0 1.0
CBD
Zero-bias B-D junction
capacitance
F 0 20tF
CBS
Zero-bias B-S junction
capacitance
F 0 20tF
IS Bulk junction saturation current A 1.0 X 10-14
1.0 X 10-
15
PB Bulk junction potential V 0.8 0.87
COSO
Gate-source overlap capacitance
per
F/m 0
4.0 x 10-
11
meter channel width
CGDO
Gate-drain overlap capacitance
per
F/m 0
4.0 x 10-
11
meter channel width
CGBO
Gate-bulk overlap capacitance
per
F/m 0
2.0 x 10-
10
meter channel length
RSH
Drain and source diffusion sheet
resistance
fl/sq. 0 10.0
CJ Zero-bias bulkjunction bottom F/m2 0 2.0 x 10-4
capaci tance per square meter of
junction area
MJ
Bulk junction bottom grading
coeffi-cient
- 0.5 0.5
CJSW
Zero-bias bulk junction sidewall
capacitance per meter of
junction perimeter
F/m 0 2.0 x 10-9
MJSW
Bulk junction sidewall
coefficient
- 0.33
JS
Bulk junction saturation current
per square meter of junction area
A/m2 1.0 X 10-8
TOX Oxide thickness m 1.0 X 10-7 1.0 X 10-7
NSUB Substrate doping lIcm3 0 4.0 X 1015
NSS Surface state density lIcm2 0 1.0 X 1010
NFS Fast surface state density lIcm2 2 X 10-5 1.0 X 1010
TPG Type of gate material: - 1
+ 1 opposite to substrate
- 1 same as substrate
0 Al gate
Xl Metallurgical junction depth m 0 1.0 /-Lm
LD Lateral diffusion m 0 0.8/-Lm
UO Surface mobility cm2/(V' s) 600 700
UCRIT
Critical field for mobility
degradation
V!cm IXIQ4 1.0 x 104
(level 2 only)

THYRISTOR (SCR)
A thyristor can be turned on by applying a pulse of short duration. Once the
thyristor is on, the gate pulse has no effect, and it remains on until its current is reduced to zero.
It is a latching device.

AC THYRISTORMODEL
There are a number of'published ac thyristor models [3-7]. Lauretzen [7] summarizes the various
power semiconductor device models for use in circuit simulation. We shall use a very simple
model that can be used to obtain the various waveforms of controlled rectifiers. Let us assume
that the thyristor shown in Fig. 8-l(a) is operated froman ac supply. This thyristor should exhibit
the following characteristics:

1. It should switch to the on state with the application of a small positive gate voltage,
provided that the anode-to-cathode voltage is positive.
2. It should remain in the on-state as long as the anode current flows.
3. It should switch to the off-state when the anode current goes through zero in the
negative direction.
The switching action of the thyristor can be modeled by a voltage-controlled switch and a
polynomial current, source. This is shown in Fig. (b). The following steps can explain the turn-
on process:
1. For a positive gate voltage VRbetween nodes 3 and 2, the gate current is Ig = I(VX) =
Vg/Rg.
2. The gate current Ilf activates the current-controlled current source F1 and Produces a
current of value Fg=P1Ig =P1 x I(VX),such that F1 = Fg+ Fa.
3. The current source FIfproduces a rapidlyrising voltage VRacross resistance R
T
.
4. As the voltage VR increases above zero, the resistance Rs of the voltage controlled switch
S, decreases from ROFF toward RON.
5. As the switch resistance Rs decreases, the anode current Ia = leVY) increases, Provided
that the anode-ta-cathode voltage is positive. This increasing Anode current Ia produces a
current Fa= P2Ia= P2X I(Vy).' This Causes an increased value of voltage VR'
6. This then produces a regenerative condition with the switch rapidly being driven into low
resistance (the on-state). The switch remains on if the gate Voltage VIfis removed.
7. The anode current Ia continues to flow as long as it is positive and the switch remains in
the on state.

During turn-off, the gate current is off and I,f= O. That is, I,f= 0 and F,f= 0, F, = F,f + Fa =
Fa. The following steps can explain the turn-off operation:
1. As the anode current Ia goes negative, the current F, reverses provided that the gate
voltage Vg is no longer present.
2. With a negative F1' the capacitor Cr discharges through the current source F. and the
resistance R
T
.
3. With the fall of voltage VR to a low level, the resistance Rs of switch increases from a
low (RON) value to a high (ROFF) value.
4. This is again, a regenerative condition with the switch resistance being driven rapidly
to an R
OFF
value, as the voltage VR becomes zero.

This model works well with a converter circuit in which the thyristor current falls to zero itself:
for example, in half-wave controlled rectifiers and ac voltage controllers. But in full-wave
converters with a continuous load current, the current of a thyristor is diverted to another
thyristor, and this model may not give the true output. This problem can be remedied by adding
diode D
T
as shown in Fig.(b). The diode prevents reverse current flow through the thyristor
resulting ring of another thyristor in the circuit.

------------------------
APPENDIX II
Spice Options
Spice allows the user to reset program control and specify user options for various simulation
purposes. This is accomplished using an .OPTIONS statement in the Spice input file. The syntax
of the .OPTIONS statement has the following form:

.OPTIONS list- of- options
Table 1 lists the various options available in Spice version 2G6. Similar options are also
available in PSpice; refer to the PSpice Users Manual for the exact details. Any combination of
the options listed in Table B.1 may be included in the lisLof-options in any order. There are two
kinds of options: flags that initiate specific action and flags that reassign a value to a specific
parameter. The variable x associated with these types of flags in this table represents some
positive number.

Table 1.
Options Effects
ACCT Causes accounting and run time statistics to be printed.
LIST Causes the summary listing of the input data to be printed.
NOMOD Suppresses the printout of the model parameters
NOPAGE Suppresses page ejects
NODE Causes the printing of the node table.
OPTS Causes the options values to be printed
GMIN=x

Sets the value of GMIN, the minimum conductance
allowed by the program. The default value is 1.0 X 10-12
RELTOL=x

Resets the relative error tolerance of the program. The
default value is 0.001.
ABSTOL =x Resets the absolute current error tolerance of the program.
The default value is 1 pA.
VNTOL=x

Resets the absolute voltage error tolerance of the program.
The default value is lILY
TRTOL=x

Resets the transient error tolerance. The default value is
7.0. This parameter is an estimate of the factor by which
Spice overestimates the actual truncation error.
CHGTOL=x

Resets the charge tolerance of the program. The default
value is 1.0 X 10-14.
PIVTOL=x Resets the absolute minimum value for a matrix entry to be
accepted as a pivot. The default is 1.0 X 10-13.
PIVREL=x

Resets the relative ratio between the largest column entry
and an acceptable pivot value. The default value is 1.0 X
10-3
NUMDGT=x

The number of significant digits printed for output variable
values. The variable x must satisfy the relation 0 < x < 8.
The default is 4. Note: This option is independent of the
error tolerance used by Spice (i.e., if the values of options
RELTOL, ABSTOL, etc., are not changed, one may be
printing numerical "noise" for NUMDGT > 4
TNOM =x

Resets the nominal temperature. The default value is 27 C
(300 K).
1TLl =x

Resets the DC iteration limit. The default is 100
1TL2=x Resets the DC transfer curve iteration limit. The default is
50.
1TL3=x Resets the lower transient analysis iteration limit. The
default is 4.
1TL4=x Resets the transient analysis time point iteration limit. The
default is 10.

1TL5=x Resets the transient analysis total iteration limit. The
default is 5000. Set ITL5 =0 to omit this test.
1TL6=x Resets the DC iteration limit at each step of the source-
stepping method. The default is 0, which means not to use
this method
CPTIME=x The maximum CPO time in seconds allowed for this job
LIMTIM=x

Resets the amount of CPO time reserved by Spice for
generating plots should a CPO time limit cause job
termination. The default value is 2 s.
LIMPTS=x Resets the total number of points that can be printed or
plotted in a DC, AC, or transient analysis. The default
value is 201
LVLTIM =x If x is I, the iteration time step control is used. If x is 2, the
truncationerror time step is used. The default value is 2. If
METHOD = GEAR and MAXORD > 2, then LVLTIM is
set to 2 by Spice
METHOD =
name
Sets the numerical integration method used by Spice.
Possible names are GEAR or TRAPEZOIDAL. The default
is trapezoidal
MAXORD=x Sets the maximum order for the integration method if
Gear's variableorder method is used. The variable x must be
between 2 and 6. The default is 2.
DEFL=x

Resets the value for MOS channel length. The default is
100.0 !Lm.
DEFW=x Resets the value for MOS channel width. The default is
100.0 !Lm.
DEFAD Resets the value for MOS drain diffusion area. The default
is 0.0.
DEFAS=x Resets the value for MOS source diffusion area. The
default is 0.0

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