Sei sulla pagina 1di 7

# NUMERICAL STRENGTH REDUCTION TECHNIQUES

IN VLSI SYSTEMS

M.RaviKishan M.V.SurendraBabu
2ndECE 2ndECE

raviece007@yahoo.co.in

Abstract:
In this paper we have presented in detail about the strength
reduction techniques.
That are needed to reduce the number of additions and multiplications
i.e., we have explained the use of these techniques for reducing the
strength of DSP computation.
By these techniques power, area of implementation can be
reduced. Strength reduction reduces the total capacitance and, therefore
reduces power consumption.

Introduction:
Number splitting can be additive or multiplicative, is a
numerical transformation that can be used to reduce the hardware
complexity or power consumption of linear circuits. Typically number
splitting is performed on the infinite precision version of the constant
coefficients before they are reduced to binary representation. This leads
to strength reduction at a higher level. Additive number splitting can be
either row based or column based.
Number splitting is an iterative technique used
in optimization of algorithm. The optimization algorithm guides the
number of splitting algorithm through the use of a cost function. At each
iteration, the number splitting that leads to the largest reduction in the
cost function of chosen. The process is repeated until no further
optimizations can be achieved through the use of number splitting.
The notion defined for linear circuit as,
Where
y=Tx

y0(n+1)
Y= y1(n+1)
……
yn-1(n+1)

## t0,0 t0,1 … t0,N-1

T= t1,0 t1,1 … t1,N-1
…………………………………….
tN-1,0 tN-1,1 … tN-1tN-1,

y0(n)
…….
…….
x = yj-1(n)
X0(n)
…..
xK-1(n)

## Types of number splittings:

a) Row based additive number splitting
b) Column based additive number splitting

## These are explained as follows:

Row based number splitting is performed on the rows
of the matrix T.A pivot element and a target element are first defined.
The pivot element of the i-th is defined as t i,p and target element is
defined as t I,q.The pivot element t I,p,is used to “split” the target element
into 2 pieces, t
and δ (t I,q =t I,p +δ ),such that δ =t I,q-t I,p.

## t0,0 … t0,p … t0,q --- t0,p-1

T’ = ……………………………………………….
tt,0 …… 0 … δ --- t1,p-1
………………………………………………..
tN-1,0 … tn-1,p … tn-1,q ---- tn-1,n-1
To equate T′ and T, 2 additional matrices must
be generated. The first matrix, AG, contains rows that can be
approximately added to the rows of T′ to produce T.After number
splitting is performed on the ith row of T, the row (0…0 t tp 0…0 t tp
0…0). Must be added to the ith row of T′ to obtain the original matrix T.
The second matrix, W, determines how the rows of
AG should be added to the rows of T′ to obtain the original matrix
T.After each iteration of row-based number splitting, a column is
appended to the right of W.This column contains N entries that are all
set to zero except for the ith entry which is set to 1

T=w* T’
AG

## Let us apply the technique to the linear circuit

y0(n+1) .4 .7 .4 .8 y0(n)
y1(n+1) = .3 .6 .2 .9 y1(n)
y2(n+1) .5 .3 .2 .7 y2(n)
x0(n)

## Numbers splitting to be performed on the first row, using .4 as the pivot

element and .4(3rd entry) as the target element the matrices results as
follows

T′ = 0 .7 0 .8
.3 .6 .2 .9
.5 .3 .2 .7

AG= .4 0 .4 0

W= 1 0 0 1
01 0 0
00 1 0

## Using these matrices:

0 .7 0 .8
.4 .7 .4 .8 1001 .3 .6 .2 .9
.3 .6 .2 .9 = 0100 .5 .3 .2 .7
.5 .3 .2 .7 0010 .4 0 .4 0

## By performing the row – based number splitting, the

method used to compute the output y0(n+1) has been changed to an
equivalent form that requires less hardware.
Performing another iteration of the row based number splitting on
the third row of T′ using .2 as the pivot and .7 as the target:

0 .7 0 .8
T′ = .3 .6 .2 .9
.5 .3 0 .5

AG= .4 0 .4 0
0 0 .2 .2

W= 100 10
01000
00101

0 .7 0 .8
.4 .7 .4 .8 10010 .3 .6 .2 .9
.3 .6 .2 .9 = 01000 .5 .3 0 .5
.5 .3 .2 .7 00101 0 0 .2 .2

## A multiplication by .5 can be implemented using a simple shift to the

right. There fore, the “expensive” multiplication by .7 has been
replaced by an efficient multiplication by .5 at the cost of 1 addition.
Number splitting has again reduced the hardware complexity of the
linear circuit.

It is essentially the same as row-based number
splitting. The matrix AG is formed by appending rows of the form (0…0 ti,p
0…0).After each iteration of number splitting, a column of the form (0…0 1
0…0 1 0…0).
Once again consider the linear circuit defined by
y0(n)
y0(n+1) .4 .7 .4 .8 y1(n)
y1(n+1) = .3 .6 .2 .9 y2(n)
y2(n+1) .5 .3 .2 .7 x2(n)

## Column – based number splitting will be performed on the third column of T

using the second entry, .2 , as the pivot and the third entry, .2 as the target
element.The matrices T′ ,AG,and W that results are as follows.

.4 .7 .4 .8
T′ = .3 .6 0 .9
.5 .3 0 .7

AG = 0 0 .2 0

1000
W = 0101
0011

.4 .7 .4 .8
.4 .7 .4 .8 1000 .3 .6 0 .9
.3 .6 .2 .9 = 0101 .5 .3 0 .7
.5 .3 .2 .7 0011 0 0 .2 0

## Performing the column – based number splitting, the method used to

compute the outputs y1 (n+1) and y2 (n+1) has been changed to an
equivalent to the computation that requires less hardware.

## Multiplicative number splitting is yet another

numerical transformation that can be applied to a linear circuit to reduce the
hardware complexity or the power consumption of the circuit.
Multiplicative number splitting operates on the matrix T
in such a manner that the hardware complexity or power consumption of the
linear circuit is reduced. It is relatively simple transformation that relies up
on the following observation in linear algebra.
The product Ti-1, Ti remains unchanged if for some
constant k
1. The j-th row of Ti is transformed as
Row (j)=Row (j)-k*Row (k)
2. The k-th column of Ti-1 is transformed as
Col (k)=Col (k)+k*Col (j)
Where j and k denote arbitrary valid row and column indices.

## Using this observations, the multiplicative number splitting algorithm

the composes the original matrix T into a product of matrices=T1,
T2………Tn.consider apply multiplicative number splitting to the matrix.
a1,1 a1,2 a1,3
T= a2,1 a2,2 a2,3
a3,1 a3,2 a3.3

## The first step must be performed to write T as the product of an

identity matrix and it self.

T=T1T2

## 1000 a1,1 a1,2 a1,3

0100 a2,1 a2,2 a2,3
0010 a3,1 a3,2 a3,3
Now, using the observation above, T1and T2 can
be transformed without entering the functionality of the linearity
circuit. Consider multiplicative splitting k=3,j=1and k=2.
T=T1T2
1000 a1,1-3a2,1 a1,2-3a2,2 a1,3-3a2,3
0100 a2,1 a2,2 a2,3
0010 a3,1 a3,2 a3,3

## Since that T2 has been transformed using the first part of

the observation:
Row (j) = Row (j) – K*R0w (K). The matrix T1 has been transformed
using second part of the observation: col (k) = col (k) + k* col (j).
Consider transforming T1 and T2 a second time using multiplicative
splitting with j=2 and k=3.
T=T1T2
1330 a1,1-3a2,1 a1,2-3a2,2 a1,3-3a2,3
0110 a2,1-a3,1 a2,2-a3,2 a2,3-a3,3
0010 a3,1 a3,2 a3,3

## Any Time during the transformation process, another identity

matrix can added to either the left hand side or the right hand side of
T in order tends the possible number of transformations that can be
performed.
Consider adding an identity matrix to the right hand side of T
T=T1T2T3

## 1330 a1,1-3a2,1 a1,2-3a2,2 a1,3-3a2,3 100

0110 a2,1-a3,1 a2,2-a3,2 a2,3-a3,3 010
0010 a3,1 a3, 2 a3,3 001

## Multiplicative number splitting can now be performed to

transform T2 and T3.In the same manner that T1 and T2 were
transformed. Consider transforming T2 and T3 with k=1 j=3 and k=1

T=T1T2T3

## 1330 a1,1-3a2,1+a1,3-3a2,3 a1,2-3a2,2 a1,3-3a2,3 100

0110 a2,1-a3,1+ a2,3-a3,3 a2,2-a3,2 a2,3-a3,3 010
0010 a3,1 +a3,3 a3,2 a3,3 -1 0 1

## The process of adding identity matrices and transforming the linear

circuit through multiplicative number splitting can be repeated until no
further gains can be made in terms of lowering the power consumption or
hardware complexity of the circuit. The transformations leading to the largest
reduction in power or hardware cost would be chosen. The splitting process
would be continued until now further optimizations could be achieved.
Clearly,
The multiplicative splitting transformation has reduced the
hardware complexity of the original transformations matrix T.

CONCLUSIONS:
Similar to the strength reduction at algorithm
level, numerical strength reduction can reduce the hardware complexity
significantly. This chapter has addressed various numerical strength
reduction approaches based on sub expression elimination or sub structure
sharing. These approaches can be exploited to reduce the implementation
complicity of fixed – coefficient digital filters such as FIR and IIR, militate
filters and wavelet filters. It may be noted that sub expression elimination
techniques are commonly used in compliers.