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Electronics circuits and devices Lab Manual

INDEX
The following experiments have to be conducted and verified.
(Common for ECE & EEE)
S.NO EXP.NO. Name of the Experiment
1 1 PN Junction iode !haracteristics
" " #ener iode !haracteristics
$ $ Transistor !% !haracteristics
& & Transistor !E !haracteristics
' ' (alf wave )ectifiers without*with +ilters
, , +ull wave )ectifiers without*with +ilters
- - +ET !haracteristics.
. . !E /mplifier
0 0 !! /mplifier
11 11 +ET /mplifier 2!ommon 3ource4
11 11 3!) !haracteristics
1" 1" (5Parameters
1$ 1$ 6JT !haracteristics
1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO: 1
PN !NCTION DIODE C"#R#CTERISTICS
#IM: $
1. Plot the 957 characteristics of a PN :unction diode in both forward and
reverse directions.
". +ind cut in voltage 2;nee voltage4< static and d8namic resistance in
forward direction at forward current of "m/ = .m/ respectivel8.
$. +ind static and d8namic resistance at 119 in reverse bias condition.
COMPONENTS & E%!IPMENT RE%!IRED: $
3.No evice )ange
*)ating
>uantit8
2in No.s4
1. 3emiconductor diode trainer %oard
!ontaining
! Power 3uppl8.
iode 23ilicon4
iode 2?ermanium4
!arbon +ilm )esistor
2151'4 9
1N &11-
@/-0
1 AB< 1*" C
1
1
1
1
". ! 9oltmeter
! 9oltmeter
21514 9
215"14 9
1
1
$. a4 ! /mmeter
b4 ! /mmeter
215"114 D/
215"14 m/
1
1
&. !onnecting wires '/ 11
PROCED!RE: $
&or'ar( )ia*:
1. !onnect the circuit as shown in figures 214
". 9ar8 the suppl8 voltage Es in steps and note down the corresponding values of
Ef and 7f as shown in the tabular column.
Re+er*e )ia*:
1. !onnect the circuit as shown in figure 2"4.
". )epeat the procedure as in forward bias and note down the corresponding
values of Er and 7r as shown in the tabular column.
"
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Electronics circuits and devices Lab Manual

PREC#!TIONS: $
1. Ensure that the polarities of the power suppl8 and the meters as per the circuit
diagram.
". Aeep the input voltage ;nob of the regulated power suppl8 in minimum
position both when switching @N or switching @++ the power suppl8.
$. No loose contacts at the :unctions.
&. Ensure that the ratings of the meters are as per the circuit design for precision.
C#,C!,#TIONS:

&or'ar( )ia*:
3tatic )esistance at .m/E Ef * 7f
3tatic resistance at "m/E Ef * 7f
8namic resistance at .m/EF Ef * F 7f
8namic resistance at .m/EF Ef * F 7f
Re+er*e )ia*:
3tatic )esistance at 21194E Er* 7r
8namic resistance at 21194EF Er * F 7r
Re*-.t: $

957 characteristics of PN :unction are plotted and verified in both forward and
reverse directions.

1. +orward direction
2i4 !ut5in5voltageE1.-9
2ii4 a4 8namic )esistance 2at . m/4 E
b4 8namic )esistance 2at "m/4 E
2iii4 a4 3tatic )esistance2at .m/4 E
b4 3tatic )esistance 2at "m/4 E
". )everse irection E
2i4 3tatic )esistance 2at 1194 E
2ii4 8namic )esistance 2at 11 94 E
$
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Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#MS:
&or'ar( )ia*:
Re+er*e )ia*:
Expe0te( 1raph*:

T#)!,#R CO,!MN (Si.i0on):
&
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Electronics circuits and devices Lab Manual

&or'ar( )ia*: Re+er*e )ia*:
EXPERIMENT NO: 2
3ENER DIODE C"#R#CTERISTICS
#IM: $
1. Plot the 957 characteristics of a #ener diode.
". +ind Gener brea;down voltage in reverse bias condition.
$. +ind static and d8namic resistance in both forward and reverse bias
conditions at Gener current of , m/.
&. To calculate percentage regulation of Gener diode voltage regulator.
COMPONENTS & E%!IPMENT RE%!IRED: $
3.N@ E97!E3 )/N?E >6/NT7TH
'
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Es
2volts4
Ef
2volts4
7f 2m/4
1.1
1."
1.$
1.&
1.'
1.,
1.-
1..
1.0
1
"
&
,
.
11
1"
1&
Es 2volts4 Er
2volts4
7r 2D/4
1.1
1."
1.$
1.&
1.'
1.,
1.-
1..
1.0
1
"
&
,
.
11
1"
1&
Electronics circuits and devices Lab Manual

*)/T7N? 2in No.s4
1. Trainer %oard
!ontaining
a4 ! Power 3uppl8.
b4 #ener iode
c4 !arbon +ilm )esistor
d4 )esistance box
215$14 9
&.- 9
1 AB< 1*" C
1
1
1
1
". ! 9oltmeter
! 9oltmeter
21514 9
215"14 9
1
1
$. a4 ! /mmeter
b4 ! /mmeter
215"114 D/
215"14 m/
1
1
&. !onnecting wires '/ 11
PROCED!RE: $
&or'ar( )ia*:
1. !onnect the circuit as shown in figures 214
". 9ar8 the suppl8 voltage Es in steps and note down the corresponding values of
Ef and 7f as shown in the tabular column.
Re+er*e )ia*:
1. !onnect the circuit as shown in figure 2"4.
". )epeat the procedure as in forward bias and note down the corresponding
values of Er and 7r as shown in the tabular column.
3ener Dio(e 4o.ta1e Re1-.ator:
1. !onnect the circuit as shown in figure2$4.
". Aeep the values of resistance at 111I<1'1I<1; I<"; I<'; I<11; I and finall8 at
no load and note down the values of output voltage and load current.
$. Now fix the value of load resistance at '; I.;eep the value of voltage at
"9<'9<119<1'9<"19< "'9and note down the corresponding the values of output
voltage and load current.
PREC#!TIONS:
1. Ensure that the polarities of the power suppl8 and the meters as per the circuit
diagram.
". Aeep the input voltage ;nob of the regulated power suppl8 in minimum
position both when switching @N or switching @++ the power suppl8.
,
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

$. No loose contacts at the :unctions.
&. Ensure that the ratings of the meters are as per the circuit design for precision.
C#,C!,#TIONS:

+orward 3tatic resistance at , m/E Ef* 7f
+orward 8namic resistance at ,m/EF Ef * F 7f
)everse 3tatic resistance at , m/E Ef* 7f
)everse 8namic resistance at ,m/EF Ef * F 7f
RES!,T: $

1. 957 characteristics of #ener diode are plotted and verified in both forward and
reverse directions.
". #ener brea;down voltage for &.-9 Gener diode E &.-9.
2i4+orward %iasJ
3tatic resistance at , m/ E
8namic resistance at , m/E
2ii4)everse %iasJ
3tatic resistance at , m/E
8namic resistance at , m/E
$. Percentage regulation for Gener diode voltage regulator is calculated.
CIRC!IT DI#/R#MS:
&or'ar( )ia*:
Re+er*e )ia*:
-
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Electronics circuits and devices Lab Manual


3ener (io(e +o.ta1e re1-.ator:

Expe0te( 1raph:
.
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual


T#)!,#R CO,!MN ( 5.64 ):
&or'ar( )ia*: Re+er*e )ia*:
3ener (io(e +o.ta1e re1-.ator (5.64) :

0
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Es
2volts4
Ef 2volts4 7f 2m/4
1.1
1."
1.$
1.&
1.'
1.,
1.-
1..
1.0
1
"
&
,
.
11
1"
1&
Es
2volts4
Er 2volts4 7r 2D/4
1.1
1."
1.$
1.&
1.'
1.,
1.-
1..
1.0
1
"
&
,
.
11
1"
1&
Electronics circuits and devices Lab Manual

4in 7 18+ R, 7 89:
R,
(:)
4;
(+)
I,
(ma)
<
re1-.ation


EXPERIMENT NO: =
TR#NSISTOR C) C"#R#CTERISTICS
11
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
9in
2v4
4;
(+)
I,
(ma)
Electronics circuits and devices Lab Manual

#IM: $
1. Plot the input and output characteristics of a transistor connected in !ommon
%ase configuration.
". !alculate the input resistance )i at 7eE 1" m/< output resistance )o at 9!%E.9
and current gain at 9!% E,9.
COMPONENTS & E%!IPMENT RE%!IRED: $
3.No evice )ange
*)ating
>uantit8
2in No.s4
1. Transistor !% trainer %oard
!ontaining
a4 ! Power 3uppl8.
b4 PNP Transistor
c4 !arbon +ilm )esistor
2151"4 9
!A 111
&-1B< 1*" C
"
1
"
". a4 ! 9oltmeter
b4 ! 9oltmeter
21514 9
215"14 9
1
1
$. ! /mmeter 215'14 m/ "
&. !onnecting wires '/ 1"
PROCED!RE: $
Inp-t Chara0teri*ti0*:
1. !onnect the transistor as shown in figure.
". Aeep the 9!% constant at &9 and .9.9ar8 the 9E% in steps and note
corresponding 7E values as per tabular form.
O-tp-t Chara0teri*ti0*:
1. Aeep the 7E constant at &m/ and .m/.9ar8 the 9!% in steps and note
corresponding 7! values.
". )eadings are tabulated as shown in tabular column.
PREC#!TIONS: $
11
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Electronics circuits and devices Lab Manual

1. Aeep the ;nobs of suppl8 voltages 9E% = 9!% at minimum positions when
switching @N or switching @++ the power suppl8.
". No loose contacts at the :unctions.
$. o not overload the meters above its rated ranges.
C#,C!,#TIONS:
1. 7nput )esistance 2 7E E1" m/4 E F9E%*F 7E E
/t 9E% E &9
". 7nput )esistance 2 7E E1" m/4 E F9E%*F 7E E
/t 9E% E .9
$. @utput resistance 27E E.m/4 E F9!%*F 7! E
/t 9!% E 5.9.
&. @utput resistance 27E E&m/4 E F9!%*F 7! E
/t 9!% E 5.9.
'. !urrent /mplification +actor KLME F7!*F 7E E
RES!,T: $

1. 7nput and output curves are plotted.
". )i 7nput )esistanceJ
2i4 9E% E &9 and 7E E1" m/< )i E
2ii4 9E% E .9 and 7E E1" m/< )i E
$. )o @utput )esistanceJ
2i4 9!% E .9 and 7E E . m/< )o E
2ii4 9!% E .9 and 7E E & m/< )o E
&. !urrent /mplification factor
KLM E
2at 9!% E,94
CIRC!IT DI#/R#M:
1"
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPECTED /R#P"S:
INP!T C"#R#CTERISTICS: O!TP!T C"#R#CTERISTICS:

T#)!,#R CO,!MN:
1$
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

Inp-t Chara0teri*ti0*:


O-tp-t
Chara0teri*ti0*:

EXPERIMENT NO: 5
TR#NSISTOR CE C"#R#CTERISTICS
#IM: $
1. Plot the input and output characteristics of a transistor connected in
!ommon Emitter configuration.
1&
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
4C) 7 $54
9E%
29olts4
7E
2m/4
1
1."
1.&
1.,
1..
1
"
&
,
.
11
1"
1&
1,
1.
"1
4C) 7 $>4
9E%
29olts4
7E
2m/4
1
1."
1.&
1.,
1..
1
"
&
,
.
11
1"
1&
1,
1.
"1
IE 7 >m#
9!%
29olts4
7!
2m/4
51.-
51.,
51.&
51."
51.1
1
1
"
&
,
.
11
1"
IE 7 5m#
9!%
29olts4
7!
2m/4
51.-
51.,
51.&
51."
51.1
1
1
"
&
,
.
11
1"
Electronics circuits and devices Lab Manual

". !alculate the input resistance )i at 7%E "1 D/< output resistance )o at
9!EE119 and current gain at 9!E E119.
COMPONENTS & E%!IPMENT RE%!IRED: $
3.N
o
evice )ange
*)ating
>uantit8
2in No.s4
1. Transistor !E trainer %oard
!ontaining
a4 ! Power 3uppl8.
b4 PNP Transistor
c4 !arbon +ilm )esistor
2151"4 9
%! 11-
&-1B< 1*" C
111AB<1*" C
"
1
1
1
". a4 ! 9oltmeter
b4! 9oltmeter
21514 9
215"14 9
1
1
$. ! /mmeter 215'14 m/
215"114 D/
1
1
&. !onnecting wires '/ 1"
PROCED!RE: $
Inp-t Chara0teri*ti0*:
1. !onnect the transistor as shown in figure.
". Aeep the 9!E constant at "9 and ,9.
$. 9ar8 the 7% in steps and note down the corresponding 9E% values as per tabular
column.
O-tp-t Chara0teri*ti0*:
1. Aeep the 7% constant at "1 D/ and &1 D/.
". 9ar8 the 9!E in steps and note corresponding 7! values.
$. )eadings are tabulated as shown in tabular column.
PREC#!TIONS: $
1. Aeep the ;nobs of suppl8 voltages 9%E = 9!E at minimum positions when
switching @N or switching @++ the power suppl8.
". No loose contacts at the :unctions.
$. o not overload the meters above its rated ranges.
1'
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

C#,C!,#TIONS:
7nput )esistance 2 7%E"1D/4 E F9%E*F 7% E
/t 9!E E "9
7nput )esistance 2 7% E"1D/4 E F9%E*F 7% E
/t 9!EE ,9
@utput resistance 29!EE1194 E F9!E*F 7! E
/t 7%E"1D/
@utput resistance 29!EE1194 E F9!E*F 7! E
/t 7%E"1D/
!urrent /mplification +actor KNME F7!*F 7% E
RES!,T: $

1. 7nput and @utput curves are plotted.
". )i< 7nput )esistanceJ
a. 9!E E "9 and 7% E"1 D/< )i E
b. 9!E E ,9 and 7% E"1 D/< )i E
$. )o< @utput )esistanceJ
a. 9!EE 119 and 7% E "1D/< )o E
b. 9!E E 119 and 7% E &1D/< )o E
&. !urrent /mplification factor
KNM E
2at 9!E E1194
CIRC!IT DI#/R#M:
1,
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPECTED /R#P"S:
Inp-t Chara0teri*ti0*:

O-tp-t Chara0teri*ti0*:

T#)!,#R CO,!MN:
1-
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

Inp-t Chara0teri*ti0*:

O-tp-t
Chara0teri*ti0*:

EXPERIMENT NO: 8
"#,& ?#4E RECTI&IERS ?IT"O!T@?IT" &I,TERS
1.
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
4CE 7 24
9%E
29olts4
7%
2D/4
1
1."
1.&
1.,
1..
1
"
&
,
.
11
"1
$1
&1
,1
.1
4CE7 A4
9%E
29olts4
7%
2D/4
1
1."
1.&
1.,
1..
1
"
&
,
.
11
"1
$1
&1
,1
.1
I) 7 2;B#
9!E
29olts4
7!
2m/4
1
1.'
1
"
$
&
'
,
-
.
0
11
11
1"
I) 7 5;B#
9!E
29olts4
7!
2m/4
1
1.'
1
"
$
&
'
,
-
.
0
11
11
1"
Electronics circuits and devices Lab Manual

#IM: $
1. Examine the input and output waveforms of a half wave rectifier without and
with filter.
". !alculate the ripple factor with load resistance of '11B< 1 AB and 11 AB
respectivel8.
COMPONENTS & E%!IPMENT RE%!IRED: $
3.No evice )ange
*)ating
>uantit8
2in No.s4
1. )ectifier and +ilter trainer
%oard !ontaining
a4 /! 3uppl8.
b4 3ilicon iodes
c4 !apacitor
2051504 9
1N &11-
111 D+
1
-
1
". a4 ! 9oltmeter
b4 /! 9oltmeter
215"14 9
215"14 9
1
1
$. ! /mmeter 215'14 m/ 1
&. !athode )a8 @scilloscope 215"14 M(G 1
' ecade )esistance %ox 11B5111AB 1
&. !onnecting wires '/ 1"
PROCED!RE: $
"a.f ?a+e Re0tifier 'ith o-t fi.ter:
1. !onnect the circuit as shown in figure 2a4.
". /d:ust the load resistance< )L to '11B< and note down the readings of input and
output voltages through oscilloscope.
$. Note the readings of dc current< dc voltage and ac voltage.
&. Now< change the resistance the load resistance< )L to 1 AB and repeat the
procedure as above. /lso repeat for 11 AB.
'. )eadings are tabulated as per the tabular column.
"a.f$'a+e Re0tifier 'ith fi.ter:
1. !onnect the circuit as shown in the figure 2a4.
10
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Electronics circuits and devices Lab Manual

". /d:ust the load resistance )L to '11and connect a capacitor of 111+ value in
Parallel with the load and note the readings of input and output voltages
through @scilloscope.
$. Note the readings of ! current< ! voltage and /! voltage.
&. Now change the load resistance )L to "111 and repeat the procedure as the
above.
'. )eadings are tabulate as per the tabular column.
PREC#!TIONS: $
1. No loose contacts at the :unctions.
". Meters of correct ranges must be used for precision
RES!,T:
1. 7nput and @utput waveforms of a half5wave rectifier is observed and
plotted.
". +or (alf5wave rectifier5
O< )ipple factor at '11BE
1ABE
11 ABE
$. +or (alf5wave rectifier5with filter
O< )ipple factor at '11B< 111D+ E
"AB< 111D+ E
CIRC!IT DI#/R#MS:
"1
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Electronics circuits and devices Lab Manual

"a.f 'a+e Re0tifier 'itho-t fi.ter:
+igure 2a4
"a.f 'a+e Re0tifier 'ith fi.ter:
+igure 2b4
EXPECTED /R#P"S:
"1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#R CO,!MNS:
"a.f 'a+e Re0tifier 'itho-t fi.ter:
3.No Load
)esistance
2)L4
7nput
9oltage
Pea; 29m4
@utput
9oltage
Pea; 29o4
/verage
dc current
27dc4
/verage
c
voltage
29dc4
)M3
9oltage
29ac4
)ipple
+actor
OE
dc
ac
V
V

1 '11B
" 1AB
$ 11AB
"a.f 'a+e Re0tifier 'ith fi.ter:
3.No Load
)esistance
2)L4
7nput
9oltage
Pea; 29m4
@utput
9oltage
Pea; 29o4
/verage
dc current
27dc4
/verage
c
voltage
29dc4
)M3
9oltage
29ac4
)ipple
+actor
OE
dc
ac
V
V

1 '11B
" "AB
EXPERIMENT NO: A
&!,, ?#4E RECTI&IERS ?IT"O!T@?IT" &I,TERS
""
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Electronics circuits and devices Lab Manual

#IM:$
1. Examine input and output waveforms of half5wave< full wave 2center tapped4
and bridge rectifier with capacitor filter.
". !alculate ripple factor with a filter capacitor of &-+ and the load of '11
and "A respectivel8.
COMPNENTS& E%!IPMENTS RE%!IRED:
3.No evice )ange
*)ating
>uantit8
2in No.s4
1. )ectifier and +ilter trainer %oard
!ontaining
a4 /! 3uppl8.
b4 3ilicon iodes
c4 !apacitor
2051504 9
1N &11-
111D+
1
-
1
". a4 ! 9oltmeter
b4 /! 9oltmeter
215"14 9
215"14 9
1
1
$. ! /mmeter 215'14 m/ 1
&. !athode )a8 @scilloscope 215"14 M(G 1
' ecade )esistance %ox 11B5111AB 1
,. Electrol8tic !apacitor 111D+ 1
-. !onnecting wires '/ 1"
PROCED!RE:
&-..$'a+e Re0tifier 'ith o-t fi.ter:
1. !onnect the circuit as shown in figure 2a4.
". /d:ust the load resistance< )L to '11B< and note down the readings of input and
output voltages through oscilloscope.
$. Note the readings of dc current< dc voltage and ac voltage.
&. Now< change the resistance the load resistance< )L to 1 AB and repeat the
procedure as above. /lso repeat for 11 AB.
'. )eadings are tabulated as per the tabular column.
&-..$'a+e Re0tifier 'ith fi.ter:
1. !onnect the circuit as shown in the figure 2a4.
". /d:ust the load resistance )L to '11and connect a capacitor of 111+ value in
Parallel with the load and note the readings of input and output voltages through
"$
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

@scilloscope.
$. Note the readings of ! current< ! voltage and /! voltage.
&. Now change the load resistance )L to "111 and repeat the procedure as the
above.
'. )eadings are tabulate as per the tabular column
PREC#!TIONS:$
1. +or %ridge )ectifier< " @scilloscope must be used to measure input and output
voltages separatel8. This is to avoid shorting across the diode $ as shown in
fig2c4
". No loose contacts at the :unctions.
$. Meters of correct range must be used for precision.
RES!,T:
1. 7nput and @utput waveforms of a half5wave< full5wave 2center tapped4 and bridge
rectifier are observed and plotted.
". +or +ull5wave rectifier5
O< )ipple factor at '11BE
1ABE
11 ABE
$. +or full5wave rectifier 2!enter tapped45
O< )ipple factor at '11B< 111D+ E
"AB< 111D+ E
CIRC!IT DI#/R#MS:
&-..$'a+e (Center$tappe() 'itho-t fi.ter:
"&
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Electronics circuits and devices Lab Manual

+igure 2a4
&-..$'a+e (Center$tappe() 'ith fi.ter:
+igure 2b4
EXPECTED /R#P"S:
"'
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#R CO,!MNS:
&-.. 'a+e Re0tifier (Center$tap) 'ith o-t fi.ter:
3.No Load
)esistance
2)L4
7nput
9oltage
Pea; 29m4
@utput
9oltage
Pea; 29o4
/verage
dc current
27dc4
/verage
c
voltage
29dc4
)M3
9oltage
29ac4
)ipple
+actor
OE
dc
ac
V
V

1 '11B
" 1AB
$ 11AB
&-.. 'a+e Re0tifier (Center$tap) 'ith fi.ter:
3.No Load
)esistance
2)L4
7nput
9oltage
Pea; 29m4
@utput
9oltage
Pea; 29o4
/verage
dc current
27dc4
/verage
c
voltage
29dc4
)M3
9oltage
29ac4
)ipple
+actor
OE
dc
ac
V
V

1 '11B
" "AB
$ 11;I
",
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO: 6
&ETC"#R#CTERISTICS
#IM:
1. Plot the drain and transfer characteristics of +ET.
". +ind drain resistance at 93E$9 for 9?3E 1.'9< 19< 519.
$. +ind trans conductance at 9?3E 51.19 for 93E 19< "9< $9.
COMPONENTS & E%!IPMENTS RE%!IRED:
3.No. evice )ange
*)ating
>uantit8
27n No.s4
1
+ET !haracteristics trainer
board containing
2a4 ! power suppl8
2b4 ! power suppl8
2c4 +ET
2d4 !arbon film resistor
2e4 !arbon film resistor
151"9
15'9
%+C 11
1A< 1*"C
&-1A< 1*"C
1
1
1
1
1
"
! 9oltmeter 15"19 2
$
2a4 ! /mmeter
2b4 ! /mmeter
15"11/
15"1m/
1
1
&
!onnecting wires 1"
PROCED!RE: $
Drain 0hara0teri*ti0*:
1. !onnect the circuit as shown in figure 214
". 3et the gate source voltage< 9?3 in 19 position.
$. 7ncrease drain source voltage< 93 in steps and note corresponding 7
values as 3hown in the tabular column.
&. Now change 9?3 to P1.'9and Q19 and repeat the above procedure.
Tran*fer 0hara0teri*ti0*:
1. !onnect the circuit as shown in figure 214.
". Aeep the drain source voltage< 93 at 19.
$. 9ar8 the gate source voltage< 9?3 in steps and note corresponding 7 values
as shown in the tabular column.
&. Now change 93 to "9and $9 and repeat the above procedure.
"-
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

PREC#!TIONS:
1. Anobs of the suppl8 must be ;ept at minimum position while switching on
and off the suppl8.
". Loose connections at :unction must be avoided.
$. evice and meter of correct rating and range must be used.
C#,C!,#TIONS:
/! drain resistance at 93E$9 of 9?3E 1.'9E
E F93* F7
E
/! drain resistance at 93E$9 of 9?3E 19
E F93* F7
E
/! drain resistance at 93E$9 of 9?3E 519
E F93* F7
E
Tran conductance at 9?3 E 519 of 93E19
E F7 * F9?3
E
Tran conductance at 9?3 E 519 of 93E"9
E F7 * F9?3
Tran conductance at 9?3 E 519 of 93E$9
E F7 * F9?3
RES!,T:
1./t 93E$9
rain )esistance for 9?3E1.'9 is
rain )esistance for 9?3E19 is
rain )esistance for 9?3E1.'9 is
". /t 9?3E519
Trans !onductance for 93 E 19 is
Trans !onductance for 93E "9 is
Trans !onductance for 93E $9 is
".
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#M:
EXPECTED /R#P"S:
Drain Chara0teri*ti0*: Tran*fer Chara0teri*ti0*:


"0
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#TIONS:
Drain 0hara0teri*ti0*:
4
/S
7;4 4
/S
7 ;.84 4
/S
7 1.;4
9
3
2v4 7

2m/4 7

2m/4 7

2m/4
1
1."
1.&
1.,
1..
1.1
".1
$.1
&.1
'.1
,.1
-.1
..1
0.1
11.1
Tran*fer 0hara0teri*ti0*:
4
DS
7;4 4
DS
724 4
DS
7 =4
9
?3
2v4 7

2m/4 7

2m/4 7

2m/4
1
51."
51.&
51.,
51..
51.1
51."
51.&
51.,
51..
5".1
5"."
5".&
5".,
5"..
$1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO: >
CE #MP,I&IER
#IM:
Plot the freRuenc8 response of !E amplifier and calculate gain bandwidth.
COMPONENTS & E%!IPMENTS RE%!IRED: $
3.No evice )ange*)ating >uantit8
2in No.s4
1 !E /mplifier trainer %oard with
2a4 ! power suppl8
2b4 ! power suppl8
2c4 NPN transistor
2d4 !arbon film resistor
2e4 !arbon film resistor
2f4 !apacitor
1"9
'9
%! 11-
111A< 1*"C
"."A< 1*"C
1.1+
1
1
1
1
1
"
" +unction ?enerator 1.l (G5 1M(G 1
$ ual trace !.).@ 15"1M(G 1
&. !onnecting Cires '/ &
PROCED!RE: $
1. !onnect the circuit diagram as shown in figure.
". /d:ust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
$. %8 ;eeping input signal voltages at '1m9< var8 the input signal freRuenc8 from
1
to 1M(G in steps as shown in tabular column and note the corresponding output
voltages.
PREC#!TIONS: $
1. @scilloscope probes negative terminal should be at eRuipotential points 2i.e.
ground voltageE 14< because both terminals are internall8 shorted in dual trace
oscilloscope.
". Ensure that output voltage is exactl8 an amplified version of input voltage
without an8 distortion 2ad:ust input voltage amplitude to that extent4
$. No loose connections at the :unctions.
$1
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Electronics circuits and devices Lab Manual

RES!,T: $
+reRuenc8 response of !E amplifier is plotted.
/ain< /9 E SSSSSSSSd%.
)an('i(thE f($5fL ESSSSSSSS(G.
$"
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#M:
EXPECTED /R#P":
%andwidth E f(5fL
$$
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#R CO,!MN:
Inp-t +o.ta1e: 4i 7 8;m4
+reRuenc8
2in (G4
@utput 29o4
2Pea; to Pea;4
?ain
/9E91*9i
?ain 2in d%4 E
"1 log 11 9@* 9i
"1
,11
1A
"A
&A
.A
11A
"1A
$1A
&1A
'1A
,1A
.1A
111A
"'1A
'11A
-'1A
1111A
$&
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO: C
CC #MP,I&IER
#IM:
Plot the freRuenc8 response of !! amplifier and calculate gain bandwidth.
COMPONENTS & E%!IPMENTS RE%!IRED: $
3.No evice )ange*)ating >uantit8
2in No.s4
1 !! /mplifier trainer %oard with
a4 ! power suppl8
b4 ! power suppl8
c4 NPN transistor
d4 !arbon film resistor
e4 !arbon film resistor
f4 !apacitor
1"9
'9
%! 11-
111A< 1*"C
"."A< 1*"C
1.1+
1
1
1
1
1
"
" +unction ?enerator 1.l (G5 1M(G 1
$ ual trace !.).@ 15"1M(G 1
&. !onnecting Cires '/ &
PROCED!RE: $
1. !onnect the circuit diagram as shown in figure.
". /d:ust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
$. %8 ;eeping input signal voltages at '1m9< var8 the input signal freRuenc8
from 1 to 1M(G in steps as shown in tabular column and note the
corresponding output voltages.
PREC#TIONS: $
1. @scilloscope probes negative terminal should be at eRuipotential points 2i.e.
ground voltageE 14< because both terminals are internall8 shorted in dual trace
oscilloscope.
". Ensure that output voltage is exactl8 an amplified version of input voltage
without an8 distortion 2ad:ust input voltage amplitude to that extent4
$. No loose connections at the :unctions.
$'
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

RES!,T: $
+reRuenc8 response of !E amplifier is plotted.
/ain< /9 E SSSSSSSSd%.
)an('i(thE f($5fL ESSSSSSSS(G.
$,
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#M:
EXPECTED /R#P":
$-
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#R CO,!MN:
Inp-t +o.ta1e: 4i 7 8;m4
+reRuenc8
2in (G4
@utput 29o4
2Pea; to Pea;4
?ain
/9E91*9i
?ain 2in d%4 E
"1 log 11 9@* 9i
"1
,11
1A
"A
&A
.A
11A
"1A
$1A
&1A
'1A
,1A
.1A
111A
"'1A
'11A
-'1A
1111A
$.
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO: 1;
&ET #MP,I&IER
#IM: $
1. Plot the freRuenc8 response of a +ET amplifier.
". !alculate gain.
$. !alculate bandwidth.
COMPONENTS & E%!IPMENTS RE%!IRED: $
3.No evice )ange*)ating >uantit8
2in No.s4
1. +ET amplifier Trainer
%oard with
2a4 ! suppl8 voltage
2b4 +ET
2c4 !apacitors
2d4 )esistors
1"9
%+C 11
1.1+
&-+
1.'A
&.- A
1M
1
1
"
1
1
1
1
". 3ignal generator 1.1(G51M(G 1
$. !)@ 1(G5"1M(G 1
&. !onnecting wires '/ &
PROCED!RE: $

1. !onnect the circuit diagram as shown in figure.
". /d:ust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
$. %8 ;eeping input signal voltage< sa8 at '1m9< var8 the input signal freRuenc8
from 1 to 1M(G in steps as shown in tabular column and note the corresponding
output voltages.
$0
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

PREC#!TIONS:
1. @scilloscopes probes negative terminal should be at eRuipotential points2i.e.
ground voltage is Gero4 because both terminals are internall8 shorted in dual
trace oscilloscope.
RES!,T: $
1. +reRuenc8 response of +ET amplifier is plotted.
". ?ain E SSSSSSSd% 2maximum4.
$. %andwidthE f(5$fL 7 DDDDDDDDD(G.
&1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#M:
EXPECTED /R#P":
&1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

T#)!,#R CO,!MN:
Inp-t 7 8;m4
+reRuenc8
2in (G4
@utput
9oltage 29o4
?ain
/vE9o*9i
?ain
2in d%4 E
"1log1129o*9i4
"1
&1
.1
111
'11
1111
'111
11A
'1A
111A
"11A
&11A
,11A
.11A
&"
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT$NO$11
SI,ICON CONTRO,,ED RECTI&IER C"#R#CTERSTICS
#IMJ5
emonstrate the 9olt5ampere characteristics of silicon5controlled rectifier.
E%!IPMENT@COMPONENTS RE%!IRED:$
3. No. evice )ange*
)ating
>uantit8
1 3!) Trainer %oard
!ontaining
a4 ! Power 3uppl8
b4 )esistor
c4 3!)
15$19
111B
111AB
1
"
1
1
1
" ! voltmeter 215"14 9 "
$ ! ammeter 215"114 m/
215"114/
1
1
& !onnecting wires '/ 11

PROCED!RE:
1. !onnections are made as per the circuit diagram.
". 3et the both voltage sources to Gero volts.
$. 3witch on the 3!) trainer ;it.
&. 3et the gate current of 3!) at ,1 / in the ammeter b var8ing the gate power
suppl8.
'. Now slowl8 var8 the /node voltage from 1 to $1 volts. Measure the voltage in
the voltmeter< which is connected between anode and cathode.
,. @nce 3!) has fired for a particular gate current< note down anode to cathode
voltage and down the gate current of 3!)
-. Now increase the anode to cathode suppl8 voltage and note down the /node
current.
.. Now repeat the steps ' to - for gate currents -1 and .1/
0. raw the graph between /node and !athode voltages and the anode current
for various gate currents.
11. Note down the latching and holding currents from the plot.
RES!,T:
&$
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

1. +or ?ate currentE ,1/ Latching !urrentE
(olding !urrentE
". +or ?ate currentE ,1/ Latching !urrent E
(olding !urrentE
$. +or ?ate currentE ,1/ Latching !urrentE
(olding !urrentE
Symbol:
CIRC!IT DI#/R#M:
&&
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPECTED GRAPH:

V-I Characteristics
T#)!,#R CO,O!MN:
&'
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual


3.No.
?ate currentE ,1/ ?ate currentE -1/ ?ate currentE .1/
/node to
cathode
voltage
/node
current
/node to
cathode
voltage
/node
current
/node to
cathode
voltage
/node
current
&,
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

EXPERIMENT NO E 12
"$P#R#METERS
#IM :$ To calculate the h8brid parameter of transistor in !E configuration.
#PP#R#T!S:$
1. h5 Parameter trainer ;it
". +unction ?enerator
$. !)@
&. %N! Probes and connecting wires
'. Multi5meter.
PROCED!RE:$
1. !onnect 9EE = 9!! at respective given point
". !onnect i*p signal through function generator
$. !onnect the !)@ o*p terminals at o*p point and measure the parameters hie< hfe
for common emitter mode.
&. +or circuit " repeat 1 =" stepMs
'. Measure the parameters hoe = hre respectivel8
RES!,T:$
1. 7nput 7mpedance hie E
". )everse Transfer 9oltage ?ain hre E
$. +orward Transfer !urrent ?ain hfe E
&. @utput conductance hoe E

&-
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Electronics circuits and devices Lab Manual

CIRC!IT DI#/R#M:$
MODE, ?#4E&ORM : Inp-t Chara0teri*ti0*:

Output Characteristics:

&.
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

Calculations:
Inp-t impen(en0e:
hie E T9 %E < 9ce E19
T7%
hie E x " 5 x1 B 5
H" 5H1
Re+er*e tran*fer +o.ta1e 1ain:
hre E T9 %E < 7% !onstant
T9!E

hre E x " 5 x1 B 5
H" 5H1
&or'ar( tran*fer 0-rrent ratio:
hfe E T7 ! < 9ce !onstant
T7%

hre E H " 5H 1 5
x" 5 x1

O-tp-t Con(-0tan0e:
hoe E T7 ! < 7% !onstant
T 9ce
hoe E H " 5H 1 mhos
x" 5 x1
&0
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4
Electronics circuits and devices Lab Manual

Input Characteristics: O-tp-t 0hara0teri*ti0*:

'1
7/)E epartment of Electronics and !ommunication Engineering prepared b8 %.Naresh2/ssistant prof4

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