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6, NOVEMBER/DECEMBER 2009
10-kV SiC MOSFET-Based Boost Converter
Jun Wang, Student Member, IEEE, Xiaohu Zhou, Student Member, IEEE,
Jun Li, Tiefu Zhao, Student Member, IEEE, Alex Q. Huang, Fellow, IEEE,
Robert Callanan, Fatima Husna, and Anant Agarwal, Member, IEEE
Abstract10-kV silicon carbide (SiC) MOSFETs are currently
being developed by a number of organizations in the U.S.
with prospective applications in high-voltage and high-frequency
power-electronic systems. The aim of this paper is to demonstrate
the high-frequency and high-temperature capability of 10-kV SiC
MOSFETs in the application of a dc/dc boost converter. In this
study, 10-kV SiC MOSFET and junction barrier Schottky (JBS)
diode were characterized and modeled in SPICE. Following this,
a dc/dc boost converter based on a 10-kV 10-A MOSFET and a
10-kV 5-A JBS diode was designed and tested under continuous
operation for frequencies up to 25 kHz. The boost converter had
an output voltage of 4 kV, an output power of 4 kW, and operated
with a junction temperature of 174
C for the SiC MOSFET. The
fast-switching speed, low losses, and high-temperature operation
capability of 10-kV SiC MOSFETs demonstrated in the dc/dc
boost converter make them attractive for high-frequency and
high-voltage power-conversion applications.
Index TermsBoost converter, high frequency, high temper-
ature, junction barrier Schottky (JBS) diode, loss, MOSFET,
silicon carbide (SiC).
I. INTRODUCTION
A
LTHOUGH silicon power devices have served the power
electronics industry well for over ve decades, silicon-
based technology is reaching its physical limits for power-
handling and switching-frequency capabilities. State-of-art
silicon power devices have achieved high-power-handling ca-
pability by increasing the current rating of each device to more
than 1500 A; however, their voltage capability is below 6.5 kV,
and they are typically limited to switching frequencies below
1 kHz [1]. Moreover, silicon power devices normally cannot
be used at temperatures higher than 125
C in power-electronic
systems [1].
The growing demand for smaller power systems with higher
power densities requires the development of novel power semi-
Paper 2008-PEDCC-116, presented at the 2008 Industry Applications
Society Annual Meeting, Edmonton, AB, Canada, October 59, and approved
for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS
by the Power Electronics Devices and Components Committee of the IEEE
Industry Applications Society. Manuscript submitted for review October 27,
2008 and released for publication April 24, 2009. First published September 15,
2009; current version published November 18, 2009. This work was supported
by the National Science Foundation under Award EEC-0812121 and made use
of ERC shared facilities.
J. Wang, X. Zhou, J. Li, T. Zhao, and A. Q. Huang are with the Future
Renewable Electric Energy Delivery and Management (FREEDM) Systems
Center, North Carolina State University, Raleigh, NC 27695 USA (e-mail:
jwang@ncsu.edu).
R. Callanan, F. Husna, and A. Agarwal are with Cree Inc., Research Triangle
Park, NC 27709 USA.
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TIA.2009.2031915
conductor devices capable of operating at higher frequen-
cies, higher voltages, and higher temperatures [2][4]. Wide-
bandgap SiC material is the most promising of the postsilicon
alternatives because of its superior properties (e.g., about ten
times higher breakdown electric eld, higher thermal conduc-
tivity, and much lower intrinsic-carrier concentration) [5]. With
the growing availability of SiC single-crystal wafers since the
1990s, a number of government programs are supporting the
development of low-defect thick epitaxial SiC materials and
high-voltage SiC devices. Among them, a large effort has been
devoted to the development of SiC power MOSFETs for high-
voltage switching applications because of their much lower
specic on-resistance when compared with silicon MOSFETs
and their inherent fast-switching capability due to the majority-
carrier conduction mechanism [6].
With the maturation of SiC epitaxial-growth technolo-
gies and MOS fabrication technologies, state-of-the-art 10-kV
4H-SiC DMOSFETs have been demonstrated by Ryu et al. in
2006 with a 111 m cm
2
specic on-resistance at room tem-
perature and 40 ns turnoff time in a clamped inductive-load
circuit [6]. The key characteristics, particularly losses, of 10-kV
SiC MOSFETs have been investigated by extensive characteri-
zation studies, and a simple valid SPICE model for the 10-kV
SiC MOSFET has been proposed for use in application model-
ing [7]. However, due to the early stage of development, there
are few reports about the realistic applications of the 10-kV SiC
MOSFETs [3], [4].
A typical method to improve the power density and reduce
the weight and size of power-electronic systems is to increase
the frequency of dc/dc converters. The developed SiC power
MOSFETs with high-frequency operation capability make it
feasible that dc/dc converters based power electronic systems
have a smaller size and a high power density [2], [4]. There-
fore, the dc/dc converters based on 10-kV SiC MOSFETs are
attractive for the applications of high-voltage power electronic
systems, such as solid-state transformer (SST) and pump laser
power modules. With the rapid progress of the low-defect
thick epitaxial SiC growth technique, the fabrication of large
area 10-kV SiC MOSFETs is a matter of time, and it will
make 10-kV SiC MOSFETs attractive for future high-power
systems.
In this paper, the characterization, modeling, and application
of the 10-kV SiC MOSFET in a dc/dc boost converter are
investigated. The design and testing of a dc/dc boost converter
based on the 10-kV SiC MOSFET with an operation frequency
of 25 kHz, an output voltage of 4 kV, and an output power of
4 kW are described to demonstrate its high-frequency and high-
temperature operation capability.
0093-9994/$26.00 2009 IEEE
WANG et al.: 10-kV SiC MOSFET-BASED BOOST CONVERTER 2057
Fig. 1. Measured and PSPICE-simulated forward IV curve of a 10-kV 10-A
SiC MOSFET at room temperature.
Fig. 2. Measured and PSPICE-simulated on-resistance of a 10-kV 10-A SiC
MOSFET as a function of the junction temperature.
II. CHARACTERISTICS AND SPICE MODELING OF 10-kV
SiC MOSFET AND JBS DIODE
Prototype 10-kV 4H-SiC MOSFETs have been developed by
Cree Inc. Details of the device structure and fabrication can be
found in the previous work by Ryu et al. [6]. Fig. 1 shows the
measured forward IV curve of a 10-kV 10-A SiC MOSFET
at room temperature. At a gate voltage of 15 V, its on-resistance
is 0.61 for an active chip size of 30.45 mm
2
, corresponding
to a specic on-resistance of 185 m cm
2
. The measured on-
resistance of the 10-kV 10-A SiC MOSFET as a function of
the junction temperature is shown in Fig. 2. Its on-resistance
increases from 0.61 at room temperature to 1.69 at 175
C.
The positive temperature coefcient of its on-resistance arises
from the decrease of bulk mobility in its JFET region and drift
layer at elevated temperatures.
Fig. 3 shows the transfer curves of a 10-kV SiC MOSFET
at a drain voltage of 10 V and elevated temperatures. This
curve shows the trends of decreasing threshold voltage and the
increase of transconductance with increased temperature. The
negative temperature coefcient of the threshold voltage for
the SiC power MOSFET arises fromthe temperature-dependent
surface charge, surface potential, and trapped inversion elec-
trons at the high-density interface traps (D
it
1100
10
11
eV
1
cm
2
) present at the SiC/SiO
2
interface [8], [9].
The transconductance of the SiC MOSFET at a 5-A drain
current increases from 1.8 S at room temperature to 2.6 S
at 175
C. This increase can be explained by the rise of the
Fig. 3. Measured and PSPICE-simulated transfer curves of a 10-kV 10-A SiC
MOSFET at elevated temperatures.
Fig. 4. Equivalent subcircuit of a SiC power MOSFET.
MOS channel inversion charge and inversion mobility with
temperature due to the high density of interface traps [9].
In order to provide their realistic application prospects, a
simple behavioral SPICE model of the 10-kV SiC MOSFET
is presented. Fig. 4 shows the equivalent subcircuit of a SiC
power MOSFET. The available built-in level 1 MOSFET model
in commercial SPICE simulators is used to describe the lat-
eral MOS channel in a SiC MOSFET. The constant resistors
and the resistance of the level 1 MOSFET are used to de-
scribe the on-resistance of the SiC MOSFET. The temperature-
dependent voltage and current sources are used to describe
the temperature-dependent characteristics of the SiC MOSFET,
particularly the effects induced by the high density of interface
traps present at the SiC/SiO
2
interface. A modied switch
model capacitor is used to describe the effect of the ion-
implanted JFET region to the nonlinear gatedrain capacitance
(C
GD
) of a SiC DMOSFET.
With the conventional power MOSFET dc parameter extrac-
tion procedure [10], the extracted SPICE model can achieve
a good matching of the PSPICE-simulated and measured for-
ward IV and on-resistance versus junction-temperature curves
of the 10-kV 10-A SiC MOSFET shown in Figs. 1 and 2,
respectively.
2058 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 45, NO. 6, NOVEMBER/DECEMBER 2009
Fig. 5. Modied switch model for the nonlinear C
GD
of a SiC power
MOSFET.
To describe the threshold-voltage temperature coefcient of
a SiC power MOSFET, a temperature-dependent voltage source
(ETEMP) [11] in series with the gate of the lateral MOSFET is
used in the equivalent subcircuit shown in Fig. 4. The transfer
curves of a SiC MOSFET at elevated temperatures in Fig. 3
also mean the increase of transconductance with the increase in
temperature. This is in contrast to those of conventional silicon
MOSFETs, and it cannot be modeled by the available built-
in level 1 MOSFET model in commercial SPICE simulators.
As shown in the equivalent subcircuit in Fig. 4, a temperature-
dependent current source (GTEMP) in combination with the
ETEMP is used to describe the increase of the MOSFET
transconductance with temperature. The matching of the mea-
sured and PSPICE-simulated transfer curve of the 10-kV SiC
MOSFET at elevated temperature is shown in Fig. 3.
Based on the gatedrain capacitance (C
GD
) switch-model
of SIEMENS [12], the nonlinear C
GD
of the SiC MOSFET is
described with a modied switch-model capacitor, as shown
in Fig. 5. When the gatedrain voltage V
GD
> 0, C
GD
=
C
GDMAX
C
ox
(oxide capacitance), corresponding to the ac-
cumulation mode of a DMOSFET. The gatedrain capacitance
is modeled by a capacitor C
GDMAX
. When V
GD
< 0, there are
two different C
GD
decay rates with the increase of the drain
voltage around a kink in the measured C
GD
V
DS
curve, as
shown in Fig. 6. This is caused by the different depletion-region
expansion rates with the increase of the drain voltage around the
JFET pinch voltage due to the different doping concentration in
the JFET region and the drift region. Two diodes in series are
used to describe the nonlinear gatedrain capacitance in a SiC
power MOSFET. Using the modied switch-model capacitor,
the PSPICE simulated C
GD
V
DS
curve of the 10-kV SiC
MOSFET is compared with the measured CV curve up to
a 900-V drain voltage, as shown in Fig. 6. This shows that
an accurate model of the nonlinear C
GD
V
DS
characteristic is
Fig. 6. PSPICE-simulated, measured, and numerically simulated C
GD
V
DS
curves of a 10-kV SiC MOSFET.
Fig. 7. Measured and PSPICE-simulated forward IV curves of a 10-kV 5-A
SiC JBS diode at elevated temperatures.
built, which is one of the key aspects of modeling the transient
characteristics of power MOSFETs. With the nonlinear C
GD
model, a good match for the PSPICE-simulated and measured
transient-response behavior of the 10-kV MOSFET in resistive
and clamped inductive-load circuits was achieved [7].
The characterization and SPICE modeling of a 10-kV SiC
JBS diode was carried out, since the JBS design is a good
option for the freewheeling diode in a 10-kV SiC MOSFET-
based power-electronic system [3], [4]. The SiC JBS diode is
modeled using the unied-diode model [13]. Its forward current
is divided into dominant sections correlating to the depletion
region, low- and high-level injection, emitter recombination,
and series resistance. The summation of each component cur-
rent contributes to the total diode forward current. Fig. 7 shows
the measured and PSPICE-simulated forward IV curve of a
10-kV 5-A SiC JBS diode at elevated temperatures. With the
increase of temperature, its Schottky barrier height reduces,
and its turn-on knee voltage reduces. The decrease of the bulk
mobility in the drift layer at elevated temperatures results in the
increase of its forward voltage drop at high forward currents.
The series resistance (RS) represents both the external con-
tact resistance and any voltage drop in the neutral drift layer of
the SiC JBS diode. The parameter RS can be extracted from
the inverse of the slope of the forward conduction line, and the
junction voltage is then determined by the point where a linear
WANG et al.: 10-kV SiC MOSFET-BASED BOOST CONVERTER 2059
Fig. 8. Measured and PSPICE-simulated CV curve of a 10-kV SiC JBS
diode.
projection of the forward conduction line intercepts the x-axis
in the forward IV curve [13]. The resistor RS has a second-
order relation with the difference between the devices junction
temperature (T) and the referenced temperature (T
nom
) and is
expressed as
RS(T) = RS (1 +TRS1 (T T
nom
)
+ TRS2 (T T
nom
)
2
. (1)
Since there is no minority-carrier injection during normal op-
eration of the 10-kV SiC JBS diode, the reverse recovery of
the JBS diode is controlled by the charging rate of the junction
capacitance. The charge created at the depletion region occurs
at approximately half the junction voltage and is expressed as
the junction capacitance under reverse-bias voltage, i.e.,
C
J
= CJO
1
V
D
V
J
M
(2)
where CJO and M are the zero-bias junction capacitance and
the capacitance grading coefcient, respectively.
Fig. 8 shows the measured and PSPICE simulated CV
curve of a 10-kV 5-A SiC JBS diode. With the valid modeling
of the junction capacitance, the reverse recovery of the JBS
diode controlled by the charge rate of the junction capacitance
is validly predicted [14].
III. APPLICATION OF 10-kV SiC MOSFET IN DC/DC
BOOST CONVERTER
In order to demonstrate the excellent performance of 10-kV
SiC MOSFETs in high-voltage and high-frequency power-
electronic systems [4], a dc/dc boost converter based on a 10-kV
SiC MOSFET and a 10-kV SiC JBS diode was designed using
their SPICE models and experimentally demonstrated.
The schematic diagram of the designed boost converter is
shown in Fig. 9. The converter was operated with an input dc
voltage of 800 V and an output dc voltage of 4 kV. The duty cy-
cle was kept at a constant value of 80% during the experiment.
The active switch in the boost converter was a 10-kV 10-A SiC
MOSFET. A 10-kV 5-A SiC JBS diode was used as the boost
diode. The inductor was selected as 18 mH so that the inductor
current ripple is limited to less than 20%. Three 1.5-F capaci-
Fig. 9. Schematic of the 10-kV SiC MOSFET-based boost converter.
Fig. 10. Simulated switching waveform of the 10-kV SiC MOSFET in the
designed boost converter.
tors (C
o
) in series were selected as the output capacitor so that
the output voltage ripple was limited to less than 1%, while
three resistors (R
b
) with 100-k resistance each were used to
balance the voltages on each series capacitor. A capacitor (C
C
)
of 3.5 nF was put between the cathode of the SiC JBS diode
and the source of the SiC MOSFET to suppress the effect of
parasitic inductance of the wire connecting the SiC diode and
the output capacitor. The load resistor was selected as 3.8 k.
The voltage and current meters were used to monitor the
average input voltage, output voltage, input current, and load
current.
A PSPICE simulation of the designed boost converter was
carried out to predict its efciency as well as the losses of the
SiC switching devices. The simulation took into account the
thermal dissipation and junction temperature of SiC switching
devices by using their SPICE models. Fig. 10 shows the simu-
lated switching waveforms of the SiC MOSFET when the boost
converter is in steady state. The simulation shows that the input
power is 4.5 kW, the output voltage is 4 kV, the output power is
4.35 kW, and the boost-converter efciency is 96.5% at 20-kHz
switching frequency, assuming no iron loss in the inductor
and no gate-driver loss. The total switching loss of the SiC
MOSFET is 88 W, and its conduction loss is 34 W. The junction
temperature of the SiC MOSFET is estimated to be 144
C with
a 0.98
C/W thermal-resistance junction to ambient.
Fig. 11 shows the experimental setup of the boost converter.
The 10-kV SiC MOSFET and JBS diode are attached to a
heatsink with a thermally conductive and electrically insulated
dry thermal interface pad between them. The heatsink was
2060 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 45, NO. 6, NOVEMBER/DECEMBER 2009
Fig. 11. Experimental setup of the 10-kV SiC MOSFET-based boost
converter.
Fig. 12. Measured switching waveform of the 10-kV SiC MOSFET-based
boost converter.
cooled with forced air during the experiment. The MOSFET
driver in the prototype generated square waves with a high
voltage of 18 V and a low voltage of 5 V, and incorporated a
5- external gate resistor. The SiC devices and load resistors
were cooled with a fan during the operation of the boost
converter. A dc power supply provided an input dc voltage ad-
justable from 0 to 800 V. The load resistor (R
L
) was adjustable
from 3.8 to 15.5 k and cooled with forced air during the boost-
converter operation.
The measured switching waveform of the boost converter
with an input voltage of 800 V, a switching frequency of
20 kHz, and a load resistor of 3.8 k is shown in Fig. 12.
The waveform includes the MOSFET gate voltage (V
GS
),
drainsource voltage (V
DS
), drain current (I
D
), and the out-
put voltage (V
out
) of the boost converter in the steady state.
Comparing with the waveforms shown in Fig. 10, the measured
draincurrent waveform has several current peaks caused by
the oscillation of the parasitic inductance and capacitance in
the experimental circuit. The average input current of the boost
converter is 5.4 A. The average output voltage is 4 kV, and the
average load current is 1.01 A. The input power is 4335 W, the
Fig. 13. Zoomed-in switching waveform of the 10-kV SiC MOSFET in the
tested boost converter.
output power is 4030 W, and the efciency of the boost con-
verter is 93% without taking into account the gate driver loss.
Fig. 13 shows the zoomed-in turn-on and turn-off drain
voltage and draincurrent waveforms of the SiC MOSFET in
the Fig. 12 displayed waveforms. During the turn-on tran-
sient of the SiC MOSFET, a peak drain current of 8.2 A
in the SiC MOSFET is followed with a second peak drain
current of 9.2 A due to the displacement current of the SiC JBS
diode and the oscillation induced by the parasitic inductance
and capacitance. The reverse recovery charge (Q
rr
) of the JBS
diode is calculated to be about 240 nC from the draincurrent
waveform of the SiC MOSFET, which is equal to its reverse
depletion capacitance charge. The average drain current of the
SiC MOSFET in the ON-state is 5.6 A with a ripple current
of 0.65 A, and its rms current in the boost converter operation
is 5 A. The turn-on time of the SiC MOSFET is 232 ns
with a drain voltage decrease rate (dV
DS
/dt) of 33 kV/s
and a draincurrent increase rate (dI
D
/dt) of 440 A/s. Its
turnoff time is 351 ns with a dV
DS
/dt of 23 kV/s and a
dI
D
/dt of 27 A/s. During the turnoff transient of the SiC
MOSFET, the drain current of the SiC MOSFET decreases with
the increase of the drain voltage because of a large dV
DS
/dt-
induced displacement current.
The power loss in the boost-converter operation was ana-
lyzed from the switching waveforms and the forward IV char-
acteristics of the SiC MOSFET and JBS diode. The switching
loss for the SiC MOSFET was estimated by integrating the
product of the transient drain voltage and current waveforms
during the switching transient in Fig. 13. Its turn-on power loss
is 61.2 W, and its turnoff power loss is 19.4 W. The large turn-on
loss of the SiC JBS diode can be explained by the displacement
current of the SiC JBS diode owing through the MOSFET
under high-voltage conditions.
The total losses of the SiC MOSFET and JBS diode include
their conduction loss, switching loss, and leakage-current loss.
The leakage current of the 10-kV SiC MOSFET and JBS diode
is less than 100 A at a reverse bias of 4 kV below 200
C,
therefore, the leakage-current loss is less than 0.4 W and
negligible in the loss analysis. The losses of these devices are a
function of their junction temperature as well as their operating
voltage, current, and switching frequency.
WANG et al.: 10-kV SiC MOSFET-BASED BOOST CONVERTER 2061
Fig. 14. Relationship between the measured power efciency and the switch-
ing frequency of the boost converter.
The operating junction temperature of the switching devices
is dependent on the amount of heat generated by the devices,
the ability to transport the heat away from the junction, and
the ambient temperature. The operating junction temperature
of the SiC MOSFET and JBS diode can be represented with the
following formula:
T
j
= T
a
+R
th
P
total
(3)
where R
th
is the thermal resistance from the junction to the
ambient, T
a
is the ambient temperature, T
j
is the junction
temperature, and P
total
is the total loss in the switching device.
The measured dc thermal resistances from the junction to the
ambient of the SiC MOSFET and JBS diode are 0.98
C/W and
0.8