When a fuse blows in a capacitor bank, an increase in the fundamental frequency voltage occurs on the remaining capacitor units in that series group. An unbalance detection scheme is employed to monitor such conditions and to take action as required. This schemeusually includes two levels of action (see IEEE Std C37.99-2000): a) Promptly trip the capacitor bank switching device for 1) A level of unbalance that indicates a fault in the capacitor bank, 2) Overvoltage on good capacitor units greater than 110%, or 3) Excessive voltage on capacitor elements or fuses. This setting should be as fast as possible and coordinated with the maximum fuse clearing time. The trip time delay is frequently as short as 0.1 s. Longer delay is sometimes required for protection systems affected by systemline to ground faults. b) Alarm for low level of unbalance. Overvoltage on good capacitor units is less than 110%. The delay is usually 4 s or greater. 9.3.3.2 Internal capacitor element fusing When a fuse operates, a voltage increase occurs across the remaining elements in that series group of elements inside the capacitor unit and to a lower magnitude also across the capacitor units in parallel with the capacitor containing the operated fuse. An unbalance detection scheme is employed to monitor such conditions and to take action as required. This scheme may include the following levels of action: a) Promptly trip the capacitor bank switching device for 1) A level of unbalance that indicates a fault in the capacitor bank, 2) Overvoltage on good capacitor units greater than 110%, or 3) More than the maximum allowable number of internal fuses blown (provided by the manufacturer of the capacitor units). This setting should be as fast as possible and coordinated with the maximum fuse clearing time. The trip time delay is frequently as short as 0.1 s. Protection systems affected by system line to ground faults are generally not good practice with internally fused capacitors. Note that before tripping, the voltage on the healthy elements in parallel with failed elements following operations may be of the order of 150% of normal. This group of elements is expected to withstand normal switching without cascading failures. The acceptable value may be affected by the capacitor bank design, system application, and the capability of the capacitor unit. See the capacitor unit manufacturer for the acceptable value. b) Alarm for low level of unbalance. The alarm set point is typically halfway between the unbalance signal associated with the trip level and the unbalance signal associated with all the fuses being intact. The delay is usually 4 s or greater. 9.3.3.3 Fuseless capacitor bank protection Each individual capacitor unit consists of many elements connected in series and parallel within the capacitor unit to give the proper voltage and kvar rating. If one of these capacitor elements fails, the capacitor bank may normallystay in service. Since there are many individual elements in series between phase and neutral, there is very little increase in the voltage on the remaining elements in that string. Therefore, the failure of an individual element does not usually lead to the failure of additional elements in that string. An unbalance protection scheme may include the following levels of action: a) Promptly trip the capacitor bankswitching device for a level of unbalance, which indicates that 1) There is a fault in the capacitor bank, 2) The voltage on the remaining elements exceeds 110% of rated voltage, or 3) The number of series sections that make up one capacitor have shorted (consult the manufacturer for this information). (Tripping the capacitor bank upon the equivalent of one shorted capacitor unit will also trip the capacitor bank for a capacitor unit terminal-to-case insulation fault, which could result in case rupture.) Use the lower of the two values, item 2) or item 3) for tripping. This setting should be as fast as possible. The trip time delay is frequently as short as 0.1 s. b) Alarm for low level of unbalance. Overvoltage on good capacitor units is less than 110%. The delay is usually 4 s or greater. An alarm from the unbalance protection on the capacitor bank can provide indication of the failure of one or two individual elements, to allow the affected capacitor units to be replaced at a convenient time.