310 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO.

1, FEBRUARY 2007
High-Efciency Active-Clamp Forward
Converter With Transient Current
Build-Up (TCB) ZVS Technique
Sung-Sae Lee, Student Member, IEEE, Seong-Wook Choi, and Gun-Woo Moon, Member, IEEE
AbstractIn this paper, an active-clamp forward converter with
transient current build-up zero-voltage switching (ZVS) technique
is proposed. The proposed converter is suitable for the low-voltage
and high-current applications. The structure of the proposed
converter is the same as that of the conventional active-clamp
forward converter. However, since it controls the secondary syn-
chronous switch to build up the primary current during the
very short period of time, the ZVS operation is easily achieved
without any additional conduction losses of magnetizing cur-
rent in the transformer and clamp circuit. Furthermore, there
are no additional circuits required for the ZVS operation of
power switches. Therefore, the proposed converter can achieve
the high efciency and low electromagnetic-interference noise re-
sulting from the soft switching without any additional conduction
losses and shows the high power density resulting from the high
efciency and no additional components added. The operational
principle and design example are presented. Experimental results
demonstrate that the proposed converter can achieve an excellent
ZVS performance throughout all load conditions and a signicant
improvement in the efciency for the 100-W (5 V, 20 A) prototype
converter.
Index TermsDCDC power conversion, power distribution,
pulsewidth-modulated power converters.
I. INTRODUCTION
R
ECENTLY, it is required that a switch-mode power
supply characterizes high efciency, small size, and high
power density for the distributed-power system of the server
and telecommunication equipment such as the code-division
multiple-access equipment, IMT-2000 equipment, and so on.
Generally, a few hundreds watts converter with low output
voltage and high output current is needed in these elds. Most
of the power systems of the telecommunication equipment have
several stages, as shown in Fig. 1. It is customary to add an
acdc part, which functions as the power-factor correction for
the standards of the harmonic regulation such as IEC 61000 and
IEEE 519, ahead of a dcdc part in order to provide a regulated
bus voltage of 48 V. The nominal bus voltage of 48 V obtained
Manuscript received October 6, 2004; revised February 14, 2005. Abstract
published on the Internet September 15, 2006.
The authors are with the Department of Electrical Engineering and
Computer Science, Korea Advanced Institute of Science and Technology,
Daejeon 305-701, Korea (e-mail: nicegreen@angel.kaist.ac.kr; elecdol@angel.
kaist.ac.kr; gwmoon@ee.kaist.ac.kr).
Digital Object Identier 10.1109/TIE.2006.885127
Fig. 1. Power system of the telecommunication equipment.
from ac-line voltage (90265 V
rms
) should be converted to
the lower voltages such as 5, 3.3, and 2.5 V for the logic
boards. The dcdc converter of the nal stage conducts this
conversion and requires lowoutput voltage, high output current,
high power density, and low prole. Since it should be mounted
on the logic board, the size of the converter, especially the
height of the converter, is very restricted. Therefore, the size and
the efciency are the most important factor of the onboard con-
verter. The forward converter topology has been widely used for
low-voltage and high-current applications with a power level
up to 250 W. In the conventional forward converter topology
[1], [2], the power transformer essentially requires a tertiary
winding to reset the core. This makes the transformer structure
more complicated than that of other single-switch converter
topologies. Furthermore, the conventional forward topology has
the other shortcoming of hard-switching operation. Therefore,
when the switching frequency is increased to realize small
magnetics and capacitors, the overall efciency will be very
low due to increased switching losses and the high power
density can simply be unobtainable due to high-cooling require-
ments. Consequently, the conventional hard-switching topology
is not suitable for applications in advanced telecommunication
and server systems. To solve these problems, soft-switching
techniques are normally used. Resonant and quasi-resonant
converters [3][5] eliminate switching losses by introducing
a certain resonance near the switching frequency and allow
either the voltage or current to go to zero before the device is
turned on or off. While the introduction of resonance allows the
zero-current or zero-voltage switching (ZVS) and, therefore,
enables higher switching frequency, it comes with increased
conduction losses and increased stresses on active compo-
nents when compared with pulse-width-modulated converters.
Furthermore, since its output is regulated by the frequency
0278-0046/$25.00 2007 IEEE
LEE et al.: HIGH-EFFICIENCY ACTIVE-CLAMP FORWARD CONVERTER WITH TCB ZVS TECHNIQUE 311
Fig. 2. Circuit diagram of the proposed converter.
modulation, the switching ripples and harmonics vary with
the variable switching frequency. Therefore, it becomes very
hard to realize the electromagnetic-compatibility design and
compliance. These are the reasons why resonant converters
exhibit limited success in improving efciency and particularly
used for low-power applications. In order to achieve the real
appreciable efciency improvement for practical designs, the
soft-switching techniques that eliminate switching losses while
preserving minimum voltage and current stresses on switch-
ing devices are desired. The active-clamp forward converter
[6][10] and the forward/yback converter [2], [11] overcome
many of the resonant converters drawbacks. They are operated
at a constant frequency, and there are no additional current or
voltage stresses on active devices while showing good ZVS
performance. However, these topologies have more increased
transformer conduction losses and circulating current losses in
the clamp circuit by 30%50%, typically, because the small
magnetizing inductance is used for the large magnetizing cur-
rent to achieve the ZVS operation. This also increases the
switch current stresses. Therefore, the magnetic amplier can
be employed in the secondary side of the active-clamp forward
or forward/yback converters to improve the ZVS operation
[1], [12], [13]. However, this method also needs additional
components and conduction losses in the magnetic amplier
and transformer.
In order to solve all these drawbacks, this paper proposes an
active-clamp forward converter with transient current build-up
(TCB) ZVS technique that is suitable for the low-voltage and
high-current applications. As shown in Fig. 2, the structure of
the proposed converter is the same as that of the conventional
active-clamp forward converter. However, since it controls the
secondary synchronous switch to build up the primary current
during the very short period of time, the ZVS operation can
be easily obtained without any additional conduction losses
in transformer and clamp circuit. Furthermore, there are no
additional circuits required for the ZVS operation of power
switches. Therefore, the proposed TCB ZVS forward converter
can achieve the high efciency and high power density.
The operational principle, design example, and experimental
results are presented to conrm the validity of the proposed
converter.
Fig. 3. Key waveforms for the mode analysis.
II. OPERATIONAL PRINCIPLE
The circuit diagram of the proposed TCB ZVS forward
converter is the same as that of the conventional active-clamp
forward converter, as shown in Fig. 2. The switch S
1
is operated
in a duty ratio of D, and the switch S
2
is operated with com-
plementary to S
1
with the time delay between their gate pulses.
Synchronous rectiers are employed instead of Schottky diodes
to reduce the conduction loss in the secondary side. Fig. 3
shows the gating pulses for synchronous switches and key
operating waveforms of the proposed converter in the steady
state. The gating pulse for SR
1
is imposed before S
2
is turned
off. Each switching period is subdivided into eight modes, and
their topological stages are shown in Fig. 4. In order to illustrate
the steady-state operation, several assumptions are made as
follows.
1) The switches, S
1
and S
2
, are ideal except for their internal
diode and output capacitor.
2) The output voltage V
o
and clamping capacitor voltage V
c
are constant.
3) The transformer magnetizing current i
Lm
(t) and leak-
age inductor current i
Lr
(t) are constant during the time
interval t
1
t
2
.
4) The output capacitors of switches, C
1
and C
2
, have the
same value of C
s
.
Mode 1 (t
0
t
1
): Mode 1 begins when the commutation of
i
SR1
(t) and i
SR2
(t) is completed. Then, i
Lo
(t) ows through
C
o
and SR
1
. Since S
1
is on and S
2
is off state, V
in
is applied to
L
m
+L
r
and V
in
/n V
o
is applied to L
o
. Therefore, the power
is transferred from input source to output. i
Lo
(t) and i
Lr
(t)
312 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 1, FEBRUARY 2007
Fig. 4. Equivalent circuit of the proposed converter. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6. (g) Mode 7. (h) Mode 8.
LEE et al.: HIGH-EFFICIENCY ACTIVE-CLAMP FORWARD CONVERTER WITH TCB ZVS TECHNIQUE 313
can be expressed as follows:
i
Lo
(t) =
V
in
/n V
o
L
o
t +i
Lo
(t
0
) = i
SR1
(t) (1)
i
Lr
(t) =
V
in
L
m
+L
r
t +i
Lm
(t
0
)
i
Lo
(t)
n
= i
S1
(t) (2)
where
i
Lo
(t
0
) =I
o

i
Lo
2
= I
o

V
in
/n V
o
2L
o
DT
s
i
Lm
(t
0
) =
i
Lm
2
=
V
in
2(L
m
+L
r
)
DT
s
.
Mode 2 (t
1
t
2
): This mode begins when S
1
is turned off.
Until v
S1
(t) is lower than V
in
, the dotted end of the trans-
formers primary side is positive with respect to the undotted
end of that and diode D
o2
is still reverse biased. Therefore,
C
1
and C
2
are linearly charged and discharged by i
Lr
(t),
respectively. From the assumption 3),
S1
(t) can be expressed
as follows:

S1
(t) =
i
Lr
(t
1
)
2C
s
t (3)
where
i
Lr
(t
1
) =
V
in
2(L
m
+L
r
)
DT
s
+
1
n

I
o
+
V
in
/n V
o
2L
o
DT
s

.
Mode 3 (t
2
t
3
): After
S1
(t) increases to V
in
, i
Lo
(t) begins
to freewheel through SR
1
and D
o2
. Since the primary voltage
across the transformer is 0 V, C
1
and C
2
are charged and
discharged in a resonant manner of L
r
and C
1
+C
2
= 2C
s
,
respectively. i
Lr
(t) and
S1
(t) can be expressed as follows:
i
Lr
(t) =i
Lr
(t
2
) cos

1
2L
r
C
s
t

(4)

S1
(t) =i
Lr
(t
2
)

L
r
2C
s
sin

1
2L
r
C
s
t

+V
in
. (5)
Mode 4 (t
3
t
4
): After
S1
(t) and v
S2
(t) reach V
in
+V
c
and 0 V, respectively, i
Lr
(t) ows through D
2
and the zero
voltage across S
2
is maintained. The ZVS of SR
2
is guaranteed,
because SR
2
is turned on while D
o2
is conducting. Since D
o1
and SR
2
are conducting, the voltage across the transformer is
0 V and V
c
is all applied to L
r
. Therefore, i
Lr
(t) rapidly
decreases as follows:
i
Lr
(t) =
V
c
L
r
t +i
Lr
(t
3
) (6)
where
i
Lr
(t
3
) =

i
2
Lr
(t
2
)
2C
s
V
2
c
L
r
which can be derived form (4) and (5).
Mode 5 (t
4
t
5
): When i
Lr
(t) reaches i
Lm
(t
4
), i
Lo
(t) com-
pletes its freewheeling and D
o1
is turned off with D
2
still
conducting. Since V
c
is applied to L
m
+L
r
and V
o
is
applied to L
o
, i
Lo
(t) and i
Lr
(t) can be expressed as follows:
i
Lr
(t) =
V
c
L
m
+L
r
t +i
Lm
(t
4
) = i
Lm
(t) (7)
i
Lo
(t) =
V
o
L
o
t +i
Lo
(t
4
). (8)
Since S
2
can be turned on before i
Lr
(t) decreases to zero, the
ZVS operation of S
2
is guaranteed regardless of load variations.
In heavy and medium load condition, the ZVS operation of S
2
can be easily achieved due to large leakage-inductor current at
t
2
. Furthermore, in the light load condition, the ZVS operation
of S
2
is achieved by small leakage-inductor current at rst
and, then, it is achieved by magnetizing current after the end
of secondary inductor currents freewheeling. Therefore, the
current build-up that is required for the ZVS operation of S
1
is not required for the ZVS operation of S
2
.
Mode 6 (t
5
t
6
): When SR
1
is turned on while S
2
is on
state, the transformer secondary voltage becomes zero and,
therefore, the transformer primary voltage also becomes zero.
When transformer primary voltage becomes zero, V
c
is all
applied to L
r
. Then, i
Lr
(t) rapidly increases in a negative
direction during the very short period of mode 6, and this built-
up current is used for the ZVS operation of S
1
in the next mode.
Since mode 6 is very short period of time, the current built-up
barely causes additional conduction losses in primary circuit.
i
Lr
(t) and i
SR2
(t) can be expressed as follows:
i
Lr
(t) =i
Lm
(t
5
)
V
c
L
r
t =
V
in
2(L
m
+L
r
)
DT
s

V
c
L
r
t (9)
i
SR2
(t) =i
Lo
(t
5
) +n |i
Lr
(t)| . (10)
Mode 7 (t
6
t
7
): When S
2
is turned off, C
1
and C
2
are
discharged and charged, respectively, by i
Lr
(t
6
) in a resonant
manner of L
r
and C
1
+C
2
= 2C
s
. Since the leakage induc-
tor current was built up as sufcient as to achieve the ZVS
operation of S
1
in mode 6, the ZVS operation of S
1
can be
easily achieved regardless of load conditions. Fig. 5 shows
the different ZVS operations according to different forward
converters. In the conventional active-clamp forward converter
[7], the ZVS operation of S
2
is easily achieved due to the
large reected load current or the magnetizing current after the
end of secondary inductors freewheeling. However, the ZVS
operation of S
1
is achieved by the magnetizing current between
t
5
t
6
and, then, it is achieved only by the leakage inductor,
as shown in Fig. 5(a). Since the leakage inductor has small
inductance value, the large current is required to achieve the
ZVS operation of S
1
. This large current can only be achieved
by the large magnetizing current. Therefore, the conventional
active-clamp forward converter requires the large magnetizing
314 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 1, FEBRUARY 2007
Fig. 5. Comparative analysis of the ZVS operation. (a) Conventional active-clamp forward converter. (b) Active-clamp forward converter with secondary
magnetic amplier. (c) Proposed converter.
current, and the transformer conduction loss is inevitable for the
ZVS operation of S
1
. The active-clamp forward converter with
the secondary magnetic amplier [12] can solve this problem,
as shown in Fig. 5(b). Since the magnetic amplier prevents
the transfer of magnetizing current to the secondary side, the
magnetizing current ows only in the primary winding. There-
fore, the ZVS operation of S
1
is easily achieved. However,
since this converter also requires some magnetizing current,
additional magnetic amplier and the reset circuit for mag-
netic amplier, the power density is reduced and there exists
some conduction loss in transformer and magnetizing amplier.
Fig. 5(c) shows the ZVS operation of the proposed converter.
Since the ZVS current is built up during the very short period
of t
5
t
6
, the large magnetizing current is not required and
the transformer conduction loss can be reduced signicantly.
Furthermore, no additional circuit is required for the ZVS op-
eration. Therefore, the proposed converter can achieve the high
efciency resulting form the soft switching without any addi-
tional conductional losses in the transformer and can achieve
the high power density resulting from the high efciency and
LEE et al.: HIGH-EFFICIENCY ACTIVE-CLAMP FORWARD CONVERTER WITH TCB ZVS TECHNIQUE 315
no additional components added. i
Lr
(t) and
S2
(t) can be
expressed as follows:
i
Lr
(t) =i
Lr
(t
6
) cos

1
2L
r
C
s
t

(11)

S2
(t) =

L
r
2C
s
i
Lr
(t
6
) sin

1
2L
r
C
s
t

. (12)
i
Lo
(t) begins to freewheel through SR
1
and SR
2
in this mode.
Mode 8 (t
7
t
8
): After
S1
(t) and
S2
(t) reach 0 V and
V
in
+V
c
, respectively, S
1
is turned on. Since i
Lo
(t) is free-
wheeling through SR
1
and D
o2
, V
in
is all applied to L
r
. i
Lr
(t)
can be expressed as follows:
i
Lr
(t) =
V
in
L
r
t +i
Lr
(t
7
) (13)
where
i
Lr
(t
7
) =

i
Lr
(t
6
)
2

2C
s
V
2
in
L
r
.
After the end of mode 8, one switching period is completed
and, subsequently, the operation from t
0
to t
8
is repeated.
III. DESIGN EXAMPLE
To validate the characteristics of the proposed converter, a
prototype converter has been designed for the specications as
follows:
1) input voltage V
in
, 48 V dc;
2) output voltage V
o
, 5 V;
3) maximum output power P
o(max)
, 100 W;
4) switching frequency f
s
, 100 kHz; and
5) maximum duty ratio of S
1
, D
max
, 0.5.
A. Selection of Turn Ratio, n
Since the Schottky diode has a large forward voltage drop,
it is well known that the synchronous switch is used for the
output rectier instead of the Schottky diode. Assuming that
the forward voltage drop caused by the turn-on resistance of
synchronous switch in the secondary side, V
fd
is 0.05 V (turn-
on resistance of IRF3703 is 2.8 m) and D
max.e
= 0.45, the
turn ratio of the transformer n can be derived from the voltage-
conversion ratio of the conventional active-clamp forward
converter and can be determined as follows:
n =
V
in
(V
o
+V
fd
)
D
max.e
. (14)
It is assumed that the current build-up time for the ZVS of S
1
(time interval between t
5
t
6
) is very short and the effect of
build-up current to voltage conversion ratio is ignored.
B. Selection of Output Inductance, L
o
L
o
can be selected by determining the ripple current of the
output capacitor. When continuous-conduction-mode (CCM)
operation is desired until 10% of the full load, L
o
can be
determined as follows:
L
o
=
V
o
i
Co
(1 D
max.e
T
s
) (15)
where i
Co
is the ripple current of the output capacitor.
C. Selection of Magnetizing Inductance, L
m
Since the magnetizing current barely affects the ZVS oper-
ation in the proposed converter, it is desirable that the mag-
netizing inductance of the transformer should be selected as
large as possible. As a result, it does not cause any additional
conduction losses in the transformer and clamp circuit in the
proposed converter.
D. Selection of Leakage Inductance L
r
and Current
Build-Up Time t
z
Since the ZVS operation of S
2
is easily achieved in the
active-clamp forward converter, L
r
should be designed accord-
ing to the ZVS condition of S
1
. From Fig. 3, the ZVS condition
of S
1
can be expressed as follows:
1
2
L
r
i
Lr
(t
6
)
2

1
2
(2C
s
)(V
in
+V
c
)
2
(16)
and can be rewritten as follows:
i
Lr
(t
6
)

2C
s
L
r
(V
in
+V
c
). (17)
The current build-up time, t
z
= t
6
t
5
, can be expressed as
follows:
t
z
=
L
r
V
c

i
Lr
(t
6
)
V
in
2(L
m
+L
r
)
D
max.e
T
s

. (18)
Fig. 6 plots the required build-up current for the ZVS oper-
ation of S
1
with L
r
variation and required current build-up
time with the given L
r
and build-up current. When the large
leakage inductance is selected, the small build-up current is
required. However, since this reduces the effective duty and the
primary voltage of transformer during powering, it affects the
voltage conversion ratio of the proposed converter. Therefore,
the leakage-inductor value should be selected carefully and H
was selected in the proposed prototype converter. In that case,
the required build-up current for the ZVS of S
1
is 2 A and
required build-up time is 150 nS with C
s
of 1 nF.
316 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 1, FEBRUARY 2007
Fig. 6. Required build-up current and build-up time for ZVS operation.
TABLE I
COMPONENTS LIST
IV. EXPERIMENTAL RESULTS
Based on the design guidelines in the preceding section, a
prototype of a 5-V 100-W converter is constructed using the
components as shown in Table I. Fig. 7 shows key waveforms
of the proposed converter at full load condition and can be
explained as follows.
1) i
Lo
(t) has 4A ripple current as designed in the preceding
section. Therefore, the CCM operation is guaranteed until
10% of full load.
2) The waveform of i
Lr
(t) is the same as that of con-
ventional active-clamp forward converter except for the
build-up current before S
2
is turned off. This build-
up current is used for the ZVS of S
1
. Therefore, the
large magnetizing current is not required for the ZVS
operation, which is required in the conventional active-
clamp forward converter.
3) The ZVS operation of S
1
is easily achieved due to the
build-up current before S
2
is turned off. The ZVS opera-
tion of S
2
is also easily achieved as that of conventional
active-clamp forward converter.
Fig. 7. Key experimental waveforms at full-load condition.
4) The waveforms of i
SR1
(t) and i
SR2
(t) are the same as the
theoretic waveforms of Fig. 3. When i
Lr
(t) is build-up,
they are negatively and positively increased, respectively.
Fig. 8 shows the voltage and current waveforms of S
1
and
S
2
, respectively, at the different load conditions. As previously
mentioned, since the current is built up before S
2
is turned off,
the ZVS operation of S
1
is easily achieved regardless of load
conditions. The ZVS of S
2
is also easily achieved as the same
manner of the conventional active-clamp forward converter as
shown in Fig. 8(b).
Fig. 9 shows the efciency of the proposed converter, active-
clamp forward converter with secondary magnetic amplier
and conventional active-clamp forward converter with L
m
=
120 H and L
m
= 320 H according to the load variation.
LEE et al.: HIGH-EFFICIENCY ACTIVE-CLAMP FORWARD CONVERTER WITH TCB ZVS TECHNIQUE 317
Fig. 8. ZVS waveforms with the load variation. (a) ZVS operation of S
1
.
(b) ZVS operation of S
2
.
Fig. 9. Efciency comparison under the load variation.
As expected, the high efciency can be obtained around 92% at
full load and the maximum efciency becomes approximately
96%. This high efciency is the results of the reduced switching
losses and conduction losses for the entire load ranges by
employing the new ZVS scheme of the proposed converter.
Therefore, the proposed converter can effectively achieve the
ZVS operation of all switches without any additional conduc-
tion loss and auxiliary circuits.
V. CONCLUSION
This paper presented the principle of operation, design, and
experimental results of the active-clamp forward converter that
is using the control of synchronous switch for the improved
ZVS operation. The ZVS operation of S
1
is easily achieved
due to the build-up current before S
2
is turned off regard-
less of load conditions. Furthermore, there are no additional
circuits required for the ZVS operation. The ZVS operation
of S
2
is also easily achieved as that of conventional active-
clamp forward converter. Therefore, the proposed converter
can achieve the high efciency and low electromagnetic-
interference (EMI) noise resulting from the soft switching
without any additional conduction losses and can achieve the
high power density resulting from the high efciency and no
additional components added. The operational principles have
been presented in mode analysis, and the design equations
have been derived. Based on the design equations, a prototype
converter is built and tested. The experimental results of a
100-W prototype converter prove the key characteristics of the
proposed converter. The efciency of the proposed converter
is obtained 92% at the full load condition and a maximum
efciency becomes 96% around half load condition. Therefore,
the proposed converter is suitable for the power module of
server and telecommunication equipment that require high ef-
ciency, high power density, and low EMI noise with 48-V bus
voltage.
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Sung-Sae Lee (S04) was born in Taegu, Korea,
in 1975. He received the B.S. degree in electrical
engineering and computer science from Kyungpook
National University, Taegu, in 2001 and the M.S. de-
gree in electrical engineering from Korea Advanced
Institute of Science and Technology, Daejeon, Korea,
in 2003, where he is currently working toward the
Ph.D. degree in electrical engineering.
His research interests are in the areas of power
electronics and digital-display driver system includ-
ing analysis, modeling, design, and control of power
converters, soft-switching power converters, bidirectional converters for hybrid
electrical vehicles, fast chargers for high-density batteries, multilevel convert-
ers and inverters, power-factor correction, digital-display driver systems, and
external electrode uorescent lamp (EEFL) and at uorescent lamp (FFL)
back-light inverters for liquid crystal display (LCD) TVs.
Mr. Lee is a member of the Korean Institute of Power Electronics.
Seong-Wook Choi was born in Seoul, Korea, in
1975. He received the B.S. degree in electrical en-
gineering from Dankook University, Seoul, in 2002
and the M.S. degree in electrical engineering from
Korea Advanced Institute of Science and Technol-
ogy, Daejeon, Korea, in 2004, where he is cur-
rently working toward the Ph.D. degree in electrical
engineering.
His research interests are in the areas of power
electronics and digital-display driver systems in-
cluding analysis, modeling, design, and control of
power converters, soft-switching power converters, step-up power converters
for electric-drive systems, multilevel converters and inverters, power-factor
correction, digital-display driver systems, and EEFL back-light inverters for
liquid crystal display TV.
Mr. Choi is a member of the Korean Institute of Power Electronics.
Gun-Woo Moon (M01) was born in Korea in
1966. He received the B.S. degree from Han-Yang
University, Seoul, Korea, in 1990, and the M.S.
and Ph.D. degrees in electrical engineering from
Korea Advanced Institute of Science and Technol-
ogy (KAIST), Daejeon, Korea, in 1992 and 1996,
respectively.
He is currently an Associate Professor in the
Department of Electrical Engineering and Computer
Science, KAIST. His research interests include mod-
eling, design, and control of power converters, soft-
switching power converters, resonant inverters, distributed-power systems,
power-factor correction, electric-drive systems, driver circuits of plasma-
display panels, and exible ac-transmission systems.
Dr. Moon is a member of the Korean Institute of Power Electronics, Korean
Institute of Electrical Engineers, Korea Institute of Telematics and Electronics,
and Korea Institute of Illumination Electronics and Industrial Equipment.