Objective:- Plot the I-V characteristics of NMOS and PMOS transistors. 1. ID vs. VDS with varying VGS for both NMOS & PMOS.
Circuit for NMOS:-
13MVD0050
Output graph for NMOS :-
13MVD0050
Circuit Diagram of PMOS:-
13MVD0050
Output graph for PMOS:-
Inference:-
Conclusion:-
13MVD0050
2] CMOS INVERTER:- Objective:- 1. Transient analysis of CMOS inverter. 2. Transfer characteristic of CMOS inverter. 3. Transfer characteristics of CMOS inverter with effect of aspect ratio. 4. Delay of CMOS inverter. 5. Power dissipation of CMOS inverter.
Circuit Diagram:-
13MVD0050
Output graph for transient analysis of CMOS inverter:-
13MVD0050
Output graph of transfer characteristics of CMOS inverter:-
13MVD0050
Output graph for width variation:-
Analysis:- 1. Delay of CMOS inverter:-
2. Power dissipation of CMOS inverter:-
Inference:-
Conclusion:-
13MVD0050
3] Channel length modulation:- Objective:- 1. To study effect of channel length modulation. 2. Calculation of the lambda parameter. 3. Calculation of output resistance.
Reference:- CMOS Digital integrated circuits by sung-mo-kang.
13MVD0050
4] Body bias effect Objective:- 1. To observe the body bias effect on drain current. 2. To calculate the vt for different values of VSB.
Circuit Diagram:-
13MVD0050
Output graph for ID vs VGS wIith varying VSB:-
13MVD0050
Output graph for ID vs VSB:-
Analysis:- 1 .vt for the different value of vsb:-
Inference:-
Conclusion:-
Reference:- microelectronics circuits by sedra & smith. 13MVD0050
5]CMOS inverter symbol:- Objective:- 1.to study how to create and use symbol.
Schematic for creating CMOS inverter symbol:-
13MVD0050
CMOS inverter symbol:-
13MVD0050
Application of the symbol:-
13MVD0050
Output graph:-
Inference:-
Conclusion:-
13MVD0050
6]NAND:- Objective:- 1. To create the NAND gate symbol & study its functionality. 2. to calculate the delay & power dissipation . Schematic to create NAND symbol:-
13MVD0050
Symbol of NAND gate:-
13MVD0050
Application of NAND symbol:-
13MVD0050
Output graph:-
Analysis:- 1.delay calculation:-
2.power dissipation :-
Inference:-
Conclusion:- 13MVD0050
7]NOR:- Objective:- 1. To create the NOR gate symbol & study its functionality. 2. to calculate the delay & power dissipation
Schematic to create NOR symbol:-
13MVD0050
Symbol of NOR gate:-
13MVD0050
Application of NOR symbol:-
13MVD0050
Output graph:-
Analysis:- 1. delay calculation:-
2. power dissipation :-
Inference:-
Conclusion:- 13MVD0050
8]Chain of inverter:- Objective:- 1. To calculate delay for chain of inverter. 2. To study the functionality.
Circuit Diagram:-
13MVD0050
Output graph:-
Analysis:- 1.delay calculation:-
2.Power calculation:-
Inference:-
Conclusion:-
13MVD0050
9] Noise margin for inverter:- Objective:- 1. To calculate the noise margin for CMOS inverter