Determine the prime-implicants of the Boolean function by using the tabulation
method.F(w, x, y, z)=(1,4,6,7,8,9,10,11,15) 2. Simplify the following Boolean expression using Quine McCluskey method: F=m(0,9,15,24,29,30)+d(8,11,31). 3. Design a combinational logic diagram for BCD to Excess-3 code converter 4. Find a minimum sum of products expression for the following function using Quine- McClusky method. F (A,B,C,D,E) = (0,2,3,5,7,9,11,13,14,16,18,24,26,28,30) 5. Determine the minimum sum of products and minimum product of sums for f = bcd+bcd+acd+abbcd 6. Find the minterm expansion of f(a,b,c,d) = a(b+d)+acd
UNIT II
1. With a suitable block diagram explain the operation of BCD adder 2. Draw and explain the working of a carry-look ahead adder. 3. Write the HDL description of the circuit specified by the following Boolean function. x =AB+ C y= C. 4. Design a combinational logic diagram for BCD to Excess-3 code converter
UNIT III
1. Implement the given Boolean function using 4 1 multiplexer. F(x, y, z) =(1, 2, 6, 7) . 2. Explain with necessary diagram a BCD to 7 segment display decoder. 3. Design a BCD to excess 3 code converter using a ROM 4. What are the advantages of PLA over ROM? Explain the internal construction of PLA 5. Design and explain the working of a 1 to 8 demultipexer
UNIT IV
1. Design and explain the working of a up-down ripple counter 2. Using JK flip-flops design a parallel counter, which counts in the sequence 101,110,001,010,000,111,101 3. Design a synchronous sequential circuit using JK flip-flop to generate the following sequence and repeat. 0, 1, 2, 4, 5, 6 4. What is the aim of state reduction? Reduce the given state diagram and prove that the both state diagrams are equal.
UNIT V
1. With suitable example and diagram explain the hazards in combinational and sequential logic circuits 2. Design the Tflip flop from the logic gates 3. Design a non sequential ripple counter which will go through the states 3,4,5,7,8,9,10,3,4..draw bush diagram also 4.Explain essential, static and dynamic hazards in digital circuit. Give hazard-free realization for the following Boolean function . F(I,J,K,L)= S(1,3,4,5,6,7,9,11,15) - See more at: http://www.rejinpaul.com/2011/11/important-questions-in-dpsd-digital.html#sthash.tXkzCzMd.dpuf