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Sunday, June 01, 2014 Home Electronic Projects 8085 Microprocessor 8086 Microprocessor 555 Circuits Audio Circuits Basic Circuits Control circuits DIY Circuits Low-power wireless transceiver integrated chip circuit using CC1000 Published on Mar 14 2011 // DIY Circuits Brief Introduction of a CC1000 radio transceiver integrated circuit chip structure and a typical application design; highlights CC1000 required communication with a microcontroller timing.Keywords programmable frequency hopping radio transceiver CC1000 Introduction CC1000 is based on Chipcons SmartRF technology, manufactured in 0.35m CMOS technology under an ideal single-chip UHF transceiver communications chips. Its working band at 315,868 and 915MHz, but the CC1000 is easily programmed to work in the 300 ~ 1000MHz range. It has a low voltage (2.3 ~ 3.6V), low power consumption, programmable output power (-20 ~ 10dBm), high sensitivity (typically-109dBm), small size (TSSOP-28 package), integrated the bit synchronizer and so on. The FSK data transmission up to 72.8Kbps, programmable frequency step with 250Hz capability for frequency hopping protocol; main operating parameters programmed via the serial bus interface changes, the use of very flexible. circuit Figure 1 shows a simplified block diagram for the CC1000. In receive mode, CC1000 can be regarded as a traditional superheterodyne receiver. Radio frequency (RF) input signal by the low-noise amplifier (LNA) to enlarge and overturned into the mixer, mixing generated by IF mixer (IF) signal. In the intermediate frequency processing stage, the signal is amplified before being sent to the demodulator and filter. Optional RSSI signal and the IF signal can also be produced by mixing in the pin RSSI / IF. Demodulated, CC1000 demodulated output from the pin DIO digital signal, the synchronization of the demodulated signal from the chip to provide the clock signal PCLK to complete. Figure 1 CC1000 simplified block diagram In transmit mode, the voltage-controlled oscillator (VCO) output signal directly into the power amplifier (PA). RF output is through the feet increases the data in the DIO control, known as frequency shift keying (FSK). The internal T / R switch circuitry makes the antenna connection and matches the design easier. Frequency synthesizer generates the local oscillator signal into the amplifier in the receiving state. Frequency synthesizer is a crystal (XOSC), phase detector (PD), charge pulse, VCO and dividers (/ R and / N) composition, the crystal must be XOSC external pin connected to the external inductance need only VCO connected. 2 Application Circuit CC1000 few external components work, the typical application circuit shown in Figure 2. When configuring the CC1000 different Walkie Talkie Suppliers alibaba.com Choose from 1M+ Verified Suppliers. Contact Directly & et !i"e #uotes$ DC % DC Wandler huhn&rohrbacher.de The 'o(er Supply Company kundenspe)ifische *nt(icklun+ Trust Rating 80 % 8085projects.info B r o w s e B u r s t A d s Free Electronic projects & 8085 projects Blog Archive Low-power w... http://8085projects.info/low-power-wireless-transceiver-integrated-chi... 1 of 4 6/1/2014 7:56 PM
Figure 2 CC1000 typical application circuit 3 three-wire serial data port CC1000 can be a simple three-wire serial interface (PDATA, PCLK and PALE) program, 36 8-bit configuration registers, each addressable by a 7-bit address. A complete CC1000 configuration data required to send 29 frames, each 16-bit (7 address bits, a read / write bit and 8 data bits). PCLK frequency determines the time required to complete configuration. The PCLK frequencies in the 10MHz, the time required to complete the configuration of less than 60s. Mode is set at low potential, the only launch a frame, the time required is less than 2s. All registers can be read. In each write cycle, the 16-bit bytes into PDATA channels, each data frame in the 7 most significant bits (A6: 0) is the address bits, A6 is the MSB (most significant bit), the first to be sent. Send the next bit is read / write bit (high write, low reading), the transfer address and the read / write bit period, PALE (Programming address latch enable) must be kept low, and then transfer 8 data bits (D7: 0), shown in Figure 3. Table 1 is a description of each parameter. PDATA the PCLK falling edge. 8 data bits when the last byte of bit D0 loaded, the entire data word was only into the internal configuration register. After a low potential state of the configuration information programming to be effective, but can not turn off the power. Figure 3 CC1000 programming write timing diagram Micro-controller also can read through the same interface configuration registers. First, sending 7-bit address spaces, and then read / write bit is set to low, is used to initialize the read back data. Then, CC1000 return data from the address register. At this point, PDATA used as output port, during the read back data (D7: 0), micro-controller must set it to three-state, or pin is set high when open. Read operation timing shown in Figure 4.
Figure 4 CC1000 read operation timing diagram of programming 4 connection with a microcontroller Microcontroller uses 3 output pins for the interface (PDATA, PCLK, PALE), and PDATA pin must be connected to a bidirectional pin used to send and receive data. DCLK providing the data timing should be connected with the micro-controller input, and the remaining pins are used to monitor the LOCK signal (at pin CHP_OUT). When the PLL is locked, the signal is logic high. Figure 5 P87LPC762 MCU and CC1000 Interface Schematic. Figure 5 Interface Schematic P87LPC762 microcontroller internal registers CC1000 written procedures are as follows: C program write_com (UCHAR addr, UCHAR com_data) / / write internal registers subroutine { char i; addr <<= 1; Pale = 0; / / allow the address latch for (i = 0; i <7; i + +) { / / send address addr <<= 1; p_data = CY; PCLK = 0; / / rising edge pclk = 1; } p_data = 1; / / write operations Trust Rating 80 % 8085projects.info B r o w s e B u r s t A d s Free Electronic projects & 8085 projects Blog Archive Low-power w... http://8085projects.info/low-power-wireless-transceiver-integrated-chi... 2 of 4 6/1/2014 7:56 PM com_data <<= 1; p_data = CY; pclk = 0; pclk = 1; } } 5 Conclusion When the modulation data, CC1000 can be set to three different data format, namely, synchronous NRZ mode, synchronous Manchester te code mode, asynchronous transfer (UART) mode. Battery case in order to meet stringent power consumption requirements, CC1000 provides a very convenient method of power management. Register controls the low level through the MAIN mode, with separate level control receiving part, firing part of the frequency synthesizer and the crystal. This independent control can be used to optimize the application of the lowest in a current loss may reach. CC1000 excellent performance it is mainly used in ISM (industrial, scientific and medical) aspects and SRD (Short Range Communications).
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