In general, digital computers may be classified into four categories, according to the multiplicity of instruction and data streams. This scheme for classifying computer organizations was introduced by Michael J. lynn. The essential computing process is the e!ecution of a se"uence of instructions on a set of data. The term stream is used here to denote a se"uence of items #instructions or data$ as e!ecuted or operated upon by a single processor. Instructions or data are defined with respect to a referenced machine. An instruction stream is a se"uence of instructions as e!ecuted by the machine% a data stream is a se"uence of data including input, partial, or temporary results, called for by the instruction stream. Computer organizations are characterized by the multiplicity of the hardware provided to service the instruction and data streams. &isted below are lynn's four machine organizations( )ingle instruction stream*single data stream #)I)+$ )ingle instruction stream*multiple data stream #)IM+$ Multiple instruction stream*single data stream #MI)+$ Multiple instruction stream*multiple data stream #MIM+$ ,oth instructions and data are fetched from the memory modules. Instructions are decoded by the control unit, which sends the decoded instruction stream to the processor units for e!ecution. +ata streams flow between the processors and the memory bidirectionally. Multiple memory modules may be used in the shared memory subsystem. -ach instruction stream is generated by an independent control unit. Multiple data streams originate from the subsystem of shared memory modules. SISD Computer This organization, shown in igure below, represents most serial computers available today. Instructions are e!ecuted se"uentially but may be overlapped in their e!ecution stages #pipelining$. Most )I)+ uniprocessor systems are pipelined. An )I)+ computer may have more than one functional unit in it. All the functional units are under the supervision of one control unit. Created by T . /hosh Control 0nit Instruction )tream 1rocessor #1$ Memory #M$ I23 Instruction )tream +ata )tream Advanced Computer Architecture SIMD Computer This class corresponds to array processors. As illustrated in igure below, there are multiple processing elements supervised by the same control unit. All 1-s #processing elements$ receive the same instruction broadcast from the control unit but operate on different data sets from distinct data streams. The shared memory subsystem may contain multiple modules. MISD Computer This organization is conceptually illustrated in igure below. There are n processor units, each receiving distinct instructions operating over the same data stream and its derivatives. The results #output$ of one processor become the input #operands$ of the ne!t processor in the macropipe. This structure has received much less attention and has been challenged as impractical by some computer architects. 4o real embodiment of this class e!ists. Created by T . /hosh 1 n 1 5 Mn Control 0nit 1rogram loaded from front end M 5 +ata Stream +ata Stream Instruction Stream +ata loaded from front end Advanced Computer Architecture C0( control unit 10( processor unit MM( memory module I)( instruction stream +)( data stream MIMD Computer Most multiprocessor systems and multiple computer systems can be classified in this category #igure below$. An MIM+ computer is tightly coupled if the degree of interactions among the processors is high. 3therwise, we consider them loosely coupled. Most commercial MIM+ computers are loosely coupled. 6e have listed below several system models under each of the three e!isting computer organizations. Computer class Computer system models )I)+#uses one functional unit$ I,M 785 %I,M 59:8 % I,M 78;8% 1+1 <A=*5527>8. )I)+#with multiple functional units$ I,M ?982;5 % C+C )tar*588% TI*A)C % Cray*I% u@itsu <1*:88. )IM+ Illiac*I< % 1-1- % ,)1. MIM+ I,M ?782 59> M1% 0nivac 5588 2 >8% #loosely coupled$ Tandem 59 % C.mA . MIM+ C.mmp% Cray*?% )*5 % Cray*= M1% #tightly coupled$ +enelcor B-1. Created by T . /hosh 1 5 Control 0nit*5 M 5 +ata Stream Instruction )tream Instruction )tream 1 n Control 0nit*n M n +ata Stream Instruction )tream Instruction )tream Advanced Computer Architecture Created by T . /hosh