Gagandeep Singh

Email: gagandeepsingh016@gmail.com
Mobile: +91-7696402850

OBJECTIVE
To secure a position that benefit from my expertise, acknowledges my personal work and
caters to my varied needs seeking full time position in the field of ASIC Design.

PROFESSIONAL SUMMARY
2 years of experiencein the software industry in Telecom domain (C, Perl, UNIX,
Vxworks ).
Masters in VLSI Design from CDAC Mohali.

PROFESSIONAL SKILLS
Good knowledge of VHDL, Verilog RTL coding
Good knowledge of Analog Design Concepts
ExperienceonplatformslikeLinux
Development experience with Embedded systems, Compilers, Linkers, Makefiles, gdb
Build system knowledge, shell/perl scripting exposure
Implemented various VLSI projects during post-graduation
Quick Learner
ExcellentCommunicationandLeadershipskills

TECHNICALSKILLS

Programming Languages: C, Assembly Language
Operating systems: Linux (UNIX),Windows
Scripting Language: Perl, Shell
Hardware Descriptive Languages: VHDL, Verilog
Protocols: GMPLS, RSVP
EDA Tool: Cadence, XilinxISE

PROFESSIONAL EXPERIENCE
Software Engineer, Wipro Technologies (Aug2008 July 2010)

PROJECTS INVOLVED:
8 bit Microprocessor 8085 IP Design (CDAC-MOHALI)
The objective of the project was to design 8085 p IP.The design was made in VHDL
language and mixed modeling approach was followed.All the available 8085
instructions were implemented. The IP was tested and verified at Vertex 6.

Responsibilities
To design 8085 architecture in VHDL
To perform testing and debugging of the IP



STANDARD CELL Library DESIGN(CDAC-MOHALI)
Standard Cell Library at gpdk180 technology was designed using Cadence Design
Suit. The cells designed in library were NOT, NAND, MUX, XOR, XNOR, MUX, LATCH
and D Flip Flops with various drive strengths. Virtuoso Layout Suit was used for e
designing layout designing and the designs were tested using SPECTRE simulator.

Responsibilities
To design standard cells at gpdk180nm
To test and verify the designed cells

CIENA OME6500 (WIPRO Technologies)
CIENA Optical Multiservice Edge 6500 combines and extends the advantages of the
market leading CIENA next-generation SDH/SONET and metropolitan DWDM
platforms in a complementary manner.

Responsibilities
Development OF MCEMON commands for operating the Network Element (NE).
Debugging on issues related to Call Processing, Call Routing and signaling in
control plane.

TRAININGS & CERTIFICATIONS
6 month training at Wipro Technologies (Noida) from 02.02.2008 to 18.07.2008
Cleared Code Gym(C and C++ Certification) at Wipro Technologies, Bangalore in
DEC-2008.

ACHIEVEMENTS & AWARDS
Was awarded with GATE 2011 Scholarship.
Was awarded with Merit Scholarship in 10+2.

EDUCATION:

M.Tech (VLSI Design) 2011-2013 74%
CDAC Mohali

B.Tech (Electronics & Communication) 2004-2008 68%
Guru Nanak Dev University Amritsar

Higher Secondary 2001-2003 83%
M.S.D. Sr.Sec School

Secondary 1999-2001 81%
B.J.J. High School

PERSONAL DETAILS

Fathers Name: Mohinder Singh
DOB: 15
th
Aug, 1986
Marital Status: Single
Nationality: Indian
Languages: English,Hindi,Punjabi