REL670I11r01 - Technical Reference Manual

Relion
670 series
Line distance protection REL670
Technical reference manual
Document ID: 1MRK506275-UEN
Issued: June 2010
Revision: C
Product version: 1.1
Copyright 2010 ABB. All rights reserved
Copyright
This document and parts thereof must not be reproduced or copied without written
permission from ABB, and the contents thereof must not be imparted to a third
party, nor used for any unauthorized purpose.
The software or hardware described in this document is furnished under a license
and may be used or disclosed only in accordance with the terms of such license.
Trademarks
ABB and Relion are registered trademarks of ABB Group. All other brand or
product names mentioned in this document may be trademarks or registered
trademarks of their respective holders.
Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
ABB AB
Substation Automation Products
SE-721 59 Vsters
Sweden
Telephone: +46 (0) 21 32 50 00
Facsimile: +46 (0) 21 14 69 18
http://www.abb.com/substationautomation
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept
or product description and are not to be deemed as a statement of guaranteed
properties. All persons responsible for applying the equipment addressed in this
manual must satisfy themselves that each intended application is suitable and
acceptable, including that any applicable safety or other operational requirements
are complied with. In particular, any risks in applications where a system failure and/
or product failure would create a risk for harm to property or persons (including but
not limited to personal injuries or death) shall be the sole responsibility of the
person or entity applying the equipment, and those so responsible are hereby
requested to ensure that all measures are taken to exclude or mitigate such risks.
This document has been carefully checked by ABB but deviations cannot be
completely ruled out. In case any errors are detected, the reader is kindly requested
to notify the manufacturer. Other than under explicit contractual commitments, in
no event shall ABB be responsible or liable for any loss or damage resulting from
the use of this manual or the application of the equipment.
Conformity
This product complies with the directive of the Council of the European
Communities on the approximation of the laws of the Member States relating to
electromagnetic compatibility (EMC Directive 2004/108/EC) and concerning
electrical equipment for use within specified voltage limits (Low-voltage directive
2006/95/EC).
This conformity is proved by tests conducted by ABB AB in accordance with the
generic standard EN 50263 for the EMC directive, and with the standards EN
60255-5 and/or EN 50178 for the low voltage directive.
This product is designed and produced for industrial use.
Table of contents
Section 1 Introduction.....................................................................29
Introduction to the technical reference manual.................................29
About the complete set of manuals for an IED............................29
About the technical reference manual.........................................30
This manual.................................................................................31
Introduction.............................................................................31
Principle of operation..............................................................31
Input and output signals.........................................................34
Function block........................................................................34
Setting parameters.................................................................34
Technical data........................................................................35
Intended audience.......................................................................35
Related documents......................................................................35
Revision notes.............................................................................36
Section 2 Analog inputs..................................................................37
Introduction.......................................................................................37
Operation principle...........................................................................37
Function block..................................................................................38
Setting parameters...........................................................................39
Section 3 Local HMI.......................................................................45
Human machine interface ................................................................45
Small size HMI..................................................................................47
Small............................................................................................47
Design.........................................................................................47
Medium size graphic HMI.................................................................49
Medium........................................................................................49
Design.........................................................................................49
Keypad.............................................................................................51
LED...................................................................................................52
Introduction..................................................................................52
Status indication LEDs................................................................52
Indication LEDs...........................................................................52
Local HMI related functions..............................................................53
Introduction..................................................................................53
General setting parameters.........................................................54
Status indication LEDs................................................................54
Design....................................................................................54
Function block........................................................................54
Table of contents
1
Indication LEDs...........................................................................55
Introduction.............................................................................55
Design....................................................................................55
Function block........................................................................62
Setting parameters.................................................................62
Section 4 Basic IED functions........................................................65
Authorization.....................................................................................65
Principle of operation...................................................................65
Authorization handling in the IED...........................................67
Self supervision with internal event list.............................................67
Introduction..................................................................................67
Internal signals.......................................................................69
Run-time model......................................................................71
Function block.............................................................................72
Output signals..............................................................................72
Setting parameters......................................................................72
Technical data.............................................................................73
Time synchronization........................................................................73
Introduction..................................................................................73
General concepts...................................................................73
Real-time clock (RTC) operation............................................76
Synchronization alternatives..................................................77
Process bus IEC 61850-9-2LE synchronization.....................80
Function block.............................................................................80
Output signals..............................................................................81
Technical data.............................................................................84
Parameter setting groups.................................................................84
Introduction..................................................................................84
Function block.............................................................................85
Input and output signals..............................................................86
ChangeLock function CHNGLCK.....................................................86
Introduction..................................................................................87
Function block.............................................................................87
Table of contents
2
Test mode functionality TEST..........................................................88
Introduction..................................................................................88
Function block.............................................................................90
IED identifiers...................................................................................91
Introduction..................................................................................91
Product information..........................................................................92
Introduction..................................................................................92
Application...................................................................................92
Factory defined settings.........................................................92
Signal matrix for binary inputs SMBI................................................93
Introduction..................................................................................93
Function block.............................................................................93
Signal matrix for binary outputs SMBO ...........................................94
Introduction..................................................................................94
Function block.............................................................................95
Signal matrix for mA inputs SMMI....................................................95
Introduction..................................................................................96
Function block.............................................................................96
Signal matrix for analog inputs SMAI...............................................97
Introduction..................................................................................97
Frequency values........................................................................97
Function block.............................................................................98
Setting parameters....................................................................100
Summation block 3 phase 3PHSUM..............................................102
Introduction................................................................................102
Principle of operation.................................................................102
Function block...........................................................................103
Input and output signals............................................................103
Authority status ATHSTAT.............................................................104
Table of contents
3
Introduction................................................................................104
Function block...........................................................................104
Output signals............................................................................104
Section 5 Differential protection...................................................107
1Ph High impedance differential protection HZPDIF .....................107
Introduction................................................................................107
Logic diagram.......................................................................107
Function block...........................................................................108
Technical data...........................................................................109
Section 6 Impedance protection ..................................................111
Distance measuring zones, quadrilateral characteristic
ZMQPDIS, ZMQAPDIS, ZDRDIR...................................................111
Introduction................................................................................111
Full scheme measurement...................................................112
Impedance characteristic.....................................................113
Minimum operating current...................................................117
Measuring principles............................................................117
Directional impedance element for quadrilateral
characteristics......................................................................120
Simplified logic diagrams......................................................122
Function block...........................................................................125
Technical data...........................................................................129
Distance measuring zone, quadrilateral characteristic for
series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR.......130
Introduction................................................................................131
Directionality for series compensation..................................139
Function block...........................................................................144
Table of contents
4
Technical data...........................................................................150
Phase selection, quadrilateral characteristic with fixed angle
FDPSPDIS......................................................................................150
Introduction................................................................................151
Phase-to-earth fault..............................................................153
Phase-to-phase fault............................................................155
Three-phase faults...............................................................156
Load encroachment..............................................................157
Minimum operate currents....................................................160
Function block...........................................................................165
Technical data...........................................................................168
Full-scheme distance measuring, Mho characteristic
ZMHPDIS ......................................................................................168
Introduction................................................................................168
Basic operation characteristics.............................................171
Theory of operation..............................................................172
Function block...........................................................................182
Technical data...........................................................................184
Full-scheme distance protection, quadrilateral for earth faults
ZMMPDIS, ZMMAPDIS..................................................................185
Introduction................................................................................185
Directional lines....................................................................192
Function block...........................................................................197
Technical data...........................................................................200
Table of contents
5
Directional impedance element for mho characteristic and
additional distance protection directional function for earth
faults ZDMRDIR, ZDARDIR...........................................................200
Introduction................................................................................201
Directional impedance element for mho characteristic
ZDMRDIR.............................................................................201
Additional distance protection directional function for
earth faults ZDARDIR ..........................................................204
Function block...........................................................................206
Mho impedance supervision logic ZSMGAPC................................208
Introduction................................................................................208
Fault inception detection......................................................209
Function block...........................................................................210
Faulty phase identification with load encroachment
FMPSPDIS.....................................................................................211
Introduction................................................................................212
The phase selection function................................................212
Function block...........................................................................223
Technical data...........................................................................225
Power swing detection ZMRPSB ...................................................225
Introduction................................................................................225
Resistive reach in forward direction.....................................227
Resistive reach in reverse direction.....................................228
Reactive reach in forward and reverse direction..................228
Basic detection logic.............................................................229
Operating and inhibit conditions...........................................231
Function block...........................................................................232
Technical data...........................................................................234
Power swing logic ZMRPSL ..........................................................234
Introduction................................................................................234
Communication and tripping logic........................................234
Table of contents
6
Blocking logic.......................................................................235
Function block...........................................................................237
Pole slip protection PSPPPAM ......................................................238
Introduction................................................................................238
Function block...........................................................................242
Technical data...........................................................................243
Automatic switch onto fault logic, voltage and current based
ZCVPSOF ......................................................................................244
Introduction................................................................................244
Function block...........................................................................246
Technical data...........................................................................247
Phase preference logic PPLPHIZ...................................................247
Introduction................................................................................247
Function block...........................................................................250
Section 7 Current protection.........................................................253
Instantaneous phase overcurrent protection PHPIOC ..................253
Introduction................................................................................253
Function block...........................................................................254
Technical data...........................................................................255
Four step phase overcurrent protection OC4PTOC ......................255
Introduction................................................................................255
Function block...........................................................................260
Technical data...........................................................................267
Instantaneous residual overcurrent protection EFPIOC ................267
Introduction................................................................................268
Table of contents
7
Function block...........................................................................268
Technical data...........................................................................269
Four step residual overcurrent protection EF4PTOC ....................270
Introduction................................................................................270
Operating quantity within the function..................................271
Internal polarizing.................................................................272
External polarizing for earth-fault function............................274
Base quantities within the protection....................................274
Internal earth-fault protection structure................................274
Four residual overcurrent steps............................................274
Directional supervision element with integrated
directional comparison function............................................276
Second harmonic blocking element.....................................278
Switch on to fault feature......................................................280
Function block...........................................................................282
Technical data...........................................................................289
Sensitive directional residual overcurrent and power protection
SDEPSDE .....................................................................................289
Introduction................................................................................290
Function inputs.....................................................................291
Function block...........................................................................297
Technical data...........................................................................301
Thermal overload protection, one time constant LPTTR ...............302
Introduction................................................................................302
Function block...........................................................................305
Technical data...........................................................................306
Breaker failure protection CCRBRF ..............................................306
Introduction................................................................................307
Function block...........................................................................310
Technical data...........................................................................312
Table of contents
8
Stub protection STBPTOC ............................................................313
Introduction................................................................................313
Function block...........................................................................314
Technical data...........................................................................315
Pole discordance protection CCRPLD ..........................................315
Introduction................................................................................316
Pole discordance signaling from circuit breaker...................319
Unsymmetrical current detection..........................................319
Function block...........................................................................319
Technical data...........................................................................321
Directional underpower protection GUPPDUP...............................321
Introduction................................................................................321
Low pass filtering..................................................................324
Calibration of analog inputs..................................................324
Function block...........................................................................325
Technical data...........................................................................327
Directional overpower protection GOPPDOP ................................328
Introduction................................................................................328
Low pass filtering..................................................................331
Calibration of analog inputs..................................................331
Function block...........................................................................332
Technical data...........................................................................335
Broken conductor check BRCPTOC .............................................335
Introduction................................................................................335
Function block...........................................................................336
Technical data...........................................................................337
Section 8 Voltage protection........................................................339
Two step undervoltage protection UV2PTUV ................................339
Table of contents
9
Introduction................................................................................339
Measurement principle.........................................................340
Time delay............................................................................340
Blocking................................................................................345
Design..................................................................................346
Function block...........................................................................348
Technical data...........................................................................351
Two step overvoltage protection OV2PTOV ..................................352
Introduction................................................................................352
Time delay............................................................................353
Blocking................................................................................359
Design..................................................................................359
Function block...........................................................................361
Technical data...........................................................................364
Two step residual overvoltage protection ROV2PTOV .................364
Introduction................................................................................364
Time delay............................................................................365
Blocking................................................................................370
Design..................................................................................370
Function block...........................................................................371
Technical data...........................................................................374
Overexcitation protection OEXPVPH ............................................374
Introduction................................................................................374
Measured voltage.................................................................377
Operate time of the overexcitation protection.......................378
Cooling.................................................................................381
Overexcitation protection function measurands...................381
Overexcitation alarm............................................................382
Logic diagram.......................................................................383
Function block...........................................................................383
Table of contents
10
Technical data...........................................................................385
Voltage differential protection VDCPTOV ......................................385
Introduction................................................................................385
Function block...........................................................................387
Technical data...........................................................................389
Loss of voltage check LOVPTUV ..................................................389
Introduction................................................................................389
Function block...........................................................................391
Technical data...........................................................................392
Section 9 Frequency protection....................................................393
Underfrequency protection SAPTUF .............................................393
Introduction................................................................................393
Time delay............................................................................394
Voltage dependent time delay..............................................394
Blocking................................................................................396
Design..................................................................................396
Function block...........................................................................397
Technical data...........................................................................398
Overfrequency protection SAPTOF ...............................................398
Introduction................................................................................399
Time delay............................................................................399
Blocking................................................................................400
Design..................................................................................400
Function block...........................................................................401
Technical data...........................................................................402
Rate-of-change frequency protection SAPFRC .............................402
Introduction................................................................................402
Table of contents
11
Time delay............................................................................403
Blocking................................................................................403
Design..................................................................................404
Function block...........................................................................405
Technical data...........................................................................406
Section 10 Multipurpose protection................................................407
General current and voltage protection CVGAPC..........................407
Introduction................................................................................407
Measured quantities within CVGAPC...................................407
Base quantities for CVGAPC function..................................410
Built-in overcurrent protection steps.....................................410
Built-in undercurrent protection steps...................................415
Built-in overvoltage protection steps....................................416
Built-in undervoltage protection steps..................................416
Logic diagram.......................................................................416
Function block...........................................................................421
Technical data...........................................................................430
Section 11 Secondary system supervision.....................................433
Current circuit supervision CCSRDIF ............................................433
Introduction................................................................................433
Function block...........................................................................435
Technical data...........................................................................436
Fuse failure supervision SDDRFUF...............................................436
Introduction................................................................................436
Zero and negative sequence detection................................437
Delta current and delta voltage detection.............................439
Dead line detection...............................................................442
Main logic.............................................................................442
Function block...........................................................................446
Technical data...........................................................................447
Table of contents
12
Section 12 Control..........................................................................449
Synchrocheck, energizing check, and synchronizing
SESRSYN......................................................................................449
Introduction................................................................................449
Basic functionality.................................................................450
Logic diagrams.....................................................................450
Function block...........................................................................459
Technical data...........................................................................464
Autorecloser SMBRREC ...............................................................464
Introduction................................................................................465
Logic Diagrams....................................................................465
Auto-reclosing operation Off and On....................................465
Auto-reclosing mode selection.............................................465
Start auto-reclosing and conditions for start of a
reclosing cycle......................................................................466
Control of the auto-reclosing open time for shot 1...............467
Long trip signal.....................................................................467
Time sequence diagrams.....................................................474
Function block...........................................................................477
Technical data...........................................................................481
Apparatus control APC...................................................................481
Introduction................................................................................481
Error handling............................................................................482
Bay control QCBAY...................................................................484
Introduction...........................................................................484
Principle of operation............................................................484
Function block......................................................................486
Input and output signals.......................................................486
Setting parameters...............................................................487
Local/Remote switch.................................................................487
Introduction...........................................................................487
Function block......................................................................488
Switch controller SCSWI...........................................................490
Table of contents
13
Introduction...........................................................................490
Function block......................................................................495
Circuit breaker SXCBR..............................................................497
Introduction...........................................................................497
Function block......................................................................501
Circuit switch SXSWI.................................................................502
Introduction...........................................................................503
Function block......................................................................507
Bay reserve QCRSV..................................................................508
Introduction...........................................................................508
Function block......................................................................510
Reservation input RESIN...........................................................512
Introduction...........................................................................512
Function block......................................................................514
Interlocking ....................................................................................516
Introduction................................................................................516
Logical node for interlocking SCILO .........................................519
Introduction...........................................................................519
Logic diagram.......................................................................519
Function block......................................................................520
Interlocking for busbar earthing switch BB_ES .........................520
Introduction...........................................................................521
Function block......................................................................521
Logic diagram.......................................................................521
Interlocking for bus-section breaker A1A2_BS..........................522
Table of contents
14
Introduction...........................................................................522
Function block......................................................................523
Logic diagram.......................................................................524
Interlocking for bus-section disconnector A1A2_DC ................526
Introduction...........................................................................527
Function block......................................................................527
Logic diagram.......................................................................528
Interlocking for bus-coupler bay ABC_BC ................................529
Introduction...........................................................................529
Function block......................................................................530
Logic diagram.......................................................................531
Interlocking for 1 1/2 CB BH .....................................................536
Introduction...........................................................................536
Function blocks....................................................................537
Logic diagrams.....................................................................539
Interlocking for double CB bay DB ...........................................548
Introduction...........................................................................548
Function block......................................................................549
Logic diagrams.....................................................................551
Input and output signals ......................................................554
Interlocking for line bay ABC_LINE ..........................................557
Introduction...........................................................................557
Function block......................................................................558
Logic diagram.......................................................................559
Interlocking for transformer bay AB_TRAFO ............................566
Introduction...........................................................................567
Function block......................................................................568
Logic diagram.......................................................................569
Position evaluation POS_EVAL.................................................572
Introduction...........................................................................572
Logic diagram.......................................................................572
Function block......................................................................573
Logic rotating switch for function selection and LHMI
presentation SLGGIO.....................................................................573
Introduction................................................................................573
Table of contents
15
Functionality and behaviour ................................................575
Graphical display..................................................................575
Function block...........................................................................577
Selector mini switch VSGGIO.........................................................579
Introduction................................................................................579
Function block...........................................................................580
Generic double point function block DPGGIO................................581
Introduction................................................................................581
Function block...........................................................................582
Settings......................................................................................582
Single point generic control 8 signals SPC8GGIO.........................582
Introduction................................................................................582
Function block...........................................................................583
AutomationBits, command function for DNP3.0 AUTOBITS..........584
Introduction................................................................................585
Function block...........................................................................586
Single command, 16 signals SINGLECMD....................................601
Introduction................................................................................601
Function block...........................................................................602
Section 13 Scheme communication...............................................605
Scheme communication logic for distance or overcurrent
protection ZCPSCH .......................................................................605
Introduction................................................................................605
Blocking scheme..................................................................606
Permissive underreaching scheme......................................606
Permissive overreaching scheme........................................607
Table of contents
16
Unblocking scheme..............................................................607
Intertrip scheme....................................................................608
Simplified logic diagram.......................................................608
Function block...........................................................................610
Technical data...........................................................................611
Phase segregated scheme communication logic for distance
protection ZC1PPSCH ...................................................................612
Introduction................................................................................612
Blocking scheme..................................................................613
Permissive underreach scheme...........................................613
Permissive overreach scheme.............................................614
Intertrip scheme....................................................................614
Simplified logic diagram.......................................................615
Function block...........................................................................616
Technical data...........................................................................618
Current reversal and weak-end infeed logic for distance
protection ZCRWPSCH .................................................................618
Introduction................................................................................618
Current reversal logic...........................................................619
Weak-end infeed logic..........................................................619
Function block...........................................................................621
Technical data...........................................................................622
Local acceleration logic ZCLCPLAL...............................................622
Introduction................................................................................623
Zone extension.....................................................................623
Loss-of-Load acceleration....................................................624
Function block...........................................................................624
Scheme communication logic for residual overcurrent
protection ECPSCH .......................................................................626
Introduction................................................................................626
Introduction...........................................................................626
Table of contents
17
Blocking scheme..................................................................627
Permissive under/overreaching scheme..............................628
Function block...........................................................................630
Technical data...........................................................................632
Current reversal and weak-end infeed logic for residual
overcurrent protection ECRWPSCH ..............................................632
Introduction................................................................................632
Directional comparison logic function...................................633
Fault current reversal logic...................................................633
Weak-end infeed logic..........................................................634
Function block...........................................................................635
Technical data...........................................................................636
Current reversal and weak-end infeed logic for phase
segregated communication ZC1WPSCH ......................................637
Introduction................................................................................637
Current reversal logic ..........................................................637
Function block...........................................................................639
Technical data...........................................................................641
Section 14 Logic.............................................................................643
Tripping logic SMPPTRC ...............................................................643
Introduction................................................................................643
Logic diagram.......................................................................645
Function block...........................................................................649
Technical data...........................................................................651
Trip matrix logic TMAGGIO............................................................651
Introduction................................................................................651
Function block...........................................................................653
Configurable logic blocks................................................................655
Table of contents
18
Introduction................................................................................655
Inverter function block INV........................................................655
OR function block OR................................................................656
AND function block AND...........................................................657
Timer function block TIMER......................................................657
Pulse timer function block PULSETIMER..................................658
Exclusive OR function block XOR.............................................658
Loop delay function block LOOPDELAY...................................659
Set-reset with memory function block SRMEMORY.................659
Controllable gate function block GATE......................................660
Settable timer function block TIMERSET..................................661
Technical data...........................................................................662
Fixed signal function block FXDSIGN............................................662
Function block...........................................................................663
Boolean 16 to Integer conversion B16I..........................................663
Introduction................................................................................663
Function block...........................................................................664
Boolean 16 to Integer conversion with logic node
representation B16IGGIO...............................................................665
Introduction................................................................................665
Function block...........................................................................666
Integer to Boolean 16 conversion IB16..........................................667
Introduction................................................................................667
Function block...........................................................................667
Integer to Boolean 16 conversion with logic node
representation IB16GGIO...............................................................668
Introduction................................................................................669
Function block...........................................................................669
Table of contents
19
Section 15 Monitoring.....................................................................671
Measurements................................................................................671
Introduction................................................................................672
Measurement supervision....................................................673
Measurements CVMMXU.....................................................677
Phase current measurement CMMXU.................................682
Phase-phase and phase-neutral voltage measurements
VMMXU, VNMMXU..............................................................683
Voltage and current sequence measurements VMSQI,
CMSQI..................................................................................683
Function block...........................................................................683
Technical data...........................................................................701
Event counter CNTGGIO................................................................702
Introduction................................................................................702
Reporting..............................................................................702
Design..................................................................................703
Function block...........................................................................703
Input signals..............................................................................703
Technical data...........................................................................704
Event function EVENT....................................................................704
Introduction................................................................................704
Function block...........................................................................706
Logical signal status report BINSTATREP.....................................709
Introduction................................................................................709
Function block...........................................................................710
Fault locator LMBRFLO..................................................................711
Introduction................................................................................712
Measuring Principle..............................................................713
Accurate algorithm for measurement of distance to fault.....713
The non-compensated impedance model............................717
IEC 60870-5-103..................................................................718
Table of contents
20
Function block...........................................................................718
Technical data...........................................................................720
Measured value expander block RANGE_XP................................720
Introduction................................................................................720
Function block...........................................................................721
Disturbance report DRPRDRE.......................................................721
Introduction................................................................................722
Function block...........................................................................729
Technical data...........................................................................742
Event list.........................................................................................742
Introduction................................................................................742
Function block...........................................................................743
Input signals..............................................................................743
Technical data...........................................................................743
Indications......................................................................................743
Introduction................................................................................743
Function block...........................................................................745
Input signals..............................................................................745
Technical data...........................................................................745
Event recorder ...............................................................................745
Introduction................................................................................745
Function block...........................................................................746
Input signals..............................................................................746
Technical data...........................................................................746
Trip value recorder.........................................................................746
Introduction................................................................................746
Function block...........................................................................747
Input signals..............................................................................747
Technical data...........................................................................748
Disturbance recorder......................................................................748
Introduction................................................................................748
Table of contents
21
Memory and storage............................................................749
IEC 60870-5-103..................................................................750
Function block...........................................................................751
Technical data...........................................................................751
Section 16 Metering.......................................................................753
Pulse-counter logic PCGGIO..........................................................753
Introduction................................................................................753
Function block...........................................................................755
Technical data...........................................................................757
Function for energy calculation and demand handling
ETPMMTR......................................................................................757
Introduction................................................................................757
Function block...........................................................................758
Section 17 Station communication.................................................761
Overview.........................................................................................761
IEC 61850-8-1 communication protocol.........................................761
Introduction................................................................................761
IEC 61850 generic communication I/O functions SPGGIO,
SP16GGIO................................................................................761
Introduction...........................................................................762
Function block......................................................................762
IEC 61850 generic communication I/O functions MVGGIO.......763
Function block......................................................................764
Technical data...........................................................................765
IEC 61850-9-2LE communication protocol.....................................765
Introduction................................................................................765
Table of contents
22
Function block...........................................................................767
Output signals............................................................................768
Technical data...........................................................................769
LON communication protocol.........................................................769
Introduction................................................................................769
Technical data...........................................................................787
SPA communication protocol.........................................................787
Introduction................................................................................787
Communication ports...........................................................795
Design.......................................................................................795
Technical data...........................................................................796
IEC 60870-5-103 communication protocol.....................................796
Introduction................................................................................796
General.................................................................................796
Communication ports...........................................................806
Function block...........................................................................806
Technical data...........................................................................816
Horizontal communication via GOOSE for interlocking
GOOSEINTLKRCV.........................................................................817
Function block...........................................................................817
Goose binary receive GOOSEBINRCV..........................................820
Function block...........................................................................820
Multiple command and transmit MULTICMDRCV,
MULTICMDSND.............................................................................821
Introduction................................................................................822
Design.......................................................................................822
General.................................................................................822
Function block...........................................................................823
Table of contents
23
Section 18 Remote communication................................................827
Binary signal transfer......................................................................827
Introduction................................................................................827
Function block...........................................................................829
Transmission of analog data from LDCM LDCMTransmit..............833
Function block...........................................................................833
Section 19 Hardware......................................................................835
Overview.........................................................................................835
Variants of case and local HMI display size..............................835
Case from the rear side.............................................................838
Hardware modules.........................................................................843
Overview....................................................................................843
Combined backplane module (CBM).........................................844
Introduction...........................................................................844
Functionality.........................................................................844
Design..................................................................................844
Universal backplane module (UBM)..........................................846
Introduction...........................................................................846
Functionality.........................................................................846
Design..................................................................................846
Numeric processing module (NUM)..........................................848
Introduction...........................................................................848
Functionality.........................................................................849
Block diagram.......................................................................850
Power supply module (PSM).....................................................850
Introduction...........................................................................850
Design..................................................................................850
Technical data......................................................................851
Local human-machine interface (Local HMI).............................851
Transformer input module (TRM)..............................................851
Introduction...........................................................................852
Design..................................................................................852
Technical data......................................................................852
Analog digital conversion module, with time
synchronization (ADM) .............................................................853
Introduction...........................................................................853
Design..................................................................................853
Binary input module (BIM).........................................................855
Table of contents
24
Introduction...........................................................................855
Design..................................................................................855
Technical data......................................................................859
Binary output modules (BOM)...................................................859
Introduction...........................................................................859
Design..................................................................................859
Technical data......................................................................861
Static binary output module (SOM)...........................................862
Introduction...........................................................................862
Design..................................................................................862
Technical data......................................................................864
Binary input/output module (IOM)..............................................865
Introduction...........................................................................865
Design..................................................................................866
Technical data......................................................................868
mA input module (MIM).............................................................869
Introduction...........................................................................869
Design..................................................................................869
Technical data......................................................................870
Serial and LON communication module (SLM) ........................871
Introduction...........................................................................871
Design..................................................................................871
Technical data......................................................................872
Galvanic RS485 communication module...................................873
Introduction...........................................................................873
Design..................................................................................873
Technical data......................................................................875
Optical ethernet module (OEM).................................................875
Introduction...........................................................................875
Functionality.........................................................................875
Design..................................................................................875
Technical data......................................................................876
Line data communication module (LDCM)................................876
Introduction...........................................................................876
Design..................................................................................877
Technical data......................................................................878
Galvanic X.21 line data communication (X.21-LDCM)..............879
Introduction...........................................................................879
Design..................................................................................879
Functionality.........................................................................881
Technical data......................................................................882
GPS time synchronization module (GSM).................................882
Introduction...........................................................................882
Table of contents
25
Design..................................................................................882
Technical data......................................................................884
GPS antenna.............................................................................885
Introduction...........................................................................885
Design..................................................................................885
Technical data......................................................................886
IRIG-B time synchronization module IRIG-B.............................887
Introduction...........................................................................887
Design..................................................................................887
Technical data......................................................................888
Dimensions.....................................................................................889
Case without rear cover.............................................................889
Case with rear cover..................................................................891
Flush mounting dimensions.......................................................893
Side-by-side flush mounting dimensions...................................894
Wall mounting dimensions.........................................................895
External resistor unit for high impedance differential
protection...................................................................................895
Mounting alternatives.....................................................................896
Flush mounting..........................................................................896
Overview..............................................................................896
Mounting procedure for flush mounting................................898
19 panel rack mounting............................................................899
Overview..............................................................................899
Mounting procedure for 19 panel rack mounting.................900
Wall mounting............................................................................900
Overview..............................................................................900
Mounting procedure for wall mounting.................................901
How to reach the rear side of the IED..................................902
Side-by-side 19 rack mounting.................................................902
Overview..............................................................................902
Mounting procedure for side-by-side rack mounting............903
IED in the 670 series mounted with a RHGS6 case.............903
Side-by-side flush mounting......................................................904
Overview..............................................................................904
Mounting procedure for side-by-side flush mounting...........905
Technical data................................................................................905
Enclosure...................................................................................905
Connection system....................................................................906
Influencing factors.....................................................................906
Type tests according to standard..............................................907
Section 20 Labels...........................................................................911
Different labels................................................................................911
Table of contents
26
Section 21 Connection diagrams...................................................915
Section 22 Inverse time characteristics..........................................931
Application......................................................................................931
Principle of operation......................................................................934
Mode of operation......................................................................934
Inverse characteristics....................................................................939
Section 23 Glossary.......................................................................965
Table of contents
27
28
Section 1 Introduction
About this chapter
This chapter explains concepts and conventions used in this manual and provides
information necessary to understand the contents of the manual.
1.1 Introduction to the technical reference manual
1.1.1 About the complete set of manuals for an IED
The users manual (UM) is a complete set of five different manuals:
IEC09000744-1-en.vsd
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Application manual
Operators manual
Installation and
Engineeringmanual
Commissioning manual
manual
Technical reference
IEC09000744 V1 EN
The Application Manual (AM) contains application descriptions, setting
guidelines and setting parameters sorted per function. The application manual
should be used to find out when and for what purpose a typical protection function
could be used. The manual should also be used when calculating settings.
The Technical Reference Manual (TRM) contains application and functionality
descriptions and it lists function blocks, logic diagrams, input and output signals,
setting parameters and technical data sorted per function. The technical reference
1MRK506275-UEN C Section 1
Introduction
29
manual should be used as a technical reference during the engineering phase,
installation and commissioning phase, and during normal service.
The Installation and Commissioning Manual (ICM) contains instructions on
how to install and commission the protection IED. The manual can also be used as
a reference during periodic testing. The manual covers procedures for mechanical
and electrical installation, energizing and checking of external circuitry, setting and
configuration as well as verifying settings and performing directional tests. The
chapters are organized in the chronological order (indicated by chapter/section
numbers) in which the protection IED should be installed and commissioned.
The Operators Manual (OM) contains instructions on how to operate the
protection IED during normal service once it has been commissioned. The
operators manual can be used to find out how to handle disturbances or how to
view calculated and measured network data in order to determine the cause of a fault.
The Engineering Manual (EM) contains instructions on how to engineer the IEDs
using the different tools in PCM600. The manual provides instructions on how to
set up a PCM600 project and insert IEDs to the project structure. The manual also
recommends a sequence for engineering of protection and control functions, LHMI
functions as well as communication engineering for IEC 61850 and DNP3.
1.1.2 About the technical reference manual
The following chapters are included in the technical reference manual.
Local HMI describes the control panel on the IED and explains display
characteristics, control keys and various local HMI features.
Basic IED functions presents functions for all protection types that are
included in all IEDs, for example, time synchronization, self supervision with
event list, test mode and other general functions.
Impedance protection describes functions for distance zones with their
quadrilateral characteristics, phase selection with load encroachment, power
swing detection and similar.
Current protection describes functions, for example, over current protection,
breaker failure protection and pole discordance.
Voltage protection describes functions for under voltage and over voltage
protection and residual over voltage protection.
Frequency protection describes functions for over frequency, under frequency
and rate of change of frequency protection.
Multipurpose protection describes the general protection function for current
and voltage.
Secondary system supervision describes current based functions for current
circuit supervision and fuse failure supervision.
Control describes control functions, for example, synchronization and
energizing check and other product specific functions.
Scheme communication describes functions related to current reversal and
weak end infeed logic.
Logic describes trip logic and related functions.
Section 1 1MRK506275-UEN C
Introduction
30
Monitoring describes measurement related functions that are used to provide
data regarding relevant quantities, events and faults, for example.
Metering describes pulse counter logic.
Station communication describes Ethernet based communication in general,
including the use of IEC 61850 and horizontal communication via GOOSE.
Remote communication describes binary and analog signal transfer, and the
associated hardware.
Hardware describes the IED and its components.
Connection diagrams provides terminal wiring diagrams and information
regarding connections to and from the IED.
Inverse time characteristics describes and explains inverse time delay, inverse
time curves and their effects.
Glossary is a list of terms, acronyms and abbreviations used in ABB technical
documentation.
1.1.3 This manual
The description of each IED related function follows the same structure (where
applicable). The different sections are outlined below.
1.1.3.1 Introduction
Outlines the implementation of a particular protection function.
1.1.3.2 Principle of operation
Describes how the function works, presents a general background to algorithms
and measurement techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered
by dashed lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two
dashes. The first group consists of up to four letters and presents the abbreviated
name for the corresponding function. The second group presents the functionality
of the particular signal. According to this explanation, the meaning of the signal
BLKTR in figure 4 is as follows:
BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed.
Introduction
31
Input and output signals
In a logic diagram, input and output signal paths are shown as a lines that touch the
outer border of the diagram.
Input and output signals can be configured using the ACT tool. They can be
connected to the inputs and outputs of other functions and to binary inputs and
outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples
output signals are TRIP, START, STL1, STL2, STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting
parameter signals. These parameters can only be set via the PST or LHMI. Their
values are high (1) only when the corresponding setting parameter is set to the
symbolic value specified within the frame. Example is the signal Block TUV=Yes.
Their logical values correspond automatically to the selected setting value.
Internal signals
Internal signals are illustrated graphically and end approximately 2 mm from the
frame edge. If an internal signal path cannot be drawn with a continuous line, the
suffix -int is added to the signal name to indicate where the signal starts and
continues, see figure 1.
TEST
Block TUV=Yes
STUL1N
STUL2N
STUL3N
&
>1 &
TEST
>1
&
&
&
xx04000375.vsd
t
BLKTR
BLOCK
VTSU
TRIP
START
STL1
STL2
STL3
BLOCK-int.
BLOCK-int.
BLOCK-int.
BLOCK-int.
IEC04000375 V1 EN
Figure 1: Logic diagram example with -int signals
Introduction
32
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram
have the suffix -cont., see figure 2 and figure 3.
&
&
&
&
&
&
STCND
STNDL1L2-cont.
STNDL2L3-cont.
STNDL3L1-cont.
STNDL1N-cont.
STNDL2N-cont.
STNDL3N-cont.
STZMPP-cont.
STNDPE-cont.
&
1--BLOCK
1--VTSZ
1--STND
BLK-cont.
>1
>1
>1
>1
xx04000376.vsd
1L1L2
1L2L3
1L3L1
1L1N
1L2N
1L3N
IEC04000376 V1 EN
Figure 2: Logic diagram example with an outgoing -cont signal
xx04000377.vsd
STNDL1N-cont.
STNDL3N-cont.
STNDL1L2-cont.
STNDL2L3-cont.
STNDL3L1-cont.
>1
>1
>1
>1
&
&
&
&
BLK-cont.
t
15 ms
t
15 ms
t
15 ms
t
15 ms
START
STL3
STL2
STL1
STNDL2N-cont.
IEC04000377 V1 EN
Figure 3: Logic diagram example with an incoming -cont signal
Introduction
33
1.1.3.3 Input and output signals
Input and output signals are presented in two separate tables. Each table consists of
two columns. The first column contains the name of the signal and the second
column contains the description of the signal.
1.1.3.4 Function block
Each function block is illustrated graphically.
Input signals are always on the left hand side and output signals on the right hand
side. Settings are not displayed. Special kinds of settings are sometimes available.
These are supposed to be connected to constants in the configuration scheme and
are therefore depicted as inputs. Such signals will be found in the signal list but
described in the settings table.
The ^ character in front of an input or output signal name in the function block
symbol given for a function, indicates that the user can set a signal name of
their own in PCM600.
The * character after an input or output signal name in the function block
symbol given for a function, indicates that the signal must be connected to
another function block in the application configuration to achieve a valid
application configuration.
en05000511-1-en.vsd
IEC 61850 - 8 -1
Logical Node
Outputs Inputs
Diagram
Number
Mandatory
signal (*)
PCGGIO
BLOCK
READ_VAL
BI_PULSE*
RS_CNT
INVALID
RESTART
BLOCKED
NEW_VAL
^SCAL_VAL
User defined
name (^)
IEC05000511 V2 EN
Figure 4: Example of a function block
1.1.3.5 Setting parameters
These are presented in tables and include all parameters associated with the
function in question.
Introduction
34
1.1.3.6 Technical data
The technical data section provides specific technical information about the
function or hardware described.
1.1.4 Intended audience
General
This manual addresses system engineers, installation and commissioning
personnel, who use technical data during engineering, installation and
commissioning, and in normal service.
Requirements
The system engineer must have a thorough knowledge of protection systems,
protection equipment, protection functions and the configured functional logics in
the protective devices. The installation and commissioning personnel must have a
basic knowledge in the handling electronic equipment.
1.1.5 Related documents
Documents related to REL670 Identity number
Operators manual 1MRK 506 276-UEN
Installation and commissioning manual 1MRK 506 277-UEN
Technical reference manual 1MRK 506 275-UEN
Application manual 1MRK 506 278-UEN
Buyers guide 1MRK 506 280-BEN
Sample specification SA2005-001282
Connection diagram, Single breaker arr. Three phase tripping arr. 1MRK 002 801-BA
Connection diagram, Single breaker arr. Single phase tripping arr. 1MRK 002 801-CA
Connection diagram, Multi breaker arr. Three phase tripping arr. 1MRK 002 801-DA
Connection diagram, Multi breaker arr. Single phase tripping arr. 1MRK 002 801-EA
Configuration diagram A, Single breaker with single or double busbar, 3 pole tripping (A31) 1MRK 004 500-86
Configuration diagram B, Single breaker with single or double busbar, 1/3 pole tripping (A32) 1MRK 004 500-87
Configuration diagram C, Multi breaker such as 1 1/2 or ring busbar arr. 3 pole tripping (B31) 1MRK 004 500-88
Configuration diagram D, Multi breaker such as 1 1/2 or ring busbar arr. 1/3 pole tripping (B32) 1MRK 004 500-89
Setting example 1, 400 kV Long overhead power line with 1 1/2 CB arr. Quadrilaterial characteristic. 1MRK 506 267-WEN
Setting example 2, Setting example 1, 400 kV Long overhead power line with 1 1/2 CB arr. Mho characteristic. 1MRK 506 291-WEN
Setting example 3, 230 kV Extremely long overhead power line, double bus, single CB arr. Quadrilaterial
characteristic.
1MRK 506 268-WEN
Setting example 4, 230 kV Extremely long overhead power line, double bus, single CB arr. Mho characteristic. 1MRK 506 292-WEN
Setting example 5, 132 kV Short overhead power line, double bus, single CB arr. Quadrilaterial characteristic. 1MRK 506 269-WEN
Setting example 6, 132 kV Short overhead power line, double bus, single CB arr. Mho characteristic. 1MRK 506 290-WEN
Setting example 7, 70 kV power line on a resonance earth system. Double bus, single breaker arrangement. 1MRK 506 293-WEN
Setting example 8, 400 kV long series compensated line. 1 1/2 breaker arrangement. 1MRK 506 294-WEN
Introduction
35
Connection and Installation components 1MRK 513 003-BEN
Test system, COMBITEST 1MRK 512 001-BEN
Accessories for IED 670 1MRK 514 012-BEN
Getting started guide IED 670 1MRK 500 080-UEN
SPA and LON signal list for IED 670, ver. 1.1 1MRK 500 083-WEN
IEC 61850 Data objects list for IED 670, ver. 1.1 1MRK 500 084-WEN
Generic IEC 61850 IED Connectivity package 1KHA001027-UEN
Protection and Control IED Manager PCM 600 Installation sheet 1MRS755552
Engineering guide IED 670 products 1MRK 511 179-UEN
More information can be found on www.abb.com/substationautomation.
1.1.6 Revision notes
Revision Description
C No functionality added. Changes made in content due to problem reports.
Introduction
36
Section 2 Analog inputs
2.1 Introduction
Analog input channels must be configured and set properly to get correct
measurement results and correct protection operations. For power measuring and
all directional and differential functions the directions of the input currents must be
defined properly. Measuring and protection algorithms in the IED use primary
system quantities. Set values are done in primary quantities as well and it is
important to set the data about the connected current and voltage transformers
properly.
A reference PhaseAngleRef can be defined to facilitate service values reading. This
analog channels phase angle will always be fixed to zero degree and all other angle
information will be shown in relation to this analog input. During testing and
commissioning of the IED the reference channel can be changed to facilitate testing
and service values reading.
The IED has the ability to receive analog values from primary
equipment, that are sampled by Merging units (MU) connected to a
process bus, via the IEC 61850-9-2 LE protocol.
The availability of VT inputs depends on the ordered transformer
input module (TRM) type.
2.2 Operation principle
The direction of a current to the IED depends on the connection of the CT. The
main CTs are typically star connected and can be connected with the star point to
the object or from the object. This information must be set to the IED.
Directional conventions for current or power, for example
Positive value of current or power means quantity direction into the object.
Negative value of current or power means quantity direction out from the object.
Directional conventions for directional functions (see figure 5)
Analog inputs
37
Forward means direction into the object.
Reverse means direction out from the object.
Protected Object
Line, transformer, etc
Forward Reverse
Definition of direction
for directional functions
Measured quantity is
positive when flowing
towards the object
e.g. P, Q, I
Reverse Forward
Definition of direction
for directional functions
e.g. P, Q, I
Measured quantity is
positive when flowing
towards the object
Set parameter
CTStarPoint
Correct Setting is
"ToObject"
Set parameter
CTStarPoint
Correct Setting is
"FromObject"

en05000456.vsd
IEC05000456 V1 EN
Figure 5: Internal convention of the directionality in the IED
The correct setting of the primary CT direction
CTStarPoint is set to FromObject or ToObject.
Positive quantities flow towards the object.
Direction is defined as Forward and looks towards the object.
The ratios of the main CTs and VTs must be known to use primary system
quantities for settings and calculation in the IED, The user has to set the rated
secondary and primary currents and voltages of the CTs and VTs to provide the
IED with this information.
The CT and VT ratio and the name on respective channel is done under Main
menu/General settings/Analog module in the Parameter Settings tool.
2.3 Function block
The function blocks are not represented in the configuration tool.
The signals appear only in the SMT tool when a TRM is included in
the configuration with the function selector tool. In the SMT tool
they can be mapped to the desired virtual input (SMAI) of the IED
and used internally in the configuration.
Analog inputs
38
2.4 Setting parameters
Dependent on ordered IED type.
Table 1: AISVBAS Non group settings (basic)
Name Values (Range) Unit Step Default Description
PhaseAngleRef TRM40-Ch1
TRM40-Ch2
TRM40-Ch3
TRM40-Ch4
TRM40-Ch5
TRM40-Ch6
TRM40-Ch7
TRM40-Ch8
TRM40-Ch9
TRM40-Ch10
TRM40-Ch11
TRM40-Ch12
TRM41-Ch1
TRM41-Ch2
TRM41-Ch3
TRM41-Ch4
TRM41-Ch5
TRM41-Ch6
TRM41-Ch7
TRM41-Ch8
TRM41-Ch9
TRM41-Ch10
TRM41-Ch11
TRM41-Ch12
MU1-L1I
MU1-L2I
MU1-L3I
MU1-L4I
MU1-L1U
MU1-L2U
MU1-L3U
MU1-L4U
MU2-L1I
MU2-L2I
MU2-L3I
MU2-L4I
MU2-L1U
MU2-L2U
MU2-L3U
MU2-L4U
MU3-L1I
MU3-L2I
MU3-L3I
MU3-L4I
MU3-L1U
MU3-L2U
MU3-L3U
MU3-L4U
- - TRM40-Ch1 Reference channel for phase angle
presentation
Analog inputs
39
Table 2: TRM_6I_6U Non group settings (basic)
CTStarPoint1 FromObject
ToObject
- - ToObject ToObject= towards protected object,
FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
ToObject
ToObject
ToObject
ToObject
ToObject
VTsec7 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim7 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
Analog inputs
40
Table 3: TRM_6I Non group settings (basic)
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
Table continues on next page
Analog inputs
41
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
ToObject
Analog inputs
42
ToObject
ToObject
ToObject
ToObject
ToObject
Analog inputs
43
44
Section 3 Local HMI
About this chapter
This chapter describes the structure and use of local HMI, which is the control
panel at the IED.
3.1 Human machine interface
The local human machine interface is available in a small and a medium sized
model. The difference between the two models is the size of the LCD. The small
size LCD can display seven lines of text and the medium size LCD can display the
single line diagram with up to 15 objects on each page. Up to 12 single line
diagram pages can be defined, depending on the product capability.
The local HMI is divided into zones with different functionality.
Status indication LEDs.
Alarm indication LEDs, which consist of 15 LEDs (6 red and 9 yellow) with
user printable label. All LEDs are configurable from PCM600.
Liquid crystal display (LCD).
Keypad with push buttons for control and navigation purposes, switch for
selection between local and remote control and reset.
Isolated RJ45 communication port.
Local HMI
45
IEC05000055-LITEN V1 EN
Figure 6: Small, alpha numeric HMI
IEC05000056-LITEN V1 EN
Figure 7: Medium graphic HMI, 15 controllable objects
Local HMI
46
3.2 Small size HMI
3.2.1 Small
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19 case. The LCD on the
small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per
line. The first line displays the product name and the last line displays date and
time. The remaining 5 lines are dynamic. This LCD has no graphic display potential.
3.2.2 Design
The local HMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of
the small local HMI are shown in figure 8
Local HMI
47
1 2 3
4
5
6
7 8
en05000055.eps
IEC05000055-CALLOUT V1 EN
Figure 8: Small graphic HMI
1 Status indication LEDs
2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
Local HMI
48
3.3 Medium size graphic HMI
3.3.1 Medium
The following case sizes can be equipped with the medium size LCD:
1/2 x 19
3/4 x 19
1/1 x 19
This is a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28
lines with up to 40 characters per line. To display the single line diagram, this LCD
is required.
3.3.2 Design
The different parts of the medium size local HMI are shown in figure 9. The local
HMI exists in an IEC version and in an ANSI version. The difference is on the
keypad operation buttons and the yellow LED designation.
Local HMI
49
1 2 3
4
5
6
7 8
en05000056.eps
IEC05000056-CALLOUT V1 EN
Figure 9: Medium size graphic HMI
1 Status indication LEDs
2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
Local HMI
50
3.4 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look
and feel in all IEDs. LCD screens and other details may differ but the way the keys
function is identical.
IEC05000153 V1 EN
Figure 10: The HMI keypad.
Table 6 describes the HMI keys that are used to operate the IED.
Table 6: HMI keys on the front of the IED
Key Function
IEC05000101 V1 EN

Press to close or energize a breaker or disconnector.
IEC05000102 V1 EN

Press to open a breaker or disconnector.
IEC05000103 V1 EN

Press to open two sub menus: Key operation and IED information.
IEC05000104 V1 EN

Press to clear entries, cancel commands or edit.
IEC05000105 V1 EN

Press to open the main menu and to move to the default screen.
IEC05000106 V1 EN

Press to set the IED in local or remote control mode.
IEC05000107 V1 EN

Press to open the reset screen.
IEC05000108 V1 EN

Press to start the editing mode and confirm setting changes, when in editing mode.
Local HMI
51
Key Function
IEC05000109 V1 EN

Press to navigate forward between screens and move right in editing mode.
IEC05000110 V1 EN

Press to navigate backwards between screens and move left in editing mode.
IEC05000111 V1 EN

Press to move up in the single line diagram and in the menu tree.
IEC05000112 V1 EN

Press to move down in the single line diagram and in the menu tree.
3.5 LED
3.5.1 Introduction
The LED module is a unidirectional means of communicating. This means that
events may occur that activate a LED in order to draw the operators attention to
something that has occurred and needs some sort of action.
3.5.2 Status indication LEDs
The three LEDs above the LCD provide information as shown in the table below.
LED Indication Information
Green:
Steady In service
Flashing Internal failure
Dark No power supply
Yellow:
Steady Dist. rep. triggered
Flashing Terminal in test mode
Red:
Steady Trip command issued
3.5.3 Indication LEDs
The LED indication module comprising 15 LEDs is standard in 670 series. Its main
purpose is to present an immediate visual information for protection indications or
alarm signals.
Local HMI
52
Alarm indication LEDs and hardware associated LEDs are located on the right
hand side of the front panel. Alarm LEDs are located on the right of the LCD
screen and show steady or flashing light.
Steady light indicates normal operation.
Flashing light indicates alarm.
Alarm LEDs can be configured in PCM600 and depend on the binary logic.
Therefore they can not be configured on the local HMI.
Typical examples of alarm LEDs
Bay controller failure
CB close blocked
Interlocking bypassed
SF6 Gas refill
Position error
CB spring charge alarm
Oil temperature alarm
Thermal overload trip
The RJ45 port has a yellow LED indicating that communication has been
established between the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or
remote control of the IED is active.
3.6 Local HMI related functions
3.6.1 Introduction
The local HMI can be adapted to the application configuration and to user preferences.
Function block LocalHMI
Function block LEDGEN
Setting parameters
Local HMI
53
3.6.2 General setting parameters
Table 7: SCREEN Non group settings (basic)
Language English
OptionalLanguage
- - English Local HMI language
DisplayTimeout 10 - 120 Min 10 60 Local HMI display timeout
AutoRepeat Off
On
- - On Activation of auto-repeat (On) or not (Off)
ContrastLevel -10 - 20 % 1 0 Contrast level for display
DefaultScreen 0 - 0 - 1 0 Default screen
EvListSrtOrder Latest on top
Oldest on top
- - Latest on top Sort order of event list
SymbolFont IEC
ANSI
- - IEC Symbol font for Single Line Diagram
3.6.3 Status indication LEDs
3.6.3.1 Design
The function block LocalHMI controls and supplies information about the status of
the status indication LEDs. The input and output signals of local HMI are
configured with PCM600.
The function block can be used if any of the signals are required in a configuration
logic.
See section "Status indication LEDs" for information about the LEDs.
LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
IEC05000773 V2 EN
Figure 11: LocalHMI function block
Table 8: LocalHMI Input signals
Name Type Default Description
CLRLEDS BOOLEAN 0 Input to clear the LCD-HMI LEDs
Local HMI
54
Table 9: LocalHMI Output signals
Name Type Description
HMI-ON BOOLEAN Backlight of the LCD display is active
RED-S BOOLEAN Red LED on the LCD-HMI is steady
YELLOW-S BOOLEAN Yellow LED on the LCD-HMI is steady
YELLOW-F BOOLEAN Yellow LED on the LCD-HMI is flashing
CLRPULSE BOOLEAN A pulse is provided when the LEDs on the LCD-
HMI are cleared
LEDSCLRD BOOLEAN Active when the LEDs on the LCD-HMI are not
active
3.6.4 Indication LEDs
The function block LEDGEN controls and supplies information about the status of
the indication LEDs. The input and output signals of LEDGEN are configured with
PCM600. The input signal for each LED is selected individually with the Signal
Matrix Tool in PCM600.
LEDs (number 16) for trip indications are red.
LEDs (number 715) for start indications are yellow.
Each indication LED on the local HMI can be set individually to operate in six
different sequences
Two sequences operate as follow type.
Four sequences operate as latch type.
Two of the latching sequence types are intended to be used as a
protection indication system, either in collecting or restarting mode, with
reset functionality.
Two of the latching sequence types are intended to be used as signaling
system in collecting (coll) mode with an acknowledgment functionality.
The light from the LEDs can be steady (-S) or flashing (-F). See the technical
reference manual for more information.
3.6.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in
some of the modes of LEDGEN. The latest LED picture appears immediately after
the IED is successfully restarted.
Operating modes
Collecting mode
Local HMI
55
LEDs which are used in collecting mode of operation are accumulated
continuously until the unit is acknowledged manually. This mode is
suitable when the LEDs are used as a simplified alarm system.
Re-starting mode
In the re-starting mode of operation each new start resets all previous
active LEDs and activates only those which appear during one
disturbance. Only LEDs defined for re-starting mode with the latched
sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a
new disturbance. A disturbance is defined to end a settable time after the
reset of the activated input signals or when the maximum time limit has
elapsed.
Acknowledgment/reset
From local HMI
Active indications can be acknowledged or reset manually. Manual
acknowledgment and manual reset have the same meaning and is a
common signal for all the operating sequences and LEDs. The function
is positive edge triggered, not level triggered. The acknowledged or reset
is performed via the reset button and menus on the local HMI. See the
operator's manual for more information.
From function input
Active indications can also be acknowledged or reset from an input,
RESET, to the function. This input can, for example, be configured to a
binary input operated from an external push button. The function is
positive edge triggered, not level triggered. This means that even if the
button is continuously pressed, the acknowledgment or reset only affects
indications active at the moment when the button is first pressed.
Automatic reset
Automatic reset can only be performed for indications defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S). When
automatic reset of the LEDs has been performed, still persisting
indications will be indicated with a steady light.
Operating sequences
The operating sequences can be of type Follow or Latched.
For the Follow type the LED follows the input signal completely.
For the Latched type each LED latches to the corresponding input signal until
it is reset.
Local HMI
56
Figure 12 show the function of available sequences that are selectable for each
LED separately.
The acknowledgment or reset function is not applicable for sequence 1 and 2
(Follow type).
Sequence 3 and 4 (Latched type with acknowledgement) are only working in
collecting mode.
Sequence 5 is working according to Latched type and collecting mode.
Sequence 6 is working according to Latched type and re-starting mode.
The letters S and F in the sequence names have the meaning S = Steady and F =
Flashing.
At the activation of the input signal, the indication operates according to the
selected sequence diagrams.
In the sequence diagrams the LEDs have the characteristics as shown in figure 12.
en05000506.vsd
= No indication = Steady light = Flash
IEC05000506 V1 EN
Figure 12: Symbols used in the sequence diagrams
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input
signals. It does not react on acknowledgment or reset. Every LED is independent of
the other LEDs in its operation.
Activating
signal
LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN
Figure 13: Operating sequence 1 (Follow-S)
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing
instead of showing steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is
independent of the other LEDs in its operation. At the activation of the input signal,
the indication starts flashing. After acknowledgment the indication disappears if
Local HMI
57
the signal is not present any more. If the signal is still present after
acknowledgment it gets a steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
IEC01000231 V1 EN
Figure 14: Operating sequence 3 (LatchedAck-F-S)
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing
light have been alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the
activation of the input signal, the indication will light up with a steady light. The
difference to sequence 3 and 4 is that indications that are still activated will not be
affected by the reset that is, immediately after the positive edge of the reset has
been executed a new reading and storing of active signals is performed. Every LED
is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
IEC01000235 V2 EN
Figure 15: Operating sequence 5 (LatchedColl-S)
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other
LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still
activated will not be affected by manual reset, that is, immediately after the
positive edge of that the manual reset has been executed a new reading and storing
Local HMI
58
of active signals is performed. LEDs set for sequence 6 are completely independent
in its operation of LEDs set for other sequences.
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is
activated until a settable time, tRestart, has elapsed after that all activating signals
for the LEDs set as LatchedReset-S have reset. However if all activating signals
have reset and some signal again becomes active before tRestart has elapsed, the
tRestart timer does not restart the timing sequence. A new disturbance start will be
issued first when all signals have reset after tRestart has elapsed. A diagram of this
functionality is shown in figure 16.
1
&
1
New
disturbance
t
tRestart
1
&
&
1
From
disturbance
length control
per LED
set to
sequence 6
en01000237.vsd
IEC01000237 V1 EN
Figure 16: Activation of new disturbance
In order not to have a lock-up of the indications in the case of a persisting signal
each LED is provided with a timer, tMax, after which time the influence on the
definition of a disturbance of that specific LED is inhibited. This functionality is
shown i diagram in figure 17.
Activating signal
t
tMax
AND
To disturbance
length control
To LED
en05000507.vsd
IEC05000507 V1 EN
Figure 17: Length control of activating signals
Timing diagram for sequence 6
Figure 18 shows the timing diagram for two indications within one disturbance.
Local HMI
59
IEC01000239_2-en.vsd
Activating
signal 2
LED 2
Manual
reset
Activating
signal 1
Automatic
reset
LED 1
Disturbance
tRestart
IEC01000239 V2 EN
Figure 18: Operating sequence 6 (LatchedReset-S), two indications within
same disturbance
Figure 19 shows the timing diagram for a new indication after tRestart time has
elapsed.
Activating
signal 2
LED 2
Manual
reset
Activating
signal 1
Automatic
reset
LED 1
Disturbance
tRestart
Disturbance
tRestart
IEC01000240 V2 EN
Figure 19: Operating sequence 6 (LatchedReset-S), two different disturbances
Local HMI
60
Figure 20 shows the timing diagram when a new indication appears after the first
one has reset but before tRestart has elapsed.
Activating
signal 2
LED 2
Manual
reset
Activating
signal 1
Automatic
reset
LED 1
Disturbance
tRestart
IEC01000241 V2 EN
Figure 20: Operating sequence 6 (LatchedReset-S), two indications within
same disturbance but with reset of activating signal between
Figure 21 shows the timing diagram for manual reset.
Activating
signal 2
LED 2
Manual
reset
Activating
signal 1
Automatic
reset
LED 1
Disturbance
tRestart
IEC01000242 V2 EN
Figure 21: Operating sequence 6 (LatchedReset-S), manual reset
Local HMI
61
LEDGEN
BLOCK
RESET
LEDTEST
NEWIND
ACK
IEC05000508 V2 EN
Figure 22: LEDGEN function block
Table 10: LEDGEN Input signals
BLOCK BOOLEAN 0 Input to block the operation of the LED-unit
RESET BOOLEAN 0 Input to acknowledge/reset the indications of the
LED-unit
LEDTEST BOOLEAN 0 Input for external LED test
Table 11: LEDGEN Output signals
NEWIND BOOLEAN A new signal on any of the indication inputs occurs
ACK BOOLEAN A pulse is provided when the LEDs are
acknowledged
Table 12: LEDGEN Non group settings (basic)
Operation Off
On
- - Off Operation mode for the LED function
tRestart 0.0 - 100.0 s 0.1 0.0 Defines the disturbance length
tMax 0.0 - 100.0 s 0.1 0.0 Maximum time for the definition of a
disturbance
SeqTypeLED1 Follow-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
- - Follow-S Sequence type for LED 1
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Local HMI
62
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
- - Follow-S sequence type for LED 8
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Local HMI
63
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Local HMI
64
Section 4 Basic IED functions
About this chapter
This chapter presents functions that are basic to all 670 series IEDs. Typical
functions in this category are time synchronization, self supervision and test mode.
4.1 Authorization
To safeguard the interests of our customers, both the IED and the tools that are
accessing the IED are protected, subject of authorization handling. The concept of
authorization, as it is implemented in the IED and in PCM600 is based on the
following facts:
There are two types of access points to the IED:
local, through the local HMI
remote, through the communication ports
4.1.1 Principle of operation
There are different levels (or types) of users that can access or operate different
areas of the IED and tools functionality. The pre-defined user types are given in
table below.
Be sure that the user logged on to the IED has the access required
when writing particular data to the IED from PCM600.
The meaning of the legends used in the table:
R= Read
W= Write
- = No access rights
Basic IED functions
65
Table 13: Pre-defined user types
Access rights
Guest Super User SPA Guest
System
Operator
Protection
Engineer
Design
Engineer
User
Administrator
Basic setting possibilities (change
setting group, control settings,
limit supervision)
R R/W R R/W R/W R/W R
Advanced setting possibilities (for
example protection settings)
R R/W R R R/W R/W R
Basic control possibilities (process
control, no bypass)
R R/W R/W R/W R/W R/W R
Advanced control possibilities
(process control including interlock
trigg)
R R/W R/W R/W R/W R/W R
Basic command handling (for
example clear LEDs, manual trigg)
R R/W R R/W R/W R/W R
Advanced command handling (for
example clear disturbance record)
R R/W R R R/W R/W R/W
Basic configuration possibilities (I/
O-configuration in SMT)
R R/W R R R R/W R/W
Advanced configuration
possibilities (application
configuration including SMT, GDE
and CMT)
R R/W R R R R/W R/W
File loading (database loading
from XML-file)
- R/W - - - R/W R/W
File dumping (database dumping
to XML-file)
- R/W - - - R/W R/W
File transfer (FTP file transfer) - R/W - R/W R/W R/W R/W
File transfer (limited) (FTP file
transfer)
R R/W R R/W R/W R/W R/W
File Transfer (SPA File Transfer) - R/W - - - R/W -
Database access for normal user R R/W R R/W R/W R/W R/W
User administration (user
management FTP File Transfer)
R R/W R R R R R/W
User administration (user
management SPA File Transfer)
- R/W - - - - -
The IED users can be created, deleted and edited only with the User Management
Tool (UMT) within PCM600. The user can only LogOn or LogOff on the local
HMI on the IED, there are no users, groups or functions that can be defined on
local HMI.
Only characters A - Z, a - z and 0 - 9 should be used in user names
and passwords.
Basic IED functions
66
At least one user must be included in the UserAdministrator group
to be able to write users, created in PCM600, to IED.
4.1.1.1 Authorization handling in the IED
At delivery the default user is the SuperUser. No Log on is required to operate the
IED until a user has been created with the User Management Tool.
Once a user is created and downloaded to the IED, that user can perform a Log on,
introducing the password assigned in the tool.
If there is no user created, an attempt to log on will display a message box: No
user defined!
If one user leaves the IED without logging off, then after the timeout (set in Main
menu/Settings/General Settings/HMI/Screen/Display Timeout) elapses, the IED
returns to Guest state, when only reading is possible. The display time out is set to
60 minutes at delivery.
If there are one or more users created with the User Management Tool and
downloaded into the IED, then, when a user intentionally attempts a Log on or
when the user attempts to perform an operation that is password protected, the Log
on window will appear.
The cursor is focused on the User identity field, so upon pressing the E key, the
user can change the user name, by browsing the list of users, with the up and
down arrows. After choosing the right user name, the user must press the E
key again. When it comes to password, upon pressing the E key, the following
character will show up: $. The user must scroll for every letter in the password.
After all the letters are introduced (passwords are case sensitive) choose OK and
press the E key again.
If everything is alright at a voluntary Log on, the local HMI returns to the
Authorization screen. If the Log on is OK, when required to change for example a
password protected setting, the local HMI returns to the actual setting folder. If the
Log on has failed, then the Log on window opens again, until either the user makes
it right or presses Cancel.
4.2 Self supervision with internal event list
4.2.1 Introduction
Self supervision with internal event list function listens and reacts to internal
system events, generated by the different built-in self-supervision elements. The
internal events are saved in an internal event list.
Basic IED functions
67
The self-supervision operates continuously and includes:
Normal micro-processor watchdog function.
Checking of digitized measuring signals.
Other alarms, for example hardware and time synchronization.
The self-supervision function status can be monitored from the local HMI, from the
Event Viewer in PCM600 or from a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-
supervision function can be reviewed. The information can be found under Main
menu/Diagnostics/Internal events or Main menu/Diagnostics/IED status/
General. The information from the self-supervision function is also available in the
Event Viewer in PCM600.
A self-supervision summary can be obtained by means of the potential free alarm
contact (INTERNAL FAIL) located on the power supply module. The function of
this output relay is an OR-function between the INT-FAIL signal see figure 24 and
a couple of more severe faults that can occur in the IED, see figure 23
IEC04000520 V1 EN
Figure 23: Hardware self-supervision, potential-free alarm contact
Basic IED functions
68
TIMESYNCHERROR
e.g. BIM 1 Error
IO fail
IO stopped
IO started
OR
Set
Reset
OR
e.g. IOM2 Error
e.g. IO (n) Error
OR
OR
Internal
FAIL
Set
Reset
LON ERROR
Watchdog
RTE fatal error
RTE Appl-fail
RTE OK
IEC61850 not ready
RTCERROR
FTF fatal error
RTC OK
TIMESYNCHERROR
Time reset
SYNCH OK
Settings changed
NUMFAIL
Set
Reset
OR
Internal
WARN
Set
Reset
OR
NUMWARNING
OR
1 second pulse
SETCHGD
RTCERROR
en04000519-1.vsd
IEC04000519 V2 EN
Figure 24: Software self-supervision, IES (IntErrorSign) function block
Some signals are available from the INTERRSIG function block. The signals from
this function block are sent as events to the station level of the control system. The
signals from the INTERRSIG function block can also be connected to binary
outputs for signalization via output relays or they can be used as conditions for
other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module
in the Signal Matrix tool. Error signals from time synchronization can be obtained
from the time synchronization block TIME.
4.2.2.1 Internal signals
Self supervision provides several status signals, that tells about the condition of the
IED. As they provide information about the internal status of the IED, they are also
called internal signals. The internal signals can be divided into two groups.
Standard signals are always presented in the IED, see table 14.
Hardware dependent internal signals are collected depending on the hardware
configuration, see table 15.
Explanations of internal signals are listed in table 16.
Basic IED functions
69
Table 14: Self-supervision's standard internal signals
Name of signal Description
FAIL Internal Fail status
WARNING Internal Warning status
NUMFAIL CPU module Fail status
NUMWARNING CPU module Warning status
RTCERROR Real Time Clock status
TIMESYNCHERROR Time Synchronization status
RTEERROR Runtime Execution Error status
IEC61850ERROR IEC 61850 Error status
WATCHDOG SW Watchdog Error status
LMDERROR LON/Mip Device Error status
APPERROR Runtime Application Error status
SETCHGD Settings changed
SETGRPCHGD Setting groups changed
FTFERROR Fault Tolerant Filesystem status
Table 15: Self-supervision's hardware dependent internal signals
Card Name of signal Description
PSM PSM-Error Power Supply Module Error status
ADOne ADOne-Error Analog In Module Error status
BIM BIM-Error Binary In Module Error status
BOM BOM-Error Binary Out Module Error status
IOM IOM-Error In/Out Module Error status
MIM MIM-Error Millampere Input Module Error status
LDCM LDCM-Error Line Differential Communication Error status
Table 16: Explanations of internal signals
Name of signal Reasons for activation
FAIL This signal will be active if one or more of the following internal
signals are active; NUMFAIL, LMDERROR, WATCHDOG,
APPERROR, RTEERROR, FTFERROR, or any of the HW
dependent signals
WARNING This signal will be active if one or more of the following internal
signals are active; RTCERROR, IEC61850ERROR,
TIMESYNCHERROR
NUMFAIL This signal will be active if one or more of the following internal
signals are active; WATCHDOG, APPERROR, RTEERROR,
FTFERROR
NUMWARNING This signal will be active if one or more of the following internal
signals are active; RTCERROR, IEC61850ERROR
RTCERROR This signal will be active when there is a hardware error with the
real time clock.
Basic IED functions
70
Name of signal Reasons for activation
TIMESYNCHERROR This signal will be active when the source of the time
synchronization is lost, or when the time system has to make a
time reset.
RTEERROR This signal will be active if the Runtime Engine failed to do some
actions with the application threads. The actions can be loading
of settings or parameters for components, changing of setting
groups, loading or unloading of application threads.
IEC61850ERROR This signal will be active if the IEC 61850 stack did not succeed
in some actions like reading IEC 61850 configuration, startup,
for example
WATCHDOG This signal will be activated when the terminal has been under
too heavy load for at least 5 minutes. The operating systems
background task is used for the measurements.
LMDERROR LON network interface, MIP/DPS, is in an unrecoverable error
state.
APPERROR This signal will be active if one or more of the application threads
are not in the state that Runtime Engine expects. The states can
be CREATED, INITIALIZED, RUNNING, for example
SETCHGD This signal will generate an Internal Event to the Internal Event
list if any settings are changed.
SETGRPCHGD This signal will generate an Internal Event to the Internal Event
list if any setting groups are changed.
FTFERROR This signal will be active if both the working file and the backup
file are corrupted and can not be recovered.
4.2.2.2 Run-time model
The analog signals to the A/D converter is internally distributed into two different
converters, one with low amplification and one with high amplification, see figure
25.
u1
x2
x1
u1
x2
x1
Adx
Controller Adx_High
Adx_Low
ADx
en05000296-2-en.vsd
IEC05000296 V2 EN
Figure 25: Simplified drawing of A/D converter for the IED.
Basic IED functions
71
The technique to split the analog input signal into two A/D converters with
different amplification makes it possible to supervise the incoming signals under
normal conditions where the signals from the two converters should be identical.
An alarm is given if the signals are out of the boundaries. Another benefit is that it
improves the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller
function. One of the tasks for the controller is to perform a validation of the input
signals. This is done in a validation filter which has mainly two objects: First is the
validation part that checks that the A/D conversion seems to work as expected.
Secondly, the filter chooses which of the two signals that shall be sent to the CPU,
that is the signal that has the most suitable level, the ADx_LO or the 16 times
higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison
of the two channels can be performed. If the validation fails, the CPU will be
informed and an alarm will be given.
The ADx_Controller also supervise other parts of the A/D converter.
4.2.3 Function block
IEC09000787 V1 EN
Figure 26: INTERRSIG function block
4.2.4 Output signals
Table 17: INTERRSIG Output signals
FAIL BOOLEAN Internal fail
WARNING BOOLEAN Internal warning
CPUFAIL BOOLEAN CPU fail
CPUWARN BOOLEAN CPU warning
4.2.5 Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
Basic IED functions
72
4.2.6 Technical data
Table 18: Self supervision with internal event list
Data Value
Recording manner Continuous, event controlled
List size 1000 events, first in-first out
4.3 Time synchronization
4.3.1 Introduction
Use the time synchronization source selector to select a common source of absolute
time for the IED when it is a part of a protection system. This makes comparison of
events and disturbance data between all IEDs in a station automation system
possible. A common source shall be used for IED and merging unit when IEC
61850-9-2LE process bus communication is used.
Micro SCADA OPC server should not be used as a time
synchronization source.
4.3.2.1 General concepts
Time definitions
The error of a clock is the difference between the actual time of the clock, and the
time the clock is intended to have. The rate accuracy of a clock is normally called
the clock accuracy and means how much the error increases, that is how much the
clock gains or loses time. A disciplined (trained) clock knows its own faults and
tries to compensate for them.
Design of the time system (clock synchronization)
The time system is based on a software clock, which can be adjusted from external
time sources and a hardware clock. The protection and control modules will be
timed from a hardware clock, which runs independently from the software clock.
See figure 27.
Basic IED functions
73
SW-time
Time-
Regulator
(fast or slow)
Time tagging and general synchronisation
Time-
Regulator
(Setting,
see
technical
reference
manual)
Comm-
unication
Events

Synchronization for differential protection
(ECHO-mode or GPS)
Diff.-
comm-
unication
*IEC 61850-9-2
Connected when GPS-time is
used for differential protection
External
Synchronization
sources
Trans-
ducers*
LON
SPA
GPS
SNTP
IRIG-B
PPS
Off
Min. pulse
DNP
GPS
IRIG-B
PPS
Off
Protection
and control
functions
A/D
converter
HW-time
IEC08000287 V2 EN
Figure 27: Design of time system (clock synchronization)
All time tagging is performed by the software clock. When for example a status
signal is changed in the protection system with the function based on free running
hardware clock, the event is time tagged by the software clock when it reaches the
event recorder. Thus the hardware clock can run independently.
The echo mode for the differential protection is based on the hardware clock. Thus,
there is no need to synchronize the hardware clock and the software clock.
The synchronization of the hardware clock and the software clock is necessary only
when GPS or IRIG B 00X with optical fibre, IEEE 1344 is used for differential
protection. The two clock systems are synchronized by a special clock
synchronization unit with two modes, fast and slow. A special feature, an
automatic fast clock time regulator is used. The automatic fast mode makes the
synchronization time as short as possible during start-up or at interruptions/
disturbances in the GPS timing. The setting fast or slow is also available on the
local HMI.
If a GPS clock is used for other 670 series IEDs than line differential RED670, the
hardware and software clocks are not synchronized
Basic IED functions
74
Fast clock synchronization mode
At startup and after interruptions in the GPS or IRIG B time signal, the clock
deviation between the GPS time and the internal differential time system can be
substantial. A new startup is also required after for example maintenance of the
auxiliary voltage system.
When the time difference is >16us, the differential function is blocked and the time
regulator for the hardware clock is automatically using a fast mode to synchronize
the clock systems. The time adjustment is made with an exponential function, i.e.
big time adjustment steps in the beginning, then smaller steps until a time deviation
between the GPS time and the differential time system of >16us has been reached.
Then the differential function is enabled and the synchronization remains in fast
mode or switches to slow mode, depending on the setting.
Slow clock synchronization mode
During normal service, a setting with slow synchronization mode is normally used,
which prevents the hardware clock to make too big time steps, >16s, emanating
from the differential protection requirement of correct timing.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical
structure. A function is synchronized from a higher level and provides
synchronization to lower levels.
Function
Synchronization from
a higher level
Optional synchronization of
modules at a lower level
IEC09000342 V1 EN
Figure 28: Synchronization principle
A function is said to be synchronized when it periodically receives synchronization
messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A function can have several potential sources of
synchronization, with different maximum errors, which give the function the
possibility to choose the source with the best quality, and to adjust its internal clock
after this source. The maximum error of a clock can be defined as:
Basic IED functions
75
The maximum error of the last used synchronization message
The time since the last used synchronization message
The rate accuracy of the internal clock in the function.
4.3.2.2 Real-time clock (RTC) operation
The IED has a built-in real-time clock (RTC) with a resolution of one second. The
clock has a built-in calendar that handles leap years through 2038.
Real-time clock at power off
During power off, the system time in the IED is kept by a capacitor-backed real-
time clock that will provide 35 ppm accuracy for 5 days. This means that if the
power is off, the time in the IED may drift with 3 seconds per day, during 5 days,
and after this time the time will be lost completely.
Real-time clock at startup
Time synchronization startup procedure
The first message that contains the full time (as for instance LON, SNTP and GPS)
gives an accurate time to the IED. After the initial setting of the clock, one of three
things happens with each of the coming synchronization messages configured as
fine:
If the synchronization message, which is similar to the other messages, has an
offset compared to the internal time in the IED, the message is used directly
for synchronization, that is, for adjusting the internal clock to obtain zero
offset at the next coming time message.
If the synchronization message has an offset that is large compared to the other
messages, a spike-filter in the IED removes this time-message.
If the synchronization message has an offset that is large, and the following
message also has a large offset, the spike filter does not act and the offset in
the synchronization message is compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is set to the correct time. If the offset is lower than the
threshold, the clock is adjusted with 1000 ppm until the offset is removed.
With an adjustment of 1000 ppm, it takes 100 seconds or 1.7 minutes to
remove an offset of 100 milliseconds.
Synchronization messages configured as coarse are only used for initial setting of
the time. After this has been done, the messages are checked against the internal
time and only an offset of more than 10 seconds resets the time.
Rate accuracy
In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized
for a while, the rate accuracy is approximately 1 ppm if the surrounding
temperature is constant. Normally, it takes 20 minutes to reach full accuracy.
Basic IED functions
76
Time-out on synchronization sources
All synchronization interfaces has a time-out and a configured interface must
receive time-messages regularly in order not to give an error signal (TSYNCERR).
Normally, the time-out is set so that one message can be lost without getting a
TSYNCERR, but if more than one message is lost, a TSYNCERR is given.
4.3.2.3 Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the
synchronization message is applied via any of the communication ports of the IED
as a telegram message including date and time or as a minute pulse, connected to a
binary input, or via GPS. The minute pulse is used to fine tune already existing
time in the IEDs.
Synchronization via SNTP
SNTP provides a ping-pong method of synchronization. A message is sent from an
IED to an SNTP server, and the SNTP server returns the message after filling in a
reception time and a transmission time. SNTP operates via the normal Ethernet
network that connects IEDs together in an IEC 61850 network. For SNTP to
operate properly, there must be an SNTP-server present, preferably in the same
station. The SNTP synchronization provides an accuracy that gives 1 ms accuracy
for binary inputs. The IED itself can be set as an SNTP-time server.
SNTP server requirements
The SNTP server to be used is connected to the local network, that is not more than
4-5 switches or routers away from the IED. The SNTP server is dedicated for its
task, or at least equipped with a real-time operating system, that is not a PC with
SNTP server software. The SNTP server should be stable, that is, either
synchronized from a stable source like GPS, or local without synchronization.
Using a local SNTP server without synchronization as primary or secondary server
in a redundant configuration is not recommended.
Synchronization via Serial Communication Module (SLM)
On the serial buses (both LON and SPA) two types of synchronization messages
are sent.
Coarse message is sent every minute and comprises complete date and time,
that is, year, month, day, hours, minutes, seconds and milliseconds.
Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the IED, but instead the offset between
the local time in the IED and the time received from 103 is added to all times (in
events and so on) sent via 103. In this way the IED acts as it is synchronized from
various 103 sessions at the same time. Actually, there is a local time for each 103
session.
The SLM module is located on the AD conversion Module (ADM).
Basic IED functions
77
Synchronization via Built-in-GPS
The built in GPS clock modules receives and decodes time information from the
global positioning system. The modules are located on the GPS time
synchronization Module (GSM).
Synchronization via binary input
The IED accepts minute pulses to a binary input. These minute pulses can be
generated from, for example station master clock. If the station master clock is not
synchronized from a world wide source, time will be a relative time valid for the
substation. Both positive and negative edge on the signal can be accepted. This
signal is also considered as a fine time synchronization signal.
The minute pulse is connected to any channel on any Binary Input Module in the
IED. The electrical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the
substation and if no station master clock with minute pulse output is available, a
simple minute pulse generator can be designed and used for synchronization of the
IEDs. The minute pulse generator can be created using the logical elements and
timers available in the IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As
only the flanks are detected, the flank of the minute pulse shall occur one minute
after the last flank.
Binary minute pulses are checked with reference to frequency.
Pulse data:
Period time (a) should be 60 seconds.
Pulse length (b):
Minimum pulse length should be >50 ms.
Maximum pulse length is optional.
Amplitude (c) - please refer to section "Binary input module (BIM)".
Deviations in the period time larger than 50 ms will cause TSYNCERR.
Basic IED functions
78
a
b
c
en05000251.vsd
IEC05000251 V1 EN
Figure 29: Binary minute pulses
The default time-out-time for a minute pulse is two minutes, and if no valid minute
pulse is received within two minutes a SYNCERR will be given.
If contact bounces occurs, only the first pulse will be detected as a minute pulse.
The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, for example, it is exactly 60 seconds between the
pulses, contact bounces might occur 49 ms after the actual minute pulse without
effecting the system. If contact bounces occurs more than 50 ms, for example, it is
less than 59950 ms between the two most adjacent positive (or negative) flanks, the
minute pulse will not be accepted.
Binary synchronization example
An IED is configured to use only binary input, and a valid binary input is applied
to a binary input card. The HMI is used to tell the IED the approximate time and
the minute pulse is used to synchronize the IED thereafter. The definition of a
minute pulse is that it occurs one minute after the previous minute pulse, so the
first minute pulse is not used at all. The second minute pulse will probably be
rejected due to the spike filter. The third pulse will give the IED a good time and
will reset the time so that the fourth minute pulse will occur on a minute border.
After the first three minutes, the time in the IED will be good if the coarse time is
set properly via the HMI or the RTC backup still keeps the time since last up-time.
If the minute pulse is removed for instance for an hour, the internal time will drift
by maximum the error rate in the internal clock. If the minute pulse is returned, the
first pulse automatically is rejected. The second pulse will possibly be rejected due
to the spike filter. The third pulse will either synchronize the time, if the time offset
is more than 100 ms, or adjust the time, if the time offset is small enough. If the
time is set, the application will be brought to a safe state before the time is set. If
the time is adjusted, the time will reach its destination within 1.7 minutes.
Synchronization via IRIG-B
The DNP3 communication can be the source for the course time synchronization,
while the fine time synchronization needs a source with higher accuracy.
Basic IED functions
79
IRIG-B is a protocol used only for time synchronization. A clock can provide local
time of the year in this format. The B in IRIG-B states that 100 bits per second
are transmitted, and the message is sent every second. After IRIG-B there numbers
stating if and how the signal is modulated and the information transmitted.
To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic
BNC connector and one optical ST connector. IRIG-B 12x messages can be
supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via
either the galvanic interface or the optical interface, where x (in 00x or 12x) means
a number in the range of 1-7.
00 means that a base band is used, and the information can be fed into the IRIG-
B module via the BNC contact or an optical fiber. 12 means that a 1 kHz
modulation is used. In this case the information must go into the module via the
BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains
information of the year. If x is 0, 1, 2 or 3, the information contains only the time
within the year, and year information has to come from PCM600 or local HMI.
The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B
clocks, as IRIG-B previously did not have any year information. IEEE1344 is
compatible with IRIG-B and contains year information and information of the time-
zone.
It is recommended to use IEEE 1344 for supplying time information to the IRIG-B
module. In this case, send also the local time in the messages, as this local time
plus the TZ Offset supplied in the message equals UTC at all times.
4.3.2.4 Process bus IEC 61850-9-2LE synchronization
For the time synchronization of the process bus communication (IEC 61850-9-2LE
protocol) an optical PPS or IRIG-B signal can be used. This signal should emanate
from either an external GPS clock, or from the merging unit.
An optical PPS signal can be supplied to the optical interface of the IRIG-B module.
TIMEERR
TSYNCERR
RTCERR
IEC05000425 V2 EN
Figure 30: TIMEERR function block
Basic IED functions
80
Table 19: TIMEERR Output signals
TSYNCERR BOOLEAN Time synchronization error
RTCERR BOOLEAN Real time clock error
Path in the local HMI is located under Main menu/Setting/Time
Path in PCM600 is located under Main menu/Settings/Time/Synchronization
Table 20: TIMESYNCHGEN Non group settings (basic)
CoarseSyncSrc Off
SPA
LON
SNTP
DNP
- - Off Coarse time synchronization source
FineSyncSource Off
SPA
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
IRIG-B
GPS+IRIG-B
PPS
- - Off Fine time synchronization source
SyncMaster Off
SNTP-Server
- - Off Activate IEDas synchronization master
TimeAdjustRate Slow
Fast
- - Slow Adjust rate for time synchronization
Table 21: SYNCHBIN Non group settings (basic)
ModulePosition 3 - 16 - 1 3 Hardware position of IO module for time
synchronization
BinaryInput 1 - 16 - 1 1 Binary input number for time
synchronization
BinDetection PositiveEdge
NegativeEdge
- - PositiveEdge Positive or negative edge detection
Basic IED functions
81
Table 22: SYNCHSNTP Non group settings (basic)
ServerIP-Add 0 - 18 IP
Address
1 0.0.0.0 Server IP-address
RedServIP-Add 0 - 18 IP
Address
1 0.0.0.0 Redundant server IP-address
Table 23: DSTBEGIN Non group settings (basic)
MonthInYear January
February
March
April
May
June
July
August
September
October
November
December
- - March Month in year when daylight time starts
DayInWeek Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
- - Sunday Day in week when daylight time starts
WeekInMonth Last
First
Second
Third
Fourth
- - Last Week in month when daylight time starts
UTCTimeOfDay 0 - 86400 s 1 3600 UTC Time of day in seconds when
daylight time starts
Basic IED functions
82
Table 24: DSTEND Non group settings (basic)
MonthInYear January
February
March
April
May
June
July
August
September
October
November
December
- - October Month in year when daylight time ends
DayInWeek Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
- - Sunday Day in week when daylight time ends
WeekInMonth Last
First
Second
Third
Fourth
- - Last Week in month when daylight time ends
UTCTimeOfDay 0 - 86400 s 1 3600 UTC Time of day in seconds when
daylight time ends
Table 25: TIMEZONE Non group settings (basic)
NoHalfHourUTC -24 - 24 - 1 0 Number of half-hours from UTC
Table 26: SYNCHIRIG-B Non group settings (basic)
SynchType BNC
Opto
- - Opto Type of synchronization
TimeDomain LocalTime
UTC
- - LocalTime Time domain
Encoding IRIG-B
1344
1344TZ
- - IRIG-B Type of encoding
TimeZoneAs1344 MinusTZ
PlusTZ
- - PlusTZ Time zone as in 1344 standard
Basic IED functions
83
Table 27: Time synchronization, time tagging
Function Value
Time tagging resolution, events and sampled measurement values 1 ms
Time tagging error with synchronization once/min (minute pulse
synchronization), events and sampled measurement values
1.0 ms typically
Time tagging error with SNTP synchronization, sampled
measurement values
1.0 ms typically
4.4 Parameter setting groups
4.4.1 Introduction
Use the six sets of settings to optimize IED operation for different system
conditions. By creating and switching between fine tuned setting sets, either from
the local HMI or configurable binary inputs, results in a highly adaptable IED that
can cope with a variety of system scenarios.
Parameter setting groups ActiveGroup function has six functional inputs, each
corresponding to one of the setting groups stored in the IED. Activation of any of
these inputs changes the active setting group. Seven functional output signals are
available for configuration purposes, so that up to date information on the active
setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal
computer, remotely from the station control or station monitoring system or by
activating the corresponding input to the ActiveGroup function block.
Each input of the function block can be configured to connect to any of the binary
inputs in the IED. To do this PCM600 must be used.
The external control signals are used for activating a suitable setting group when
adaptive functionality is necessary. Input signals that should activate setting groups
must be either permanent or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower
order setting group has priority. This means that if for example both group four and
group two are set to activate, group two will be the one activated.
Every time the active group is changed, the output signal SETCHGD is sending a
pulse.
The parameter MAXSETGR defines the maximum number of setting groups in use
to switch between.
Basic IED functions
84
en05000119.vsd
IOx-Bly1
IOx-Bly2
IOx-Bly3
IOx-Bly4
+RL2
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
ACTIVATE GROUP 1
ACTGRP1
ACTGRP2
ACTGRP3
ACTGRP4
GRP1
GRP2
GRP3
GRP4
ActiveGroup
ACTGRP5
ACTGRP6
GRP5
GRP6
IOx-Bly5
IOx-Bly6
ACTIVATE GROUP 5
ACTIVATE GROUP 6
SETCHGD
IEC05000119 V2 EN
Figure 31: Connection of the function to external circuits
The above example also includes seven output signals, for confirmation of which
group that is active.
SETGRPS function block has an input where the number of setting groups used is
defined. Switching can only be done within that number of groups. The number of
setting groups selected to be used will be filtered so only the setting groups used
will be shown on the Parameter Setting Tool.
ActiveGroup
ACTGRP1
ACTGRP2
ACTGRP3
ACTGRP4
ACTGRP5
ACTGRP6
GRP1
GRP2
GRP3
GRP4
GRP5
GRP6
SETCHGD
IEC05000433 V2 EN
Figure 32: ActiveGroup function block
SETGRPS
MAXSETGR
IEC05000716 V2 EN
Figure 33: SETGRPS function block
Basic IED functions
85
4.4.4 Input and output signals
Table 28: ActiveGroup Input signals
ACTGRP1 BOOLEAN 0 Selects setting group 1 as active
Table 29: ActiveGroup Output signals
GRP1 BOOLEAN Setting group 1 is active
SETCHGD BOOLEAN Pulse when setting changed
Table 30: ActiveGroup Non group settings (basic)
t 0.0 - 10.0 s 0.1 1.0 Pulse length of pulse when setting
changed
Table 31: SETGRPS Non group settings (basic)
ActiveSetGrp SettingGroup1
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
- - SettingGroup1 ActiveSettingGroup
MAXSETGR 1 - 6 No 1 1 Max number of setting groups 1-6
4.5 ChangeLock function CHNGLCK
Basic IED functions
86
4.5.1 Introduction
Change lock function (CHNGLCK) is used to block further changes to the IED
configuration and settings once the commissioning is complete. The purpose is to
block inadvertent IED configuration changes beyond a certain point in time.
The Change lock function (CHNGLCK) is configured using ACT.
The function, when activated, will still allow the following changes of the IED
state that does not involve reconfiguring of the IED:
Monitoring
Reading events
Resetting events
Reading disturbance data
Clear disturbances
Reset LEDs
Reset counters and other runtime component states
Control operations
Set system time
Enter and exit from test mode
Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
Binary input Function
1 Activated
0 Deactivated
CHNGLCK
LOCK
IEC09000946 V1 EN
Figure 34: CHNGLCK function block
Table 32: CHNGLCK Input signals
LOCK BOOLEAN 0 Parameter change lock
Basic IED functions
87
Table 33: CHNGLCK Non group settings (basic)
Operation LockHMI and Com
LockHMI,
EnableCom
EnableHMI,
LockCom
- - LockHMI and Com Operation mode of change lock
4.6 Test mode functionality TEST
4.6.1 Introduction
When the Test mode functionality TESTMODE function is activated, protection
functions in the IED are automatically blocked. It is then possible to unblock the
protection functions individually from the local HMI or the Parameter Setting tool
to perform required tests.
When leaving TESTMODE, all blockings are removed and the IED resumes
normal operation. However, if during TESTMODE operation, power is removed
and later restored, the IED will remain in TESTMODE with the same protection
functions blocked or unblocked as before the power was removed. All testing will
be done with actually set and configured values within the IED. No settings will be
changed, thus mistakes are avoided.
Put the IED into test mode to test functions in the IED. Set the IED in test mode by
configuration, activating the input signal of the function block TESTMODE.
setting TestMode to On in the local HMI, under Main menu/TEST/IED test
mode.
While the IED is in test mode, the ACTIVE output of the function block
TESTMODE is activated. The other outputs of the function block TESTMODE
shows the generator of the Test mode: On state input from configuration
(OUTPUT output is activated) or setting from local HMI (SETTING output is
activated).
While the IED is in test mode, the yellow START LED will flash and all functions
are blocked. Any function can be unblocked individually regarding functionality
and event signalling.
Most of the functions in the IED can individually be blocked by means of settings
from the local HMI. To enable these blockings the IED must be set in test mode
(output ACTIVE is activated), see example in figure 35. When leaving the test
Basic IED functions
88
mode, that is entering normal mode, these blockings are disabled and everything is
set to normal operation. All testing will be done with actually set and configured
values within the IED. No settings will be changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the
blockings were not reset.
The blocking of a function concerns all output signals from the actual function, so
no outputs will be activated.
When a binary input is used to set the IED in test mode and a
parameter, that requires restart of the application, is changed, the
IED will re-enter test mode and all functions will be blocked, also
functions that were unblocked before the change. During the re-
entering to test mode, all functions will be temporarily unblocked
for a short time, which might lead to unwanted operations. This is
only valid if the IED is put in TEST mode by a binary input, not by
local HMI.
The TESTMODE function block might be used to automatically block functions
when a test handle is inserted in a test switch. A contact in the test switch (RTXP24
contact 29-30) can supply a binary input which in turn is configured to the
TESTMODE function block.
Each of the protection functions includes the blocking from the TESTMODE
function block. A typical example from the undervoltage function is shown in
figure 35.
The functions can also be blocked from sending events over IEC 61850 station bus
to prevent filling station and SCADA databases with test events, for example
during a maintenance test.
Basic IED functions
89
Time
U
Normal voltage
U1<
U2<
IntBlkStVal1
IntBlkStVal2
Disconnection
tBlkUV1 <
t1,t1Min
tBlkUV2 <
t2,t2Min
Block step 1
Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 35: Example of blocking the time delayed undervoltage protection
function.
TESTMODE
INPUT ACTIVE
OUTPUT
SETTING
NOEVENT
IEC09000219-1.vsd
IEC09000219 V1 EN
Figure 36: TESTMODE function block
Table 34: TESTMODE Input signals
INPUT BOOLEAN 0 Sets terminal in test mode when active
Basic IED functions
90
Table 35: TESTMODE Output signals
ACTIVE BOOLEAN Terminal in test mode when active
OUTPUT BOOLEAN Test input is active
SETTING BOOLEAN Test mode setting is (On) or not (Off)
NOEVENT BOOLEAN Event disabled during testmode
Table 36: TESTMODE Non group settings (basic)
TestMode Off
On
- - Off Test mode in operation (On) or not (Off)
EventDisable Off
On
- - Off Event disable during testmode
CmdTestBit Off
On
- - Off Command bit for test required or not
during testmode
4.7 IED identifiers
4.7.1 Introduction
IED identifiers (TERMINALID) function allows the user to identify the individual
IED in the system, not only in the substation, but in a whole region or a country.
Use only characters A-Z, a-z and 0-9 in station, object and unit names.
Table 37: TERMINALID Non group settings (basic)
StationName 0 - 18 - 1 Station name Station name
StationNumber 0 - 99999 - 1 0 Station number
ObjectName 0 - 18 - 1 Object name Object name
ObjectNumber 0 - 99999 - 1 0 Object number
UnitName 0 - 18 - 1 Unit name Unit name
UnitNumber 0 - 99999 - 1 0 Unit number
Basic IED functions
91
4.8 Product information
4.8.1 Introduction
The Product identifiers function identifies the IED. The function has seven pre-set,
settings that are unchangeable but nevertheless very important:
IEDProdType
ProductDef
FirmwareVer
SerialNo
OrderingNo
ProductionDate
The settings are visible on the local HMI , under Main menu/Diagnostics/IED
status/Product identifiers
They are very helpful in case of support process (such as repair or maintenance).
4.8.3 Application
4.8.3.1 Factory defined settings
The factory defined settings are very useful for identifying a specific version and
very helpful in the case of maintenance, repair, interchanging IEDs between
different Substation Automation Systems and upgrading. The factory made settings
can not be changed by the customer. They can only be viewed. The settings are
found in the local HMI under Main menu/Diagnostics/IED status/Product
identifiers
The following identifiers are available:
IEDProdType
Describes the type of the IED (like REL, REC or RET). Example: REL670
ProductDef
Describes the release number, from the production. Example: 1.1.r01
FirmwareVer
Describes the firmware version. Example: 1.4.51
Firmware versions numbers are running independently from the
release production numbers. For every release numbers (like 1.4.51)
Basic IED functions
92
there can be one or more firmware versions, depending on the small
issues corrected in between releases.
IEDMainFunType
Main function type code according to IEC 60870-5-103. Example: 128
(meaning line protection).
SerialNo
OrderingNo
ProductionDate
4.9 Signal matrix for binary inputs SMBI
4.9.1 Introduction
The Signal matrix for binary inputs (SMBI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT),
see the application manual to get information about how binary inputs are brought
in for one IED configuration.
The Signal matrix for binary inputs (SMBI) function , see figure 37, receives its
inputs from the real (hardware) binary inputs via the Signal Matrix Tool (SMT),
and makes them available to the rest of the configuration via its outputs, BI1 to
BI10. The inputs and outputs, as well as the whole block, can be given a user
defined name. These names will be represented in SMT as information which
signals shall be connected between physical IO and SMBI function. The input/
output user defined name will also appear on the respective output/input signal.
SMBI
^VIN1
^VIN2
^VIN3
^VIN4
^VIN5
^VIN6
^VIN7
^VIN8
^VIN9
^VIN10
^BI1
^BI2
^BI3
^BI4
^BI5
^BI6
^BI7
^BI8
^BI9
^BI10
IEC05000434 V2 EN
Figure 37: SMBI function block
Basic IED functions
93
Table 38: SMBI Input signals
VIn1 BOOLEAN 0 SMT Connect input
Table 39: SMBI Output signals
BI1 BOOLEAN Binary input 1
4.10 Signal matrix for binary outputs SMBO
4.10.1 Introduction
The Signal matrix for binary outputs (SMBO) function is used within the
Application Configuration Tool (ACT) in direct relation with the Signal Matrix
Tool (SMT), see the application manual to get information about how binary inputs
are sent from one IED configuration.
Basic IED functions
94
The Signal matrix for binary outputs (SMBO) function , see figure 38, receives
logical signal from the IED configuration, which is transferring to the real
(hardware) outputs, via the Signal Matrix Tool (SMT). The inputs in SMBO are
BO1 to BO10 and they, as well as the whole function block, can be tag-named. The
name tags will appear in SMT as information which signals shall be connected
between physical IO and the SMBO.
SMBO
BO1
BO2
BO3
BO4
BO5
BO6
BO7
BO8
BO9
BO10
^BO1
^BO2
^BO3
^BO4
^BO5
^BO6
^BO7
^BO8
^BO9
^BO10
IEC05000439 V2 EN
Figure 38: SMBO function block
Table 40: SMBO Input signals
BO1 BOOLEAN 1 Signal name for BO1 in Signal Matrix Tool
4.11 Signal matrix for mA inputs SMMI
Basic IED functions
95
4.11.1 Introduction
The Signal matrix for mA inputs (SMMI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT),
see the application manual to get information about how milliamp (mA) inputs are
brought in for one IED configuration.
The Signal matrix for mA inputs (SMMI) function, see figure 39, receives its
inputs from the real (hardware) mA inputs via the Signal Matrix Tool (SMT), and
makes them available to the rest of the configuration via its analog outputs, named
AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags
will be represented in SMT.
The outputs on SMMI are normally connected to the IEC61850 generic
communication I/O functions (MVGGIO) function for further use of the mA signals.
SMMI
^VIN1
^VIN2
^VIN3
^VIN4
^VIN5
^VIN6
AI1
AI2
AI3
AI4
AI5
AI6
IEC05000440 V2 EN
Figure 39: SMMI function block
Table 41: SMMI Input signals
VIn1 REAL 0 SMT connected milliampere input
Basic IED functions
96
Table 42: SMMI Output signals
AI1 REAL Analog milliampere input 1
4.12 Signal matrix for analog inputs SMAI
4.12.1 Introduction
Signal matrix for analog inputs function SMAI (or the pre-processing function) is
used within PCM600 in direct relation with the Signal Matrix tool or the
Application Configuration tool. Signal Matrix tool represents the way analog
inputs are brought in for one IED configuration.
Every Signal matrix for analog inputs function (SMAI) can receive four analog
signals (three phases and one neutral value), either voltage or current, see figure 41
and figure 42. SMAI outputs give information about every aspect of the 3ph analog
signals acquired (phase angle, RMS value, frequency and frequency derivates etc.
244 values in total). The BLOCK input will reset all outputs to 0.
The output signal AI1 to AI4 are direct output of the, in SMT, connected input to
GRPxL1, GRPxL2, GRPxL3 and GRPxN, x=1-12. AIN is always the neutral
current, calculated residual sum or the signal connected to GRPxN. Note that
function block will always calculate the residual sum of current/voltage if the input
is not connected in SMT. Applications with a few exceptions shall always be
connected to AI3P.
4.12.3 Frequency values
The frequency functions includes a functionality based on level of positive
sequence voltage, IntBlockLevel, to validate if the frequency measurement is valid
or not. If positive sequence voltage is lower than IntBlockLevel the function is
blocked. IntBlockLevel, is set in % of UBase/3
If SMAI setting ConnectionType is Ph-Ph at least two of the inputs GRPxL1,
GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence
voltage. If SMAI setting ConnectionType is Ph-N, all three inputs GRPxL1,
Basic IED functions
97
GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence
voltage.
If only one phase-phase voltage is available and SMAI setting ConnectionType is
Ph-Ph the user is advised to connect two (not three) of the inputs GRPxL1,
GRPxL2 and GRPxL3 to the same voltage input as shown in figure 40 to make
SMAI calculating a positive sequence voltage (that is input voltage/3).
IEC10000060 V1 EN
Figure 40: Connection example
The above described scenario does not work if SMAI setting
ConnectionType is Ph-N. If only one phase-earth voltage is
available, the same type of connection can be used but the SMAI
ConnectionType setting must still be Ph-Ph and this has to be
accounted for when setting IntBlockLevel. If SMAI setting
ConnectionType is Ph-N and the same voltage is connected to all
three SMAI inputs, the positive sequence voltage will be zero and
the frequency functions will not work properly.
The outputs from the above configured SMAI block shall only be
used for Overfrequency protection (SAPTOF), Underfrequency
protection (SAPTUF) and Rate-of-change frequency protection
(SAPFRC) due to that all other information except frequency and
positive sequence voltage might be wrongly calculated.
SMAI1
BLOCK
DFTSPFC
^GRP1L1
^GRP1L2
^GRP1L3
^GRP1N
TYPE
SPFCOUT
AI3P
AI1
AI2
AI3
AI4
AIN
IEC05000705 V2 EN
Figure 41: SMAI1 function block
Basic IED functions
98
SMAI2
BLOCK
^GRP2L1
^GRP2L2
^GRP2L3
^GRP2N
TYPE
AI3P
AI1
AI2
AI3
AI4
AIN
IEC07000130 V2 EN
Figure 42: SMAI2 function block
Table 43: SMAI1 Input signals
BLOCK BOOLEAN 0 Block group 1
DFTSPFC REAL 20.0 Number of samples per fundamental cycle used
for DFT calculation
GRP1L1 STRING - Sample input to be used for group 1 phase L1
calculations
calculations
calculations
GRP1N STRING - Sample input to be used for group 1 residual
calculations
Table 44: SMAI1 Output signals
SPFCOUT REAL Number of samples per fundamental cycle from
internal DFT reference function
AI3P GROUP SIGNAL Group 1 analog input 3-phase group
AI1 GROUP SIGNAL Group 1 analog input 1
AIN GROUP SIGNAL Group 1 analog input residual for disturbance
recorder
Basic IED functions
99
Table 45: SMAI2 Input signals
BLOCK BOOLEAN 0 Block group 2
calculations
calculations
calculations
GRP2N STRING - Sample input to be used for group 2 residual
calculations
Table 46: SMAI2 Output signals
AI3P GROUP SIGNAL Group 2 analog input 3-phase group
AIN GROUP SIGNAL Group 2 analog input residual for disturbance
recorder
Settings DFTRefExtOut and DFTReference shall be set to default
value InternalDFTRef if no VT inputs are available. Internal
nominal frequency DFT reference is then the reference.
Basic IED functions
100
Table 47: SMAI1 Non group settings (basic)
DFTRefExtOut InternalDFTRef
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
- - InternalDFTRef DFT reference for external output
DFTReference InternalDFTRef
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
- - InternalDFTRef DFT reference
ConnectionType Ph-N
Ph-Ph
- - Ph-N Input connection type
TYPE 1 - 2 Ch 1 1 1=Voltage, 2=Current
Table 48: SMAI1 Non group settings (advanced)
Negation Off
NegateN
Negate3Ph
Negate3Ph+N
- - Off Negation
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
UBase
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage
Basic IED functions
101
Table 49: SMAI2 Non group settings (basic)
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N
Ph-Ph
- - Ph-N Input connection type
TYPE 1 - 2 Ch 1 1 1=Voltage, 2=Current
Table 50: SMAI2 Non group settings (advanced)
Negation Off
NegateN
Negate3Ph
Negate3Ph+N
- - Off Negation
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
UBase
4.13 Summation block 3 phase 3PHSUM
4.13.1 Introduction
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of
three-phase analog signals (of the same type) for those IED functions that might
need it.
Summation block 3 phase 3PHSUM receives the three-phase signals from Signal
matrix for analog inputs function (SMAI). In the same way, the BLOCK input will
reset all the outputs of the function to 0.
Basic IED functions
102
3PHSUM
BLOCK
DFTSPFC
G1AI3P*
G2AI3P*
AI3P
AI1
AI2
AI3
AI4
IEC05000441 V2 EN
Figure 43: 3PHSUM function block
Table 51: 3PHSUM Input signals
BLOCK BOOLEAN 0 Block
DFTSPFC REAL 0 Number of samples per fundamental cycle used
for DFT calculation
G1AI3P GROUP
SIGNAL
- Group 1 analog input 3-phase group
G2AI3P GROUP
SIGNAL
- Group 2 analog input 3-phase group
Table 52: 3PHSUM Output signals
AI3P GROUP SIGNAL Group analog input 3-phase group
AI1 GROUP SIGNAL Group 1 analog input
Settings DFTRefExtOut and DFTReference shall be set to default
value InternalDFTRef if no VT inputs are available.
Table 53: 3PHSUM Non group settings (basic)
SummationType Group1+Group2
Group1-Group2
Group2-Group1
-(Group1+Group2)
- - Group1+Group2 Summation type
AdDFTRefCh1
External DFT ref
Basic IED functions
103
Table 54: 3PHSUM Non group settings (advanced)
FreqMeasMinVal 5 - 200 % 1 10 Amplitude limit for frequency calculation
in % of Ubase
4.14 Authority status ATHSTAT
4.14.1 Introduction
Authority status (ATHSTAT) function is an indication function block for user log
on activity.
Authority status (ATHSTAT) function informs about two events related to the IED
and the user authorization:
the fact that at least one user has tried to log on wrongly into the IED and it
was blocked (the output USRBLKED)
the fact that at least one user is logged on (the output LOGGEDON)
Whenever one of the two events occurs, the corresponding output (USRBLKED or
LOGGEDON) is activated. The output can for example, be connected on Event
(EVENT) function block for LON/SPA.The signals are also available on IEC
61850 station bus.
ATHSTAT
USRBLKED
LOGGEDON
IEC06000503 V2 EN
Figure 44: ATHSTAT function block
Table 55: ATHSTAT Output signals
USRBLKED BOOLEAN At least one user is blocked by invalid password
LOGGEDON BOOLEAN At least one user is logged on
Basic IED functions
104
Basic IED functions
105
106
Section 5 Differential protection
About this chapter
This chapter describes the measuring principles, functions and parameters used in
differential protection.
5.1 1Ph High impedance differential protection HZPDIF
Function description
IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
1Ph High impedance differential
protection
HZPDIF
Id
SYMBOL-CC V2 EN
87
5.1.1 Introduction
The 1Ph High impedance differential protection HZPDIF function can be used
when the involved CT cores have the same turn ratio and similar magnetizing
characteristic. It utilizes an external summation of the phases and neutral current
and a series resistor and a voltage dependent resistor externally to the IED.
HZPDIFfunction can be used to protect tee-feeders or busbars. Six function blocks
allow protection of two three-phase zones.
The 1Ph High impedance differential protection (HZPDIF) function is based on
one current input with external stabilizing resistors and voltage dependent resistors.
Three functions can be used to provide a three phase differential protection
function. The stabilizing resistor value is calculated from the IED operating value
UR calculated to achieve through fault stability. The supplied stabilizing resistor
has a link to allow setting of the correct resistance value.
See the application manual for operating voltage and sensitivity calculation.
5.1.2.1 Logic diagram
The logic diagram shows the operation principles for the 1Ph High impedance
differential protection function HZPDIF, see figure 45. It is a simple one step IED
Differential protection
107
with an additional lower alarm level. By activating inputs, the HZPDIF function
can either be blocked completely, or only the trip output.
IEC05000301 V1 EN
Figure 45: Logic diagram for 1Ph High impedance differential protection
HZPDIF
HZPDIF
ISI*
BLOCK
BLKTR
TRIP
ALARM
MEASVOLT
IEC05000363 V2 EN
Figure 46: HZPDIF function block
Table 56: HZPDIF Input signals
ISI GROUP
SIGNAL
- Group signal for current input
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
Table 57: HZPDIF Output signals
TRIP BOOLEAN Trip signal
ALARM BOOLEAN Alarm signal
MEASVOLT REAL Measured RMS voltage on CT secondary side
108
Table 58: HZPDIF Group settings (basic)
Operation Off
On
- - Off Operation Off / On
U>Alarm 2 - 500 V 1 10 Alarm voltage level in volts on CT
secondary side
tAlarm 0.000 - 60.000 s 0.001 5.000 Time delay to activate alarm
U>Trip 5 - 900 V 1 100 Operate voltage level in volts on CT
secondary side
SeriesResistor 10 - 20000 ohm 1 250 Value of series resistor in Ohms
Table 59: HZPDIFtechnical data
Function Range or value Accuracy
Operate voltage (20-400) V 1.0% of U
r
for U U
r
Reset ratio >95% -
Maximum
continuous voltage
U>Trip
2
/series resistor 200 W -
Operate time 10 ms typically at 0 to 10 x U
d
-
Reset time 90 ms typically at 10 to 0 x U
d
-
Critical impulse time 2 ms typically at 0 to 10 x U
d
-
109
110
Section 6 Impedance protection
About this chapter
This chapter describes distance protection and associated functions. It includes
function blocks, logic diagrams and data tables with information about distance
protection, automatic switch onto fault, weak end in-feed and other associated
functions. Quadrilateral characteristics are also covered.
6.1 Distance measuring zones, quadrilateral
characteristic ZMQPDIS, ZMQAPDIS, ZDRDIR
Function description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Distance protection zone, quadrilateral
characteristic (zone 1)
ZMQPDIS
S00346 V1 EN
21
Distance protection zone, quadrilateral
characteristic (zone 2-5)
ZMQAPDIS
S00346 V1 EN
21
Directional impedance quadrilateral ZDRDIR
Z<->
IEC09000167 V1 EN
21D
6.1.1 Introduction
The line distance protection is a, up to five zone full scheme protection with three
fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault
for each of the independent zones. Individual settings for each zone in resistive and
reactive reach gives flexibility for use as back-up protection for transformer
connected to overhead lines and cables of different types and lengths.
ZMQPDIS together with Phase selection with load encroachment FDPSPDIS has
functionality for load encroachment, which increases the possibility to detect high
resistive faults on heavily loaded lines, as shown in figure47.
Impedance protection
111
en05000034.vsd
R
X
Forward
operation
Reverse
operation
IEC05000034 V1 EN
Figure 47: Typical quadrilateral distance protection zone with Phase selection
with load encroachment function FDPSPDIS activated
The independent measurement of impedance for each fault loop together with a
sensitive and reliable built-in phase selection makes the function suitable in
applications with single-phase autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at
load exporting end at phase-to-earth faults on heavily loaded power lines.
The distance protection zones can operate independently of each other in
directional (forward or reverse) or non-directional mode. This makes them suitable,
together with different communication schemes, for the protection of power lines
and cables in complex network configurations, such as parallel lines, multi-
terminal lines, and so on.
6.1.2.1 Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type,
which means that each fault loop for phase-to-earth faults and phase-to-phase faults
for forward and reverse faults are executed in parallel.
Figure 48 presents an outline of the different measuring loops for up to five,
impedance-measuring zones. There are 3 to 5 zones depending on product type and
variant.
112
en05000458.vsd
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1
Zone 1
Zone 2
Zone 3
Zone 4
Zone 5
IEC05000458 V1 EN
Figure 48: The different measuring loops at phase-to-earth fault and phase-to-
phase fault.
The use of full scheme technique gives faster operation time compared to switched
schemes which mostly uses a start element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one
independent distance protection IED with six measuring elements.
6.1.2.2 Impedance characteristic
The distance measuring zone includes six impedance measuring loops; three
intended for phase-to-earth faults, and three intended for phase-to-phase as well as,
three-phase faults.
The distance measuring zone will essentially operate according to the non-
directional impedance characteristics presented in figure 49 and figure 50. The phase-
to-earth characteristic is illustrated with the full loop reach while the phase-to-
phase characteristic presents the per phase reach.
113
RFPE
X1PE+Xn
X1PE+Xn
RFPE
R1PE+Rn
RFPE
RFPE
RFPE
RFPE
R
R1PE+Rn
(Ohm/loop)
en08000280-2-en.vsd
X0PE-X1PE
Xn
3
=
R0PE-R1PE
Rn
3
=
jN jN
X (Ohm/loop)
IEC08000280 V1 EN
Figure 49: Characteristic for phase-to-earth measuring, ohm/loop domain
114
j
R1PP RFPP
X1PP
X1PP
RFPP R1PP RFPP
RFPP
RFPP
RFPP
R
X (Ohm/phase)
(Ohm/phase)
en07000062.vsd
j
0 1
3
X PE X RVPE
XNRV
-
=
0 1
3
X PE X FWPE
XNFW
-
=
0 1
3
X PG X FWPG
XNFW
-
=
0 1
3
X PG X RVPG
XNRV
-
=
0 1
3
X PE X RVPE
XNRV
-
=
0 1
3
X PE X FWPE
XNFW
-
=
2 2
2 2
2 2
IEC07000062 V2 EN
Figure 50: Characteristic for phase-to-phase measuring
The fault loop reach with respect to each fault type may also be presented as in
figure 51. Note in particular the difference in definition regarding the (fault)
resistive reach for phase-to-phase faults and three-phase faults.
115
UL1
R1 + j X1
IL1
RFPE
Phase-to-earth
fault in phase L1
Phase-to-phase
fault in phase
L1-L2
Three-phase
fault
(Arc + tower
resistance)
0
(R0-R1)/3 +
j (X0-X1)/3 )
IN
UL1
R1 + j X1
IL1
UL2
R1 + j X1
IL2
RFPP
UL1
R1 + j X1
IL1
UL3
R1 + j X1
IL3
0.5RFPP
0.5RFPP
(Arc resistance)
Phase-to-earth
element
Phase-to-phase
element L1-L2
Phase-to-phase
element L1-L3
IEC08000282 V2 EN
Figure 51: Fault loop model
The R1 and jX1 in figure 51 represents the positive sequence impedance from the
measuring point to the fault location. The settings RFPE and RFPP are the
eventual fault resistances in the faulty place.
Regarding the illustration of three-phase fault in figure 51, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.
The zone can be set to operate in Non-directional, Forward or Reverse direction
through the setting OperationDir. The result from respective set value is illustrated
in figure 52. The impedance reach is symmetric, in the sense that it conforms for
forward and reverse direction. Therefore, all reach settings apply to both directions.
116
en05000182.vsd
R
X
R
X
R
X
Non-directional Forward Reverse
IEC05000182 V1 EN
Figure 52: Directional operating modes of the distance measuring zones
6.1.2.3 Minimum operating current
The operation of Distance measuring zones, quadrilateral characteristic
(ZMQPDIS) is blocked if the magnitude of input currents fall below certain
threshold values.
The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase
currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector
sum of the three-phase currents, that is, residual current 3I
0
.
The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IMinOpPE, IMinOpIN and IMinOpPP are
automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, that is, OperationDir = Reverse.
6.1.2.4 Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the
current. Apparent impedances are calculated and compared with the set limits. The
117
apparent impedances at phase-to-phase faults follow equation 1 (example for a
phase L1 to phase L2 fault).
Z
app
U
L1
U
L2
I
L1
I
L2
-------------------------
=
EQUATION1222 V1 EN (Equation 1)
Here U and I represent the corresponding voltage and current phasors in the
respective phase Ln (n = 1, 2, 3)
The earth return compensation applies in a conventional manner to phase-to-earth
faults (example for a phase L1 to earth fault) according to equation 2.
Z
app
U
L1
I
L1
I
N
KN +
= ------------------------------
Where:
U
L1
, I
L1
and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z0 Z1
KN
3 Z1
-
=
EQUATION 2105 V1 EN
0 0 0 Z R jX = +
EQUATION2106 V1 EN
1 1 1 Z R jX = +
EQUATION2107 V1 EN
Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same
reach along the line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and
reactance X.
118
The formula given in equation 2 is only valid for radial feeder application without
load. When load is considered in the case of single phase-to-earth fault,
conventional distance protection might overreach at exporting end and underreach
at importing end. The IED has an adaptive load compensation which increases the
security in such applications.
Measuring elements receive current and voltage information from the A/D
converter. The check sums are calculated and compared, and the information is
distributed into memory locations. For each of the six supervised fault loops,
sampled values of voltage (U), current (I), and changes in current between samples
(DI) are brought from the input memory and fed to a recursive Fourier filter.
The filter provides two orthogonal values for each input. These values are related
to the loop impedance according to equation 3,
U R i
X
w
0
------
+
Di
Dt
-----
=
in complex notation, or:
Re U ( ) R Re I ( )
X
w
0
------ +
DRe I ( )
Dt
------------------ =
Im U ( ) R Im I ( )
X
w
0
------ +
DIm I ( )
Dt
----------------- =
with
w
0
2 p f
0
=
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f
0
designates the rated system frequency
The algorithm calculates R
m
measured resistance from the equation for the real
value of the voltage and substitutes it in the equation for the imaginary part. The
equation for the X
m
measured reactance can then be solved. The final result is
equal to:
119
R
m
Im U ( ) DRe I ( ) Re U ( ) DIm I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------------ =
X
m
w
0
Dt
Re U ( ) Im I ( ) Im U ( ) Re I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------- =
The calculated R
m
and X
m
values are updated each sample and compared with the
set zone reach. The adaptive tripping counter counts the number of permissive
tripping results. This effectively removes any influence of errors introduced by the
capacitive voltage transformers or by other factors.
The directional evaluations are performed simultaneously in both forward and
reverse directions, and in all six fault loops. Positive sequence voltage and a phase
locked positive sequence memory voltage are used as a reference. This ensures
unlimited directional sensitivity for faults close to the IED point.
6.1.2.5 Directional impedance element for quadrilateral characteristics
The evaluation of the directionality takes place in Directional impedance
quadrilateral function ZDRDIR. Equation 9 and equation 10 are used to classify
that the fault is in forward direction for phase-to-earth fault and phase-to-phase fault.
1 1
1
0.8 1 0.2 1
arg Re
L L M
L
U U
ArgDir ArgNeg s
I
+
- < <
For the L1-L2 element, the equation in forward direction is according to.
1 2 1 2
1 2
0.8 1 0.2 1
arg Re
L L L L M
L L
U U
ArgDir ArgNeg s
I
+
- < <
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 53.
U1
L1
is positive sequence phase voltage in phase L1
U1
L1M
is positive sequence memorized phase voltage in phase L1
I
L1
is phase current in phase L1
U1
L1L2
is voltage difference between phase L1 and L2 (L2 lagging L1)
U1
L1L2M
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
I
L1L2
is current difference between phase L1 and L2 (L2 lagging L1)
120
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115
degrees respectively (as shown in figure 53). It should not be changed unless
system studies have shown the necessity.
ZDRDIR gives binary coded directional information per measuring loop on the
output STDIRCND.
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
R
X
ArgDir
ArgNegRes
en05000722.vsd
IEC05000722 V1 EN
Figure 53: Setting angles for discrimination of forward and reverse fault in
Directional impedance quadrilateral function ZDRDIR
The reverse directional characteristic is equal to the forward characteristic rotated
by 180 degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds
5% of the set base voltage UBase. So the directional element can use it for all
unsymmetrical faults including close-in faults.
For close-in three-phase faults, the U1
L1M
memory voltage, based on the same
positive sequence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is
restored.
After 100ms the following occurs:
121
If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set IED rated current IBase), the condition seals in.
If the fault has caused tripping, the trip endures.
If the fault was detected in the reverse direction, the measuring element
in the reverse direction remains in operation.
If the current decreases below the minimum operating value, the memory
resets until the positive sequence voltage exceeds 10% of its rated value.
6.1.2.6 Simplified logic diagrams
Distance protection zones
The design of the distance protection zones are presented for all measuring loops:
phase-to-earth as well as phase-to-phase.
Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-
phase signals are designated by L1L2, L2L3, and L3L1.
Fulfillment of two different measuring conditions is necessary to obtain the one
logical signal for each separate measuring loop:
Zone measuring condition, which follows the operating equations described
above.
Group functional input signal (STCND), as presented in figure 54.
Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED.
ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.
The STCND input signal represents a connection of six different integer values
from Phase selection with load encroachment, quadrilateral characteristic function
FDPSPDIS within the IED, which are converted within the zone measuring
function into corresponding boolean expressions for each condition separately.
Input signal STCND is connected to FDPSPDIS function output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filters out the
relevant signals depending on the setting of the parameter OperationDir. It must be
configured to the STDIR output on ZDRDIR function.
122
IEC99000557-TIFF V1 EN
Figure 54: Conditioning by a group functional input signal STCND, external
start condition
Composition of the phase start signals for a case, when the zone operates in a non-
directional mode, is presented in figure 55.
en00000488.vsd
STNDL1N
STNDL2N
STNDL3N
STNDL1L2
STNDL2L3
STNDL3L1
OR
OR
OR
OR
AND
AND
AND
AND
BLK
START
STL3
STL2
STL1
IEC00000488 V1 EN
Figure 55: Composition of starting signals in non-directional operating mode
123
Results of the directional measurement enter the logic circuits, when the zone
operates in directional (forward or reverse) mode, as shown in figure 56.
STNDL1N
DIRL1N
STNDL2N
DIRL2N
STNDL3N
DIRL3N
STNDL1L2
DIRL1L2
STNDL2L3
DIRL2L3
STNDL3L1
DIRL3L1
AND
AND
AND
AND
BLK
t
15 ms
STL3
START
STZMPP
AND
AND
AND
AND
AND
AND
OR
OR
OR
OR
OR
OR
en05000778.vsd
STZMPE
STL1
STL2
IEC05000778 V2 EN
Figure 56: Composition of start signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented
in figure 57.
124
en00000490-3.vsd
Timer tPP=On
STZMPP
AND
Timer tPE=On
STZMPE
AND
t
tPP
t
tPE
BLKTR
t
15ms
AND
AND
AND
STL1
STL2
STL3
TRIP
TRL1
TRL2
TRL3
AND
OR
OR
BLK
IEC00000490 2 V1 EN
Figure 57: Tripping logic for the distance protection zone
ZMQPDIS
I3P*
U3P*
BLOCK
VTSZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC06000256 V2 EN
Figure 58: ZMQPDIS function block
ZMQAPDIS
I3P*
U3P*
BLOCK
VTSZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC09000884 V1 EN
Figure 59: ZMQAPDIS function block (zone 2 - 5)
125
ZDRDIR
I3P*
U3P*
STDIR
IEC05000681 V2 EN
Figure 60: ZDRDIR function block
Table 60: ZMQPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
- Group signal for voltage input
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition
Table 61: ZMQPDIS Output signals
TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STND BOOLEAN Non-directional start, issued from any phase or
loop
Table 62: ZMQAPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
126
Table 63: ZMQAPDIS Output signals
loop
Table 64: ZDRDIR Input signals
I3P GROUP
SIGNAL
- Group connection
U3P GROUP
SIGNAL
- Group connection
Table 65: ZDRDIR Output signals
STDIR INTEGER All start signals binary coded
Signals and settings for ZMQPDIS are valid for zone 1 while
signals and settings for ZMQAPDIS are valid for zone 2 - 5
127
Table 66: ZMQPDIS Group settings (basic)
Operation Off
On
- - On Operation Off / On
IBase 1 - 99999 A 1 3000 Base current, i.e. rated current
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage, i.e. rated voltage
OperationDir Off
Non-directional
Forward
Reverse
- - Forward Operation mode of directionality NonDir /
Forw / Rev
X1 0.10 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach
R0 0.50 - 3000.00 ohm/p 0.01 15.00 Zero seq. resistance for zone
RFPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-Ph
RFPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OperationPP Off
On
- - On Operation mode Off / On of Phase-
Phase loops
Timer tPP Off
On
- - On Operation mode Off / On of Zone timer,
Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off
On
- - On Operation mode Off / On of Phase-Earth
loops
Timer tPE Off
On
Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 30 %IB 1 20 Minimum operate delta current for Phase-
Phase loops
IMinOpPE 10 - 30 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 30 %IB 1 5 Minimum operate residual current for
Phase-Earth loops
Table 67: ZMQAPDIS Group settings (basic)
Operation Off
On
OperationDir Off
Non-directional
Forward
Reverse
Forw / Rev
128
RFPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-Ph
OperationPP Off
On
Phase loops
Timer tPP Off
On
Ph-Ph
OperationPE Off
On
loops
Timer tPE Off
On
Ph-E
Phase loops
Phase-Earth loops
Table 68: ZDRDIR Group settings (basic)
ArgNegRes 90 - 175 Deg 1 115 Angle to blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle to blinder in fourth quadrant for
forward direction
IMinOp 1 - 99999 %IB 1 10 Minimum operate current in % of IBase
IBase 1 - 99999 A 1 3000 Base Current
UBase 0.05 - 2000.00 kV 0.05 400.00 Base Voltage
Table 69: ZMQPDIS technical data
Number of zones 5 with selectable
direction
-
Minimum operate residual
current, zone 1
(5-30)% of IBase -
Minimum operate current, phase-
to-phase and phase-to-earth
(10-30)% of IBase -
129
Positive sequence reactance,
zone 1
(0.10-3000.00) /
phase
2.0% static accuracy
2.0 degrees static angular accuracy
Conditions:
Voltage range: (0.1-1.1) x U
r
Current range: (0.5-30) x I
r
Angle: at 0 degrees and 85 degrees
Positive sequence reactance,
zone 2-
5
(0.50-3000.00) /
phase
Positive sequence resistance (0.10-1000.00) /
phase
Zero sequence reactance, zone 1 (0.10-9000.00) /
phase
Zero sequence reactance,
zone 2-
5
(0.50-9000.00) /
phase
Zero sequence resistance (0.50-3000.00) /
phase
Fault resistance, phase-to-earth (1.00-9000.00) /loop
Fault resistance, phase-to-phase (1.00-3000.00) /loop
Dynamic overreach <5% at 85 degrees
measured with CVTs
and 0.5<SIR<30
-
Impedance zone timers (0.000-60.000) s 0.5% 10 ms
Operate time 24 ms typically -
Reset ratio 105% typically -
Reset time 30 ms typically -
6.2 Distance measuring zone, quadrilateral
characteristic for series compensated lines
ZMCPDIS, ZMCAPDIS, ZDSRDIR
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Distance measuring zone, quadrilateral
characteristic for series compensated
lines (zone 1)
ZMCPDIS
S00346 V1 EN
21
Distance measuring zone, quadrilateral
characteristic for series compensated
lines (zone 2-5)
ZMCAPDIS
S00346 V1 EN
21
Directional impedance quadrilateral,
including series compensation
ZDSRDIR
Z<->
IEC09000167 V1 EN
21D
130
6.2.1 Introduction
The line distance protection is a, up to five zone full scheme protection with three
fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault
for each of the independent zones. Individual settings for each zone resistive and
reactive reach give flexibility for use on overhead lines and cables of different
types and lengths.
Quadrilateral characteristic is available.
ZMCPDIS function has functionality for load encroachment which increases the
possibility to detect high resistive faults on heavily loaded lines.
en05000034.vsd
R
X
Forward
operation
Reverse
operation
IEC05000034 V1 EN
Figure 61: Typical quadrilateral distance protection zone with load
encroachment function activated
sensitive and reliable built in phase selection makes the function suitable in
applications with single phase auto-reclosing.
Built-in adaptive load compensation algorithm for the quadrilateral function
prevents overreaching of zone1 at load exporting end at phase to earth-faults on
heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional
(forward or reverse) or non-directional mode. This makes them suitable, together
with different communication schemes, for the protection of power lines and cables
in complex network configurations, such as parallel lines, multi-terminal lines.
131
which means that earth fault loop for phase-to-earth faults and phase-to-phase
faults for forward and reverse faults are executed in parallel.
Figure 62 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones.
en05000458.vsd
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-L2 L2-L3 L3-L1
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1
Zone 1
Zone 2
Zone 3
Zone 4
Zone 5
IEC05000458 V1 EN
Figure 62: The different measuring loops at phase-to-earth fault and phase-to-
phase fault
depending on fault type. Each distance protection zone performs like one
independent distance protection IED with six measuring elements.
Distance measuring zone, quadrilateral characteristic for series compensated lines
(ZMCPDIS) include six impedance measuring loops; three intended for phase-to-
earth faults, and three intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone operates according to the non-directional impedance
characteristics presented in figure 63 and figure 64. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase
characteristic presents the per-phase reach.
132
R1PE+RNFw
RFFwPE
X1FwPE+XNFw
X1RvPE+XNRv
RFFwPE RFRvPE
RFFwPE
RFRvPE
RFRvPE
R
X (Ohm/loop)
(Ohm/loop)
jN
0 1
3
X PE X RVPE
XNRV
-
=
0 1
3
X PE X FWPE
XNFW
-
=
0 1
3
X PG X FWPG
XNFW
-
=
0 1
3
X PG X RVPG
XNRV
-
=
0 1
3
X PE X FwPE
XNFw
-
=
0 1
3
R PE R PE
RNFw
-
=
jN
jN
1
1
X RvPE
XNRv XNFw
X FwPE
=
IEC09000625 V1 EN
Figure 63: Characteristic for the phase-to-earth measuring loops, ohm/loop
domain
133
j
R1PP RFFwPP
X1FwPP
X1RvPP
RFFwPP RFRvPP
RFFwPP
RFRvPP
RFRvPP
R
X (Ohm/phase)
(Ohm/phase)
j
0 1
3
X PE X RVPE
XNRV
-
=
0 1
3
X PE X FWPE
XNFW
-
=
0 1
3
X PG X FWPG
XNFW
-
=
0 1
3
X PG X RVPG
XNRV
-
=
0 1
3
X PE X RVPE
XNRV
-
=
0 1
3
X PE X FWPE
XNFW
-
=
2 2
2 2
2 2
j N
N j
IEC09000632 V1 EN
Figure 64: Characteristic for the phase-to-phase measuring loops
The fault loop reach with respect to each fault type may also be presented as in
figure 65. Note in particular the difference in definition regarding the (fault)
resistive reach for phase-to-phase faults and three-phase faults.
134
UL1
R1 + j X1
IL1
RFPE
Phase-to-earth
fault in phase L1
Phase-to-phase
fault in phase
L1-L2
Three-phase
fault
(Arc + tower
resistance)
0
(R0-R1)/3 +
j (X0-X1)/3 )
IN
UL1
R1 + j X1
IL1
UL2
R1 + j X1
IL2
RFPP
UL1
R1 + j X1
IL1
UL3
R1 + j X1
IL3
0.5RFPP
0.5RFPP
(Arc resistance)
Phase-to-earth
element
Phase-to-phase
element L1-L2
Phase-to-phase
element L1-L3
IEC08000282 V2 EN
measuring point to the fault location. The RFPE and RFPP is the eventual fault
resistance in the fault place.
Regarding the illustration of three-phase fault in figure 65, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.
The zone may be set to operate in Non-directional, Forward or Reverse direction
through the setting OperationDir. The result from respective set value is illustrated
in figure 66. It may be convenient to once again mention that the impedance reach
is symmetric, forward and reverse direction. Therefore, all reach settings apply to
both directions.
135
en05000182.vsd
R
X
R
X
R
X
IEC05000182 V1 EN
Figure 66: Directional operating modes of the distance measuring zone
The operation of Distance measuring zone, quadrilateral characteristic for series
compensated lines (ZMCPDIS,ZMCAPDIS) is blocked if the magnitude of input
currents fall below certain threshold values.
currents.
sum of the three phase currents, that is, residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLn
AB (BC or CA)
< IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IMinOpPE, IMinOpIN and IMinOpPP are
automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, that is, OperationDir=Reverse.
current. Apparent impedances are calculated and compared with the set limits. The
136
calculation of the apparent impedances at ph-ph faults follows equation 11
(example for a phase L1 to phase L2 fault).
Z
app
U
L1
U
L2
I
L1
I
L2
-------------------------
=
respective phase.
The earth return compensation applies in a conventional manner to ph-E faults
(example for a phase L1 to earth fault) according to equation 12.
Z
app
U
L1
I
L1
I
N
KN +
= ------------------------------
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z0 Z1
KN
3 Z1
-
=
EQUATION 2105 V1 EN
0 0 0 Z R jX = +
EQUATION2106 V1 EN
1 1 1 Z R jX = +
EQUATION2107 V1 EN
Where
Here IN is a phasor of the residual current at the IED point. This results in the same
reactance X.
137
The formula given in equation 12 is only valid for no loaded radial feeder
applications. When load is considered in the case of single phase-to-earth fault,
at importing end. IED has an adaptive load compensation which increases the
U R i
X
w
0
------
+
Di
Dt
-----
=
Re U ( ) R Re I ( )
X
w
0
------ +
DRe I ( )
Dt
------------------ =
Im U ( ) R Im I ( )
X
w
0
------ +
DIm I ( )
Dt
----------------- =
with
w
0
2 p f
0
=
where:
f
0
The algorithm calculates Rm measured resistance from the equation for the real
value of the voltage and substitute it in the equation for the imaginary part. The
equation for the Xm measured reactance can then be solved. The final result is
equal to:
138
R
m
Im U ( ) DRe I ( ) Re U ( ) DIm I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------------ =
X
m
w
0
Dt
Re U ( ) Im I ( ) Im U ( ) Re I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------- =
The calculated R
m
and X
m
6.2.2.5 Directionality for series compensation
In the basic distance protection function, the control of the memory for polarizing
voltage is performed by an under voltage control. In case of series compensated
line, a voltage reversal can occur with a relatively high voltage also when the
memory must be locked. Thus, a simple undervoltage type of voltage memory
control can not be used in case of voltage reversal. In the option for series
compensated network the polarizing quantity and memory are controlled by an
impedance measurement criterion.
The polarizing voltage is a memorized positive sequence voltage. The memory is
continuously synchronized via a positive sequence filter. The memory is starting to
run freely instantaneously when a voltage change is detected in any phase. A non-
directional impedance measurement is used to detect a fault and identify the faulty
phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases
are disconnected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault
frequency. This extrapolation is made with a high accuracy and it is not the
accuracy of the memory that limits the time the memory can be used. The network
is at a three phase fault under way to a new equilibrium and the post-fault condition
can only be predicted accurately for a limited time from the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can
not be relied upon and the directional measurement has to be blocked. The
achieved direction criteria are sealed-in when the directional measurement is
blocked and kept until the impedance fault criteria is reset (the direction is stored
until the fault is cleared).
139
This memory control allows in the time domain unlimited correct directional
measurement for all unsymmetrical faults also at voltage reversal. Only at three
phase fault within the range of the set impedance reach of the criteria for control of
the polarization voltage the memory has to be used and the measurement is limited
to 100 ms and thereafter the direction is sealed-in. The special impedance
measurement to control the polarization voltage is set separately and has only to
cover (with some margin) the impedance to fault that can cause the voltage reversal.
The evaluation of the directionality takes place in Directional impedance
quadrilateral, including series compensation (ZDSRDIR) function. Equation 19 and
equation 20 are used to classify that the fault is in forward direction for phase-to-
earth fault and phase-to-phase fault.
1
1
1
arg Re
L M
L
U
ArgDir ArgNeg s
I
- < <
For the L1-L2 element, the equation in forward direction is according to:
1 2
1 2
1
arg Re
L L M
L L
U
ArgDir ArgNeg s
I
- < <
where:
U1
L1M
I
L1
U1
L1L2M
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
I
L1L2
is current difference between phase L1 and L2 (L2 lagging L1)
degrees respectively, see figure 67, and it should not be changed unless system
studies have shown the necessity.
ZDSRDIR generates a binary coded signal on the output STDIR depending on the
evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.
140
R
X
ArgDir
ArgNegRes
en05000722.vsd
IEC05000722 V1 EN
Figure 67: Setting angles for discrimination of forward and reverse fault
by 180 degrees.
The design of distance protection zones are presented for all measuring loops: phase-
to-earth as well as phase-to-phase.
Phase-to-earth related signals are designated by Ln, where n represents the
corresponding phase number (L1, L2, and L3). The phase-to-phase signals are
designated by LnLm, where n and m represent the corresponding phase numbers
(L1L2, L2L3, and L3L1).
above.
Two types of function block, ZMCPDIS and ZMCAPDIS , are used in the IED.
ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.
141
from the phase selection function within the IED, which are converted within the
zone measuring function into corresponding boolean expressions for each
condition separately. It is connected to Phase selection with load enchroachment,
quadrilateral characteristic (FDPSPDIS) function output STCDZ.
Figure 68: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-
142
operates in directional (forward or reverse) mode, as shown in figure 70.
STNDL1N
DIRL1N
STNDL2N
DIRL2N
STNDL3N
DIRL3N
STNDL1L2
DIRL1L2
STNDL2L3
DIRL2L3
STNDL3L1
DIRL3L1
AND
AND
AND
AND
BLK
t
15 ms
STL3
START
STZMPP
AND
AND
AND
AND
AND
AND
OR
OR
OR
OR
OR
OR
en05000778.vsd
STZMPE
STL1
STL2
IEC05000778 V2 EN
Figure 70: Composition of starting signals in directional operating mode
in figure 71.
143
en00000490-3.vsd
Timer tPP=On
STZMPP
AND
Timer tPE=On
STZMPE
AND
t
tPP
t
tPE
BLKTR
t
15ms
AND
AND
AND
STL1
STL2
STL3
TRIP
TRL1
TRL2
TRL3
AND
OR
OR
BLK
IEC00000490 2 V1 EN
Figure 71: Tripping logic for the distance protection zone one
ZMCPDIS
I3P*
U3P*
BLOCK
VTSZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC07000036 V2 EN
Figure 72: ZMCPDIS function block
ZMCAPDIS
I3P*
U3P*
BLOCK
VTSZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC09000890 V1 EN
Figure 73: ZMCAPDIS function block
144
ZDSRDIR
I3P*
U3P*
STFW
STRV
STDIRCND
IEC07000035 V2 EN
Figure 74: ZDSRDIR function block
Input and output signals is shown for zone 1, zone 2 - 5 are equal.
Table 70: ZMCPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
Table 71: ZMCPDIS Output signals
loop
145
Table 72: ZMCAPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
Table 73: ZMCAPDIS Output signals
loop
Table 74: ZDSRDIR Input signals
I3P GROUP
SIGNAL
- Group connection for current
U3P GROUP
SIGNAL
- Group connection for voltage
Table 75: ZDSRDIR Output signals
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per
measuring loop
146
Settings for ZMCPDIS are valid for zone 1, while settings for
ZMCAPDIS are valid for zone 2 - 5
Table 76: ZMCPDIS Group settings (basic)
Operation Off
On
OperationDir Off
Non-directional
Forward
Reverse
Forw / Rev
OperationPP Off
On
Phase loops
X1FwPP 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, forward
R1PP 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
RFFwPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
X1RvPP 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, reverse
RFRvPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
Timer tPP Off
On
Ph-Ph
OperationPE Off
On
loops
X1FwPE 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, forward
R1PE 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
X0PE 0.50 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
R0PE 0.50 - 3000.00 ohm/p 0.01 47.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
X1RvPE 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, reverse
RFRvPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
Timer tPE Off
On
Ph-E
147
Phase loops
Phase-Earth loops
Phase-Earth loops
Table 77: ZMCAPDIS Group settings (basic)
Operation Off
On
OperationDir Off
Non-directional
Forward
Reverse
Forw / Rev
OperationPP Off
On
Phase loops
Ph, forward
angle, Ph-Ph
Ph, reverse
Timer tPP Off
On
Ph-Ph
OperationPE Off
On
loops
E, forward
angle, Ph-E
X0PE 0.50 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
E, reverse
Timer tPE Off
On
Ph-E
148
Phase loops
Phase-Earth loops
Table 78: ZDSRDIR Group settings (basic)
OperationSC NoSeriesComp
SeriesComp
- - SeriesComp Special directional criteria for voltage
reversal
IBase 1 - 99999 A 1 3000 Base setting for current level
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for voltage level
Phase-Earth loops
Phase loops
ArgNegRes 90 - 175 Deg 1 130 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
OperationLdCh Off
On
- - On Operation of load discrimination
characteristic
RLdFw 1.00 - 3000.00 ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
Ph, forward
angle, Ph-Ph
Ph, reverse
E, forward
angle, Ph-E
X0FwPE 0.50 - 9000.00 ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
forward
149
E, reverse
X0RvPE 0.50 - 9000.00 ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
reverse
Table 79: ZMCPDIS, ZMCAPDIS technical data
Number of zones 5 with selectable direction -
Minimum operate residual
current, zone 1
(5-30)% of IBase -
Minimum operate current, Ph-Ph
and Ph-E
(10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) /phase 2.0% static accuracy
2.0 degrees static angular
accuracy
Conditions:
r
r
Angle: at 0 degrees and 85
degrees
Positive sequence resistance (0.10-1000.00) /phase
Zero sequence reactance (0.50-9000.00) /phase
Zero sequence resistance (0.50-3000.00) /phase
Fault resistance, Ph-E (1.00-9000.00) /loop
Fault resistance, Ph-Ph (1.00-3000.00) /loop
Dynamic overreach <5% at 85 degrees measured
with CCVTs and 0.5<SIR<30
-
6.3 Phase selection, quadrilateral characteristic with
fixed angle FDPSPDIS
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Phase selection with load
encroachment, quadrilateral
characteristic
FDPSPDIS
Z<phs
SYMBOL-DD V1 EN
21
150
6.3.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations, the rate of expansion and
reinforcement of the power system is reduced, for example, difficulties to get
permission to build new power lines. The ability to accurately and reliably classify
the different types of fault, so that single pole tripping and autoreclosing can be
used plays an important role in this matter. Phase selection, quadrilateral
characteristic with fixed angle FDPSPDIS is designed to accurately select the
proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make
fault resistance coverage difficult to achieve. Therefore, FDPSPDIS has a built-in
algorithm for load encroachment, which gives the possibility to enlarge the
resistive setting of both the phase selection and the measuring zones without
interfering with the load.
The extensive output signals from the phase selection gives also important
information about faulty phase(s), which can be used for fault analysis.
The basic impedance algorithm for the operation of the phase selection measuring
elements is the same as for the distance zone measuring function. Phase selection
with load encroachment, quadrilateral characteristic FDPSPDIS includes six
impedance measuring loops; three intended for phase-to-earth faults, and three
intended for phase-to-phase faults as well as for three-phase faults.
The difference, compared to the distance zone measuring function, is in the
combination of the measuring quantities (currents and voltages) for different types
of faults.
A current-based phase selection is also included. The measuring elements
continuously measure three phase currents and the residual current, and compare
them with the set values. The current signals are filtered by Fourier's recursive
filter, and separate trip counter prevents too high overreaching of the measuring
elements.
The characteristic is basically non-directional, but FDPSPDIS uses information
from the directional function to discriminate whether the fault is in forward or
reverse direction.
The start condition STCNDZ is essentially based on the following criteria:
1. Residual current criteria, that is, separation of faults with and without earth
connection
2. Regular quadrilateral impedance characteristic
3. Load encroachment characteristics is always active but can be switched off by
selecting a high setting.
151
The current start condition STCNDI is based on the following criteria:
1. Residual current criteria
2. No quadrilateral impedance characteristic. The impedance reach outside the
load area is theoretically infinite. The practical reach, however, will be
determined by the minimum operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by
selecting a high setting.
The STCNDI output is non-directional. The directionality is determined by the
distance zones directional function. There are outputs from FDPSPDIS that
indicate whether a start is in forward or reverse direction or non-directional, for
example STFWL1, STRVL1 and STNDL1.
These directional indications are based on the sector boundaries of the directional
function and the impedance setting of FDPSPDIS function. Their operating
characteristics are illustrated in figure 75.
en08000286.vsd
R
X
R
X
R
X
Non-directional (ND) Forward (FW) Reverse (RV)
IEC08000286 V1 EN
Figure 75: Characteristics for non-directional, forward and reverse operation
of Phase selection with load encroachment, quadrilateral
characteristic FDPSPDIS
The setting of the load encroachment function may influence the total operating
characteristic, (for more information, refer to section "Load encroachment").
The input DIRCND contains binary coded information about the directional
coming from the directional function . It shall be connected to the STDIR output on
ZDRDIR, directional measuring block. This information is also transferred to the
input DIRCND on the distance measuring zones, that is, the ZMQPDIS, distance
measuring block.
The code built up for the directionality is as follows:
152
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
If the binary information is 1 then it will be considered that we have start in
forward direction in phase L1. If the binary code is 3 then we have start in forward
direction in phase L1 and L2, binary code 192 means start in reverse direction in
phase L1 and L2A and B etc.
The STCNDZ or STCNDI output contains, in a similar way as DIRCND, binary
coded information, in this case information about the condition for opening correct
fault loop in the distance measuring element. It shall be connected to the STCND
input on the ZMQPDIS, distance measuring block.
The code built up for release of the measuring fault loops is as follows:
STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
6.3.2.1 Phase-to-earth fault
For a phase-to-earth fault, the measured impedance by FDPSPDIS will be
according to equation 21.
Index PHS in images and equations reference settings for Phase
selection with load encroachment function FDPSPDIS.
PHSn
ULn
Z
ILn
=
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FDPSPDIS function at phase-to-earth fault is according to
figure 76. The characteristic has a fixed angle for the resistive boundary in the first
quadrant of 60.
The resistance RN and reactance XN are the impedance in the earth-return path
defined according to equation 22 and equation 23.
0 1
3
R R
RN
-
=
153
0 1
3
X X
XN
-
=
en06000396.vsd
RFFwPE
X1+XN
R (Ohm/loop)
X (ohm/loop)
RFRvPE
RFRvPE
RFFwPE
Kr(X1+XN)
RFRvPE
Kr(X1+XN)
X1+XN
RFFwPE
60 deg
60 deg
=
1
Kr
tan(60deg)
IEC06000396 V2 EN
Figure 76: Characteristic of FDPSPDIS for phase-to-earth fault (setting
parameters in italic), ohm/loop domain (directional lines are drawn
as "line-dot-dot-line")
Besides this, the 3I
0
residual current must fulfil the conditions according to
equation 24 and equation 25.
0 3 I 0.5 IMinOpPE
3 I0
INReleasePE
100
------------------------------------
Iphmax
where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-
to-earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
154
6.3.2.2 Phase-to-phase fault
For a phase-to-phase fault, the measured impedance by FDPSPDIS will be
according to equation 26.
2
ULm ULn
ZPHS
ILn
-
=
-
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the
phase current in the lagging phase n.
The operation characteristic is shown in figure 77.
X1
R
X
0.5RFFwPP
KrX1
KrX1
X1
60 deg
60 deg
0.5RFFwPP 0.5RFRvPP
0.5RFRvPP
0.5RFRvPP 0.5RFFwPP
1
Kr
tan(60deg)
=
) / ( phase W
) / ( phase W
IEC09000047 V2 EN
Figure 77: The operation characteristics for FDPSPDIS at phase-to-phase
fault (setting parameters in italic, directional lines drawn as "line-dot-
dot-line"), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current
conditions that have to be fulfilled in order to release the phase-to-phase loop.
Those are according to equation 27 or equation 28.
0 3I IMinOpPE <
155
0 max 3
100
INBlockPP
I Iph <
where:
IMinOpPE is the minimum operation current for earth measuring loops,
INBlockPP is 3I
0
limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
6.3.2.3 Three-phase faults
The operation conditions for three-phase faults are the same as for phase-to-phase
fault, that is equation 26, equation 27 and equation 28 are used to release the
operation of the function.
However, the reach is expanded by a factor 2/3 (approximately 1.1547) in all
directions. At the same time the characteristic is rotated 30 degrees, counter-
clockwise. The characteristic is shown in figure 78.
0.5RFFwPPK3
K3 = 2 / v(3)
X1K3
90 deg
0.5RFRvPPK3
30 deg
R (O/phase)
X (O/phase)
4 X1
3
4 RFFwPP
6
IEC05000671 V3 EN
Figure 78: The characteristic of FDPSPDIS for three-phase fault (setting
parameters in italic)
156
6.3.2.4 Load encroachment
Each of the six measuring loops has its own load encroachment characteristic based
on the corresponding loop impedance. The load encroachment functionality is
always active, but can be switched off by selecting a high setting.
The outline of the characteristic is presented in figure 79. As illustrated, the
resistive blinders are set individually in forward and reverse direction while the
angle of the sector is the same in all four quadrants.
R
X
RLdFw
RLdRv
ArgLd
ArgLd ArgLd
ArgLd
IEC09000042 V1 EN
Figure 79: Characteristic of load encroachment function
The influence of load encroachment function on the operation characteristic is
dependent on the chosen operation mode of FDPSPDIS function. When output
signal STCNDZ is selected, the characteristic for FDPSPDIS (and also zone
measurement depending on settings) will be reduced by the load encroachment
characteristic (see figure 80, left illustration).
When output signal STCNDI is selected, the operation characteristic will be as the
right illustration in figure 80. The reach will in this case be limit by the minimum
operation current and the distance measuring zones.
157
R
X
STCNDZ STCNDI
R
X
en05000197.vsd
IEC05000197 V1 EN
Figure 80: Difference in operating characteristic depending on operation
mode when load encroachment is activated
When FDPSPDIS is set to operate together with a distance measuring zone the
resultant operate characteristic could look like in figure 81. The figure shows a
distance measuring zone operating in forward direction. Thus, the operating area is
highlighted in black.
R
X
Distance measuring zone
Directional line
Load encroachment
characteristic
"Phase selection"
"quadrilateral" zone
en05000673.vsd
IEC05000673 V1 EN
Figure 81: Operating characteristic in forward direction when load
encroachment is activated
158
Figure 81 is valid for phase-to-earth. During a three-phase fault, or load, when the
quadrilateral phase-to-phase characteristic is subject to enlargement and rotation
the operate area is transformed according to figure 82. Notice in particular what
happens with the resistive blinders of the "phase selection" "quadrilateral" zone.
Due to the 30-degree rotation, the angle of the blinder in quadrant one is now 90
degrees instead of the original 60 degrees. The blinder that is nominally located to
quadrant four will at the same time tilt outwards and increase the resistive reach
around the R-axis. Consequently, it will be more or less necessary to use the load
encroachment characteristic in order to secure a margin to the load impedance.
R
X
Distance measuring zone
Phase selection
Quadrilateral zone
) / ( phase W
) / ( phase W
IEC09000049 V1 EN
Figure 82: Operating characteristic for FDPSPDIS in forward direction for three-
phase fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is
presented in fig 83. Since the load characteristic is based on the same measurement
as the quadrilateral characteristic, it will rotate with the quadrilateral characteristic
clockwise by 30 degrees when subject to a pure phase-to-phase fault. At the same
time the characteristic will "shrink" by 2/3, from the full RLdFw and RLdRv
reach, which is valid at load or three-phase fault.
159
R
X
IEC08000437.vsd
IEC08000437 V1 EN
Figure 83: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the
quadrilateral characteristic since not all phase-to-phase loops will be fully affected
by a fault between two phases. It should also provide better fault resistive coverage
in quadrant one. The relative loss of fault resistive coverage in quadrant four
should not be a problem even for applications on series compensated lines.
6.3.2.5 Minimum operate currents
The operation of the Phase selection with load encroachment function (FDPSPDIS)
is blocked if the magnitude of input currents falls below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS
value of the current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2ILn<IMinOpPP).
Figure 84 presents schematically the creation of the phase-to-phase and phase-to-
earth operating conditions. Consider only the corresponding part of measuring and
160
logic circuits, when only a phase-to-earth or phase-to-phase measurement is
available within the IED.
&
& t
10 ms
t
20 ms & t
15 ms
t
15 ms
Bool to
integer
STCNDI
STPE
STPP
IRELPE
IRELPP
BLOCK
&
Load encroachment block
0 3I IMinOpPE <
0 max 3
100
INBlockPP
I Iph <
&
OR
0 3 0.5 I IMinOpPE
0 3
100
phmax
INReleasePE
I I
IEC08000439 1 EN V1 EN
Figure 84: Phase-to-phase and phase-to-earth operating conditions (residual
current criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDI
output signal is created as a combination of the load encroachment characteristic
and current criteria, refer to figure 84. This signal can be configured to STCND
functional input signals of the distance protection zone and this way influence the
operation of the phase-to-phase and phase-to-earth zone measuring elements and
their phase related starting and tripping signals.
Figure 85 presents schematically the composition of non-directional phase
selective signals STNDLn. Internal signals ZMLnN and ZMLmLn (m and n
change between one and three according to the phase number) represent the
fulfilled operating criteria for each separate loop measuring element, that is, within
the characteristic.
161
ZML1N
ZML2N
AND
AND
AND
ZML3N
IRELPE
AND
AND
AND
ZML1L2
ZML2L3
ZML3L1
IRELPP
INDL1N
INDL2N
INDL3N
OR
OR
OR
OR
INDL3L1
INDL2L3
INDL1L2
t
15 ms
t
15 ms
t
15 ms
t
15 ms
STNDPE
STNDL1
STNDL2
STNDL3
OR t
15 ms
STNDPP
Figure 85: Composition on non-directional phase selection signals
Composition of the directional (forward and reverse) phase selective signals is
presented schematically in figure 87 and figure 86. The directional criteria appears
as a condition for the correct phase selection in order to secure a high phase
selectivity for simultaneous and evolving faults on lines within the complex
network configurations. Internal signals DFWLn and DFWLnLm present the
corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 87) represents the forward direction as well as the
designation RV (figure 86) represents the reverse direction. All directional signals
are derived within the corresponding digital signal processor.
Figure 86 presents additionally a composition of a STCNDZ output signal, which
is created on the basis of impedance measuring conditions. This signal can be
configured to STCND functional input signals of the distance protection zone and
this way influence the operation of the phase-to-phase and phase-to-earth zone
measuring elements and their phase related starting and tripping signals.
162
INDL1N
DRVL1N
AND
AND
INDL1L2
DRVL1L2
AND
INDL3L1
DRVL3L1
AND
INDL2N
DRVL2N
AND
INDL1L2
DRVL2L3
AND
INDL2L3
AND
INDL3N
DRVL3N
AND
INDL2L3
AND
INDL3L1
OR
OR
OR
OR
t
15 ms
t
15 ms
t
15 ms
t
15 ms
STRVL1
STRVPE
STRVL2
STRVL3
INDL1N
INDL2N
INDL3N
INDL1L2
INDL2L3
INDL3L1
Bool to
integer
STCNDZ
OR t
15 ms
STRVPP
Figure 86: Composition of phase selection signals for reverse direction
163
INDL1N
DFWL1N
AND
AND
INDL1L2
DFWL1L2
AND
INDL3L1
DFWL3L1
AND
INDL2N
DFWL2N
AND
INDL1L2
DFWL2L3
AND
INDL2L3
AND
INDL3N
DFWL3N
AND
INDL2L3
AND
INDL3L1
OR
OR
OR
OR
t
15 ms
t
15 ms
t
15 ms
t
15 ms
AND
AND
AND
AND
AND
AND
AND
OR
OR
t
15 ms
t
15 ms
t
15 ms
t
15 ms
t
15 ms
STFW1PH
STFWL1
STFWPE
STFWL2
STFW2PH
STFWL3
STFW3PH
OR t
15 ms
STFWPP
IEC05000201 V2 EN
Figure 87: Composition of phase selection signals for forward direction
Figure 88 presents the composition of output signals TRIP and START, where
internal signals STNDPP, STFWPP and STRVPP are the equivalent to internal
signals STNDPE, STFWPE and STRVPE, but for the phase-to-phase loops.
164
AND
AND
OR
t
tPP
t
tPE
TRIP
TimerPP=Off
AND
TimerPE=Off
AND
OR
STFWPE
STRVPE
STNDPE
STFWPP
STRVPP
STNDPP
OR
OR
OR
START
IEC08000441 1 V2 EN
Figure 88: TRIP and START signal logic
FDPSPDIS
I3P*
U3P*
BLOCK
DIRCND
TRIP
START
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI
IEC06000258 V2 EN
Figure 89: FDPSPDIS function block
165
Table 80: FDPSPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
Table 81: FDPSPDIS Output signals
TRIP BOOLEAN Trip output
START BOOLEAN Start in any phase or loop
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWPE BOOLEAN Earth fault detected in forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVPE BOOLEAN Earth fault detected in reverse direction
STNDL1 BOOLEAN Non directional start in L1
STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth
measuring elements
STPP BOOLEAN Current conditions release of phase-phase
measuring elements
STCNDZ INTEGER Start condition (PHS,LE and I based)
STCNDI INTEGER Start condition (LE and I based)
166
Table 82: FDPSPDIS Group settings (basic)
INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
Phase loops
Phase-Earth loops
Table 83: FDPSPDIS Group settings (advanced)
TimerPP Off
On
- - Off Operation mode Off / On of Zone timer,
Ph-Ph
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off
On
- - Off Operation mode Off / On of Zone timer,
Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
167
Table 84: FDPSPDIS technical data
Minimum operate current (5-30)% of IBase -
Reactive reach, positive
sequence, forward and reverse
(0.503000.00) /phase 2.0% static accuracy
accuracy
Conditions:
r
r
degrees
Resistive reach, positive
sequence
(0.101000.00) /phase
Reactive reach, zero sequence,
forward and reverse
(0.509000.00) /phase
Resistive reach, zero sequence (0.503000.00) /phase
Fault resistance, phase-to-earth
faults, forward and reverse
(1.009000.00) /loop
Fault resistance, phase-to-
phase faults, forward and reverse
(0.503000.00) /loop
Load encroachment criteria:
Load resistance, forward and
reverse
Safety load impedance angle

(1.003000.00) /phase
(5-70) degrees
6.4 Full-scheme distance measuring, Mho
characteristic ZMHPDIS
identification
IEC 60617 identification ANSI/IEEE
C37.2 device
number
Full-scheme distance protection, mho
characteristic
ZMHPDIS
S00346 V1 EN
21
6.4.1 Introduction
The numerical mho line distance protection is a, up to five zone full scheme
protection for back-up detection of short circuit and earth faults. The full scheme
technique provides back-up protection of power lines with high sensitivity and low
requirement on remote end communication. The five zones have fully independent
measuring and settings, which gives high flexibility for all types of lines.
The IED can be used up to the highest voltage levels. It is suitable for the
protection of heavily loaded lines and multi-terminal lines where the requirement
for tripping is one-, two- and/or three-pole.
168
applications with single phase autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching at phase-to-
earth faults on heavily loaded power lines, see figure 90.
en07000117.vsd
jX
Operation area Operation area
R
Operation area
No operation area No operation area
IEC07000117 V1 EN
Figure 90: Load encroachment influence on the offset mho characteristic
(forward or reverse) or non-directional mode (offset). This makes them suitable,
together with different communication schemes, for the protection of power lines
and cables in complex network configurations, such as parallel lines, multi-
terminal lines and so on.
The possibility to use the phase-to-earth quadrilateral impedance characteristic
together with the mho characteristic increases the possibility to overcome eventual
lack of sensitivity of the mho element due to the shaping of the curve at remote end
faults.
The integrated control and monitoring functions offer effective solutions for
operating and monitoring all types of transmission and sub-transmission lines.
which means that each fault loop for phase-to-earth faults and phase-to-phase faults
are executed in parallel.
169
depending on fault type. So each distance protection zone performs like one
independent distance protection function with six measuring elements.
The distance function consists of five instances. Each instance can be selected to be
either forward or reverse with positive sequence polarized mho characteristic
alternatively self polarized offset mho characteristics with reverse offset. The
operating characteristic is in accordance to figure 91 where zone 5 is selected offset
mho.
R
jx
Mho, zone4
Mho, zone3
Mho, zone2
Mho, zone1
Offset mho, zone5
X
Zs=0
R
Zs=Z1
Zs=2Z1
IEC09000143 V1 EN
Figure 91: Mho, offset mho characteristic and the source impedance influence on the mho characteristic
The mho characteristic has a dynamic expansion due to the source impedance.
Instead of crossing the origin as for the mho to the left of figure 91, which is only
valid where the source impedance is zero, the crossing point is moved to the
coordinates of the negative source impedance given an expansion of the circle
shown to the right of figure 91.
The polarization quantities used for the mho circle are 100% memorized positive
sequence voltages. This will give a somewhat less dynamic expansion of the mho
circle during faults. However, if the source impedance is high, the dynamic
expansion of the mho circle might lower the security of the function too much with
high loading and mild power swing conditions.
The mho distance element has a load encroachment function which cuts off a
section of the characteristic when enabled. The function is enabled by setting the
setting parameter LoadEnchMode to On. Enabling of the load encroachment
170
function increases the possibility to detect high resistive faults without interfering
with the load impedance. The algorithm for the load encroachment is located in the
Faulty phase identification with load encroachment for mho function FMPSPDIS,
where also the relevant settings can be found. Information about the load
encroachment from FMPSPDIS to the zone measurement is given in binary format
to the input signal LDCND.
6.4.2.3 Basic operation characteristics
Each impedance zone can be switched On and Off by the setting parameter
Operation.
Each zone can also be set to Non-directional, Forward or Reverse by setting the
parameter DirMode.
The operation for phase-to-earth and phase-to-phase fault can be individually
switched On and Off by the setting parameter OpModePE and OpModePP.
For critical applications such as for lines with high SIRs as well as CVTs, it is
possible to improve the security by setting the parameter ReachMode to
Underreach. In this mode the reach for faults close to the zone reach is reduced by
20% and the filtering is also introduced to increase the accuracy in the measuring.
If the ReachMode is set to Overreach no reduction of the reach is introduced and
no extra filtering introduced. The latter setting is recommended for overreaching
pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on
transients is not a major issue either because of less likelihood of overreach with
higher settings or the fact that these elements do not initiate tripping unconditionally.
The offset mho characteristic can be set in Non-directional, Forward or Reverse by
the setting parameter OffsetMhoDir. When Forward or Reverse is selected a
directional line is introduced. Information about the directional line is given from
the directional element and given to the measuring element as binary coded signal
to the input DIRCND.
The zone reach for phase-to-earth fault and phase-to-phase fault is set individually
in polar coordinates.
The impedance is set by the parameters ZPE and ZPP and the corresponding
arguments by the parameters ZAngPE and ZAngPP.
Compensation for earth-return path for faults involving earth is done by setting the
parameter KNMag and KNAng where KNMag is the magnitude of the earth-return
path and KNAng is the difference of angles between KNMag and ZPE.
Z0-Z1
3 Z1
KNMag =

171
( )
0 1
arg
3 1
Z Z
KNAng
Z
-
=

where
Z0 is the complex zero sequence impedance of the line in /phase
Z1 is the complex positive sequence impedance of the line in /phase
The phase-to-earth and phase-to-phase measuring loops can be time delayed
individually by setting the parameter tPE and tPP respectively. To release the time
delay, the operation mode for the timers, OpModetPE and OpModetPP, has to be
set to On. This is also the case for instantaneous operation.
The function can be blocked in the following ways:
activating of input BLOCK blocks the whole function
activating of the input BLKZ (fuse failure) blocks all output signals
activating of the input BLKZMTD blocks the delta based algorithm
activating of the input BLKHSIR blocks the instantaneous part of the
algorithm for high SIR values
activating of the input BLKTRIP blocks all output signals
activating the input BLKPE blocks the phase-to-earth fault loop outputs
activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of input signal BLKZ can be made by external fuse failure function
or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In
both cases the output BLKZ in the Mho supervision logic shall be connected to the
input BLKZ in the Mho distance function block (ZMHPDIS)
The input signal BLKZMTD is activated during some ms after fault has been
detected by ZSMGAPC to avoid unwanted operations due to transients. It shall be
connected to the BLKZMTD output signal of ZSMGAPC function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built-
in resonance circuit in the CVT, which reduce the secondary voltage for a while.
The input BLKHSIR shall be connected to the output signal HSIR on ZSMGAPC
for increasing of the filtering and high SIR values. This is valid only when
permissive underreach scheme is selected by setting ReachMode=Underreach.
6.4.2.4 Theory of operation
The mho algorithm is based on phase comparison of a operating phasor and a
polarizing phasor. When the operating phasor leads the reference phasor by more
than 90 degrees, the function will operate and give a trip output.
172
Phase-to-phase fault
Mho
The plain mho circle has the characteristic as in figure 92. The condition for
deriving the angle is according to equation 31.
1 2 1 2 arg( ) arg( ) L L L L
pol
U I ZPP U b = - -
where
U L1L2
EQUATION1790 V2
EN

is the voltage vector difference between phases L1 and L2
I L1L2
EQUATION1791 V2
EN

is the current vector difference between phases L1 and L2
ZPP is the positive sequence impedance setting for phase-to-phase fault
U
pol
is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage
(UL1L2 for phase L1 to L2 fault). The memorized voltage will prevent collapse of
the mho circle for close in faults.
Operation occurs if 90270
173
ZPP I 2 L 1 L
L1L2
comp U = U
IL1L2X
IL1L2R
-
ZPP I
2 L 1 L

2 L 1 L U
pol U
en07000109.vsd
IEC07000109 V1 EN
Figure 92: Simplified mho characteristic and vector diagram for phase L1-to-
L2 fault
Offset Mho
The characteristic for offset mho is a circle where two points on the circle are the
setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has
the settable angle AngZPP and the angle for ZRevPP is AngZPP+180.
The condition for operation at phase-to-phase fault is that the angle between the
two compensated voltages Ucomp1 and Ucomp2 is greater than or equal to 90
(figure 93). The angle will be 90 for fault location on the boundary of the circle.
The angle for L1-to-L2 fault can be defined according to equation 32.
L1L2
L1L2
-I ZPP
arg
U-(-I ZRevPP)
U
b =

where
U
EQUATION1800 V1 EN

is the U
L1L2
voltage
ZRevPP is the positive sequence impedance setting for phase-to-phase fault in reverse direction
174
ZPP I 2 L 1 L
L1L2
comp1 U = U
IL1L2jX
IL1L2R
-
ZPP I
2 L 1 L

vPP Re Z 2 L 1 L I
U
U 2 Ucomp = =
-
IFZF=UL1L2
en07000110.vsd
IEC07000110 V1 EN
Figure 93: Simplified offset mho characteristic and voltage vectors for phase
L1-to-L2 fault.
Operation occurs if 90270.
Offset mho, forward direction
When forward direction has been selected for the offset mho, an extra criteria
beside the one for offset mho (90<<270) is introduced, that is the angle between
the voltage and the current must lie between the blinders in second quadrant and
fourth quadrant. See figure 94. Operation occurs if 90270 and
ArgDirArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
is calculated according to equation 32
The directional information is brought to the mho distance measurement from the
mho directional element as binary coded information to the input DIRCND. See
Directional impedance element for mho characteristic (ZDMRDIR) for information
about the mho directional element.
175
IL1L2jX
UL1L2
f
ArgDir
IL1L2
ArgNegRes
ZPP
en07000111.vsd
IEC07000111 V1 EN
Figure 94: Simplified offset mho characteristic in forward direction for phase
L1-to-L2 fault
Offset mho, reverse direction
The operation area for offset mho in reverse direction is according to figure 95.
The operation area in second quadrant is ArgNegRes+180.
Operation occurs if 90270 and 180 - ArgDir ArgNegRes + 180
The is derived according to equation 32 for the mho circle and is the angle
between the voltage and current.
176
X
R
ArgDir
ArgNegRes
ZPP
ZRevPP
UL1L2
IL1L2
en06000469.eps
IEC06000469 V1 EN
Figure 95: Operation characteristic for reverse phase L1-to-L2 fault
Phase-to-earth fault
Mho
The measuring of earth faults uses earth-return compensation applied in a
conventional way. The compensation voltage is derived by considering the
influence from the earth-return path.
For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as
shown in figure 96.
1 L loop pol Ucomp U I Z = -
where
U
pol
is the polarizing voltage (memorized UL1 for Phase L1-to- earth fault)
Z
loop
is the loop impedance, which in general terms can be expressed as
( )
1 1 Z +ZN 1 Z KN = +
177
where
Z
1
is the positive sequence impedance of the line (Ohm/phase)
KN is the zero-sequence compensator factor
The angle between the Ucomp and the polarize voltage Upol for a L1-to-earth
fault is
b = arg [U
L1
-(I
L1
+3
I0
KN) ZPE] - arg( Upol)
GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V1 EN (Equation 35)
where
U
L1
is the phase voltage in faulty phase L1
I
L1
is the phase current in faulty phase L1
I
A
is the phase current in faulty phase A
3I
0
is the zero-sequence current in faulty phase L1
KN
EQUATION1593 V1 EN
Z0-Z1
3 Z1
EQUATION1594 V1 EN
the setting parameter for the zero sequence compensation consisting of the
magnitude KN and the angle KNAng.
U
pol
is the 100% of positive sequence memorized voltage U
L1
V
pol
is the 100% of positive sequence memorized voltage V
A
comp U
IL1X
IL1R
IL1ZPE
IL1ZN
loop L1 Z I
f
Upol
IL1 (Ref)
en06000472_2.vsd
IEC06000472 V2 EN
Figure 96: Simplified offset mho characteristic and vector diagram for phase
L1-to-earth fault
178
Offset mho
The characteristic for offset mho at earth fault is a circle containing the two vectors
from the origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for
the positive sequence impedance in forward respective reverse direction. The
vector ZPE in the impedance plane has the settable angle AngZPE and the angle for
ZRevPP is AngZPE+180.
The condition for operation at phase-to-earth fault is that the angle between the
two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90 see
figure 97. The angle will be 90 for fault location on the boundary of the circle.
The angle for L1-to-earth fault can be defined as
L1 L1L
L1 L1
U - I
arg
U -(- I Re )
ZPE
Z vPE
b =

where
1 L
U
EQUATION1
805 V1 EN
is the phase L1 voltage
ZPE I 1 L
ZPE L1 I - U = U
L1
comp1
jX
IL1L2 R
vPe Re Z I - L1
UL1
)
L1 = ZRevPE (-I - 1 L 2 comp U U
en 06000465. vsd
2 I 1 L L
IEC06000465 V1 EN
Figure 97: Simplified offset mho characteristic and voltage vector for phase L1-
to-L2 fault
179
Offset mho, forward direction
In the same way as for phase-to-phase fault, selection of forward direction of offset
mho will introduce an extra criterion for operation. Beside the basic criteria for
offset mho according to equation 38 and 90270, also the criteria that the angle
between the voltage and the current must lie between the blinders in second and
fourth quadrant. See figure 98. Operation occurs if 90270 and
ArgDirArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
is calculated according to equation 38
IL1jX
UL1
f
ArgDir
IL1
ArgNegRes
IL1R
en 06000466. vsd
IEC06000466 V1 EN
Figure 98: Simplified characteristic for offset mho in forward direction for L1-to-
earth fault
Offset mho, reverse direction
In the same way as for offset in forward direction, the selection of offset mho in
reverse direction will introduce an extra criterion for operation compare to the
normal offset mho. The extra is that the angle between the fault voltage and the
fault current shall lie between the blinders in second and fourth quadrant. The
operation area in second quadrant is limited by the blinder defined as 180 -ArgDir
and in fourth quadrant ArgNegRes+180, see figure 99.
180
The conditions for operation of offset mho in reverse direction for L1-to-earth fault
is 90270 and 180-ArgdirArgNegRes+180.
The is derived according to equation 38 for the offset mho circle and is the
angle between the voltage and current.
X
R
ArgDir
ArgNegRes
ZPE
ZRevPE
UL1
IL1
en06000470.eps
IEC06000470 V1 EN
Figure 99: Simplified characteristic for offset mho in reverse direction for L1-to-
earth fault
181
ZMHPDIS
I3P*
U3P*
CURR_INP*
VOLT_INP*
POL_VOLT*
BLOCK
BLKZ
BLKZMTD
BLKHSIR
BLKTRIP
BLKPE
BLKPP
DIRCND
STCND
LDCND
TRIP
TRL1
TRL2
TRL3
TRPE
TRPP
START
STL1
STL2
STL3
STPE
STPP
IEC06000423 V2 EN
Figure 100: ZMHPDIS function block
Table 85: ZMHPDIS Input signals
I3P GROUP
SIGNAL
- Connection for current sample signals
U3P GROUP
SIGNAL
- Connection for voltage sample signals
CURR_INP GROUP
SIGNAL
- Connection for current signals
VOLT_INP GROUP
SIGNAL
- Connection for voltage signals
POL_VOLT GROUP
SIGNAL
- Connection for polarizing voltage
BLKZ BOOLEAN 0 Block due to fuse failure
BLKZMTD BOOLEAN 0 Block signal for blocking of time domaine function
BLKHSIR BOOLEAN 0 Blocks time domain function at high SIR
BLKTRIP BOOLEAN 0 Blocks all operate output signals
BLKPE BOOLEAN 0 Blocks phase-to-earth operation
BLKPP BOOLEAN 0 Blocks phase-to-phase operation
LDCND INTEGER 0 External load condition (loop enabler)
182
Table 86: ZMHPDIS Output signals
TRIP BOOLEAN Trip General
TRL1 BOOLEAN Trip phase L1
TRPE BOOLEAN Trip phase-to-earth
TRPP BOOLEAN Trip phase-to-phase
START BOOLEAN Start General
STL1 BOOLEAN Start phase L1
STPE BOOLEAN Start phase-to-earth
STPP BOOLEAN Start phase-to-phase
Table 87: ZMHPDIS Group settings (basic)
Operation Off
On
- - On Operation Off/On
IBase 1 - 99999 A 1 3000 Base current
DirMode Off
Offset
Forward
Reverse
- - Forward Direction mode
LoadEnchMode Off
On
- - Off Load enchroachment mode Off/On
ReachMode Overreach
Underreach
- - Overreach Reach mode Over/Underreach
OpModePE Off
On
loops
ZPE 0.005 - 3000.000 ohm/p 0.001 30.000 Positive sequence impedance setting for
Phase-Earth loop
ZAngPE 10 - 90 Deg 1 80 Angle for positive sequence line
impedance for Phase-Earth loop
KN 0.00 - 3.00 - 0.01 0.80 Magnitud of earth return compensation
factor KN
KNAng -180 - 180 Deg 1 -15 Angle for earth return compensation
factor KN
ZRevPE 0.005 - 3000.000 ohm/p 0.001 30.000 Reverse reach of the phase to earth
loop(magnitude)
tPE 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
earth elements
183
IMinOpPE 10 - 30 %IB 1 20 Minimum operation phase to earth current
OpModePP Off
On
Phase loops
ZPP 0.005 - 3000.000 ohm/p 0.001 30.000 Impedance setting reach for phase to
phase elements
ZAngPP 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Phase elements
ZRevPP 0.005 - 3000.000 ohm/p 0.001 30.000 Reverse reach of the phase to phase
loop(magnitude)
tPP 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to phase
IMinOpPP 10 - 30 %IB 1 20 Minimum operation phase to phase
current
Table 88: ZMHPDIS Group settings (advanced)
OffsetMhoDir Non-directional
Forward
Reverse
- - Non-directional Direction mode for offset mho
OpModetPE Off
On
Ph-E
OpModetPP Off
On
Ph-ph
Table 89: ZMHPDIS technical data
Number of zones with selectable
directions
Max 5 with selectable direction -
Minimum operate current (1030)% of I
Base
-
Positive sequence impedance,
phase-to-earth loop
(0.0053000.000) W/phase 2.0% static accuracy
Conditions:
r
r
degrees
Positive sequence impedance
angle, phase-to-earth loop
(1090) degrees
Reverse reach, phase-to-earth
loop (Magnitude)
(0.0053000.000) /phase
Magnitude of earth return
compensation factor KN
(0.003.00)
Angle for earth compensation
factor KN
(-180180) degrees
with CVTs and 0.5<SIR<30
-
Timers (0.000-60.000) s 0.5% 10 ms
184
Operate time 20 ms typically (with static
outputs)
-
6.5 Full-scheme distance protection, quadrilateral for
earth faults ZMMPDIS, ZMMAPDIS
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Fullscheme distance protection,
quadrilateral for earth faults (zone 1)
ZMMPDIS
S00346 V1 EN
21
Fullscheme distance protection,
quadrilateral for earth faults (zone 2-5)
ZMMAPDIS
S00346 V1 EN
21
6.5.1 Introduction
The line distance protection is a , up to five zone protection with three fault loops
for phase-to-earth fault for each of the independent zones. Individual settings for
each zone resistive and reactive reach give flexibility for use on overhead lines and
cables of different types and lengths.
The Full-scheme distance protection, quadrilateral for earth faults functions
ZMMDPIS and ZMMAPDIS have functionality for load encroachment, which
increases the possibility to detect high resistive faults on heavily loaded lines , see
figure 47.
185
en05000034.vsd
R
X
Forward
operation
Reverse
operation
IEC05000034 V1 EN
Figure 101: Typical quadrilateral distance protection zone with Phase selection,
quadrilateral characteristic with settable angle function FRPSPDIS
activated
applications with single phase auto-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at
load exporting end at phase to earth faults on heavily loaded power lines.
(forward or reverse) or non-directional mode. This makes them suitable, together
with different communication schemes, for the protection of power lines and cables
in complex network configurations, such as parallel lines, multi-terminal lines.
The different fault loops within the IED are operating in parallel in the same
principle as a full scheme measurement.
Figure 102 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones l.
186
en07000080.vsd
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
L1-N L2-N L3-N
Zone 1
Zone 2
Zone 3
Zone 4
Zone 5
IEC07000080 V1 EN
Figure 102: The different measuring loops at line-earth fault and phase-phase
fault.
The distance measuring zone include three impedance measuring loops; one fault
loop for each phase.
The distance measuring zone will essentially operate according to the non-
directional impedance characteristics presented in figure 103. The characteristic is
illustrated with the full loop reach.
187
RFPE
X1PE+Xn
X1PE+Xn
RFPE
R1PE+Rn
RFPE
RFPE
RFPE
RFPE
R
R1PE+Rn
(Ohm/loop)
en08000280-2-en.vsd
X0PE-X1PE
Xn
3
=
R0PE-R1PE
Rn
3
=
jN jN
X (Ohm/loop)
IEC08000280 V1 EN
Figure 103: Characteristic for the phase-to-earth measuring loops, ohm/loop
domain.
The fault loop reach may also be presented as in figure 104.
UL1
R1 + j X1
ILn
RFPE
Phase-to-earth
fault in phase L1
(Arc + tower
resistance)
0
(R0-R1)/3 +
j (X0-X1)/3 )
IN
Phase-to-earth
element
en06000412.vsd
IEC06000412 V1 EN
188
measuring point to the fault location. The RFPE is presented in order to convey
the fault resistance reach.
The zone may be set to operate in Non-directional, Forward, Off or Reverse
direction through the setting OperationDir. The result from respective set value is
illustrated in figure 105. It may be convenient to once again mention that the
impedance reach is symmetric, in the sense that it is conform for forward and
reverse direction. Therefore, all reach settings apply to both directions.
en05000182.vsd
R
X
R
X
R
X
IEC05000182 V1 EN
Figure 105: Directional operating modes of the distance measuring zone
The operation of the distance measuring zone is blocked if the magnitude of input
currents fall below certain threshold values.
currents.
sum of the three phase currents, that is, residual current 3I0.
Both current limits IMinOpPE and IMinOpIN are automatically
reduced to 75% of regular set values if the zone is set to operate in
reverse direction, that is, OperationDir=Reverse.
189
current. Apparent impedances are calculated and compared with the set limits.
respective phase Ln (n = 1, 2, 3).
The calculation of the apparant impedances at phase-to-earth fault follow equation
39
The earth return compensation applies in a conventional manner.
Z
app
U
L1
I
L1
I
N
KN +
= ------------------------------
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z0 Z1
KN
3 Z1
-
=
EQUATION 2105 V1 EN
0 0 0 Z R jX = +
EQUATION2106 V1 EN
1 1 1 Z R jX = +
EQUATION2107 V1 EN
Where
Here IN is a phasor of the residual current in IED point. This results in the same
reactance X.
The formula given in equation 39 is only valid for no loaded radial feeder
applications. When load is considered in the case of single line-to-earth fault,
190
at importing end. IED has an adaptive load compensation which increases the
U R i
X
w
0
------
+
Di
Dt
-----
=
Re U ( ) R Re I ( )
X
w
0
------ +
DRe I ( )
Dt
------------------ =
Im U ( ) R Im I ( )
X
w
0
------ +
DIm I ( )
Dt
----------------- =
with
w
0
2 p f
0
=
where:
f
0
The algorithm calculates Rm measured resistance from the equation for the real
value of the voltage and substitute it in the equation for the imaginary part. The
equation for the Xm measured reactance can then be solved. The final result is
equal to:
R
m
Im U ( ) DRe I ( ) Re U ( ) DIm I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------------ =
191
X
m
w
0
Dt
Re U ( ) Im I ( ) Im U ( ) Re I ( )
DRe I ( ) Im I ( ) DIm I ( ) Re I ( )
------------------------------------------------------------------------------- =
The calculated R
m
and X
m
6.5.2.5 Directional lines
The evaluation of the directionality takes place in the Directional impedance
element for mho characteristic ZDMRDIR function. Equation 46 is used to classify
that the fault is in forward direction for line-to-earth fault.
L1 L1M
L1
0.85 U1 0.15 U1
ArgDir arg ArgNeg Res
I
+
- < <
where:
U1
L1
is positive sequence phase voltage in phase L1
U1
L1M
I
L1
degrees respectively (see figure 106) and it should not be changed unless system
studies have shown the necessity.
ZDMRDIR gives a binary coded signal on the output STDIRCND depending on
the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1
adds 4 etc.
192
R
X
ArgDir
ArgNegRes
en05000722.vsd
IEC05000722 V1 EN
Figure 106: Setting angles for discrimination of forward and reverse fault
by 180 degrees.
The polarizing voltage is available as long as the positive-sequence voltage
exceeds 5% of the set base voltage UBase. So the directional element can use it for
all unsymmetrical faults including close-in faults.
L1M
restored.
After 100 ms, the following occurs:
(between 10 and 30% of the set IED rated current IBase), the condition seals in.
193
The design of distance protection zone 1 is presented for all measuring: phase-to-
earth loops.
Phase-to-earth related signals are designated by LnE, where n represents the
corresponding phase number (L1E, L2E, and L3E).
above.
from the phase selection function within the IED, which are converted within the
zone measuring function into corresponding boolean expressions for each
condition separately. It is connected to the Phase selection with load
enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filter out the
relevant signals on the DIRCND input depending on the setting of the parameter
OperationDir. It shall be configured to the DIRCND output on the Directional
impedance element for mho characteristic (ZDMRDIR) function.
194
en06000408.vsd
AND
AND
AND
L1N
L2N
L3N
STCND
STNDL1N
STNDL2N
STNDL3N
STNDPE
AND
BLOCK
VTSZ
STND
BLK
OR
OR
OR
IEC06000408 V1 EN
Figure 107: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-
en06000409.vsd
STNDL1N
STNDL2N
STNDL3N
OR
AND
AND
AND
AND
BLK
t
15 ms
t
15 ms
t
15 ms
t
15 ms
START
STL3
STL2
STL1
IEC06000409 V1 EN
operates in directional (forward or reverse) mode, see figure 109.
195
STNDL1N
DIRL1N
STNDL2N
DIRL2N
STNDL3N
DIRL3N
&
&
&
&
&
BLK
t
15 ms
t
15 ms
t
15 ms
t
15 ms
STZMPE.
STL1
STL2
STL3
START
AND
AND
AND
OR
OR
en07000081.vsd
IEC07000081 V1 EN
Figure 109: Composition of starting signals in directional operating mode
in figure 110.
en07000082.vsd
Timer tPE=On
STZMPE
AND t
tPE
BLKTR t
15ms
AND
AND
AND
STL1
STL2
STL3
TRIP
TRL1
TRL2
TRL3
AND
IEC07000082 V1 EN
Figure 110: Tripping logic for the distance protection zone one
196
ZMMPDIS
I3P*
U3P*
BLOCK
BLKZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC06000454 V2 EN
Figure 111: ZMMPDIS function block
ZMMAPDIS
I3P*
U3P*
BLOCK
BLKZ
BLKTR
STCND
DIRCND
TRIP
TRL1
TRL2
TRL3
START
STL1
STL2
STL3
STND
IEC09000947 V1 EN
Figure 112: ZMMAPDIS function block
Table 90: ZMMPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
Table 91: ZMMPDIS Output signals
197
loop
Table 92: ZMMAPDIS Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
Table 93: ZMMAPDIS Output signals
loop
Table 94: ZMMPDIS Group settings (basic)
Operation Off
On
198
OperationDir Off
Non-directional
Forward
Reverse
Forw / Rev
Timer tPE Off
On
Ph-E
Phase-Earth loops
Phase-Earth loops
Table 95: ZMMAPDIS Group settings (basic)
Operation Off
On
OperationDir Off
Non-directional
Forward
Reverse
Forw / Rev
Timer tPE Off
On
Ph-E
Phase-Earth loops
199
Table 96: ZMMPDIS technical data
Number of zones Max 5 with selectable direction -
Minimum operate current (10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) W/phase 2.0% static accuracy
accuracy
Conditions:
r
r
degrees
Positive sequence resistance (0.10-1000.00) /phase
Zero sequence reactance (0.50-9000.00) /phase
Zero sequence resistance (0.50-3000.00) /phase
Fault resistance, Ph-E (1.00-9000.00) W/loop
with CCVTs and 0.5<SIR<30
-
6.6 Directional impedance element for mho
characteristic and additional distance protection
directional function for earth faults ZDMRDIR,
ZDARDIR
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Directional impedance element for mho
characteristic
ZDMRDIR
S00346 V1 EN
21D
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Additional distance protection
directional function for earth faults
ZDARDIR
S00346 V1 EN
-
200
6.6.1 Introduction
The phase-to-earth impedance elements can be optionally supervised by a phase
unselective directional function based on symmetrical components.
6.6.2.1 Directional impedance element for mho characteristic ZDMRDIR
The evaluation of the directionality takes place in Directional impedance element
for mho characteristic (ZDMRDIR). Equation 47 and equation 48 are used to
classify that the fault is in the forward direction for phase-to-earth fault and phase-
to-phase fault respectively.
L1 L1M
L1
0.85 U1 0.15 U1
I
+
- < <
L1L2 L1L2M
L1L2
0.85 U1 0.15 U1
I
+
- < <
Where:
ArgDir Setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees)
ArgNegRes Setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 113 for mho characteristics.
U1
L1
Positive sequence phase voltage in phase L1
U1
L1M
Positive sequence memorized phase voltage in phase L1
I
L1
Phase current in phase L1
U1
L1L2
Voltage difference between phase L1 and L2 (L2 lagging L1)
U1
L1L2M
Memorized voltage difference between phase L1 and L2 (L2 lagging L1)
I
L1L2
Current difference between phase L1 and L2 (L2 lagging L1)
The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees
respectively (see figure 113) and they should not be changed unless system studies
show the necessity.
If one sets DirEvalType to Comparator (which is recommended when using the
mho characteristic) then the directional lines are computed by means of a comparator-
type calculation, meaning that the directional lines are based on mho-circles (of
infinite radius). The default setting value Impedance otherwise means that the
201
directional lines are implemented based on an impedance calculation equivalent to
the one used for the quadrilateral impedance characteristics.
When Directional impedance element for mho characteristic
(ZDMRDIR) is used together with Fullscheme distance protection,
mho characteristic (ZMHPDIS) the following settings for
parameter DirEvalType is vital:
alternative Comparator is strongly recommended
alternative Imp/Comp should generally not be used
alternative Impedance should not be used. This altenative is
intended for use together with Distance protection zone,
quadrilateral characteristic (ZMQPDIS)
X
R
-ArgDir
ArgNegRes
Zset reach point
-Zs
en06000416.vsd
IEC06000416 V1 EN
Figure 113: Setting angles for discrimination of forward fault
by 180 degrees.
L1M
The memory voltage is used for 100ms or until the positive sequence voltage is
restored. After 100ms, the following occurs:
202
If the current is still above the set value of the minimum operating current the
condition seals in.
If the current decreases below the minimum operating value, no directional
indications will be given until the positive sequence voltage exceeds 10% of
its rated value.
The Directional impedance element for mho characteristic (ZDMRDIR) function
has the following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation
and is derived from a binary coded signal as follows:
bit 11
(2048)
bit 10
(1024)
bit 9
(512)
bit 8
(256)
bit 7
(128)
bit 6
(64)
STRVL3L1=
1
STRVL2L3=
1
STRVL1L2=
1
STRVL3N=1 STRVL2N=1 STRVL1N=1
bit 5
(32)
bit 4
(16)
bit 3
(8)
bit 2
(4)
bit 1
(2)
bit 0
(1)
STFWL3L1=
1
STFWL2L3=
1
STFWL1L2=
1
STFWL3N=1 STFWL2N=1 STFWL1N=1
The STFW output is a logical signal with value 1 or 0. It is made up as an OR-
function of all the forward starting conditions, that is, STFWL1N, STFWL2N,
STFWL3N, STFWL1L2, STFWL2L3 and STFWL3L1. The STRV output is
similar to the STFW output, the only difference being that it is made up as an OR-
function of all the reverse starting conditions, that is, STRVL1N, STRVL2N,
STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1.
Values for the following parameters are calculated, and may be viewed as service
values:
resistance phase L1
reactance phase L1
resistance phase L2
reactance phase L2
resistance phase L3
reactance phase L3
direction phase L1
direction phase L2
direction phase L3
203
6.6.2.2 Additional distance protection directional function for earth faults
ZDARDIR
A Mho element needs a polarizing voltage for its operation. The positive-sequence
memory-polarized elements are generally preferred. The benefits include:
The greatest amount of expansion for improved resistive coverage. These
elements always expand back to the source.
Memory action for all fault types. This is very important for close-in three-
phase faults.
A common polarizing reference for all six distance-measuring loops. This is
important for single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse
phase to phase faults and double phase-to-earth faults during high load periods. To
solve these, additional directional element is used.
For phase-to-earth faults, directional elements using sequence components are very
reliable for directional discrimination. The directional element can be based on one
of following types of polarization:
Zero-sequence voltage
Negative-sequence voltage
Zero-sequence current
These additional directional criteria are evaluated in the Additional distance
protection directional function for earth faults (ZDARDIR).
Zero-sequence voltage polarization is utilizing the phase relation between the zero-
sequence voltage and the zero-sequence current at the location of the protection.
The measurement principle is illustrated in figure 114.
204

- 3U
0

3I
0
AngleRCA
AngleOp
en06000417.vsd
IEC06000417 V1 EN
Figure 114: Principle for zero-sequence voltage polarized additional directional
element
Negative-sequence voltage polarization is utilizing the phase relation between the
negative-sequence voltage and the negative-sequence current at the location of the
protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-
sequence current at the location of the protection and some reference zero-
sequence current, for example, the current in the neutral of a power transformer.
The principle of zero-sequence voltage polarization with zero-sequence current
compensation is described in figure 115. The same also applies for the negative-
sequence function.

Z0 SA
Z0 SB
Z0 Line
U0
I0
IF
I0
U0
K*I0
U0 + K*I0
Characteris tic
angle
en06000418.vsd
IEC06000418 V1 EN
Figure 115: Principle for zero sequence compensation
Note that the sequence based additional directional element cannot give per phase
information about direction to fault. This is why it is an AND-function with the
normal directional element that works on a per phase base. The release signals are
per phase and to have a release of a measuring element in a specific phase both the
additional directional element, and the normal directional element, for that phase
must indicate correct direction.
205
en06000419.vsd
Normal
directional
element
L1N, L2N, L3N
Additional
directional
element

Release of distance
measuring element
L1N, L2N, L3N
AND per
phase
AND
IEC06000419 V1 EN
Figure 116: Earth distance element directional supervision
ZDMRDIR
I3P*
U3P*
DIR_CURR
DIR_VOLT
DIR_POL
STFW
STRV
STDIRCND
IEC06000422 V2 EN
Figure 117: ZDMRDIR function block
ZDARDIR
I3P*
U3P*
I3PPOL*
DIRCND
STFWPE
STRVPE
DIREFCND
IEC06000425 V2 EN
Figure 118: ZDARDIR function block
Table 97: ZDMRDIR Input signals
I3P GROUP
SIGNAL
- group connection for current abs 1
U3P GROUP
SIGNAL
- group connection for voltage abs 1
206
Table 98: ZDMRDIR Output signals
DIR_CURR GROUP SIGNAL Group connection
DIR_VOLT GROUP SIGNAL Group connection
DIR_POL GROUP SIGNAL Group connection
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per
measuring loop
Table 99: ZDARDIR Input signals
I3P GROUP
SIGNAL
- Current signals
U3P GROUP
SIGNAL
- Voltage signals
I3PPOL GROUP
SIGNAL
- Polarisation current signals
DIRCND INTEGER 0 Binary coded directional signal
Table 100: ZDARDIR Output signals
STFWPE BOOLEAN Forward start signal from phase-to-ground
directional element
STRVPE BOOLEAN Reverse start signal from phase-to-ground
directional element
DIREFCND INTEGER Start direction Binary coded
Table 101: ZDMRDIR Group settings (basic)
IBase 1 - 99999 - 1 3000 Base setting for current level
UBase 0.05 - 2000.00 - 0.05 400.00 Base setting for voltage level
DirEvalType Impedance
Comparator
Imp/Comp
- - Comparator Directional evaluation mode Impedance /
Comparator
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
Phase-Earth loops
Phase loops
207
Table 102: ZDARDIR Group settings (basic)
IBase 1 - 99999 A 1 3000 Base setting for current values
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for voltage level in kV
PolMode -3U0
-U2
IPol
Dual
-3U0Comp
-U2comp
- - -3U0 Polarization quantity for opt dir function
for P-E faults
AngleRCA -90 - 90 Deg 1 75 Characteristic relay angle (= MTA or
base angle)
I> 1 - 200 %IB 1 5 Minimum operation current in % of IBase
UPol> 1 - 100 %UB 1 1 Minimum polarizing voltage in % of UBase
IPol> 5 - 100 %IB 1 10 Minimum polarizing current in % of IBase
Table 103: ZDARDIR Group settings (advanced)
AngleOp 90 - 180 Deg 1 160 Operation sector angle
Kmag 0.50 - 3000.00 ohm 0.01 40.00 Boost-factor in -U0comp and -U2comp
polarization
6.7 Mho impedance supervision logic ZSMGAPC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Mho Impedance supervision logic ZSMGAPC - -
6.7.1 Introduction
The Mho impedance supervision logic (ZSMGAPC) includes features for fault
inception detection and high SIR detection. It also includes the functionality for
loss of potential logic as well as for the pilot channel blocking scheme.
ZSMGAPC can mainly be decomposed in two different parts:
1. A fault inception detection logic
2. High SIR detection logic
208
6.7.2.1 Fault inception detection
The aim for the fault inception detector is to detect quickly that a fault has occurred
on the system.
The fault inception detection detects instantaneous changes in any phase currents
or zero sequence current in combination with a change in the corresponding phase
voltage or zero sequence voltage. If the change of any phase current and
corresponding phase voltage or 3U0 and 3I0 exceeds the settings DeltaI and
DeltaU respectively. Delta3U0 and Delta3I0 and the input signal BLOCK is not
activated, the output signal FLTDET is activated indicating that a system fault has
occurred.
If the setting PilotMode is set to On in blocking scheme and the fault inception
function has detected a system fault, a block signal BLKCHST will be issued and
send to remote end in order to block the overreaching zones. Different criteria has
to be fulfilled for sending the BLKCHST signal:
1. The setting PilotMode has to be set to On
2. The breaker has to be closed, that is, the input signal CBOPEN has to be
deactivated
3. A reverse fault should have been detected while the carrier send signal is not
blocked, that is, input signal REVSTART is activated and input signal
BLOCKCS is not activated
Or
A fault inception is detected
If it is later detected that it was an internal fault that made the function issue the
BLKCHST signal, the function will issue a CHSTOP signal to unblock the remote
end. The criteria that have to be fulfilled for this are:
1. The function has to be in pilot mode, that is, the setting PilotMode has to be
set to On
2. The carrier send signal should be blocked, that is, input signal BLOCKCS is
On and,
3. A reverse fault should not have been detected while the carrier send signal was
not blocked, that is, input signals REVSTART and BLOCKCS is not activated.
ZSMGAPC function has a built in loss of voltage detection based on the evaluation
of the change in phase voltage or the change in zero sequence voltage (3U0). It
operates if the change in phase voltages exceeds the setting DeltaU or 3U0 exceeds
the setting Delta3U0.
If loss of voltage is detected, but not a fault inception, the distance protection
function will be blocked. This is also the case if a fuse failure is detected by the
209
external fuse failure function and activate the input FUSEFAIL. Those blocks are
generated by activating the output BLKZ, which shall be connected to the input
BLKZ on the distance Mho function block.
During fault inception a lot of transients will be developed which in turn might
cause the distance function to overreach. The Mho supervision logic (ZSMGAPC)
will increase the filtering during the most transient period of the fault. This is done
by activating the output BLKZMD, which shall be connected to the input
BLKZMTD on mho distance function block.
High SIR detection
High SIR values increases the likelihood that CVT will introduce a prolonged and
distorted transient, increasing the risk for overreach of the distance function.
The SIR function calculates the SIR value as the source impedance divided by the
setting Zreach and activates the output signal HSIR if the calculated value for any
of the six basic shunt faults exceed the setting SIRLevel. The HSIR signal is
intended to block the delta based mho impedance function.
ZSMGAPC
I3P*
U3P*
BLOCK
REVSTART
BLOCKCS
CBOPEN
BLKZMTD
BLKCHST
CHSTOP
HSIR
IEC06000426 V2 EN
Figure 119: ZSMGAPC function block
Table 104: ZSMGAPC Input signals
I3P GROUP
SIGNAL
- Three phase current samples and DFT magnitude
U3P GROUP
SIGNAL
- Three phase phase-neutral voltage samples and
DFT magnitude
BLOCK BOOLEAN 0 Block of the function
REVSTART BOOLEAN 0 Indication of reverse start
BLOCKCS BOOLEAN 0 Blocks the blocking carrier signal to remote end
CBOPEN BOOLEAN 0 Indicates that the breaker is open
210
Table 105: ZSMGAPC Output signals
BLKZMTD BOOLEAN Block signal for blocking of time domained mho
BLKCHST BOOLEAN Blocking signal to remote end to block
overreaching zone
CHSTOP BOOLEAN Stops the blocking signal to remote end
HSIR BOOLEAN Indication of source impedance ratio above set limit
Table 106: ZSMGAPC Group settings (basic)
IBase 1 - 99999 A 1 3000 Base value for current measurement
UBase 0.05 - 2000.00 kV 0.05 400.00 Base value for voltage measurement
PilotMode Off
On
- - Off Pilot mode Off/On
Zreach 0.1 - 3000.0 ohm 0.1 38.0 Line impedance
IMinOp 10 - 30 %IB 1 20 Minimum operating current for SIR
measurement
Table 107: ZSMGAPC Group settings (advanced)
DeltaI 0 - 200 %IB 1 10 Current change level in %IB for fault
inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of IB
DeltaU 0 - 100 %UB 1 5 Voltage change level in %UB for fault
inception detection
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of UB
SIRLevel 5 - 15 - 1 10 Settable level for source impedance ratio
6.8 Faulty phase identification with load encroachment
FMPSPDIS
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Faulty phase identification with load
encroachment for mho
FMPSPDIS
S00346 V1 EN
21
211
6.8.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations the rate of expansion and reinforcement
of the power system is reduced, for example difficulties to get permission to build
new power lines. The ability to accurate and reliable classifying the different types
of fault so that single phase tripping and autoreclosing can be used plays an
important roll in this matter.
The phase selection function is design to accurate select the proper fault loop in the
distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in
some cases interfere with the distance protection zone reach and cause unwanted
operation. Therefore the function has a built in algorithm for load encroachment,
which gives the possibility to enlarge the resistive setting of the measuring zones
without interfering with the load.
The output signals from the phase selection function produce important
information about faulty phase(s), which can be used for fault analysis as well.
6.8.2.1 The phase selection function
Faulty phase identification with load encroachment for mho (FMPSPDIS) function
can be decomposed into six different parts:
1. A high speed delta based current phase selector
2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load encroachment logic
6. A blinder logic
The total function can be blocked by activating the input BLOCK.
Delta based current and voltages
The delta based fault detection function uses adaptive technique and is based on
patent US4409636.
The aim of the delta based phase selector is to provide very fast and reliable phase
selection for releasing of tripping from the high speed Mho measuring element and
is essential to Directional Comparison Blocking scheme (DCB), which uses Power
Line Carrier (PLC) communication system across the protected line.
The current and voltage samples for each phase passes through a notch filter that
filters out the fundamental components. Under steady state load conditions or when
no fault is present, the output of the filter is zero or close to zero. When a fault
212
occurs, currents and voltages change resulting in sudden changes in the currents
and voltages resulting in non-fundamental waveforms being introduced on the line.
At this point the notch filter produces significant non-zero output. The filter output
is processed by the delta function. The algorithm uses an adaptive relationship
between phases to determine if a fault has occurred, and determines the faulty phases.
The current and voltage delta based phase selector gives a real output signal if the
following criterion is fulfilled (only phase L1 shown):
Max(UL1,UL2,UL3)>DeltaUMinOp
Max(IL1,IL2,IL3)>DeltaIMinOp
where:
UL1, UL2 and UL3 are the voltage change between sample t and sample t-1
DeltaUMinOp and DeltaIMinOp are the minimum harmonic level settings for the voltage and current
filters to decide that a fault has occurred. A slow evolving fault may not
produce sufficient harmonics to detect the fault; however, in such a
case speed is no longer the issue and the sequence components
phase selector will operate.
The delta voltages ULn and delta current ILn (n prefix for phase order) are the
voltage and current between sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type.
The logic determines the fault type by summing up all phase values and dividing
by the largest value. Both voltages and currents are filtered out and evaluated. The
condition for fault type classification for the voltages and currents can be expressed
as:
( UL1, UL2, UL3)
Fa ulType
Max( IL1, IL2, UL3)
S D D D
=
D D D
( IL1, IL2, IL3)
Fa ultType
Max( IL1, IL2, IL3)
S D D D
=
D D D
The value of FaultType for different shunt faults are as follows:
Under ideal conditions: (Patent pending)
Single phase-to-earth; FaultType=1
Phase-to-phase fault FaultType=2
Three-phase fault; FaultType=3
213
The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and
3 for three-phase fault. At this point the filter does not know if earth was involved
or not.
Typically there are induced harmonics in the non-faulted lines that will affect the
result. This method allows for a significant tolerance in the evaluation of FaultType
over its entire range.
When a single phase-to-earth fault has been detected, the logic determines the
largest quantity, and asserts that phase. If phase-to-phase fault is detected, the two
largest phase quantities will be detected and asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate
block. Different phases of faults may be detected at slightly different times due to
differences in the angles of incidence of fault on the wave shape. Therefore the
output is forced to wait a certain time by means of a timer. If the timer expires, and
a fault is detected in one phase only, the fault is deemed as phase-to-earth. This
way a premature single phase-to-earth fault detection is not released for a phase-to-
phase fault. If, however, earth current is detected before the timer expires, the phase-
to-earth fault is released sooner.
If another phase picks up during the time delay, the wait time is reduced by a
certain amount. Each detection of either earth-to-phase or additional phases further
reduce the initial time delay and allow the delta phase selector output to be faster.
There is no time delay, if for example, all three phases are faulty.
The delta function is released if the input DELTAREL is activated at the same time
as input DELTABLK is not activated. Activating the DELTABLK input will block
the delta function. The release signal has an internal pulse timer of 100 ms. When
the DELTAREL signal has disappeared the delta logic is reset. In order not to get
too abrupt change, the reset is decayed in pre-defined steps.
Symmetrical component based phase selector
The symmetrical component phase selector uses preprocessed calculated sequence
voltages and currents as inputs. It also uses sampled values of the phase currents.
All the symmetrical quantities mentioned further in this section are with reference
to phase L1.
The function is made up of four main parts:
A Detection of the presence of earth fault
B A phase-to-phase logic block based on U
1
/U
2
angle relationship
C A phase-to-earth component based on patent US5390067 where the angle relationships
between U
2
/I
0
and U
2
/U
1
is evaluated to determine earth fault or phase- to-phase to earth fault
D Logic for detection of three-phase fault
214
Presence of earth-fault detection
This detection of earth fault is performed in two levels, first by evaluation of the
magnitude of zero sequence current, and secondly by the evaluation of the zero and
negative sequence voltage. It is a complement to the earth-fault signal built-in in
the Symmetrical component based phase selector.
The complementary based zero-sequence current function evaluates the presence of
earth fault by calculating the 3I
0
and comparing the result with the setting
parameter INRelPE. The output signal is used to release the earth-fault loop. It is a
complement to the earth-fault signal built-in in the sequence based phase selector.
The condition for releasing the phase-to-earth loop is as follows:
The output from this detection is used to release the earth-fault loop.
|3I
0
|>maxIph: INRelPE
where:
|3I
0
| is the magnitude of the zero sequence current 3I
0
maxIph is the maximum magnitude of the phase currents
INRelPE is a setting parameter for the relation between the magnitude of 3I
0
and the
maximum phase current
The earth-fault loop is also released if the evaluation of the zero sequence current
by the main sequence function meets the following conditions:
|3I
0
|>IBase 0.5
|3I
0
|>maxIph INRelPE
where:
maxIph is the maximal current magnitude found in any of the three phases
INRelPE is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase
IBase is the global setting of the base current (A)
In systems where the source impedance for zero sequence is high the change of
zero sequence current may not be significant and the above detection may fail. In
those cases the detection enters the second level, with evaluation of zero and
negative sequence voltage. The release of the earth-fault loops can then be
achieved if all of the following conditions are fulfilled:
|3U
0
|>|U
2
| 0.5
|3U
0
|>|U
1
| 0.2
|U
1
|> UBase 0.2/(3)
and
215
3I
0
> 0.1 IBase
or
3I
0
<maxIph INRelPE
where:
3U
0
is the magnitude of the zero sequence voltage
U
2
is the magnitude of the negative sequence voltage at the relay measuring point of
phase L1
k5 is design parameter
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
Phase-to-phase fault detection
The detection of phase-to-phase fault is performed by evaluation of the angle
difference between the sequence voltages U
2
and U
1
.
0
300
180
L1-L2 sector
L2-L3 sector
L3-L1 sector
60
en06000383.vsd
U1L1 (Ref)
UL3
UL2
UL1
IEC06000383 V1 EN
Figure 120: Definition of fault sectors for phase-to-phase fault
The phase-to-phase loop for the faulty phases will be determined if the angle
between the sequence voltages U
2
and U
1
lies within the sector defined according
to figure 120 and the following conditions are fulfilled:
|U
1
|>U1MinOP
|U
2
|>U2MinOp
where:
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operate voltages
216
The positive sequence voltage U
1
L1 in figure 120 above is reference.
If there is a three-phase fault, there will not be any release of the individual phase
signals, even if the general conditions for U
2
and U
1
are fulfilled.
Phase-to-earth and phase-to-phase-to-earth-fault detection
The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent
5390067) is based on two conditions:
1. Angle relationship between U
2
and I
0
2. Angle relationship between U
2
and U
1
The condition 1 determines faulty phase at single phase-to-earth fault by determine
the argument between U
2
and I
0
.
320
200
80
L1-E sector
L3-E sector L2-E sector
IEC06000384 V2 EN
Figure 121: Condition 1: Definition of faulty phase sector as angle between U
2
and I
0
The angle is calculated in a directional function block and gives the angle in
radians as input to the U
2
and I
0
function block. The input angle is released only if
the fault is in forward direction. This is done by the directional element. The fault
is classified as forward direction if the angle between U
0
and I
0
lies between 20 to
200 degrees, see figure 122.
217
200
Reverse
Forward 20
en06000385.vsd
IEC06000385 V1 EN
Figure 122: Directional element used to release the measured angle between
U
o
and I
0
The input radians are summarized with an offset angle and the result evaluated. If
the angle is within the boundaries for a specific sector, the phase indication for that
sector will be active see figure 121. Only one sector signal is allowed to be
activated at the same time.
The sector function for condition 1 has an internal release signal which is active if
the main sequence function has classified the angle between U
0
and I
0
as valid. The
following conditions must be fulfilled for activating the release signals:
|U
2
|>U2MinOp
|3I
0
|> 0.05 IBase
|3I
0
|>maxIph INRelPE
where:
U
2
and IN are the magnitude of the negative sequence voltage and zero-
sequence current (3I
0
)
U2MinOp is the setting parameter for minimum operating negative sequence
voltage
maxIph is the maximum phase current
INRelPE is the setting parameter for 3I
0
limit for releasing phase-to-earth loop
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition 2 looks at the angle relationship between the negative sequence
voltage U
2
and the positive sequence voltage U
1
. Since this is a phase-to-phase
voltage relationship, there is no need for shifting phases if the fault is in reverse
direction. A phase shift is introduced so that the fault sectors will have the same
angle boarders as for condition 1. If the calculated angle between U
2
and U
1
lies
218
within one sector, the corresponding phase for that sector will be activated. The
condition 2 is released if both the following conditions are fulfilled:
|U
2
|>U2MinOp
|U
1
|>U1MinOP
where:
|U
1
| and |U
2
| are the magnitude of the positive and negative sequence voltages.
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operating voltages.
20
140
260
L1-E sector
L3-E sector
L2-E sector
U1L1
(Ref)
IEC06000413 V2 EN
Figure 123: Condition 2: U
2
and U
1
angle relationship
If both conditions are true and there is sector match, the fault is deemed as single
phase-to-earth. If the sectors, however, do not match the fault is determined to be
the complement of the second condition, that is, a phase-to-phase-to- earth fault.
Condition 1 and Condition 2 Fault type
L3-E L3-E L3-E
L2-E L1-E L2-L3-E
The sequence phase selector is blocked when earth is not involved or if a three-
phase fault is detected.
Three-phase fault detection
Unless it has been categorized as a single or two-phase fault, the function classifies
it as a three-phase fault if the following conditions are fulfilled:
|U
1
|<U1Level
219
and
|I
1
|>I1LowLevel
or
|I
1
|>IMaxLoad
where:
|U
1
| and |I
1
| are the positive sequence voltage and current magnitude
U1Level ,
I1LowLevel
are the setting of limits for positive sequence voltage and current
IMaxLoad is the setting of the maximum load current
The output signal for detection of three-phase fault is only released if not earth
fault and phase-to-phase fault in the main sequence function is detected.
The conditions for not detecting earth fault are the inverse of equation 5 to 10.
The condition for not detecting phase-to-phase faults is determined by three
conditions. Each of them gives condition for not detecting phase-to-phase fault.
Those are:
1:
earth fault is detected
or
|3I
0
IN|> 0.05 IBase
and
|3I
0
IN|>maxIph INRelPE
2:
phase-to-earth and phase-to-phase faults are not fulfilled
and
maxIph<0.1 IBase
and
|I
2
|<0.1 maxIph
3:
|3I
0
IN|>maxIph INBlockPP
or
|I
2
|<maxIph I2maxIL
where:
maxIph is the maximum of the phase currents IL1, IL2 and IL3
INRelPE is the setting parameter for 3I0 limit for release of phase-to-earth fault loops
220
|I
2
| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence current
to the maximum phase current in percent of IBase
INBlockPP is the setting parameter for 3I
0
limit for blocking phase to phase measuring
loops
Fault evaluation and selection logic
The phase selection logic has an evaluation procedure that can be simplified
according to figure 124. Only phase L1 is shown in the figure. If the internal signal
3 Phase fault is activated, all four outputs START, STL1, STL2 and STL3 gets
activated.
a
b
a>b
then c=a
else c=a
c
DeltaIL1
DeltaUL1
FaultPriority
Adaptive release
dependent on result
from Delta logic
a
b
a<b
then c=b
else c=a
c
OR
L1L2 fault
L1N fault
Sequence based
function
OR
3 Phase fault
IL1Valid &
BLOCK
STL1
en06000386.vsd
IEC06000386 V1 EN
Figure 124: Simplified diagram for fault evaluation, phase L1
Load encroachment logic
Each of the six measuring loops has its own load (encroachment) characteristic
based on the corresponding loop impedance. The load encroachment functionality
is always activated in faulty phase identification with load encroachment for mho
(FMPSPDIS) function but the influence on the zone measurement can be switched
On/Offin the respective impedance measuring function.
The outline of the characteristic is presented in figure 125. As illustrated, the
resistive reach in forward and reverse direction and the angle of the sector is the
same in all four quadrants. The reach for the phase selector will be reduced by the
load encroachment function, as shown in figure 125.
221
Blinder
Blinder provides a mean to discriminate high load from a fault. The operating
characteristic is illustrated in figure 125. There are six individual measuring loops
with the blinder functionality. Three phase-to-earth loops which estimate the
impedance according to
Zn = Uph / Iph
and three phase-to-phase loops according to
Zph-ph = Uph-ph / Iph-ph
The start operations from respective loop are binary coded into one word and
provides an output signal STCNDPLE.
RLd
RLd
ArgLd
ArgLd
ArgLd
ArgLd
R
X
jX
Operation area Operation area
R
Operation area
No operation area No operation area
en06000414.vsd
IEC06000414 V1 EN
Figure 125: Influence on the characteristic by load encroachment logic
Outputs
The output of the sequence components based phase selector and the delta logic
phase selector activates the output signals STL1, STL2 and STL3. If an earth fault
is detected the signal STPE gets activated.
The phase selector also gives binary coded signals that are connected to the zone
measuring element for opening the correct measuring loop(s). This is done by the
signal STCNDPHS. If only one phase is started (L1, L2 or L3), the corresponding
phase-to- element is enabled. STPE is expected to be made available for two-phase
and three-phase faults for the correct output to be selected. The fault loop is
indicated by one of the decimal numbers below.
The output STCNDPHS provides release information from the phase selection part
only. STCNDLE provides release information from the load encroachment part
only. STCNDPLE provides release information from the phase selection part and
222
the load encroachment part combined, that is, both parts have to issue a release at
the same time (this signal is normally not used in the zone measuring element). In
these signals, each fault type has an associated value, which represents the
corresponding zone measuring loop to be released. The values are presented in
table 107.
0= no faulted phases
1= L1E
2= L2E
3= L3E
4= -L1L2E
5= -L2L3E
6= -L3L1E
7= -L1L2L3E
8= -L1L2
9= -L2L3
10= -L3L1
11= L1L2L3
An additional logic is applied to handle the cases when phase-to-earth outputs are
to be asserted when the earth input G is not asserted.
The output signal STCNDPLE is activated when the load encroachment is operating.
STCNDPLE is connected to the input STCND for selected quadrilateral impedance
measuring zones to be blocked. The signal must be connected to the input LDCND
for selected mho impedance measuring zones .
The load encroachment at the measuring zone must be activated to
release the blocking from the load encroachment function.
FMPSPDIS
I3P*
U3P*
BLOCK
ZSTART
TR3PH
1POLEAR
STL1
STL2
STL3
STPE
STCNDPHS
STCNDPLE
STCNDLE
START
IEC06000429 V2 EN
Figure 126: FMPSPDIS function block
223
Table 108: FMPSPDIS Input signals
I3P GROUP
SIGNAL
- Group signal for current
U3P GROUP
SIGNAL
- Group signal for voltage
ZSTART BOOLEAN 0 Start from underimpdeance function
TR3PH BOOLEAN 0 Three phase tripping initiated
1POLEAR BOOLEAN 0 Single pole autoreclosing in progress
Table 109: FMPSPDIS Output signals
STL1 BOOLEAN Fault detected in phase L1
STPE BOOLEAN Earth fault detected
STCNDPHS INTEGER Binary coded starts from phase selection
STCNDPLE INTEGER Binary coded starts from ph sel with load
encroachment
STCNDLE INTEGER Binary coded starts from load encroachment only
START BOOLEAN Indicates that something has started
Table 110: FMPSPDIS Group settings (basic)
IMaxLoad 10 - 5000 %IB 1 200 Maximum load for identification of three
phase fault in % of IBase
RLd 1.00 - 3000.00 ohm/p 0.01 80.00 Load encroachment resistive reach in
ohm/phase
ArgLd 5 - 70 Deg 1 20 Load encroachment inclination of load
angular sector
224
Table 111: FMPSPDIS Group settings (advanced)
DeltaIMinOp 5 - 100 %IB 1 10 Delta current level in % of IBase
DeltaUMinOp 5 - 100 %UB 1 20 Delta voltage level in % of UBase
U1Level 5 - 100 %UB 1 80 Pos seq voltage limit for identification of 3-
ph fault
I1LowLevel 5 - 200 %IB 1 10 Pos seq current level for identification of
3-ph fault in % of IBase
U1MinOp 5 - 100 %UB 1 20 Minimum operate positive sequence
voltage for ph sel
U2MinOp 1 - 100 %UB 1 5 Minimum operate negative sequence
voltage for ph sel
INRelPE 10 - 100 %IB 1 20 3I0 limit for release ph-e measuring
loops in % of max phase current
INBlockPP 10 - 100 %IB 1 40 3I0 limit for blocking phase-to-phase
measuring loops in % of max phase
current
Table 112: FMPSPDIS technical data
Minimum operate current (5-30)% of IBase 1.0% of I
r
Load encroachment criteria:
Load resistance, forward and
reverse
(0.53000) W/phase
(570) degrees
Conditions:
Voltage range: (0.11.1) x U
n
Current range: (0.530) x I
n
Angle: at 0 degrees and 85 degrees
6.9 Power swing detection ZMRPSB
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Power swing detection ZMRPSB
Zpsb
SYMBOL-EE V1 EN
68
6.9.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big
generation plants.
225
Power swing detection function (ZMRPSB) is used to detect power swings and
initiate block of selected distance protection zones. Occurrence of earth-fault
currents during a power swing can block ZMRPSB function to allow fault clearance.
Power swing detection (ZMRPSB ) function comprises an inner and an outer
quadrilateral measurement characteristic with load encroachment, as shown in
figure 127.
Its principle of operation is based on the measurement of the time it takes for a
power swing transient impedance to pass through the impedance area between the
outer and the inner characteristics. Power swings are identified by transition times
longer than a transition time set on corresponding timers. The impedance
measuring principle is the same as that used for the distance protection zones. The
impedance and the characteristic passing times are measured in all three phases
separately.
One-out-of-three or two-out-of-three operating modes can be selected according to
the specific system operating conditions.
R
jX
ArgLd
ArgLd
RLdOutFw
RLdInFw
R1FInFw R1FInRv
RLdInRv
RLdOutRv
X1InFw
X1OutFw
ZL
R1LIn
X1InRv
X1OutRv
DRv
DRv
DRv
DRv
DRv
DFw
DFw
DFw
DFw
DFw
DFw
j
j
j
IEC09000222 V1 EN
Figure 127: Operating characteristic for ZMRPSB function (setting parameters
in italic)
226
The impedance measurement within ZMRPSB function is performed by solving
equation 51 and equation 52 (n = 1, 2, 3 for each corresponding phase L1, L2 and
L3).
R
set
Re
n
n
I
U
L
L

Im
n
n
X
set
I
U
L
L

The R
set
and X
set
are R and X boundaries.
6.9.2.1 Resistive reach in forward direction
To avoid load encroachment, the resistive reach is limited in forward direction by
setting the parameter RLdOutFw which is the outer resistive load boundary value
while the inner resistive boundary is calculated according to equation 53.
RLdInFw = kLdRFwRLdOutFw
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting
the parameter ArgLd.
The load encroachment in the fourth quadrant uses the same settings as in the first
quadrant (same ArgLd and RLdOutFw and calculated value RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better
adaptation to the distance measuring zones. The angle is the same as the line angle
and derived from the setting of the reactive reach inner boundary X1InFw and the
line resistance for the inner boundary R1LIn. The fault resistance coverage for the
inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a
distance between the inner and outer boundary, DFw, is calculated. This value is
valid for R direction in first and fourth quadrant and for X direction in first and
second quadrant.
227
6.9.2.2 Resistive reach in reverse direction
To avoid load encroachment in reverse direction, the resistive reach is limited by
setting the parameter RLdOutRv for the outer boundary of the load encroachment
zone. The distance to the inner resistive load boundary RLdInRv is determined by
using the setting parameter kLdRRv in equation 54.
RLdInRv = kLdRRvRLdOutRv
where:
kLdRRv is a settable multiplication factor less than 1
From the setting parameter RLdOutRv and the calculated value RLdInRv, a
distance between the inner and outer boundary, DRv, is calculated. This value is
valid for R direction in second and third quadrant and for X direction in third and
fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load
encroachment part corresponds to the setting parameter R1FInRv for the inner
boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load
encroachment zone consist of the sum of the settings R1FInRv and the line
resistance R1LIn. The argument of the tilted lines outside the load encroachment is
the same as the tilted lines in the first quadrant. The distance between the inner and
outer boundary is the same as for the load encroachment in reverse direction, that is
DRv.
6.9.2.3 Reactive reach in forward and reverse direction
The inner characteristic for the reactive reach in forward direction correspond to
the setting parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where:
DFw = RLdOutFw - KLdRFw RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the
setting parameter X1InRv for the inner boundary and the outer boundary is defined
as X1InRv + DRv.
where:
DRv = RLdOutRv - KLdRRv RLdOutRv
228
6.9.2.4 Basic detection logic
The operation of the Power swing detection ZMRPSB is only released if the
magnitude of the current is above the setting of the min operating current,
IMinOpPE.
ZMRPSB function can operate in two operating modes:
The 1 out of 3 operating mode is based on detection of power swing in any of
the three phases. Figure 128 presents a composition of an internal detection
signal DET-L1 in this particular phase.
The 2 out of 3 operating mode is based on detection of power swing in at least
two out of three phases. Figure 129 presents a composition of the detection
signals DET1of3 and DET2of3.
Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 128 are
related to the operation of the impedance measuring elements in each phase
separately (n represents the corresponding L1, L2 and L3). They are internal
signals, calculated by ZMRPSB function.
The tP1 timer in figure 128 serve as detection of initial power swings, which are
usually not as fast as the later swings are. The tP2 timer become activated for the
detection of the consecutive swings, if the measured impedance exit the operate
area and returns within the time delay, set on the tW waiting timer. The upper part
of figure 128 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-timers)
are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the
same settings.
AND
ZINL1
AND
DET-L1
OR
AND AND
ZOUTL1
-loop
ZOUTL2
ZOUTL3
OR
detected
OR
-loop
0-tP1
0
0-tP2
0
0
0-tW
IEC05000113 V2 EN
Figure 128: Detection of power swing in phase L1
229
DET-L1
DET-L2
DET-L3
DET1of3 - int.
DET2of3 - int.
&
&
&
>1
>1
Figure 129: Detection of power swing for 1-of-3 and 2-of-3 operating mode
en05000114.vsd
TRSP
t
tEF
I0CHECK
AND
BLKI02
t
10 ms
AND BLKI01
BLOCK
INHIBIT
ZOUTL3
ZOUTL2
ZOUTL1
DET1of3 - int.
REL1PH
BLK1PH
AND
DET2of3 - int.
REL2PH
BLK2PH
AND
EXTERNAL
AND
START
ZOUT
ZINL1
ZINL2
ZINL3
ZIN
AND
t
tR1
t
tR2
OR
AND
AND
OR
OR
OR
OR
OR
t
tH
-loop
-loop
IEC05000114 V1 EN
Figure 130: Simplified block diagram for ZMRPSB function
230
6.9.2.5 Operating and inhibit conditions
Figure 130 presents a simplified logic diagram for the Power swing detection
function ZMRPSB. The internal signals DET1of3 and DET2of3 relate to the
detailed logic diagrams in figure 128 and figure 129 respectively.
Selection of the operating mode is possible by the proper configuration of the
functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Off, but notice that the DFw and DRv will still be calculated from
RLdOutFw and RLdOutRv. The characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
Logical 1 on functional input BLOCK inhibits the output START signal
instantaneously.
The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
time, which is longer than the time delay set on tR2 timer. It is possible to
disable this condition by connecting the logical 1 signal to the BLKI01
functional input.
The INHIBIT internal signal is activated after the time delay, set on tR1 timer,
if an earth-fault appears during the power swing (input IOCHECK is high) and
the power swing has been detected before the earth-fault (activation of the
signal I0CHECK). It is possible to disable this condition by connecting the
logical 1 signal to the BLKI02 functional input.
The INHIBIT logical signals becomes logical 1, if the functional input
I0CHECK appears within the time delay, set on tEF timer and the impedance
has been seen within the outer characteristic of ZMRPSB operate
characteristic in all three phases. This function prevents the operation of
ZMRPSB function in cases, when the circuit breaker closes onto persistent
single-phase fault after single-phase autoreclosing dead time, if the initial single-
phase fault and single-phase opening of the circuit breaker causes the power
swing in the remaining two phases.
231
ZMRPSB
I3P*
U3P*
BLOCK
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXTERNAL
START
ZOUT
ZIN
IEC06000264 V2 EN
Figure 131: ZMRPSB function block
Table 113: ZMRPSB Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLKI01 BOOLEAN 0 Block inhibit of start output for slow swing condition
BLKI02 BOOLEAN 0 Block inhibit of start output for subsequent
residual current detection
BLK1PH BOOLEAN 0 Block one-out-of-three-phase operating mode
REL1PH BOOLEAN 0 Release one-out-of-three-phase operating mode
BLK2PH BOOLEAN 0 Block two-out-of-three-phase operating mode
REL2PH BOOLEAN 0 Release two-out-of-three-phase operating mode
I0CHECK BOOLEAN 0 Residual current (3I0) detection used to inhibit
start output
TRSP BOOLEAN 0 Single-pole tripping command issued by tripping
function
EXTERNAL BOOLEAN 0 Input for external detection of power swing
Table 114: ZMRPSB Output signals
START BOOLEAN Power swing detected
ZOUT BOOLEAN Measured impedance within outer impedance
boundary
ZIN BOOLEAN Measured impedance within inner impedance
boundary
232
Table 115: ZMRPSB Group settings (basic)
Operation Off
On
- - Off Operation Mode On / Off
X1InFw 0.10 - 3000.00 ohm 0.01 30.00 Inner reactive boundary, forward
R1LIn 0.10 - 1000.00 ohm 0.01 30.00 Line resistance for inner characteristic
angle
R1FInFw 0.10 - 1000.00 ohm 0.01 30.00 Fault resistance coverage to inner
resistive line, forward
X1InRv 0.10 - 3000.00 ohm 0.01 30.00 Inner reactive boundary, reverse
R1FInRv 0.10 - 1000.00 ohm 0.01 30.00 Fault resistance line to inner resistive
boundary, reverse
OperationLdCh Off
On
- - On Operation of load discrimination
characteristic
RLdOutFw 0.10 - 3000.00 ohm 0.01 30.00 Outer resistive load boundary, forward
ArgLd 5 - 70 Deg 1 25 Load angle determining load impedance
area
RLdOutRv 0.10 - 3000.00 ohm 0.01 30.00 Outer resistive load boundary, reverse
kLdRFw 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, forward
kLdRRv 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, reverse
tEF 0.000 - 60.000 s 0.001 3.000 Timer for overcoming single-pole
reclosing dead time
IMinOpPE 5 - 30 %IB 1 10 Minimum operate current in % of IBase
IBase 1 - 99999 A 1 3000 Base setting for current level settings
Table 116: ZMRPSB Group settings (advanced)
tP1 0.000 - 60.000 s 0.001 0.045 Timer for detection of initial power swing
tP2 0.000 - 60.000 s 0.001 0.015 Timer for detection of subsequent power
swings
tW 0.000 - 60.000 s 0.001 0.250 Waiting timer for activation of tP2 timer
tH 0.000 - 60.000 s 0.001 0.500 Timer for holding power swing START
output
tR1 0.000 - 60.000 s 0.001 0.300 Timer giving delay to inhibit by the
residual current
tR2 0.000 - 60.000 s 0.001 2.000 Timer giving delay to inhibit at very slow
swing
233
Table 117: ZMRPSB technical data
Reactive reach (0.10-3000.00) W/phase

Conditions:
r
r
degrees
Resistive reach (0.101000.00)W/loop
Timers (0.000-60.000) s 0.5% 10 ms
6.10 Power swing logic ZMRPSL
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Power swing logic ZMRPSL - -
6.10.1 Introduction
Power Swing Logic (ZMRPSL) is a complementary function to Power Swing
Detection (ZMRPSB) function. It provides possibility for selective tripping of
faults on power lines during system oscillations (power swings or pole slips), when
the distance protection function should normally be blocked. The complete logic
consists of two different parts:
Communication and tripping part: provides selective tripping on the basis of
special distance protection zones and a scheme communication logic, which
are not blocked during the system oscillations.
Blocking part: blocks unwanted operation of instantaneous distance protection
zone 1 for oscillations, which are initiated by faults and their clearing on the
adjacent power lines and other primary elements.
6.10.2.1 Communication and tripping logic
Communication and tripping logic as used by the power swing distance protection
zones is schematically presented in figure 132.
234
STDEF
AR1P1 &
STPSD
BLOCK & t
tCS
&
CSUR
CS
t
tBlkTr
&
t
tTrip
CR
CACC
>1
&
BLKZMPS
TRIP
en06000236.vsd
IEC06000236 V1 EN
Figure 132: Simplified logic diagram power swing communication and tripping
logic
The complete logic remains blocked as long as there is a logical one on the
BLOCK functional input signal. Presence of the logical one on the STDEF
functional input signal also blocks the logic as long as this block is not released by
the logical one on the AR1P1 functional input signal. The functional output signal
BLKZMPS remains logical one as long as the function is not blocked externally
(BLOCK is logical zero) and the earth-fault is detected on protected line (STDEF
is logical one), which is connected in three-phase mode (AR1P1 is logical zero).
Timer tBlkTr prolongs the duration of this blocking condition, if the measured
impedance remains within the operate area of the Power Swing Detection
(ZMRPSB) function (STPSD input active). The BLKZMPS can be used to block
the operation of the power-swing zones.
Logical one on functional input CSUR, which is normally connected to the TRIP
functional output of a power swing carrier sending zone, activates functional output
CS, if the function is not blocked by one of the above conditions. It also activates
the TRIP functional output.
Initiation of the CS functional output is possible only, if the STPSD input has been
active longer than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals PLTR_CRD and CR (local
trip condition) also activates the TRIP functional output, if the function is not
blocked by one of the above conditions and the STPSD signal has been present
longer then the time delay set on the trip timer tTrip.
6.10.2.2 Blocking logic
Figure 133 presents the logical circuits, which control the operation of the
underreaching zone (zone 1) at power swings, caused by the faults and their
clearance on the remote power lines.
235
STZML
BLOCK
&
STMZH
STZMPSD
STPSD
t
tDZ
t
tZL
&
>1
&
&
&
-loop
>1
STZMLL
BLKZMH
&
en06000237.vsd
IEC06000237 V1 EN
Figure 133: Control of underreaching distance protection (Zone 1) at power
swings caused by the faults and their clearance on adjacent lines
and other system elements
The logic is disabled by a logical one on functional input BLOCK. It can start only
if the following conditions are simultaneously fulfilled:
STPSD functional input signal must be a logical zero. This means, that Power
swing detection (ZMRPSB) function must not detect power swinging over the
protected power line.
STZMPSD functional input must be a logical one. This means that the
impedance must be detected within the external boundary of ZMRPSB function.
STZMOR functional input must be a logical one. This means that the fault
must be detected by the overreaching distance protection zone, for example
zone 2.
The STZMURPS functional output, which can be used in complete terminal logic
instead of a normal distance protection zone 1, becomes active under the following
conditions:
If the STZMUR signal appears at the same time as the STZMOR or if it
appears with a time delay, which is shorter than the time delay set on timer
tDZ.
If the STZMUR signal appears after the STZMOR signal with a time delay
longer than the delay set on the tDZ timer, and remains active longer than the
time delay set on the tZL timer.
The BLKZMOR functional output signal can be used to block the operation of the
higher distance protection zone, if the fault has moved into the zone 1 operate area
after tDZ time delay.
236
ZMRPSL
BLOCK
STZMUR
STZMOR
STPSD
STDEF
STZMPSD
CACC
AR1P1
CSUR
CR
TRIP
STZMURPS
BLKZMUR
BLKZMOR
CS
IEC07000026 V2 EN
Figure 134: ZMRPSL function block
Table 118: ZMRPSL Input signals
STZMUR BOOLEAN 0 Start of the underreaching zone
STZMOR BOOLEAN 0 Start of the overreaching zone
STPSD BOOLEAN 0 Power swing detected
STDEF BOOLEAN 0 Start from Earth Fault Protection in forward or
reverse direction
STZMPSD BOOLEAN 0 Operation of Power Swing Detection external
characteristic
CACC BOOLEAN 0 Overreaching ZM zone to be accelerated
AR1P1 BOOLEAN 0 Single pole auto-reclosing in progress
CSUR BOOLEAN 0 Carrier send by the underreaching power-swing
zone
CR BOOLEAN 0 Carrier receive signal during power swing
detection operation
Table 119: ZMRPSL Output signals
TRIP BOOLEAN Trip through Power Swing Logic
STZMURPS BOOLEAN Start of Underreaching zone controlled by PSL to
be used in configuration
BLKZMUR BOOLEAN Block trip of underreaching impedance zone
BLKZMOR BOOLEAN Block trip of overreaching distance protection
zones
CS BOOLEAN Carrier send signal controlled by the power swing
237
Table 120: ZMRPSL Group settings (basic)
Operation Off
On
tDZ 0.000 - 60.000 s 0.001 0.050 Permitted max oper time diff between
higher and lower zone
tDZMUR 0.000 - 60.000 s 0.001 0.200 Delay for oper of underreach zone with
detected diff in oper time
tCS 0.000 - 60.000 s 0.001 0.100 Conditional timer for sending the CS at
power swings
tTrip 0.000 - 60.000 s 0.001 0.100 Conditional timer for tripping at power
swings
tBlkTr 0.000 - 60.000 s 0.001 0.300 Timer for blocking the overreaching
zones trip
6.11 Pole slip protection PSPPPAM
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Pole slip protection PSPPPAM
<
SYMBOL-MM V1 EN
78
6.11.1 Introduction
Sudden events in an electrical power system such as large changes in load, fault
occurrence or fault clearance, can cause power oscillations referred to as power
swings. In a non-recoverable situation, the power swings become so severe that the
synchronism is lost, a condition referred to as pole slipping. The main purpose of
the pole slip protection (PSPPPAM) is to detect, evaluate, and take the required
action for pole slipping occurrences in the power system. The electrical system
parts swinging to each other can be separated with the line/s closest to the centre of
the power swing allowing the two systems to be stable as separated islands.
If the generator is faster than the power system, the rotor movement in the
impedance and voltage diagram is from right to left and generating is signalled. If
the generator is slower than the power system, the rotor movement is from left to
right and motoring is signalled (the power system drives the generator as if it were
a motor).
238
The movements in the impedance plain can be seen in figure 135. The transient
behaviour is described by the transient EMF's E
A
and E
B
, and by X'
d
, X
T
and the
transient system impedance Z
S
.
IED
B A
E
B
E
A
X
d
X
T
X
S
Zone 1 Zone 2
jX
R
X
d
X
T
X
S
B
A
d
Apparent generator
impedance
Pole slip
impedance
movement
IEC06000437 V2 EN
Figure 135: Movements in the impedance plain
where:
X'
d
= transient reactance of the generator
X
T
= short-circuit reactance of the step-up transformer
Z
S
= impedance of the power system A
The detection of rotor angle is enabled when:
239
the minimum current exceeds 0.10 I
N
(I
N
is IBase parameter set under general
setting).
the maximum voltage falls below 0.92 UBase
the voltage Ucos (the voltage in phase with the generator current) has an
angular velocity of 0.2...8 Hz and
the corresponding direction is not blocked.

en07000004.vsd
IEC07000004 V1 EN
Figure 136: Different generator quantities as function of the angle between the
equivalent generators
An alarm is given when movement of the rotor is detected and the rotor angle
exceeds the angle set for 'WarnAngle'.
Slipping is detected when:
a change of rotor angle of min. 50 ms is recognized
the slip line is crossed between Z
A
and Z
B
.
When the impedance crosses the slip line between Z
B
and Z
C
it counts as being in
zone 1 and between Z
C
and Z
A
in zone 2. The entire distance ZA-ZB becomes zone
1 when signal EXTZONE1 is high (external device detects the direction of the
centre of slipping).
After the first slip, the signals ZONE1 or ZONE2 and depending on the direction
of slip - either GEN or MOTOR are issued.
240
Every time pole slipping is detected, the impedance of the point where the slip line
is crossed and the instantaneous slip frequency are displayed as measurements.
Further slips are only detected, if they are in the same direction and if the rate of
rotor movement has reduced in relation to the preceding slip or the slip line is
crossed in the opposite direction outside ZA-ZB. A further slip in the opposite
direction within Z
A
-Z
B
resets all the signals and is then signalled itself as a first slip.
The TRIP1 tripping command and signal are generated after N1 slips in zone 1,
providing the rotor angle is less than TripAngle. The TRIP2 signal is generated
after N2 slips in zone 2, providing the rotor angle is less than TripAngle.
All signals are reset if:
the direction of movement reverses
the rotor angle detector resets without a slip being counted or
no rotor relative movement was detected during the time ResetTime.
Ucosj < 0.92 UBase
en07000005.vsd
Imin > 0.10 IBase
0.2 Slip.Freq. 8 Hz
AND
d startAngle
AND
START
Z cross line ZA - ZC
Z cross line ZC - ZB
AND
AND
ZONE1
ZONE2
Counter
N1Limit
a
b
a b
d tripAngle
AND
TRIP1
Counter
N2Limit
a
b
a b
AND
TRIP2
OR
TRIP
IEC07000005 V1 EN
Figure 137: Simplified logic diagram for pole slip protection PSPPPAM
241
PSPPPAM
I3P*
U3P*
BLOCK
BLKGEN
BLKMOTOR
EXTZONE1
TRIP
TRIP1
TRIP2
START
ZONE1
ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOSKV
UCOSPER
IEC07000030 V2 EN
Figure 138: PSPPPAM function block
Table 121: PSPPPAM Input signals
I3P GROUP
SIGNAL
- Current group connection
U3P GROUP
SIGNAL
- Voltage group connection
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOTOR BOOLEAN 0 Block operation in motor direction
EXTZONE1 BOOLEAN 0 Extension of zone1 with zone2 region
Table 122: PSPPPAM Output signals
TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip1 after the N1Limit slip in zone1
TRIP2 BOOLEAN Trip2 after the N2Limit slip in zone2
START BOOLEAN Common start signal
ZONE1 BOOLEAN First slip in zone1 region
ZONE2 BOOLEAN First slip in zone2 region
GEN BOOLEAN Generator is faster then the system
MOTOR BOOLEAN Generator is slower then the system
SFREQ REAL Slip frequency
SLIPZOHM REAL Slip impedance in ohms
SLIPZPER REAL Slip impedance in percent of ZBase
UCOSKV REAL UCosPhi voltage in kV
UCOSPER REAL UCosPhi voltage in percent of UBase
242
Table 123: PSPPPAM Group settings (basic)
Operation Off
On
- - Off Operation On / Off
OperationZ1 Off
On
- - On Operation Zone1 On / Off
OperationZ2 Off
On
- - On Operation Zone2 On / Off
ImpedanceZA 0.00 - 1000.00 % 0.01 10.00 Forward impedance in % of Zbase
ImpedanceZB 0.00 - 1000.00 % 0.01 10.00 Reverse impedance in % of Zbase
ImpedanceZC 0.00 - 1000.00 % 0.01 10.00 Impedance of zone1 limit in % of Zbase
AnglePhi 72.00 - 90.00 Deg 0.01 85.00 Angle of the slip impedance line
StartAngle 0.0 - 180.0 Deg 0.1 110.0 Rotor angle for the start signal
TripAngle 0.0 - 180.0 Deg 0.1 90.0 Rotor angle for the trip1 and trip2 signals
N1Limit 1 - 20 - 1 1 Count limit for the trip1 signal
N2Limit 1 - 20 - 1 3 Count limit for the trip2 signal
Table 124: PSPPPAM Group settings (advanced)
ResetTime 0.000 - 60.000 s 0.001 5.000 Time without slip to reset all signals
Table 125: PSPPPAM Non group settings (basic)
IBase 0.1 - 99999.9 A 0.1 3000.0 Base Current (primary phase current in
Amperes)
UBase 0.1 - 9999.9 kV 0.1 20.0 Base Voltage (primary phase-to-phase
voltage in kV)
MeasureMode PosSeq
L1L2
L2L3
L3L1
- - PosSeq Measuring mode (PosSeq, L1L2, L2L3,
L3L1)
InvertCTcurr No
Yes
- - No Invert current direction
Table 126: PSPPPAM technical data
Impedance reach (0.001000.00)% of Zbase 2.0% of Ur/Ir
Characteristic angle (72.0090.00) degrees 5.0 degrees
Start and trip angles (0.0180.0) degrees 5.0 degrees
Zone 1 and Zone 2 trip counters (1-20) -
243
6.12 Automatic switch onto fault logic, voltage and
current based ZCVPSOF
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Automatic switch onto fault logic,
voltage and current based
ZCVPSOF - -
6.12.1 Introduction
Automatic switch onto fault logic, voltage and current based (ZCVPSOF) is a
function that gives an instantaneous trip at closing of breaker onto a fault. A dead
line detection check is provided to activate the function when the line is dead.
Mho distance protections can not operate for switch onto fault condition when the
phase voltages are close to zero. An additional logic based on UI Level is used for
this purpose.
Automatic switch onto fault logic, voltage and current based function (ZCVPSOF)
can be activated externally by Breaker Closed Input or internally (automatically)
by using UI Level Based Logic see figure 139.
The activation from the Dead line detection function is released if the internal
signal deadLine from the UILevel function is activated at the same time as the
input ZACC is not activated during at least for a duration tDLD and the setting
parameter AutoInit is set to On.
When the setting AutoInit is Off, the function is activated by an external binary
input BC. To get a trip one of the following operation modes must also be selected
by the parameter Mode:
Mode = Impedance; trip is released if the input ZACC is activated (normal
connected to non directional distance protection zone).
Mode = UILevel; trip is released if UILevel detector is activated.
Mode = UILvl&Imp; trip is initiated based on impedance measured criteria or
UILevel detection.
The internal signal deadLine from the UILevel detector is activated if all three
phase currents and voltages are below the setting IPh< and UPh<.
UI Level based measurement detects the switch onto fault condition even though
the voltage is very low. The logic is based on current and voltage levels. The
internal signal SOTF UILevel is activated if a phase voltage is below the setting
244
UPh< and corresponding phase current is above the setting IPh< longer than the
time tDuration.
ZCVPSOF can be activated externally from input BC and thus setting AutoInit is
bypassed.
The function is released during a settable time tSOTF.
The function can be blocked by activating the input BLOCK.
AND
AND
BLOCK
AutiInit=On
ZACC
OR
1000
200
t
t
15
TRIP
en07000084.vsd
UILevel detector
IL1
IL2
IL3
UL1
UL2
UL3
Iph<
Uph<
deadLine
AND
AND
OR
AND
OR
SOTFU ILevel
t
BC
Mode = Impedance
Mode = UILevel
Mode = UILvl&Imp
IEC07000084 V2 EN
Figure 139: Simplified logic diagram for Automatic switch onto fault logic,
voltage and current based.
245
ZCVPSOF
I3P*
U3P*
BLOCK
BC
ZACC
TRIP
IEC06000459 V2 EN
Figure 140: ZCVPSOF function block
Table 127: ZCVPSOF Input signals
I3P GROUP
SIGNAL
- Current DFT
U3P GROUP
SIGNAL
- Voltage DFT
BC BOOLEAN 0 External enabling of SOTF
ZACC BOOLEAN 0 Distance zone to be accelerated by SOTF
Table 128: ZCVPSOF Output signals
Table 129: ZCVPSOF Group settings (basic)
Operation Off
On
IBase 1 - 99999 A 1 3000 Base current (A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage L-L (kV)
Mode Impedance
UILevel
UILvl&Imp
- - UILevel Mode of operation of SOTF Function
AutoInit Off
On
- - Off Automatic switchonto fault initialization
IPh< 1 - 100 %IB 1 20 Current level for detection of dead line in
% of IBase
UPh< 1 - 100 %UB 1 70 Voltage level for detection of dead line in
% of UBase
246
tDuration 0.000 - 60.000 s 0.001 0.020 Time delay for UI detection (s)
tSOTF 0.000 - 60.000 s 0.001 1.000 Drop off delay time of switch onto fault
function
tDLD 0.000 - 60.000 s 0.001 0.200 Delay time for activation of dead line
detection
Table 130: ZCVPSOF technical data
Parameter Range or value Accuracy
Operate voltage, detection of dead line (1100)% of
UBase
1.0% of U
r
Operate current, detection of dead line (1100)% of
IBase
1.0% of I
r
Delay following dead line detection input before
Automatic switch into fault logic function is
automatically turned On
(0.00060.000) s 0.5% 10 ms
Time period after circuit breaker closure in which
Automatic switch into fault logic function is active
(0.00060.000) s 0.5% 10 ms
6.13 Phase preference logic PPLPHIZ
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Phase preference logic PPLPHIZ - -
6.13.1 Introduction
Phase preference logic function PPLPHIZ is intended to be used in isolated or high
impedance earthed networks where there is a requirement to trip only one of the
faulty lines at cross-country fault.
Phase preference logic inhibits tripping for single phase-to-earth faults in isolated
and high impedance earthed networks, where such faults are not to be cleared by
distance protection. For cross-country faults, the logic selects either the leading or
the lagging phase-earth loop for measurement and initiates tripping of the preferred
fault based on the selected phase preference. A number of different phase
preference combinations are available for selection.
Phase preference logic PPLPHIZ has 10 operation modes, which can be set by the
parameter OperMode. The different modes and their explanation are shown in
247
table 131 below. The difference between cyclic and acyclic operation can be
explained by the following example. Assume a L1 fault on one line and a L3 fault
on another line. For OperMode = 1231c the line with L3 fault will be tripped (L3
before L1) while for OperMode = 123a the line with L1 1 fault will be tripped (L1
before L3).
Table 131: Operation modes for Phase preference logic
OperMode Description
No filter No filter, phase-to-phase measuring loops are not blocked during single phase-to-
earth faults. Tripping is allowed without any particular phase preference at cross-
country faults
No pref No preference, trip is blocked during single phase-to-earth faults, trip is allowed
without any particular phase preference at cross-country fault
1231 c Cyclic 1231c; L1 before L2 before L3 before L1
1321 c Cyclic 1321c; L1 before L3 before L2 before L1
123 a Acyclic 123a; L1 before L2before L3
132 a Acyclic 132a; L1 before L3 before L2
The function can be divided into two parts; one labeled voltage and current
discrimination and the second one labeled phase preference evaluation, see
figure 141.
The aim with the voltage and current discrimination part is to discriminate faulty
phases and to determine if there is a cross-country fault. If cross-country fault is
detected, an internal signal Detected cross-country fault is created and sent to the
phase preference part to be used in the evaluation process for determining the
condition for trip.
The voltage and current discrimination part gives phase segregated start signals if
the respective measured phase voltage is below the setting parameter UPN< at the
same time as the zero sequence voltage is above the setting parameter 3U0>. If
there is a start in any phase the START out put signal will be activated.
The internal signal for detection of cross-country fault, DetectCrossCountry, that
come from the voltage and current discrimination part of the function can be
achieved in three different ways:
248
1. The magnitude of 3I
0
has been above the setting parameter IN> for a time
longer than the setting of pick-up timer tIN.
0
has been above the setting parameter IN> at the same
time as the magnitude of 3U
0
has been above the setting parameter 3U0>
during a time longer than the setting of pick-up timer tUN.
0
has been above the setting parameter IN> at the same
time as one of the following conditions are fulfilled:
the measured phase-to-phase voltage in at least one of the phase
combinations has been below the setting parameter UPP< for more than
20 ms.
At least two of the phase voltages are below the setting parameter UPN<
for more than 20 ms.
The second part, phase preference evaluation, uses the internal signal
DetectCrossCountry from the voltage and current evaluation together with the
input signal STCND together with phase selection start condition (from phase
selection functions) connected to input STCND, and the information from the
setting parameter OperMode are used to determine the condition for trip. To
release the Phase preference logic, at least two out of three phases must be faulty.
The fault classification whether it is a single phase-to-earth, two-phase or cross-
country fault and which phase to be tripped at cross-country fault is converted into
a binary coded signal and sent to the distance protection measuring zone to release
the correct measuring zone according to the setting of OperMode. This is done by
activating the output ZREL and it shall be connected to the input STCND on the
distance zone measuring element.
The release signals from phase selection will only be gated with the cross-country
check from I
N
and U
N
but without time delay. If no phase selection start has
occurred, the release is based on current and voltage discriminating part only.
The input signal STCND consist of binary information of fault type and is
connected to the output STCND on phase selection function. The fault must be
activated in at least two phases to be classified as a cross-country fault in the phase
preference part of the logic.
The input signals RELxxx are additional fault release signals that can be connected
to external protection functions through binary input.
The output START and trip signals can be blocked by activating the input BLOCK
249
UL1
UL2
UL3
UPN<
IN
UN
UL1UL2
UL2UL3
UL3UL1
OperMode
RELL1N
RELL2N
RELL3N
Phase Preference
Evaluation
START
IN>
UN0>
UPP<
Voltage and
Current
Discrimination
Detect Cross-
Country fault
STCND
BLOCK
ZREL
AND
AND
IEC09000220 V2 EN
Figure 141: Simplified block diagram for Phase preference logic
PPLPHIZ
I3P*
U3P*
BLOCK
RELL1N
RELL2N
RELL3N
STCND
START
ZREL
IEC07000029 V2 EN
Figure 142: PPLPHIZ function block
Table 132: PPLPHIZ Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
250
RELL1N BOOLEAN 0 Release condition for the L1 to earth loop
STCND INTEGER 0 Integer coded external release signals
Table 133: PPLPHIZ Output signals
START BOOLEAN Indicates start for earth fault(s), regardless of
direction
ZREL INTEGER Integer coded output release signal
Table 134: PPLPHIZ Group settings (basic)
OperMode No Filter
NoPref
1231c
1321c
123a
132a
213a
231a
312a
321a
- - No Filter Operating mode (c=cyclic,a=acyclic)
UPN< 10.0 - 100.0 %UB 1.0 70.0 Operate value of phase undervoltage (%
of UBase)
UPP< 10.0 - 100.0 %UB 1.0 50.0 Operate value of line to line
undervoltage (% of UBase)
3U0> 5.0 - 70.0 %UB 1.0 20.0 Operate value of residual voltage (% of
UBase)
IN> 10 - 200 %IB 1 20 Operate value of residual current (% of
IBase)
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.150 Pickup-delay for residual current
251
Table 135: PPLPHIZ technical data
Operate value, phase-to-phase
and phase-to-neutral
undervoltage
(10.0 - 100.0)% of UBase 0,5% of U
r
Reset ratio, undervoltage < 105% -
Operate value, residual voltage (5.0 - 70.0)% of UBase 0,5% of U
r
Reset ratio, residual voltage > 95% -
Operate value, residual current (10 - 200)% of IBase 1,0% of I
r
for I I
r
Reset ratio, residual current > 95% -
Timers (0.000 - 60.000) s 0,5% 10ms
Operating mode No Filter, NoPref
Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a,
312a, 321a

252
Section 7 Current protection
About this chapter
This chapter describes current protection functions. These include functions like
Instantaneous phase overcurrent protection, Four step phase overcurrent protection,
Pole discordance protection and Residual overcurrent protection.
7.1 Instantaneous phase overcurrent protection PHPIOC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Instantaneous phase overcurrent
protection
PHPIOC
3I>>
SYMBOL-Z V1 EN
50
7.1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach
and short tripping time to allow use as a high set short-circuit protection function.
The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. The RMS value of each phase current is derived from the
fundamental frequency components, as well as sampled values of each phase
current. These phase current values are fed to the instantaneous phase overcurrent
protection function PHPIOC. In a comparator the RMS values are compared to the
set operation current value of the function (IP>>). If a phase current is larger than
the set operation current a signal from the comparator for this phase is set to true.
This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this
phase and the TRIP signal that is common for all three phases.
There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the
parameter is set to 1 out of 3 any phase trip signal will be activated. If the
parameter is set to 2 out of 3 at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current
(StValMult) via a binary input (ENMULT). In some applications the operation
value needs to be changed, for example due to transformer inrush currents.
Current protection
253
PHPIOC can be blocked from the binary input BLOCK.
PHPIOC
I3P*
BLOCK
ENMULT
TRIP
TRL1
TRL2
TRL3
IEC04000391 V2 EN
Figure 143: PHPIOC function block
Table 136: PHPIOC Input signals
I3P GROUP
SIGNAL
- Three phase current
ENMULT BOOLEAN 0 Enable current start value multiplier
Table 137: PHPIOC Output signals
TRIP BOOLEAN Trip signal from any phase
Table 138: PHPIOC Group settings (basic)
Operation Off
On
OpMode 2 out of 3
1 out of 3
- - 1 out of 3 Select operation mode 2-out of 3 / 1-out
of 3
IP>> 1 - 2500 %IB 1 200 Operate phase current level in % of IBase
Table 139: PHPIOC Group settings (advanced)
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Current protection
254
Table 140: PHPIOC technical data
Operate current (1-2500)% of lBase 1.0% of I
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
Operate time 25 ms typically at 0 to 2 x I
set
-
Reset time 25 ms typically at 2 to 0 x I
set
-
Critical impulse time 10 ms typically at 0 to 2 x I
set
-
set
-
set
-
set
-
Dynamic overreach < 5% at t = 100 ms -
7.2 Four step phase overcurrent protection OC4PTOC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Four step phase overcurrent protection OC4PTOC
4
4
alt
3I>
TOC-REVA V1 EN
51/67
7.2.1 Introduction
The four step phase overcurrent protection function OC4PTOC has an inverse or
definite time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an
optional user defined time characteristic.
The directional function is voltage polarized with memory. The function can be set
to be directional or non-directional independently for each of the steps.
A 2nd harmonic blocking can be set individually for each step.
The Four step overcurrent protection function OC4PTOC is divided into four
different sub-functions, one for each step. For each step x , where x is step 1, 2, 3
Current protection
255
and 4, an operation mode is set by DirModex: Off/Non-directional/Forward/
Reverse.
The protection design can be decomposed in four parts:
The direction element
The harmonic Restraint Blocking function
The four step over current function
The mode selection
If VT inputs are not available or not connected, setting parameter
DirModex shall be left to default value, Non-directional.
en05000740.vsd
Direction
Element
4 step over current
element
One element for each
step
Harmonic
Restraint
Mode Selection
dirPh1Flt
dirPh2Flt
dirPh3Flt
harmRestrBlock
enableDir
enableStep1-4
DirectionalMode1-4
faultState
Element
faultState
I3P
U3P
I3P
START
TRIP
IEC05000740 V1 EN
Figure 144: Functional overview of OC4PTOC
A common setting for all steps, StartPhSel, is used to specify the number of phase
currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out
of 3 or 3 out of 3.
Current protection
256
The sampled analogue phase currents are processed in a pre-processing function
block. Using a parameter setting MeasType within the general settings for the four
step phase overcurrent protection function OC4PTOC, it is possible to select the
type of the measurement used for all overcurrent stages. It is possible to select
either discrete Fourier filter (DFT) or true RMS filter (RMS).
If DFT option is selected then only the RMS value of the fundamental frequency
components of each phase current is derived. Influence of DC current component
and higher harmonic current components are almost completely suppressed. If
RMS option is selected then the true RMS values is used. The true RMS value in
addition to the fundamental frequency component includes the contribution from
the current DC component as well as from higher current harmonic. The selected
current values are fed to OC4PTOC.
In a comparator, for each phase current, the DFT or RMS values are compared to
the set operation current value of the function (I1>, I2>, I3> or I4>). If a phase
current is larger than the set operation current, outputs START, STx, STL1, STL2
and STL3 are, without delay, activated. Output signals STL1, STL2 and STL3 are
common for all steps. This means that the lowest set step will initiate the
activation. The START signal is common for all three phases and all steps. It shall
be noted that the selection of measured value (DFT or RMS) do not influence the
operation of directional part of OC4PTOC.
Service value for individually measured phase currents are also available on the
local HMI for OC4PTOC function, which simplifies testing, commissioning and in
service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and the relation is compared to a set
restrain current level.
The function can be directional. The direction of the fault current is given as
current angle in relation to the voltage angle. The fault current and fault voltage for
the directional function is dependent of the fault type. To enable directional
measurement at close in faults, causing low measured voltage, the polarization
voltage is a combination of the apparent voltage (85%) and a memory voltage
(15%). The following combinations are used.
Phase-phase short circuit:
1 2 1 2 1 2 1 2
= - = -
refL L L L dirL L L L
U U U I I I
2 3 2 3 2 3 2 3
= - = -
U U U I I I
3 1 3 1 3 1 3 1
= - = -
U U U I I I
Current protection
257

Phase-earth short circuit:
1 1 1 1
= =
refL L dirL L
U U I I
2 2 2 2
= =
refL L dirL L
U U I I
3 3 3 3
= =
refL L dirL L
U U I I
L1M
restored.
After 100 ms, the following occurs:
(between 10 and 30% of the set terminal rated current IBase), the condition
seals in.
The directional setting is given as a characteristic angle AngleRCA for the function
and an angle window AngleROA.
Current protection
258
U
ref
I
dir
RCA
ROA
Forward
Reverse
ROA
en05000745.vsd
IEC05000745 V1 EN
Figure 145: Directional characteristic of the phase overcurrent protection
The default value of AngleRCA is 65. The parameters AngleROA gives the angle
sector from AngleRCA for directional borders.
A minimum current for directional phase start current signal can be set:
IminOpPhSel.
If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or inverse time
characteristic. A wide range of standardized inverse time characteristics is
available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in section "Inverse
characteristics".
All four steps in OC4PTOC can be blocked from the binary input BLOCK. The
binary input BLKSTx (x=1, 2, 3 or 4) blocks the operation of respective step.
Different types of reset time can be selected as described in section "Inverse
characteristics".
There is also a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the
set operation current via a binary input (enable multiplier). In some applications the
operation value needs to be changed, for example due to changed network
switching state. The function can be blocked from the binary input BLOCK. The
start signals from the function can be blocked from the binary input BLKST. The
trip signals from the function can be blocked from the binary input BLKTR.
Current protection
259
OC4PTOC
I3P*
U3P*
BLOCK
BLKTR
BLKST1
BLKST2
BLKST3
BLKST4
ENMULT1
ENMULT2
ENMULT3
ENMULT4
TRIP
TR1
TR2
TR3
TR4
TRL1
TRL2
TRL3
TR1L1
TR1L2
TR1L3
TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3
IEC06000187 V2 EN
Figure 146: OC4PTOC function block
Table 141: OC4PTOC Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLKST1 BOOLEAN 0 Block of Step1
Current protection
260
ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for
step1
step2
step3
step4
Table 142: OC4PTOC Output signals
TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR1L1 BOOLEAN Trip signal from step1 phase L1
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
Current protection
261
ST1L1 BOOLEAN Start signal from step1 phase L1
2NDHARM BOOLEAN Block from second harmonic detection
DIRL1 INTEGER Direction for phase1
Table 143: OC4PTOC Group settings (basic)
Operation Off
On
AngleRCA 40 - 65 Deg 1 55 Relay characteristic angle (RCA)
AngleROA 40 - 89 Deg 1 80 Relay operation angle (ROA)
StartPhSel Not Used
1 out of 3
2 out of 3
3 out of 3
- - 1 out of 3 Number of phases required for op (1 of
3, 2 of 3, 3 of 3)
DirMode1 Off
Non-directional
Forward
Reverse
- - Non-directional Directional mode of step 1 (off, nodir,
forward, reverse)
Current protection
262
Characterist1 ANSI Ext. inv.
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
- - ANSI Def. Time Selection of time delay curve type for
step 1
I1> 1 - 2500 %IB 1 1000 Phase current operate level for step1 in
% of IBase
t1 0.000 - 60.000 s 0.001 0.000 Definitive time delay of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 1
DirMode2 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
step 2
% of IBase
for step 2
Current protection
263
step 2
for step 2
DirMode3 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
step 3
% of IBase
for step 3
for step 3
step 3
DirMode4 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
step 4
Current protection
264
% of IBase
for step 4
for step 4
step 4
Table 144: OC4PTOC Group settings (advanced)
IMinOpPhSel 1 - 100 %IB 1 7 Minimum current for phase selection in
% of IBase
2ndHarmStab 5 - 100 %IB 1 20 Operate level of 2nd harm restrain op in
% of Fundamental
ResetTypeCrv1 Instantaneous
IEC Reset
ANSI reset
- - Instantaneous Selection of reset curve type for step 1
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay used in IEC Definite
Time curve step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 1
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
HarmRestrain1 Off
On
- - Off Enable block of step 1 from harmonic
restrain
IEC Reset
ANSI reset
Time curve step 2
curve for step 2
curve for step 2
curve for step 2
Current protection
265
HarmRestrain2 Off
On
restrain
IEC Reset
ANSI reset
Time curve step 3
curve for step 3
curve for step 3
curve for step 3
HarmRestrain3 Off
On
- - Off Enable block of step3 from harmonic
restrain
IEC Reset
ANSI reset
Time curve step 4
curve for step 4
curve for step 4
curve for step 4
Current protection
266
HarmRestrain4 Off
On
restrain
Table 145: OC4PTOC Non group settings (basic)
MeasType DFT
RMS
- - DFT Selection between DFT and RMS
measurement
Table 146: OC4PTOC technical data
Function Setting range Accuracy
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
Min. operating current (1-100)% of lBase 1.0% of I
r
Relay characteristic angle (RCA) (-70.0 -50.0) degrees 2.0 degrees
Maximum forward angle (40.070.0) degrees 2.0 degrees
Minimum forward angle (75.090.0) degrees 2.0 degrees
2nd harmonic blocking (5100)% of fundamental 2.0% of I
r
Independent time delay (0.000-60.000) s 0.5% 10 ms
Minimum operate time (0.000-60.000) s 0.5% 10 ms
Inverse characteristics, see
table 619, table 620 and table
621
19 curve types See table 619, table 620 and
table 621
Operate time, start function 25 ms typically at 0 to 2 x I
set
-
Reset time, start function 25 ms typically at 2 to 0 x I
set
-
set
-
Impulse margin time 15 ms typically -
7.3 Instantaneous residual overcurrent protection
EFPIOC
Current protection
267
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Instantaneous residual overcurrent
protection
EFPIOC
IN>>
IEF V1 EN
50N
7.3.1 Introduction
The Instantaneous residual overcurrent protection EFPIOC has a low transient
overreach and short tripping times to allow the use for instantaneous earth-fault
protection, with the reach limited to less than typical eighty percent of the line at
minimum source impedance. EFPIOC can be configured to measure the residual
current from the three-phase current inputs or the current from a separate current
input. EFPIOC can be blocked by activating the input BLOCK.
The sampled analog residual currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of the residual current,
as well as from the sample values the equivalent RMS value is derived. This
current value is fed to the Instantaneous residual overcurrent protection (EFPIOC).
In a comparator the RMS value is compared to the set operation current value of
the function (IN>>). If the residual current is larger than the set operation current a
signal from the comparator is set to true. This signal will, without delay, activate
the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current
via a binary input (enable multiplier MULTEN). In some applications the operation
value needs to be changed, for example due to transformer inrush currents.
EFPIOC function can be blocked from the binary input BLOCK. The trip signals
from the function can be blocked from the binary input BLKAR, that can be
activated during single pole trip and autoreclosing sequences.
EFPIOC
I3P*
BLOCK
BLKAR
MULTEN
TRIP
IEC06000269 V2 EN
Figure 147: EFPIOC function block
Current protection
268
Table 147: EFPIOC Input signals
I3P GROUP
SIGNAL
- Three phase currents
BLKAR BOOLEAN 0 Block input for auto reclose
MULTEN BOOLEAN 0 Enable current multiplier
Table 148: EFPIOC Output signals
Table 149: EFPIOC Group settings (basic)
Operation Off
On
IN>> 1 - 2500 %IB 1 200 Operate residual current level in % of
IBase
Table 150: EFPIOC Group settings (advanced)
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Table 151: EFPIOC technical data
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
set
-
set
-
set
-
set
-
Current protection
269
set
-
set
-
Dynamic overreach < 5% at t = 100 ms -
7.4 Four step residual overcurrent protection EF4PTOC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Four step residual overcurrent
protection
EF4PTOC
4
4
alt
IN
TEF-REVA V1 EN
51N/67N
7.4.1 Introduction
The four step residual overcurrent protection EF4PTOC has an inverse or definite
time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an
optional user defined characteristic.
The directional function is voltage polarized, current polarized or dual polarized.
EF4PTOC can be set directional or non-directional independently for each of the
steps.
A second harmonic blocking can be set individually for each step.
EF4PTOC can be used as main protection for phase-to-earth faults.
EF4PTOC can also be used to provide a system back-up for example, in the case of
the primary protection being out of service due to communication or voltage
transformer circuit failure.
Directional operation can be combined together with corresponding
communication logic in permissive or blocking teleprotection scheme. Current
reversal and weak-end infeed functionality are available as well.
EF4PTOC can be configured to measure the residual current from the three-phase
current inputs or the current from a separate current input.
Current protection
270
This function has the following three Analog Inputs on its function block in the
configuration tool:
1. I3P, input used for Operating Quantity.
2. U3P, input used for Voltage Polarizing Quantity.
3. I3PPOL, input used for Current Polarizing Quantity.
These inputs are connected from the corresponding pre-processing function blocks
in the Configuration Tool within PCM600.
7.4.2.1 Operating quantity within the function
The function always uses Residual Current (3I
0
) for its operating quantity. The
residual current can be:
1. directly measured (when a dedicated CT input of the IED is connected in
PCM600 to the fourth analog input of the pre-processing block connected to
EF4PTOC function input I3P). This dedicated IED CT input can be for
example, connected to:
parallel connection of current instrument transformers in all three phases
(Holm-Green connection).
one single core balance, current instrument transformer (cable CT).
one single current instrument transformer located between power system
star point and earth (that is, current transformer located in the star point
of a star connected transformer winding).
one single current instrument transformer located between two parts of a
protected object (that is, current transformer located between two star
points of double star shunt capacitor bank).
2. calculated from three-phase current input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC function
Analog Input I3P is not connected to a dedicated CT input of the IED in
PCM600). In such case the pre-processing block will calculate 3I
0
from the
first three inputs into the pre-processing block by using the following formula:
Iop 3I IL1 IL2 IL3
0
= = + +
where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of
the fundamental frequency component of the residual current is derived. The
phasor magnitude is used within the EF4PTOC protection to compare it with the
Current protection
271
set operation current value of the four steps (IN1>, IN2>, IN3> or IN4>). If the
residual current is larger than the set operation current and the step is used in non-
directional mode a signal from the comparator for this step is set to true. This
signal will, without delay, activate the output signal STINx (x=step 1-4) for this
step and a common START signal.
7.4.2.2 Internal polarizing
A polarizing quantity is used within the protection in order to determine the
direction to the earth fault (Forward/Reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected the protection will use the residual voltage
-3U
0
as polarizing quantity U3P. This voltage can be:
1. directly measured (when a dedicated VT input of the IED is connected in
EF4PTOC function input U3P). This dedicated IED VT input shall be then
connected to open delta winding of a three phase main VT.
2. calculated from three phase voltage input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC analog
function input U3P is NOT connected to a dedicated VT input of the IED in
PCM600). In such case the pre-processing block will calculate -3U
0
from the
UPol = -3U
0
= -(UL1 + UL2 + UL3)
where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
Note! In order to use this all three phase-to-earth voltages must be connected to three IED VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor
of the fundamental frequency component of the residual voltage is derived. This
phasor is used together with the phasor of the operating current, in order to
determine the direction to the earth fault (Forward/Reverse). In order to enable
voltage polarizing the magnitude of polarizing voltage shall be bigger than a
minimum level defined by setting parameter UpolMin.
It shall be noted that 3U
0
is used to determine the location of the earth fault. This
insures the required inversion of the polarizing voltage within the earth-fault function.
Current protection
272
Current polarizing
When current polarizing is selected the function will use the residual current (3I
0
)
as polarizing quantity IPol. This current can be:
1. directly measured (when a dedicated CT input of the IED is connected in
EF4PTOC function input I3PPOL). This dedicated IED CT input is then
typically connected to one single current transformer located between power
system star point and earth (current transformer located in the star point of a
star connected transformer winding).
For some special line protection applications this dedicated IED CT
input can be connected to parallel connection of current transformers in
all three phases (Holm-Green connection)
2. calculated from three phase current input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC function
analog input I3PPOL is NOT connected to a dedicated CT input of the IED in
PCM600). In such case the pre-processing block will calculate 3I
0
from the
IPol 3I IL1 IL2 IL3
0
= = + +
where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual polarizing current is pre-processed by a discrete fourier filter. Thus
the phasor of the fundamental frequency component of the residual current is
derived. This phasor is then multiplied with pre-set equivalent zero-sequence
source Impedance in order to calculate equivalent polarizing voltage UIPol in
accordance with the following formula:
0s
UIPol Z IPol (RNPol j XNPol) IPol = = +
, which will be then used, together with the phasor of the operating current, in order
to determine the direction to the earth fault (Forward/Reverse). In order to enable
current polarizing the magnitude of polarizing current shall be bigger than a
minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the
voltage based and current based polarizing in accordance with the following formula:
Current protection
273
( )
0 0 0
3 3
s
UTotPol UUPol UIPol U Z IPol U RNPol jXNPol IPol = + = - + = - + +
Then the phasor of the total polarizing voltage UTotPol will be used, together with
the phasor of the operating current, to determine the direction of the earth fault
(Forward/Reverse).
7.4.2.3 External polarizing for earth-fault function
The individual steps within the protection can be set as non-directional. When this
setting is selected it is then possible via function binary input BLKSTx to provide
external directional control (that is, torque control) by for example using one of the
following functions if available in the IED:
1. Distance protection directional function.
2. Negative sequence polarized General current and voltage multi purpose
protection function.
7.4.2.4 Base quantities within the protection
The base quantities shall be entered as setting parameters for every earth-fault
function. Base current (IBase) shall be entered as rated phase current of the
protected object in primary amperes. Base voltage (UBase) shall be entered as
rated phase-to-phase voltage of the protected object in primary kV.
7.4.2.5 Internal earth-fault protection structure
The protection is internally divided into the following parts:
1. Four residual overcurrent steps.
2. Directional supervision element for residual overcurrent steps with integrated
directional comparison step for communication based earth-fault protection
schemes (permissive or blocking).
3. Second harmonic blocking element with additional feature for sealed-in
blocking during switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of
breaker problems during breaker opening or closing sequence.
Each part is described separately in the following sections.
7.4.2.6 Four residual overcurrent steps
Each overcurrent step uses operating quantity Iop (residual current) as measuring
quantity. Each of the four residual overcurrent steps has the following built-in
facilities:
Directional mode can be set to Off/Non-directional/Forward/Reverse. By this
parameter setting the directional mode of the step is selected. It shall be noted
Current protection
274
that the directional decision (Forward/Reverse) is not made within the residual
overcurrent step itself. The direction of the fault is determined in common
directional supervision element.
Residual current pickup value.
Type of operating characteristic (inverse or definite time). By this parameter
setting it is possible to select inverse or definite time delay for the earth-fault
protection. Most of the standard IEC and ANSI inverse characteristics are
available. For the complete list of available inverse curves please refer to
section "Inverse characteristics".
Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this
parameter setting it is possible to select the reset characteristic of the step. For
the complete list of available reset curves please refer to section "Inverse time
characteristics".
Time delay related settings. By these parameter settings the properties like
definite time delay, minimum operating time for inverse curves, reset time
delay and parameters to define user programmable inverse curve are defined.
Supervision by second harmonic blocking feature (On/Off). By this parameter
setting it is possible to prevent operation of the step if the second harmonic
content in the residual current exceeds the preset level.
Multiplier for scaling of the set residual current pickup value by external
binary signal. By this parameter setting it is possible to increase residual
current pickup value when function binary input ENMULTx has logical value
1.
Simplified logic diagram for one residual overcurrent step is shown in figure 148.
X
a
b
a>b
ENMULTx
Inverse
tx
OR
|I
OP
|
STINx
TRINx
AND
AND
T
F
HarmRestrain1=Disabled
INx>
BLKSTx
BLOCK
OR
2ndH_BLOCK_Int
INxMult
Characteristx=Inverse
Characteristx=DefTime
DirModex=Off
DirModex=Non-directional
DirModex=Forward
DirModex=Reverse
AND
AND
FORWARD_Int
REVERSE_Int
OR
BLKTR
OR STAGEx_DIR_Int
en07000064.vsd
IEC07000064 V1 EN
Figure 148: Simplified logic diagram for residual overcurrent step x, where x =
step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output
signals for respective step, STINx and TRINx, can be blocked from the binary
Current protection
275
input BLKSTx. The trip signals from the function can be blocked from the binary
input BLKTR.
7.4.2.7 Directional supervision element with integrated directional
comparison function
It shall be noted that at least one of the four residual overcurrent
steps shall be set as directional in order to enable execution of the
directional supervision element and the integrated directional
comparison function.
The protection has integrated directional feature. As the operating quantity current
Iop is always used. The polarizing method is determined by the parameter setting
polMethod. The polarizing quantity will be selected by the function in one of the
following three ways:
1. When polMethod = Voltage, UVPol will be used as polarizing quantity.
2. When polMethod = Current, UIpol will be used as polarizing quantity.
3. WhenpolMethod = Dual, UTotPol will be used as polarizing quantity.
The operating and polarizing quantity are then used inside the directional element,
as shown in figure 149, in order to determine the direction of the earth fault.
Current protection
276
AngleRCA
Forward
Area
Iop=3I
o
Upol=-3U
o
0.6IN>Dir
IN>Dir
Reverse
Area
IEC07000066 V3 EN
Figure 149: Operating characteristic for earth-fault directional element
Two relevant setting parameters for directional supervision element are:
Directional element will be internally enabled to operate as soon as Iop is
bigger than 40% of IN>Dir and directional condition is fulfilled in set direction.
Relay characteristic angle AngleRCA, which defines the position of forward
and reverse areas in the operating characteristic.
Directional comparison step, built-in within directional supervision element, will
set EF4PTOC function output binary signals:
1. STFW=1 when operating quantity magnitude Iop x cos( - AngleRCA) is
bigger than setting parameterIN>Dir and directional supervision element
detects fault in forward direction.
2. STRV=1 when operating quantity magnitude Iop x cos( - AngleRCA) is
bigger than 60% of setting parameter IN>Dir and directional supervision
element detects fault in reverse direction.
These signals shall be used for communication based earth-fault teleprotection
communication schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated
directional comparison step is shown in figure 150:
Current protection
277
X
a
a>b
b IN>Dir
polMethod=Voltage
polMethod=Dual
OR
FORWARD_Int
REVERSE_Int
BLOCK
STAGE1_DIR_Int
0.6
X
0.4
AND
STAGE3_DIR_Int
STAGE4_DIR_Int
STAGE2_DIR_Int
OR
STRV
UPolMin
IPolMin
AngleRCA
T
F
0.0
X
T
F
RNPol
XNPol
0.0
D
i
r
e
c
t
i
o
n
a
l

C
h
a
r
a
c
t
e
r
i
s
t
i
c
FWD
RVS
AND
AND
AND
STFW
FORWARD_Int
REVERSE_Int
AND
| |
UPol
UIPol
IPol
Iop
UTotPol
Iop
Complex
Number
a
a>b
b
IEC07000067 V3 EN
Figure 150: Simplified logic diagram for directional supervision element with integrated directional
comparison step
7.4.2.8 Second harmonic blocking element
A harmonic restrain of the Four step residual overcurrent protection function
EF4PTOC can be chosen. If the ratio of the 2
nd
harmonic component in relation to
the fundamental frequency component in the residual current exceeds the pre-set
level (defined by parameter setting 2ndHarmStab) any of the four residual
overcurrent stages can be selectively blocked by a parameter setting
HarmRestrainx. When 2
nd
harmonic restraint feature is active the EF4PTOC
function output signal 2NDHARMD will be set to logical value one.
In addition to the basic functionality explained above the 2
nd
harmonic blocking
can be set in such way to seal-in until residual current disappears. This feature
might be required to stabilize EF4PTOC during switching of parallel transformers
in the station. In case of parallel transformers there is a risk of sympathetic inrush
current. If one of the transformers is in operation, and the parallel transformer is
Current protection
278
switched in, the asymmetric inrush current of the switched in transformer will
cause partial saturation of the transformer already in service. This is called
transferred saturation. The 2
nd
harmonic of the inrush currents of the two
transformers will be in phase opposition. The summation of the two currents will
thus give a small 2
nd
harmonic current. The residual fundamental current will
however be significant. The inrush current of the transformer in service before the
parallel transformer energizing, will be a little delayed compared to the first
transformer. Therefore we will have high 2
nd
harmonic current component initially.
After a short period this current will however be small and the normal 2
nd
harmonic blocking will reset. If the BlkParTransf function is activated the 2
nd
harmonic restrain signal will be latched as long as the residual current measured by
the relay is larger than a selected step current level.
This feature has been called Block for Parallel Transformers. This 2
nd
harmonic seal-
in feature will be activated when all of the following three conditions are
simultaneously fulfilled:
1. Feature is enabled by entering setting parameter BlkParTransf = On.
2.
Basic 2
nd
harmonic restraint feature has been active for at least 70ms.
3. Residual current magnitude is higher than the set start value for one of the four
residual overcurrent stages. By a parameter setting UseStartValue it is possible
to select which one of the four start values that will be used (IN1> or IN2> or
IN3> or IN4>).
Once Block for Parallel Transformers is activated the basic 2
nd
harmonic blocking
signal will be sealed-in until the residual current magnitude falls below a value
defined by parameter setting UseStartValue (see condition 3 above).
Simplified logic diagram for 2
nd
harmonic blocking feature is shown in figure 151.
Current protection
279
I
OP 2NDHARMD
Extract second
harmonic current
component
Extract
fundamental
current component
a
b
a>b
BLOCK
OR
UseStartValue
IN1>
IN2>
IN3>
IN4>
a
b
a>b
|I
OP
|
t
t=70ms
OR
AN
D
BlkParTransf=On
q
-1
OR 2ndH_BLOCK_Int
en07000068-2.vsd
X
2ndHarmStab
IEC07000068 V2 EN
Figure 151: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers
feature
7.4.2.9 Switch on to fault feature
Integrated in the four step residual overcurrent protection are Switch on to fault
logic (SOTF) and Under-Time logic. The setting parameter SOTF is set to activate
either SOTF or Under-Time logic or both. When the circuit breaker is closing there
is a risk to close it onto a permanent fault, for example during an autoreclosing
sequence. The SOTF logic will enable fast fault clearance during such situations.
The time during which SOTF and Under-Time logics will be active after activation
is defined by the setting parameter t4U.
The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected
by setting parameter StepForSOTF. The SOTF logic can be activated either from
change in circuit breaker position or from circuit breaker close command pulse.
The setting parameter ActivationSOTF can be set for activation of CB position
open change, CB position closed change or CB close command. In case of a
residual current start from step 2 or 3 (dependent on setting) the function will give
a trip after a set delay tSOTF. This delay is normally set to a short time (default 200
ms).
The Under-Time logic always uses the start signal from the step 4. The Under-
Time logic will normally be set to operate for a lower current level than the SOTF
Current protection
280
function. The Under-Time logic can also be blocked by the 2
nd
harmonic restraint
feature. This enables high sensitivity even if power transformer inrush currents can
occur at breaker closing. This logic is typically used to detect asymmetry of CB
poles immediately after switching of the circuit breaker. The Under-Time logic is
activated either from change in circuit breaker position or from circuit breaker
close and open command pulses. This selection is done by setting parameter
ActUnderTime. In case of a start from step 4 this logic will give a trip after a set
delay tUnderTime. This delay is normally set to a relatively short time (default 300
ms). Practically the Under-Time logic acts as circuit breaker pole-discordance
protection, but it is only active immediately after breaker switching. The Under-
Time logic can only be used in solidly or low impedance grounded systems.
UNDERTIME
HarmResSOFT
ActUnderTime
tPulse
AND
t
tUnderTime
OR
Open
Closed
Close command
ActivationSOTF
tPulse
StepForSOTF
STIN2
STIN3
AND
t
tSOTF
AND
BLOCK
2nd Harmonic
AND
Open
Close
Close command
STIN4
SOTF
SOTF or
UnderTime
TRIP
OFF
OR
UnderTime
SOTF
OperationMode
IEC06000643 V2 EN
Figure 152: Simplified logic diagram for SOTF and Under-Time features
EF4PTOC Logic Diagram Simplified logic diagram for the complete EF4PTOC
function is shown in figure 153:
Current protection
281
en06000376.vsd
Direction
Element
4 step over current
element
One element for each
step
Harmonic
Restraint
Mode
Selection
earthFaultDirection
harmRestrBlock
enableDir
enableStep1-4
DirectionalMode1-4
TRIP
Element
enableDir
angleValid
Directional Check
operatingCurrent
SwitchOnToFault
start step 2, 3 and
4
signal to
communication
scheme
TRIP
3U0
3I0
Blocking at parallel
transformers
1
CB
pos
or cmd
Element
3I0
DirMode
DirMode
INPol
IEC06000376 V1 EN
Figure 153: Functional overview of EF4PTOC
EF4PTOC
I3P*
U3P*
I3PPOL*
BLOCK
BLKTR
BLKST1
BLKST2
BLKST3
BLKST4
ENMULT1
ENMULT2
ENMULT3
ENMULT4
CBPOS
CLOSECB
OPENCB
TRIP
TRIN1
TRIN2
TRIN3
TRIN4
TRSOTF
START
STIN1
STIN2
STIN3
STIN4
STSOTF
STFW
STRV
2NDHARMD
IEC06000424 V2 EN
Figure 154: EF4PTOC function block
Current protection
282
Table 152: EF4PTOC Input signals
I3P GROUP
SIGNAL
- Current connection
U3P GROUP
SIGNAL
- Polarizing voltage connection
I3PPOL GROUP
SIGNAL
- Polarizing current connection
BLKST1 BOOLEAN 0 Block of step 1 (Start and trip)
step1
step2
step3
step4
CBPOS BOOLEAN 0 Breaker position
CLOSECB BOOLEAN 0 Breaker close command
OPENCB BOOLEAN 0 Breaker open command
Table 153: EF4PTOC Output signals
TRIP BOOLEAN Trip
TRIN1 BOOLEAN Trip signal from step 1
TRSOTF BOOLEAN Trip signal from earth fault switch onto fault function
STIN1 BOOLEAN Start signal step 1
STSOTF BOOLEAN Start signal from earth fault switch onto fault
function
Current protection
283
STFW BOOLEAN Forward directional start signal
STRV BOOLEAN Reverse directional start signal
2NDHARMD BOOLEAN 2nd harmonic block signal
Table 154: EF4PTOC Group settings (basic)
Operation Off
On
IBase 1 - 99999 A 1 3000 Base value for current settings
UBase 0.05 - 2000.00 kV 0.05 400.00 Base value for voltage settings
AngleRCA -180 - 180 Deg 1 65 Relay characteristic angle (RCA)
polMethod Voltage
Current
Dual
- - Voltage Type of polarization
UPolMin 1 - 100 %UB 1 1 Minimum voltage level for polarization in
% of UBase
IPolMin 2 - 100 %IB 1 5 Minimum current level for polarization in
% of IBase
RNPol 0.50 - 1000.00 ohm 0.01 5.00 Real part of source Z to be used for
current polarisation
XNPol 0.50 - 3000.00 ohm 0.01 40.00 Imaginary part of source Z to be used for
current polarisation
IN>Dir 1 - 100 %IB 1 10 Residual current level for Direction
release in % of IBase
2ndHarmStab 5 - 100 % 1 20 Second harmonic restrain operation in %
of IN amplitude
BlkParTransf Off
On
- - Off Enable blocking at parallel transformers
UseStartValue IN1>
IN2>
IN3>
IN4>
- - IN4> Current level blk at parallel transf (step1,
2, 3 or 4)
SOTF Off
SOTF
UnderTime
SOTF+UnderTime
- - Off SOTF operation mode (Off/SOTF/
Undertime/SOTF+undertime)
ActivationSOTF Open
Closed
CloseCommand
- - Open Select signal that shall activate SOTF
StepForSOTF Step 2
Step 3
- - Step 2 Selection of step used for SOTF
HarmResSOTF Off
On
- - Off Enable harmonic restrain function in
SOTF
tSOTF 0.000 - 60.000 s 0.001 0.200 Time delay for SOTF
t4U 0.000 - 60.000 s 0.001 1.000 Switch-onto-fault active time
Current protection
284
DirMode1 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
- - ANSI Def. Time Time delay curve type for step 1
IN1> 1 - 2500 %IB 1 100 Operate residual current level for step 1
in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Independent (defenite) time delay of step
1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the dependent time
delay for step 1
IN1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 1
for step 1
HarmRestrain1 Off
On
- - On Enable block of step 1 from harmonic
restrain
DirMode2 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
Current protection
285
in % of IBase
t2 0.000 - 60.000 s 0.001 0.400 Independent (definitive) time delay of
step 2
delay for step 2
value for step 2
step 2
HarmRestrain2 Off
On
restrain
DirMode3 Off
Non-directional
Forward
Reverse
forward, reverse)
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t3 0.000 - 60.000 s 0.001 0.800 Independent time delay of step 3
delay for step 3
value for step 3
for step 3
HarmRestrain3 Off
On
restrain
DirMode4 Off
Non-directional
Forward
Reverse
forward, reverse)
Current protection
286
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t4 0.000 - 60.000 s 0.001 1.200 Independent (definitive) time delay of
step 4
delay for step 4
value for step 4
t4Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time in inverse curves
step 4
HarmRestrain4 Off
On
restrain
Table 155: EF4PTOC Group settings (advanced)
ActUnderTime CB position
CB command
- - CB position Select signal to activate under time (CB
Pos/CBCommand)
tUnderTime 0.000 - 60.000 s 0.001 0.300 Time delay for under time
IEC Reset
ANSI reset
- - Instantaneous Reset curve type for step 1
tReset1 0.000 - 60.000 s 0.001 0.020 Reset curve type for step 1
curve for step 1
curve for step 1
curve for step 1
Current protection
287
IEC Reset
ANSI reset
curve for step 2
curve for step 2
curve for step 2
IEC Reset
ANSI reset
curve for step 3
curve for step 3
curve for step 3
programmable curve step 3
IEC Reset
ANSI reset
curve for step 4
curve step 4
Current protection
288
curve for step 4
Table 156: EF4PTOC technical data
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
Operate current for directional
comparison
(1100)% of lBase 1.0% of I
r
Timers (0.000-60.000) s 0.5% 10 ms
table 619, table 620 and table 621
table 621
Second harmonic restrain
operation
(5100)% of fundamental 2.0% of I
r
Relay characteristic angle (-180 to 180) degrees 2.0 degrees
Minimum polarizing voltage (1100)% of UBase 0.5% of U
r
Minimum polarizing current (1-30)% of IBase 0.25% of I
r
Real part of source Z used for
current polarization
(0.50-1000.00) W/phase -
Imaginary part of source Z used
for current polarization
(0.503000.00) W/phase -
set
-
set
-
set
-
7.5 Sensitive directional residual overcurrent and power
protection SDEPSDE
Current protection
289
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Sensitive directional residual over
current and power protection
SDEPSDE - 67N
7.5.1 Introduction
In networks with high impedance earthing, the phase-to-earth fault current is
significantly smaller than the short circuit currents. Another difficulty for earth-
fault protection is that the magnitude of the phase-to-earth fault current is almost
independent of the fault location in the network.
Directional residual current can be used to detect and give selective trip of phase-to-
earth faults in high impedance earthed networks. The protection uses the residual
current component 3I
0
cos , where is the angle between the residual current
and the residual voltage (-3U0), compensated with a characteristic angle.
Alternatively, the function can be set to strict 3I
0
level with an check of angle 3I
0
and cos .
Directional residual power can also be used to detect and give selective trip of phase-
to-earth faults in high impedance earthed networks. The protection uses the
residual power component 3I
0
3U
0
cos , where is the angle between the
residual current and the reference residual voltage, compensated with a
characteristic angle.
A normal non-directional residual current function can also be used with definite or
inverse time delay.
A back-up neutral point voltage function is also available for non-directional
sensitive back-up protection.
In an isolated network, that is, the network is only coupled to earth via the
capacitances between the phase conductors and earth, the residual current always
has -90 phase shift compared to the reference residual voltage. The characteristic
angle is chosen to -90 in such a network.
In resistance earthed networks or in Petersen coil earthed, with a parallel resistor,
the active residual current component (in phase with the residual voltage) should be
used for the earth-fault detection. In such networks the characteristic angle is
chosen to 0.
As the amplitude of the residual current is independent of the fault location the
selectivity of the earth-fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and
when should the sensitive directional residual power protection be used? Consider
the following facts:
Current protection
290
Sensitive directional residual overcurrent protection gives possibility for better
sensitivity
Sensitive directional residual power protection gives possibility to use inverse
time characteristics. This is applicable in large high impedance earthed
networks, with large capacitive earth-fault current
In some power systems a medium size neutral point resistor is used, for
example, in low impedance earthed system. Such a resistor will give a resistive
earth-fault current component of about 200 - 400 A at a zero resistive phase-to-
earth fault. In such a system the directional residual power protection gives
better possibilities for selectivity enabled by inverse time power characteristics.
7.5.2.1 Function inputs
The function is using phasors of the residual current and voltage. Group signals I3P
and U3P containing phasors of residual current and voltage is taken from pre-
processor blocks.
The sensitive directional earth fault protection has the following sub-functions
included:
Directional residual current protection measuring 3I
0
cos
is defined as the angle between the residual current 3I
0
and the reference voltage
compensated with the set characteristic angle RCADir (=ang(3I
0
)-ang(U
ref
) ).
Uref = -3U
0
e
jRCADIr
. RCADir is normally set equal to 0 in a high impedance
earthed network with a neutral point resistor as the active current component is
appearing out on the faulted feeder only. RCADir is set equal to -90 in an isolated
network as all currents are mainly capacitive. The function operates when 3I
0
cos
gets larger than the set value.
Current protection
291
,
= =
o o
0 , 0 RCADir ROADir
ref
U
0
3I
j = -
0 ref
ang(3I ) ang(3U )
- =
0 ref
3U U
0
3I cos j
IEC06000648 V2 EN
Figure 155: RCADir set to 0

ref
U
= - =
o o
90 , 90 RCADir ROADir
0
3I
0
3 j I cos
j = -
0
(3 ) ( )
ref
ang I ang U
-
0
3U
IEC06000649 V2 EN
Figure 156: RCADir set to -90
For trip, both the residual current 3I
0
cos and the release voltage 3U
0
, must be
larger than the set levels: INCosPhi> and UNRel>.
Trip from this function can be blocked from the binary input BLKTRDIR.
Current protection
292
When the function is activated binary output signals START and STDIRIN are
activated. If the activation is active after the set delay tDef the binary output signals
TRIP and TRDIRIN are activated. The trip from this sub-function has definite time
delay.
There is a possibility to increase the operate level for currents where the angle is
larger than a set value as shown in the figure below. This is equivalent to blocking
of the function if > ROADir. This option is used to handle angle error for the
instrument transformers.
Operate area
ROADir
=
o
0 RCADir
0
3I
j
0
3 j I cos
- =
0
3
ref
U U
IEC06000650 V2 EN
Figure 157: Characteristic with ROADir restriction
The function indicates forward/reverse direction to the fault. Reverse direction is
defined as 3I
0
cos ( + 180) the set value.
It is also possible to tilt the characteristic to compensate for current transformer
angle error with a setting RCAComp as shown in the figure 158:
Current protection
293
-3U
0
=U
ref
Operate area
Instrument
transformer
angle error
3I
0
(prim)
3I
0
(to prot)
a
Characteristic after
angle compensation
RCAcomp
en06000651.vsd
RCADir = 0
IEC06000651 V2 EN
Figure 158: Explanation of RCAComp
Directional residual power protection measuring 3I
0
3U
0
cos
is defined as the angle between the residual current 3I
0
and the reference voltage
compensated with the set characteristic angle RCADir (=ang(3I
0
)ang(U
ref
) ).
U
ref
= -3U
0
e
-jRCA
. The function operates when 3I
0
3U
0
cos gets larger than
the set value.
For trip, both the residual power 3I
0
3U
0
cos , the residual current 3I
0
and the
release voltage 3U
0
, shall be larger than the set levels (SN>, INRel> and UNRel>).
activated. If the activation is active after the set delay tDef or after the inverse time
delay (setting kSN) the binary output signals TRIP and TRDIRIN are activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction
is defined as 3I
0
3U
0
cos ( + 180) the set value.
This variant has the possibility of choice between definite time delay and inverse
time delay.
Current protection
294
The inverse time delay is defined as:
0 0
inv
0 0
kSN (3I 3U cos (reference))
t
3I 3U cos (measured)
j
=
j
Directional residual current protection measuring 3I
0
and
The function will operate if the residual current is larger that the set value and the
angle = ang(3I
0
)-ang(U
ref
) is within the sector RCADir ROADir
-3U
0
80 80
Operate area
3I
0
en06000652.vsd
RCADir = 0
ROADir = 80
IEC06000652 V2 EN
Figure 159: Example of characteristic
For trip, both the residual current 3I
0
and the release voltage 3U
0
, shall be larger
than the set levels INDir> and UNREL> and the angle shall be in the set sector
ROADir and RCADir.
activated. If the activation is active after the set delay tDef the binary output signals
TRIP and TRDIRIN are activated.
The function indicate forward/reverse direction to the fault. Reverse direction is
defined as is within the angle sector: RCADir + 180 ROADir
This variant shall have definite time delay.
Current protection
295
Directional functions
For all the directional functions there are directional start signals STFW: fault in
the forward direction, and STRV: start in the reverse direction. Even if the
directional function is set to operate for faults in the forward direction a fault in the
reverse direction will give the start signal STRV. Also if the directional function is
set to operate for faults in the reverse direction a fault in the forward direction will
give the start signal STFW.
Non-directional earth fault current protection
This function will measure the residual current without checking the phase angle.
The function will be used to detect cross-country faults. This function can serve as
alternative or back-up to distance protection with phase preference logic. To assure
selectivity the distance protection can block the non-directional earth fault current
function via the input BLKNDN.
If available the non-directional function is using the calculated residual current,
derived as sum of the phase currents. This will give a better ability to detect cross-
country faults with high residual current, also when dedicated core balance CT for
the sensitive earth fault protection will saturate.
This variant shall have the possibility of choice between definite time delay and
inverse time delay. The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I
0
shall be larger than the set levels (INNonDir>).
Trip from this function can be blocked from the binary input BLKNDN.
When the function is activated binary output signal STNDIN is activated. If the
activation is active after the set delay tINNonDir or after the inverse time delay the
binary output signals TRIP and TRNDIN are activated.
Residual overvoltage release and protection
The directional function shall be released when the residual voltage gets higher
than a set level.
There shall also be a separate trip, with its own definite time delay, from this set
voltage level.
For trip, the residual voltage 3U
0
shall be larger than the set levels (UN>).
Trip from this function can be blocked from the binary input BLKUN.
When the function is activated binary output signal STUN is activated. If the
activation is active after the set delay tUNNonDir TRIP and TRUN are activated. A
simplified logical diagram of the total function is shown in figure 160.
Current protection
296
en06000653.vsd
INNonDir>
UN>
OpMODE=3I0cosfi
IN>
INcosPhi>
OpMODE=3I03U0cosfi
INUNcosPhi>
Phi in RCA +- ROA
OpMODE=3I0 and fi
TimeChar = DefTime
DirMode = Reverse
Reverse
STNDIN
TRNDIN
STUN
TRUN
&
&
&
&
&
& 1
STARTDIRIN
STFW
STRV
TRDIRIN
&
t
t
&
SN
t
TimeChar = InvTime
1
DirMode = Forward
Forward
IEC06000653 V2 EN
Figure 160: Simplified logical diagram of the sensitive earth-fault current protection
SDEPSDE
I3P*
U3P*
BLOCK
BLKTR
BLKTRDIR
BLKNDN
BLKUN
TRIP
TRDIRIN
TRNDIN
TRUN
START
STDIRIN
STNDIN
STUN
STFW
STRV
STDIR
UNREL
IEC07000032 V2 EN
Figure 161: SDEPSDE function block
Current protection
297
Table 157: SDEPSDE Input signals
I3P GROUP
SIGNAL
- Group signal for current
U3P GROUP
SIGNAL
- Group signal for voltage
BLOCK BOOLEAN 0 Blocks all the outputs of the function
BLKTR BOOLEAN 0 Blocks the operate outputs of the function
BLKTRDIR BOOLEAN 0 Blocks the directional operate outputs of the
function
BLKNDN BOOLEAN 0 Blocks the Non directional current residual outputs
BLKUN BOOLEAN 0 Blocks the Non directional voltage residual outputs
Table 158: SDEPSDE Output signals
TRIP BOOLEAN General trip of the function
TRDIRIN BOOLEAN Trip of the directional residual over current function
TRNDIN BOOLEAN Trip of non directional residual over current
TRUN BOOLEAN Trip of non directional residual over voltage
START BOOLEAN General start of the function
STDIRIN BOOLEAN Start of the directional residual over current
function
STNDIN BOOLEAN Start of non directional residual over current
STUN BOOLEAN Start of non directional residual over voltage
STFW BOOLEAN Start of directional function for a fault in forward
direction
STRV BOOLEAN Start of directional function for a fault in reverse
direction
STDIR INTEGER Direction of fault. A general signal common to all
three mode of residual over current protection
UNREL BOOLEAN Residual voltage release of operation of all
directional modes
Current protection
298
Table 159: SDEPSDE Group settings (basic)
Operation Off
On
OpMode 3I0Cosfi
3I03U0Cosfi
3I0 and fi
- - 3I0Cosfi Selection of operation mode for protection
DirMode Forward
Reverse
- - Forward Direction of operation forward or reverse
RCADir -179 - 180 Deg 1 -90 Relay characteristic angle RCA, in deg
RCAComp -10.0 - 10.0 Deg 0.1 0.0 Relay characteristic angle compensation
ROADir 0 - 90 Deg 1 90 Relay open angle ROA used as release
in phase mode, in deg
INCosPhi> 0.25 - 200.00 %IB 0.01 1.00 Set level for 3I0cosFi, directional res
over current, in %Ib
SN> 0.25 - 200.00 %SB 0.01 10.00 Set level for 3I03U0cosFi, starting inv
time count, in %Sb
INDir> 0.25 - 200.00 %IB 0.01 5.00 Set level for directional residual over
current prot, in %Ib
tDef 0.000 - 60.000 s 0.001 0.100 Definite time delay directional residual
overcurrent, in sec
SRef 0.03 - 200.00 %SB 0.01 10.00 Reference value of res power for inverse
time count, in %Sb
kSN 0.00 - 2.00 - 0.01 0.10 Time multiplier setting for directional
residual power mode
OpINNonDir> Off
On
- - Off Operation of non-directional residual
overcurrent protection
INNonDir> 1.00 - 400.00 %IB 0.01 10.00 Set level for non directional residual over
current, in %Ib
tINNonDir 0.000 - 60.000 s 0.001 1.000 Time delay for non-directional residual
over current, in sec
TimeChar ANSI Ext. inv.
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
- - IEC Norm. inv. Operation curve selection for IDMT
operation
Current protection
299
tMin 0.000 - 60.000 s 0.001 0.040 Minimum operate time for IEC IDMT
curves, in sec
kIN 0.00 - 2.00 - 0.01 1.00 IDMT time mult for non-dir res over
current protection
OpUN> Off
On
- - Off Operation of non-directional residual
overvoltage protection
UN> 1.00 - 200.00 %UB 0.01 20.00 Set level for non-directional residual over
voltage, in %Ub
tUN 0.000 - 60.000 s 0.001 0.100 Time delay for non-directional residual
over voltage, in sec
INRel> 0.25 - 200.00 %IB 0.01 1.00 Residual release current for all
directional modes, in %Ib
UNRel> 0.01 - 200.00 %UB 0.01 3.00 Residual release voltage for all direction
modes, in %Ub
Table 160: SDEPSDE Group settings (advanced)
tReset 0.000 - 60.000 s 0.001 0.040 Time delay used for reset of definite
timers, in sec
tPCrv 0.005 - 3.000 - 0.001 1.000 Setting P for customer programmable
curve
tACrv 0.005 - 200.000 - 0.001 13.500 Setting A for customer programmable
curve
tBCrv 0.00 - 20.00 - 0.01 0.00 Setting B for customer programmable
curve
tCCrv 0.1 - 10.0 - 0.1 1.0 Setting C for customer programmable
curve
ResetTypeCrv Immediate
IEC Reset
ANSI reset
- - IEC Reset Reset mode when current drops off.
tPRCrv 0.005 - 3.000 - 0.001 0.500 Setting PR for customer programmable
curve
tTRCrv 0.005 - 100.000 - 0.001 13.500 Setting TR for customer programmable
curve
tCRCrv 0.1 - 10.0 - 0.1 1.0 Setting CR for customer programmable
curve
Table 161: SDEPSDE Non group settings (basic)
IBase 1 - 99999 A 1 100 Base Current, in A
UBase 0.05 - 2000.00 kV 0.05 63.50 Base Voltage, in kV Phase to Neutral
SBase 0.05 -
200000000.00
kVA 0.05 6350.00 Base Power, in kVA. IBase*Ubase
Current protection
300
Table 162: SDEPSDE Non group settings (advanced)
RotResU 0 deg
180 deg
- - 180 deg Setting for rotating polarizing quantity if
necessary
Table 163: SDEPSDE technical data
Operate level for 3I
0
cosj
directional residual overcurrent
(0.25-200.00)% of lBase

At low setting:
(2.5-10) mA
(10-50) mA
1.0% of I
r
at I I
r
1.0% of I at I > I
r

1.0 mA
0.5 mA
0
3U
0
cosj
directional residual power
(0.25-200.00)% of SBase

At low setting:
(0.25-5.00)% of SBase
1.0% of S
r
at S S
r
1.0% of S at S > S
r

10% of set value
0
and j
residual overcurrent
(0.25-200.00)% of lBase

At low setting:
(2.5-10) mA
(10-50) mA
1.0% of I
r
at I
r
1.0% of I at I > I
r

1.0 mA
0.5 mA
Operate level for non directional
overcurrent
(1.00-400.00)% of lBase

At low setting:
(10-50) mA
1.0% of I
r
at I I
r
1.0% of I at I > I
r

1.0 mA
Operate level for non directional
residual overvoltage
(1.00-200.00)% of UBase 0.5% of U
r
at UU
r
0.5% of U at U > U
r
Residual release current for all
directional modes
(0.25-200.00)% of lBase

At low setting:
(2.5-10) mA
(10-50) mA
1.0% of I
r
at I I
r
1.0% of I at I > I
r

1.0 mA
0.5 mA
Residual release voltage for all
directional modes
(0.01-200.00)% of UBase 0.5% of U
r
at UU
r
0.5% of U at U > U
r
Reset ratio > 95% -
Timers (0.000-60.000) s 0.5% 10 ms
table 619, table 620 and table
621
table 621
Relay characteristic angle RCA (-179 to 180) degrees 2.0 degrees
Relay open angle ROA (0-90) degrees 2.0 degrees
Operate time, non directional
residual over current
60 ms typically at 0 to 2 x I
set
-
Reset time, non directional
residual over current
set
-
set
-
set
-
Current protection
301
7.6 Thermal overload protection, one time constant
LPTTR
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Thermal overload protection, one time
constant
LPTTR
SYMBOL-A V1 EN
26
7.6.1 Introduction
The increasing utilizing of the power system closer to the thermal limits has
generated a need of a thermal overload protection also for power lines.
A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload protection can allow the protected circuit to
operate closer to the thermal limits.
The three-phase current measuring protection has an I
2
t characteristic with settable
time constant and a thermal memory.
An alarm level gives early warning to allow operators to take action well before the
line is tripped.
The sampled analog phase currents are pre-processed and for each phase current
the RMS value is derived. These phase current values are fed to the thermal
overload protection, one time constant function LPTTR.
From the largest of the three-phase currents a final temperature is calculated
according to the expression:
2
final ref
ref
I
T
I

Q =

where:
I is the largest phase current,
I
ref
is a given reference current and
T
ref
is steady state temperature corresponding to I
ref
Current protection
302
The ambient temperature is added to the calculated final temperature. If this
temperature is larger than the set operate temperature level, TripTemp, a START
output signal is activated.
The actual temperature at the actual execution cycle is calculated as:
( )
1 1
1
t
n n final n
e
t
D
-
- -

Q = Q + Q -Q -

where:
Q
n
is the calculated present temperature,
Q
n-1
is the calculated temperature at the previous time step,
Q
final
is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and
t is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by
adding the ambient temperature to the calculated temperature, as shown above. The
ambient temperature can be taken from a separate sensor or can be given a constant
value. The calculated component temperature is available as a real figure signal,
TEMP.
When the component temperature reaches the set alarm level AlarmTemp the
output signal ALARM is set. When the component temperature reaches the set trip
level TripTemp the output signal TRIP is set.
There is also a calculation of the present time to operate with the present current.
This calculation is only performed if the final temperature is calculated to be above
the operation temperature:
ln
final operate
operate
final n
t t
Q -Q
= -

Q -Q

The calculated time to trip is available as a real figure signal, TTRIP.
After a trip, caused by the thermal overload protection, there can be a lockout to
reconnect the tripped circuit. The output lockout signal LOCKOUT is activated
when the device temperature is above the set lockout release temperature setting
ReclTemp.
The time to lockout release is calculated that is, a calculation of the cooling time to
a set value. The thermal content of the function can be reset with input RESET.
Current protection
303
_
_
ln
final lockout release
lockout release
final n
t t
Q -Q
= -

Q -Q

Here the final temperature is equal to the set or measured ambient temperature. The
calculated time to reset of lockout is available as a real figure signal, TENRECL.
In some applications the measured current can involve a number of parallel lines.
This is often used for cable lines where one bay connects several parallel cables.
By setting the parameter IMult to the number of parallel lines (cables) the actual
current on one line is used in the protection algorithm. To activate this option the
input ENMULT must be activated.
The protection has a reset input: RESET. By activating this input the calculated
temperature is reset to its default initial value. This is useful during testing when
secondary injected current has given a calculated false temperature level.
Calculation
of final
temperature
IL1, IL2, IL3
Calculation
of actual
temperature
Final Temp
> TripTemp
actual temperature
START
Actual Temp >
AlarmTemp
Actual Temp
> TripTemp
ALARM
TRIP
Actual Temp
< Recl Temp
Calculation
of time to
trip
Calculation
of time to
reset of
lockout
TTRIP
TENRECL
Lock-
out
logic
LOCKOUT
IEC09000637 V1 EN
Figure 162: Functional overview of LPTTR
Current protection
304
LPTTR
I3P*
BLOCK
BLKTR
ENMULT
AMBTEMP
SENSFLT
RESET
TRIP
START
ALARM
LOCKOUT
IEC04000396 V3 EN
Figure 163: LPTTR function block
Table 164: LPTTR Input signals
I3P GROUP
SIGNAL
- Group connection
ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or
more lines
AMBTEMP REAL 0 Ambient temperature from external temperature
sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter
Table 165: LPTTR Output signals
TRIP BOOLEAN Trip
START BOOLEAN Start Signal
ALARM BOOLEAN Alarm signal
LOCKOUT BOOLEAN Lockout signal
Table 166: LPTTR Group settings (basic)
Operation Off
On
IBase 0 - 99999 A 1 3000 Base current in A
TRef 0 - 600 Deg 1 90 End temperature rise above ambient of
the line when loaded with IRef
Current protection
305
IRef 0 - 400 %IB 1 100 The load current (in %of IBase) leading
to TRef temperature
IMult 1 - 5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 0 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 200 Deg 1 80 Temperature level for start (alarm)
TripTemp 0 - 600 Deg 1 90 Temperature level for trip
ReclTemp 0 - 600 Deg 1 75 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.1 Operate pulse length. Minimum one
execution cycle
AmbiSens Off
On
- - Off External temperature sensor availiable
DefaultAmbTemp -50 - 250 Deg 1 20 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 600 Deg 1 50 Temperature raise above ambient
temperature at startup
Table 167: LPTTR technical data
Reference current (0-400)% of IBase 1.0% of I
r
Start temperature reference (0-400)C 1.0C
Operate time:
2 2
2 2
ln
p
b
I I
t
I I
t

-
=

-

I = actual measured current
I
p
= load current before overload
occurs
I
b
= base current, IBase
Time constant t = (01000)
minutes
IEC 60255-8, class 5 + 200 ms
Alarm temperature (0-200)C 2.0% of heat content trip
Trip temperature (0-400)C 2.0% of heat content trip
Reset level temperature (0-400)C 2.0% of heat content trip
7.7 Breaker failure protection CCRBRF
Current protection
306
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Breaker failure protection CCRBRF
3I>BF
SYMBOL-U V1 EN
50BF
7.7.1 Introduction
Breaker failure protection (CCRBRF) ensures fast back-up tripping of surrounding
breakers in case of own breaker failure to open. CCRBRF can be current based,
contact based, or adaptive combination between these two principles.
A current check with extremely short reset time is used as check criteria to achieve
a high security against unnecessary operation.
A contact check criteria can be used where the fault current through the breaker is
small.
CCRBRF can be single- or three-phase initiated to allow use with single phase
tripping applications. For the three-phase version of CCRBRF the current criteria
can be set to operate only if two out of four for example, two phases or one phase
plus the residual current start. This gives a higher security to the back-up trip
command.
CCRBRF function can be programmed to give a single- or three-phase re-trip of
the own breaker to avoid unnecessary tripping of surrounding breakers at an
incorrect initiation due to mistakes during testing.
Breaker failure protection CCRBRF is initiated from protection trip command,
either from protection functions within the IED or from external protection devices.
The start signal can be phase selective or general (for all three phases). Phase
selective start signals enable single pole re-trip function. This means that a second
attempt to open the breaker is done. The re-trip attempt can be made after a set
time delay. For transmission lines single pole trip and autoreclosing is often used.
The re-trip function can be phase selective if it is initiated from phase selective line
protection. The re-trip function can be done with or without current check. With
the current check the re-trip is only performed if the current through the circuit
breaker is larger than the operate current level.
The start signal can be an internal or external protection trip signal. This signal will
start the back-up trip timer. If the opening of the breaker is successful this is
detected by the function, by detection of either low current through RMS
evaluation and a special adapted current algorithm or by open contact indication.
The special algorithm enables a very fast detection of successful breaker opening,
Current protection
307
that is, fast resetting of the current measurement. If the current and/or contact
detection has not detected breaker opening before the back-up timer has run its
time a back-up trip is initiated.
Further the following possibilities are available:
The minimum length of the re-trip pulse, the back-up trip pulse and the back-
up trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-
up trip pulse 2 will however sustain as long as there is an indication of closed
breaker.
In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out
of 4 where it is sufficient to detect failure to open (high current) in one pole or
high residual current and 2 out of 4 where at least two current (phase current and/
or residual current) shall be high for breaker failure detection.
The current detection level for the residual current can be set different from the
setting of phase current detection.
It is possible to have different back-up time delays for single-phase faults and
for multi-phase faults.
The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
It is possible to have instantaneous back-up trip function if a signal is high if
the circuit breaker is insufficient to clear faults, for example at low gas pressure.
S
R
SR
Q
OR
AND
AND
30 ms
t
150 ms
START
STL1
OR
OR
BackupTrip L1
BFP Started L1
Time out L1
Reset L1
BLOCK
Retrip Time Out L1
IEC09000976 V1 EN
Figure 164: Simplified logic scheme of the CCRBRF starting logic
Current protection
308
AND
AND
AND
AND
AND
OR
OR
OR
a
b
a>b
AND
a
b
a>b
I>BlkCont
AND
Time out L1
BFP Started L1
Reset L1
CBCLDL1
IL1
Current High L1
Contact Closed L1
FunctionMode
OR
OR
Current
Contact
Current and Contact
1
IP>
CB Closed L1
IEC09000977 V1 EN
Figure 165: Simplified logic scheme of the CCRBRF, CB position evaluation
t
t1
tPulse
AND
AND
OR
OR
OR
TRRETL3
TRRETL2
BFP Started L1
Retrip Time Out L1
CB Closed L1
TRRET
TRRETL1
CBFLT
CB Pos Check
No CBPos Check
AND
OR
From other
phases
RetripMode
1
IEC09000978 V1 EN
Figure 166: Simplified logic scheme of the retrip logic function
Current protection
309
BFP Started L1
t
t2
AND
2 of 3
BFP Started L2
BFP Started L3
From other
phases
OR OR
AND
t
t2MPh
CBFLT
AND
AND
a
b
a>b
IN
IN>
1 out of 4
AND
OR
1 out of 3
Current High L2
Current High L3
From other
phases
AND
Current High L1
OR
Contact Closed L1
OR
Backup Trip L1
tPulse
Backup Trip L2
OR
From other
phases
Backup Trip L3
TRBU
OR
S
R
SR
Q
AND
t
t3
tPulse
TRBU2
OR
2 out of 4
BUTripMode
1
IEC09000979 V1 EN
Figure 167: Simplified logic scheme of the back-up trip logic function
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in
respective phase has magnitude larger than setting parameter IP>.
CCRBRF
I3P*
BLOCK
START
STL1
STL2
STL3
CBCLDL1
CBCLDL2
CBCLDL3
CBFLT
TRBU
TRBU2
TRRET
TRRETL1
TRRETL2
TRRETL3
CBALARM
IEC06000188 V2 EN
Figure 168: CCRBRF function block
Current protection
310
Table 168: CCRBRF Input signals
I3P GROUP
SIGNAL
START BOOLEAN 0 Three phase start of breaker failure protection
function
STL1 BOOLEAN 0 Start signal of phase L1
CBCLDL1 BOOLEAN 1 Circuit breaker closed in phase L1
CBFLT BOOLEAN 0 CB faulty, unable to trip. Back-up trip
instantanously.
Table 169: CCRBRF Output signals
TRBU BOOLEAN Back-up trip by breaker failure protection function
TRBU2 BOOLEAN Second back-up trip by breaker failure protection
function
TRRET BOOLEAN Retrip by breaker failure protection function
TRRETL1 BOOLEAN Retrip by breaker failure protection function
phase L1
phase L2
phase L3
CBALARM BOOLEAN Alarm for faulty circuit breaker
Table 170: CCRBRF Group settings (basic)
Operation Off
On
FunctionMode Current
Contact
Current&Contact
- - Current Detection principle for back-up trip
Current protection
311
BuTripMode 2 out of 4
1 out of 3
1 out of 4
- - 1 out of 3 Back-up trip mode
RetripMode Retrip Off
CB Pos Check
No CBPos Check
- - Retrip Off Operation mode of re-trip logic
IP> 5 - 200 %IB 1 10 Operate phase current level in % of IBase
IN> 2 - 200 %IB 1 10 Operate residual current level in % of
IBase
t1 0.000 - 60.000 s 0.001 0.000 Time delay of re-trip
t2 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip
t2MPh 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip at multi-phase
start
tPulse 0.000 - 60.000 s 0.001 0.200 Trip pulse duration
Table 171: CCRBRF Group settings (advanced)
I>BlkCont 5 - 200 %IB 1 20 Current for blocking of CB contact
operation in % of IBase
t3 0.000 - 60.000 s 0.001 0.030 Additional time delay to t2 for a second
back-up trip
tCBAlarm 0.000 - 60.000 s 0.001 5.000 Time delay for CB faulty signal
Table 172: CCRBRF technical data
Operate phase
current
(5-200)% of lBase 1.0% of I
r
at I I
r
1.0% of I at I > I
r
Reset ratio, phase
current
> 95% -
Operate residual
current
(2-200)% of lBase 1.0% of I
r
at I I
r
1.0% of I at I > I
r
Reset ratio, residual
current
> 95% -
Phase current level
for blocking of
contact function
(5-200)% of lBase 1.0% of I
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
Timers (0.000-60.000) s 0.5% 10 ms
Operate time for
current detection
10 ms typically -
Reset time for
current detection
15 ms maximum -
Current protection
312
7.8 Stub protection STBPTOC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Stub protection STBPTOC
3I>STUB
SYMBOL-T V1 EN
50STB
7.8.1 Introduction
When a power line is taken out of service for maintenance and the line
disconnector is opened in multi-breaker arrangements the voltage transformers will
mostly be outside on the disconnected part. The primary line distance protection
will thus not be able to operate and must be blocked.
The stub protection STBPTOC covers the zone between the current transformers
and the open disconnector. The three-phase instantaneous overcurrent function is
released from a normally open, NO (b) auxiliary contact on the line disconnector.
The sampled analog phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current
the RMS value of each phase current is derived. These phase current values are fed
to a comparator in the stub protection function STBPTOC. In a comparator the
RMS values are compared to the set operating current value of the function I>.
If a phase current is larger than the set operating current the signal from the
comparator for this phase is activated. This signal will, in combination with the
release signal from line disconnection (RELEASE input), activate the timer for the
TRIP signal. If the fault current remains during the timer delay t, the TRIP output
signal is activated. The function can be blocked by activation of the BLOCK input.
Current protection
313
BLOCK
TRIP
STUB PROTECTION FUNCTION
STIL1
STIL2
STIL3
OR
AND
RELEASE
en05000731.vsd
IEC05000731 V1 EN
Figure 169: Simplified logic diagram for Stub protection
STBPTOC
I3P*
BLOCK
BLKTR
RELEASE
TRIP
START
IEC05000678 V2 EN
Figure 170: STBPTOC function block
Table 173: STBPTOC Input signals
I3P GROUP
SIGNAL
RELEASE BOOLEAN 0 Release of stub protection
Table 174: STBPTOC Output signals
TRIP BOOLEAN Trip
START BOOLEAN General start
Current protection
314
Table 175: STBPTOC Group settings (basic)
Operation Off
On
ReleaseMode Release
Continuous
- - Release Release of stub protection
I> 1 - 2500 %IB 1 200 Operate current level in % of IBase
Table 176: STBPTOC Group settings (advanced)
t 0.000 - 60.000 s 0.001 0.000 Time delay
Table 177: STBPTOC technical data
Operating current (1-2500)% of IBase 1.0% of I
r
at I I
r
1.0% of I at I > I
r
Reset ratio > 95% -
Definite time (0.000-60.000) s 0.5% 10 ms
Operating time, start
function
set
-
Resetting time,
startfunction
set
-
set
-
7.9 Pole discordance protection CCRPLD
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Pole discordance protection CCRPLD
PD
SYMBOL-S V1 EN
52PD
Current protection
315
7.9.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures
end up with the different poles in different positions (close-open). This can cause
negative and zero sequence currents which gives thermal stress on rotating
machines and can cause unwanted operation of zero sequence or negative sequence
current functions.
Normally the own breaker is tripped to correct such a situation. If the situation
persists the surrounding breaker should be tripped to clear the unsymmetrical load
situation.
The Polediscordance protection function CCRPLD operates based on information
from auxiliary contacts of the circuit breaker for the three phases with additional
criteria from unsymmetrical phase current when required.
The detection of pole discordance can be made in two different ways. If the contact
based function is used an external logic can be made by connecting the auxiliary
contacts of the circuit breaker so that a pole discordance is indicated, see figure 171.
Pole discordance signal from circuit breaker
+
circuit breaker
en05000287.vsd
IEC05000287 V2 EN
Figure 171: Pole discordance external detection logic
This binary signal is connected to a binary input of the IED. The appearance of this
signal will start a timer that will give a trip signal after the set time delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase
contact open and phase contact closed) to binary inputs of the IED, see figure 172.
Current protection
316
poleTwoOpened from C.B.
+
C.B.
poleOneOpened from C.B.
poleThreeClosed from C.B.
poleTwoClosed from C.B.
poleOneClosed from C.B.
poleThreeOpened from C.B.
en05000288.vsd
IEC05000288 V1 EN
Figure 172: Pole discordance signals for internal logic
In this case the logic is realized within the function. If the inputs are indicating pole
discordance the trip timer is started. This timer will give a trip signal after the set
delay.
Pole discordance can also be detected by means of phase selective current
measurement. The sampled analog phase currents are pre-processed in a discrete
Fourier filter (DFT) block. From the fundamental frequency components of each
phase current the RMS value of each phase current is derived. The smallest and the
largest phase current are derived. If the smallest phase current is lower than the
setting CurrUnsymLevel times the largest phase current the settable trip timer
(tTrip) is started. The tTrip timer gives a trip signal after the set delay. The TRIP
signal is a pulse 150 ms long. The current based pole discordance function can be
set to be active either continuously or only directly in connection to breaker open
or close command.
The function also has a binary input that can be configured from the autoreclosing
function, so that the pole discordance function can be blocked during sequences
with a single pole open if single pole autoreclosing is used.
The simplified block diagram of the current and contact based Pole discordance
protection function CCRPLD is shown in figure 173.
Current protection
317
en05000747.vsd
OR
BLOCK
BLKDBYAR
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
Discordance
detection
PolPosAuxCont
AND
PD Signal from CB
AND
EXTPDIND
Unsymmetry current
detection
OR
CLOSECMD
OPENCMD
t+200 ms
AND
OR
AND
TRIP
t
t 150 ms
IEC05000747 V1 EN
Figure 173: Simplified block diagram of pole discordance function CCRPLD -
contact and current based
CCRPLDis blocked if:
The IED is in TEST mode and CCRPLD has been blocked from the local HMI
The input signal BLOCK is high
The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance
protection. It can be connected to a binary input in the IED in order to receive a
block command from external devices or can be software connected to other
internal functions in the IED itself in order to receive a block command from
internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single
phase autoreclosing cycle is in progress. It can be connected to the output signal
1PT1 on SMBRRECfunction block. If the autoreclosing function is an external
device, then BLKDBYAR has to be connected to a binary input in the IED and this
binary input is connected to a signalization 1phase autoreclosing in progress
from the external autoreclosing device.
If the pole discordance protection is enabled, then two different criteria can
generate a trip signal TRIP:
Pole discordance signaling from the circuit breaker.
Unsymmetrical current detection.
Current protection
318
7.9.2.1 Pole discordance signaling from circuit breaker
If one or two poles of the circuit breaker have failed to open or to close the pole
discordance status, then the function input EXTPDIND is activated from the pole
discordance signal derived from the circuit breaker auxiliary contacts (one NO
contact for each phase connected in parallel, and in series with one NC contact for
each phase connected in parallel) and, after a settable time interval tTrip (0-60 s), a
150 ms trip pulse command TRIP is generated by the Polediscordance function.
7.9.2.2 Unsymmetrical current detection
Unsymmetrical current indicated if:
any phase current is lower than CurrUnsymLevel of the highest current in the
three phases.
the highest phase current is greater than CurrRelLevel of IBase.
If these conditions are true, an unsymmetrical condition is detected and the internal
signal INPS is turned high. This detection is enabled to generate a trip after a set
time delay tTrip if the detection occurs in the next 200 ms after the circuit breaker
has received a command to open trip or close and if the unbalance persists. The 200
ms limitation is for avoiding unwanted operation during unsymmetrical load
conditions.
The pole discordance protection is informed that a trip or close command has been
given to the circuit breaker through the inputs CLOSECMD (for closing command
information) and OPENCMD (for opening command information). These inputs
can be connected to terminal binary inputs if the information are generated from
the field (that is from auxiliary contacts of the close and open push buttons) or may
be software connected to the outputs of other integrated functions (that is close
command from a control function or a general trip from integrated protections).
CCRPLD
I3P*
BLOCK
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
TRIP
START
IEC06000275 V2 EN
Figure 174: CCRPLD function block
Current protection
319
Table 178: CCRPLD Input signals
I3P GROUP
SIGNAL
BLKDBYAR BOOLEAN 0 Block of function at CB single phase auto re-
closing cycle
CLOSECMD BOOLEAN 0 Close order to CB
OPENCMD BOOLEAN 0 Open order to CB
EXTPDIND BOOLEAN 0 Pole discordance signal from CB logic
POLE1OPN BOOLEAN 1 Pole one opened indication from CB
POLE1CL BOOLEAN 0 Pole one closed indication from CB
POLE2OPN BOOLEAN 1 Pole two opened indication from CB
POLE2CL BOOLEAN 0 Pole two closed indication from CB
POLE3OPN BOOLEAN 1 Pole three opened indication from CB
POLE3CL BOOLEAN 0 Pole three closed indication from CB
Table 179: CCRPLD Output signals
TRIP BOOLEAN Trip signal to CB
START BOOLEAN Trip condition TRUE, waiting for time delay
Table 180: CCRPLD Group settings (basic)
Operation Off
On
IBase 1 - 99999 - 1 3000 Base current
tTrip 0.000 - 60.000 s 0.001 0.300 Time delay between trip condition and
trip signal
ContSel Off
PD signal from CB
Pole pos aux cont.
- - Off Contact function selection
CurrSel Off
CB oper monitor
Continuous monitor
- - Off Current function selection
CurrUnsymLevel 0 - 100 % 1 80 Unsym magn of lowest phase current
compared to the highest.
CurrRelLevel 0 - 100 %IB 1 10 Current magnitude for release of the
function in % of IBase
Current protection
320
Table 181: CCRPLD technical data
Operate current (0100)% of IBase 1.0% of I
r
Time delay (0.000-60.000) s 0.5% 10 ms
7.10 Directional underpower protection GUPPDUP
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Directional underpower protection GUPPDUP
P <
SYMBOL-LL V1 EN
37
7.10.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available
as a torque on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that
it does not cover bearing losses and ventilation losses. Then, the synchronous
generator becomes a synchronous motor and starts to take electric power from the
rest of the power system. This operating state, where individual synchronous
machines operate as motors, implies no risk for the machine itself. If the generator
under consideration is very large and if it consumes lots of electric power, it may
be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous
state. The task of the reverse power protection is to protect the turbine and not to
protect the generator itself.
Figure 175 illustrates the reverse power protection with underpower IED and with
overpower IED. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation
immediately after synchronization may be higher. One should set the underpower
IED to trip if the active power from the generator is less than about 2%. One
should set the overpower IED to trip if the power flow from the network to the
generator is higher than 1% depending on the type of turbine.
Current protection
321
Underpower IED Overpower IED
Q Q
P P
Operating point
without
turbine torque
Margin Margin
Operate
Line
Operate
Line
Operating point
without
turbine torque
IEC06000315 V2 EN
Figure 175: Protection with underpower IED and overpower IED
A simplified scheme showing the principle of the power protection function is
shown in figure 176. The function has two stages with individual settings.
Chosen current
phasors
Chosen voltage
phasors
Complex
power
calculation
P
Derivation of
S(composant)
in Char angle
S(angle)
S(angle) <
Power1
t TRIP1
START1
Q
P = POWRE
Q = POWIM
S(angle) <
Power2
t TRIP2
START2
IEC09000018 V2 EN
Figure 176: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing
blocks. The apparent complex power is calculated according to chosen formula as
shown in table 182.
Current protection
322
Table 182: Complex power calculation
Set value: Mode Formula used for complex power calculation
L1, L2, L3
* * *
1 1 2 2 3 3 L L L L L L
S U I U I U I = + +
Arone
* *
1 2 1 2 3 3 L L L L L L
S U I U I = -
PosSeq
*
3
PosSeq PosSeq
S U I =
L1L2
* *
1 2 1 2
( )
L L L L
S U I I = -
L2L3
* *
2 3 2 3
( )
L L L L
S U I I = -
L3L1
* *
3 1 3 1
( )
L L L L
S U I I = -
L1
*
1 1
3
L L
S U I =
L2
*
2 2
3
L L
S U I =
L3
*
3 3
3
L L
S U I =
The active and reactive power is available from the function and can be used for
monitoring and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is
calculated. If this angle is 0 the active power component P is calculated. If this
angle is 90 the reactive power component Q is calculated.
The calculated power component is compared to the power pick up setting
Power1(2). For directional underpower protection, a start signal START1(2) is
activated if the calculated power component is smaller than the pick up value. For
directional overpower protection, a start signal START1(2) is activated if the
calculated power component is larger than the pick up value. After a set time delay
TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At
activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The
absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-
power1(2)). For generator low forward power protection the power setting is very
Current protection
323
low, normally down to 0.02 p.u. of rated generator power. The hysteresis should
therefore be set to a smaller value. The drop-power value of stage1 can be
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) +
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-
power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5
Power1(2)) is corrected to the minimal value.
If the measured power drops under the drop-power1(2) value, the function will
reset after a set time DropDelay1(2). The reset means that the start signal will drop
out and that the timer of the stage will reset.
7.10.2.1 Low pass filtering
In order to minimize the influence of the noise signal on the measurement it is
possible to introduce the recursive, low pass filtering of the measured values for S
(P, Q). This will make slower measurement response to the step changes in the
measured quantity. Filtering is performed in accordance with the following
recursive formula:
( )
Old Calculated
S k S 1 k S = + -
Where
S is a new measured value to be used for the protection function
S
old
is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is
immediately given out without any filtering (that is without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. A typical value for
k=0.92 in case of slow operating functions.
7.10.2.2 Calibration of analog inputs
Measured currents and voltages used in the Power function can be calibrated to get
class 0.5 measuring accuracy. This is achieved by amplitude and angle
compensation at 5, 30 and 100% of rated current and voltage. The compensation
below 5% and above 100% is constant and linear in between, see example in figure
177.
Current protection
324
IEC05000652 V2 EN
Figure 177: Calibration curves
The first current and voltage phase in the group signals will be used as reference
and the amplitude and angle compensation will be used for related input signals.
Analog outputs (Monitored data) from the function can be used for service values
or in the disturbance report. The active power is provided as MW value: P, or in
percent of base power: PPERCENT. The reactive power is provided as Mvar value:
Q, or in percent of base power: QPERCENT.
GUPPDUP
I3P*
U3P*
BLOCK
BLOCK1
BLOCK2
TRIP
TRIP1
TRIP2
START
START1
START2
P
PPERCENT
Q
QPERCENT
IEC07000027 V2 EN
Figure 178: GUPPDUP function block
Current protection
325
Table 183: GUPPDUP Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLOCK1 BOOLEAN 0 Block of stage 1
Table 184: GUPPDUP Output signals
TRIP1 BOOLEAN Trip of stage 1
START BOOLEAN Common start
START1 BOOLEAN Start of stage 1
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBASE
Q REAL Reactive power in Mvar
QPERCENT REAL Reactive power in % of SBASE
Table 185: GUPPDUP Group settings (basic)
Operation Off
On
OpMode1 Off
UnderPower
- - UnderPower Operation mode 1
Power1 0.0 - 500.0 %SB 0.1 1.0 Power setting for stage 1 in % of Sbase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Angle for stage 1
TripDelay1 0.010 - 6000.000 s 0.001 1.000 Trip delay for stage 1
DropDelay1 0.010 - 6000.000 s 0.001 0.060 Drop delay for stage 1
OpMode2 Off
UnderPower
- - UnderPower Operation mode 2
Current protection
326
Table 186: GUPPDUP Group settings (advanced)
k 0.00 - 0.99 - 0.01 0.00 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 1
Hysteresis2 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 2
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate current at
5% of Ir
30% of Ir
100% of Ir
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate voltage at
5% of Ur
30% of Ur
100% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 5% of Ir
Table 187: GUPPDUP Non group settings (basic)
IBase 1 - 99999 A 1 3000 Current-Reference (primary current A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Voltage-Reference (primary voltage kV)
Mode L1, L2, L3
Arone
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
- - Pos Seq Selection of measured current and
voltage
Table 188: GUPPDUP technical data
Power level (0.0500.0)% of SBase

At low setting:
(0.5-2.0)% of SBase
(2.0-10)% of SBase
1.0% of S
r
at S < S
r
1.0% of S at S > S
r

< 50% of set value
< 20% of set value
Characteristic angle (-180.0180.0) degrees 2 degrees
Timers (0.00-6000.00) s 0.5% 10 ms
Current protection
327
7.11 Directional overpower protection GOPPDOP
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Directional overpower protection GOPPDOP
P >
DOCUMENT172362-IMG158942
V1 EN
32
7.11.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available
as a torque on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that
it does not cover bearing losses and ventilation losses. Then, the synchronous
generator becomes a synchronous motor and starts to take electric power from the
rest of the power system. This operating state, where individual synchronous
machines operate as motors, implies no risk for the machine itself. If the generator
under consideration is very large and if it consumes lots of electric power, it may
be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous
state. The task of the reverse power protection is to protect the turbine and not to
protect the generator itself.
Figure 179 illustrates the reverse power protection with underpower IED and with
overpower IED. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation
immediately after synchronization may be higher. One should set the underpower
IED to trip if the active power from the generator is less than about 2%. One
should set the overpower IED to trip if the power flow from the network to the
generator is higher than 1%.
Current protection
328
Underpower IED Overpower IED
Q Q
P P
Operating point
without
turbine torque
Margin Margin
Operate
Line
Operate
Line
Operating point
without
turbine torque
IEC06000315 V2 EN
Figure 179: Reverse power protection with underpower IED and overpower IED
A simplified scheme showing the principle of the power protection function is
shown in figure 180. The function has two stages with individual settings.
Chosen current
phasors
Chosen voltage
phasors
Complex
power
calculation
P
Derivation of
S(composant)
in Char angle
S(angle)
S(angle) >
Power1
t TRIP1
START1
Q
P = POWRE
Q = POWIM
S(angle) >
Power2
t TRIP2
START2
IEC06000567 V2 EN
Figure 180: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing
blocks. The apparent complex power is calculated according to chosen formula as
shown in table 189.
Current protection
329
Table 189: Complex power calculation
Set value: Mode Formula used for complex power calculation
L1, L2, L3
* * *
1 1 2 2 3 3 L L L L L L
S U I U I U I = + +
Arone
* *
1 2 1 2 3 3 L L L L L L
S U I U I = -
PosSeq
*
3
PosSeq PosSeq
S U I =
L1L2
* *
1 2 1 2
( )
L L L L
S U I I = -
L2L3
* *
2 3 2 3
( )
L L L L
S U I I = -
L3L1
* *
3 1 3 1
( )
L L L L
S U I I = -
L1
*
1 1
3
L L
S U I =
L2
*
2 2
3
L L
S U I =
L3
*
3 3
3
L L
S U I =
The active and reactive power is available from the function and can be used for
monitoring and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is
calculated. If this angle is 0 the active power component P is calculated. If this
angle is 90 the reactive power component Q is calculated.
The calculated power component is compared to the power pick up setting
Power1(2). A start signal START1(2) is activated if the calculated power
component is larger than the pick up value. After a set time delay TripDelay1(2) a
trip TRIP1(2) signal is activated if the start signal is still active. At activation of
any of the two stages a common signal START will be activated. At trip from any
of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The
absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) drop-
power1(2)). For generator reverse power protection the power setting is very low,
normally down to 0.02 p.u. of rated generator power. The hysteresis should
therefore be set to a smaller value. The drop-power value of stage1 can be
Current protection
330
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2)
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-
power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5
Power1(2)) is corrected to the minimal value.
If the measured power drops under the drop-power1(2) value the function will reset
after a set time DropDelay1(2). The reset means that the start signal will drop out
ant that the timer of the stage will reset.
7.11.2.1 Low pass filtering
possible to introduce the recursive, low pass filtering of the measured values for S
(P, Q). This will make slower measurement response to the step changes in the
measured quantity. Filtering is performed in accordance with the following
recursive formula:
( )
Old Calculated
S k S 1 k S = + -
Where
S is a new measured value to be used for the protection function
S
old
is the measured value given from the function in previous execution cycle
S
Calculated
is the new calculated value in the present execution cycle
immediately given out without any filtering (that is, without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. A typical value for k =
0.14.
7.11.2.2 Calibration of analog inputs
Measured currents and voltages used in the Power function can be calibrated to get
class 0.5 measuring accuracy. This is achieved by amplitude and angle
below 5% and above 100% is constant and linear in between, see example in figure
181.
Current protection
331
IEC05000652 V2 EN
Analog outputs from the function can be used for service values or in the
disturbance report. The active power is provided as MW value: P, or in percent of
base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in
percent of base power: QPERCENT.
GOPPDOP
I3P*
U3P*
BLOCK
BLOCK1
BLOCK2
TRIP
TRIP1
TRIP2
START
START1
START2
P
PPERCENT
Q
QPERCENT
IEC07000028 V2 EN
Figure 182: GOPPDOP function block
Current protection
332
Table 190: GOPPDOP Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
Table 191: GOPPDOP Output signals
START BOOLEAN Common start
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBASE
Q REAL Reactive power in Mvar
QPERCENT REAL Reactive power in % of SBASE
Table 192: GOPPDOP Group settings (basic)
Operation Off
On
OpMode1 Off
OverPower
- - OverPower Operation mode 1
OpMode2 Off
OverPower
- - OverPower Operation mode 2
Current protection
333
Table 193: GOPPDOP Group settings (advanced)
measurement, P and Q
Hysteresis1 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 1 in % of
Sbase
Hysteresis2 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 2 in % of
Sbase
5% of Ir
30% of Ir
100% of Ir
5% of Ur
30% of Ur
100% of Ur
Table 194: GOPPDOP Non group settings (basic)
IBase 1 - 99999 A 1 3000 Current-Reference (primary current A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Voltage-Reference (primary voltage kV)
Mode L1, L2, L3
Arone
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
- - Pos Seq Selection of measured current and
voltage
Current protection
334
Table 195: GOPPDOP technical data
Power level (0.0500.0)% of S
base

At low setting:
(0.5-2.0)% of S
base
(2.0-10)% of S
base
1.0% of S
r
at S < S
r
1.0% of S at S > S
r

< 50% of set value
< 20% of set value
Characteristic angle (-180.0180.0) degrees 2 degrees
Timers (0.00-6000.00) s 0.5% 10 ms
7.12 Broken conductor check BRCPTOC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Broken conductor check BRCPTOC - 46
7.12.1 Introduction
Conventional protection functions can not detect the broken conductor condition.
Broken conductor check (BRCPTOC) function, consisting of continuous current
unsymmetrical check on the line where the IED is connected will give alarm or trip
at detecting broken conductors.
Broken conductor check (BRCPTOC) detects a broken conductor condition by
detecting the asymmetry between currents in the three phases. The current-
measuring elements continuously measure the three-phase currents.
The current asymmetry signal output START is set on if:
The difference in currents between the phase with the lowest current and the
phase with the highest current is greater than set percentage Iub> of the
highest phase current
The highest phase current is greater than the minimum setting value IP>.
The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel
lines. If a conductor breaks in one phase on one line, the parallel line will
experience an increase in current in the same phase. This might result in the first
two conditions being satisfied. If the unsymmetrical detection lasts for a period
longer than the set time tOper the TRIP output is activated.
Current protection
335
The simplified logic diagram of the broken conductor check function is shown in
figure 183
BRCPTOC is disabled (blocked) if:
The IED is in TEST status and the function has been blocked from the local
HMI test menu (BlockBRC=Yes).
The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive
a block command from external devices, or can be software connected to other
internal functions of the IED itself to receive a block command from internal
functions.
The output trip signal TRIP is a three-phase trip. It can be used to command a trip
to the circuit breaker or for alarm purpose only.
BLOCK
Function Enable
TEST-ACTIVE
&
TEST
Block BRCPTOC=Yes
1
STI
&
Unsymmetrical
Current Detection
t
t
START
IL1<50%IP>
IL2<50%IP>
IL3<50%IP>
=
1 =
TRIP
IEC09000158 V1 EN
Figure 183: Simplified logic diagram for Broken conductor check BRCPTOC
BRCPTOC
I3P*
BLOCK
BLKTR
TRIP
START
IEC07000034 V2 EN
Figure 184: BRCPTOC function block
Current protection
336
Table 196: BRCPTOC Input signals
I3P GROUP
SIGNAL
BLKTR BOOLEAN 0 Blocks the operate output
Table 197: BRCPTOC Output signals
TRIP BOOLEAN Operate signal of the protection logic
START BOOLEAN Start signal of the protection logic
Table 198: BRCPTOC Group settings (basic)
Operation Off
On
IBase 0 - 99999 A 1 3000 IBase
Iub> 50 - 90 %IM 1 50 Unbalance current operation value in
percent of max current
IP> 5 - 100 %IB 1 20 Minimum phase current for operation of
Iub> in % of Ibase
tOper 0.000 - 60.000 s 0.001 5.000 Operate time delay
Table 199: BRCPTOC Group settings (advanced)
tReset 0.010 - 60.000 s 0.001 0.100 Time delay in reset
Table 200: BRCPTOC technical data
Minimum phase current for
operation
(5100)% of IBase 0.1% of I
r
Unbalance current operation (0100)% of maximum current 0.1% of I
r
Timer (0.00-6000.00) s 0.5% 10 ms
Current protection
337
338
Section 8 Voltage protection
About this chapter
This chapter describes voltage related protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and
technical data are included for each function.
8.1 Two step undervoltage protection UV2PTUV
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Two step undervoltage protection UV2PTUV
3U<
SYMBOL-R V1 EN
27
8.1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions.
Two step undervoltage protection (UV2PTUV) function can be used to open circuit
breakers to prepare for system restoration at power outages or as long-time delayed
back-up to primary protection.
UV2PTUV has two voltage steps, each with inverse or definite time delay.
Two-step undervoltage protection (UV2PTUV) is used to detect low power system
voltage. UV2PTUV has two voltage measuring steps with separate time delays. If
one, two or three phase voltages decrease below the set value, a corresponding
START signal is generated. UV2PTUV can be set to START/TRIP based on 1 out
of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being below the set point. If
the voltage remains below the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued. To avoid an unwanted
trip due to disconnection of the related high voltage equipment, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than
the set blocking level the function is blocked and no START or TRIP signal is
generated. The time delay characteristic is individually chosen for each step and
can be either definite time delay or inverse time delay.
Voltage protection
339
UV2PTUV can be set to measure phase-to-earth fundamental value, phase-to-phase
fundamental value, phase-to-earth true RMS value or phase-to-phase true RMS
value. The choice of the measuring is done by the parameter ConnType. The
voltage related settings are made in percent of base voltage which is set in kV phase-
to-phase voltage. This means operation for phase-to-earth voltage under:
(%) ( )
3
U UBase kV <
and operation for phase-to-phase voltage under:
U (%) UBase(kV) <
8.1.2.1 Measurement principle
Depending on the set ConnType value, UV2PTUV measures phase-to-earth or phase-
to-phase voltages and compare against set values, U1< and U2<. The parameters
OpMode1 and OpMode2 influence the requirements to activate the START
outputs. Either 1 out of 3, 2 out of 3, or 3 out of 3 measured voltages have to be
lower than the corresponding set point to issue the corresponding START signal.
To avoid oscillations of the output START signal, a hysteresis has been included.
8.1.2.2 Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse
time delay (IDMT). For the inverse time delay three different modes are available:
inverse curve A
inverse curve B
customer programmable inverse curve
The type A curve is described as:
k
t
U U
U
=
< -

<

The type B curve is described as:
Voltage protection
340
2.0
480
0.055
32 0.5
k
t
U U
U
= +
< -
-

<

The customer programmable curve can be created as:
p
k A
t D
U U
B C
U

= +

< -
-

<

When the denominator in the expression is equal to zero the time delay will be
infinity. There will be an undesired discontinuity. Therefore a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U<
down to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/
100). If the programmable curve is used this parameter must be calculated so that:
0
100
CrvSatn
B C - >
The lowest voltage is always used for the inverse time delay integration. The
details of the different inverse time characteristics are shown in section 22.3
"Inverse characteristics".
Trip signal issuing requires that the undervoltage condition continues for at least
the user set time delay. This time delay is set by the parameter t1 and t2 for definite
time mode (DT) and by some special voltage level dependent time curves for the
inverse time mode (IDMT). If the start condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2pickup for the inverse time) the corresponding start output is reset. Here it
should be noted that after leaving the hysteresis area, the start condition must be
fulfilled again and it is not sufficient for the signal to only return back to the
hysteresis area. Note that for the undervoltage function the IDMT reset time is
constant and does not depend on the voltage fluctuations during the drop-off
period. However, there are three ways to reset the timer, either the timer is reset
instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 185 and figure 186.
Voltage protection
341
Voltage
Time
Hysteresis
START
TRIP
U1<
START
TRIP
t1
tReset1
Time
Time
Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured
Voltage
tReset1
IEC05000010 V3 EN
Figure 185: Voltage profile not causing a reset of the start signal for step 1, and inverse time delay
Voltage protection
342
Voltage
Time
Hysteresis
START
TRIP
START
U1<
START
TRIP
t1
tReset1
Time
Time Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured Voltage
tReset1
IEC05000011-en-2.vsd
IEC05000011 V2 EN
Figure 186: Voltage profile causing a reset of the start signal for step 1, and inverse time delay
Definite timer delay
When definite time delay is selected the function will operate as shown in figure
187. Detailed information about individual stage reset/operation behavior is shown
in figure 188 and figure 189 receptively. Note that by setting tResetn = 0.0s
instantaneous reset of the definite time delayed stage is ensured.
Voltage protection
343
b>a
a
b
U1<
U
t
tReset1
t
t1
AND
TR1
ST1
OFF
Delay
ON
Delay
IEC09000785 V1 EN
Figure 187: Detailed logic diagram for step 1, DT operation
Un<
START
TRIP
tResetn
tn

IEC10000039 V1 EN
Figure 188: Example for Definite Time Delay stage rest
Voltage protection
344
Un<
START
TRIP
tResetn
tn

IEC10000040 V1 EN
Figure 189: Example for Definite Time Delay stage operation
8.1.2.3 Blocking
It is possible to block Two step undervoltage protection UV2PTUV partially or
completely, by binary input signals or by parameter settings, where:
BLOCK: blocks all outputs
BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the
trip output of step 1, or both the trip and the START outputs of step 1, are blocked.
The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal
blocking can also be set to Off resulting in no voltage based blocking.
Corresponding settings and functionality are valid also for step 2.
In case of disconnection of the high voltage component the measured voltage will
get very low. The event will START both the under voltage function and the
blocking function, as seen in figure 190. The delay of the blocking function must
be set less than the time delay of under voltage function.
Voltage protection
345
Time
U
Normal voltage
U1<
U2<
IntBlkStVal1
IntBlkStVal2
Disconnection
tBlkUV1 <
t1,t1Min
tBlkUV2 <
t2,t2Min
Block step 1
Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 190: Blocking function
8.1.2.4 Design
The voltage measuring elements continuously measure the three phase-to-neutral
voltages or the three phase-to-phase voltages. Recursive fourier filters, true RMS
filters or input voltage signals are used. The voltages are individually compared to
the set value, and the lowest voltage is used for the inverse time characteristic
integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 and 3
out of 3 criteria to fulfill the START condition. The design of Two step
undervoltage protection UV2PTUV is schematically shown in figure 191.
Voltage protection
346
en05000012.vsd
START
ST1L1
ST1L2
ST1L3
TR1L1
TR1L2
TR1L3
ST1
TR1
START
ST2L1
ST2L2
ST2L3
TR2L1
TR2L2
TR2L3
ST2
TR2
TRIP
Comparator
UL1 < U1<
Comparator
UL2 < U1<
Comparator
UL3 < U1<
MinVoltSelect
or
Comparator
UL1 < U2<
Comparator
UL2 < U2<
Comparator
UL3 < U2<
MinVoltSelect
or
Start
&
Trip
Output
Logic
Step 1
Start
&
Trip
Output
Logic
Step 2
Phase 3
Phase 2
Phase 1
Phase 3
Phase 2
Phase 1
Time integrator
t2
tReset2
ResetTypeCrv2
Voltage Phase
Selector
OpMode2
1 out of 3
2 outof 3
3 out of 3
Time integrator
t1
tReset1
ResetTypeCrv1
Voltage Phase
Selector
OpMode1
1 out of 3
2 out of 3
3 out of 3
UL1
UL2
UL3
TRIP
TRIP
OR
OR
OR
OR
OR
OR
START
IEC05000834 V1 EN
Figure 191: Schematic design of Two step undervoltage protection UV2PTUV
Voltage protection
347
UV2PTUV
U3P*
BLOCK
BLKTR1
BLKST1
BLKTR2
BLKST2
TRIP
TR1
TR1L1
TR1L2
TR1L3
TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000276 V2 EN
Figure 192: UV2PTUV function block
Table 201: UV2PTUV Input signals
U3P GROUP
SIGNAL
- Three phase voltages
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
Table 202: UV2PTUV Output signals
TRIP BOOLEAN Trip
Voltage protection
348
Table 203: UV2PTUV Group settings (basic)
Operation Off
On
OperationStep1 Off
On
- - On Enable execution of step 1
Characterist1 Definite time
Inverse curve A
Inverse curve B
Prog. inv. curve
- - Definite time Selection of time delay curve type for
step 1
OpMode1 1 out of 3
2 out of 3
3 out of 3
3, 2 of 3, 3 of 3) from step 1
U1< 1 - 100 %UB 1 70 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
for step 1
for step 1
IntBlkSel1 Off
Block of trip
Block all
- - Off Internal (low level) blocking mode, step 1
IntBlkStVal1 1 - 100 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 1
tBlkUV1 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 1
HystAbs1 0.0 - 100.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step 1
OperationStep2 Off
On
Inverse curve A
Inverse curve B
Prog. inv. curve
step 2
Voltage protection
349
OpMode2 1 out of 3
2 out of 3
3 out of 3
U2< 1 - 100 %UB 1 50 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
for step 2
for step 2
IntBlkSel2 Off
Block of trip
Block all
- - Off Internal (low level) blocking mode, step 2
IntBlkStVal2 1 - 100 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 2
tBlkUV2 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 2
Table 204: UV2PTUV Group settings (advanced)
Time curve step 1
Frozen timer
Linearly decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 1
Time curve step 2
Frozen timer
Linearly decreased
curve for step 2
Voltage protection
350
curve for step 2
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 2
Table 205: UV2PTUV Non group settings (basic)
ConnType PhN DFT
PhPh RMS
PhN RMS
PhPh DFT
- - PhN DFT Group selector for connection type
Table 206: UV2PTUV technical data
Operate voltage, low
and high step
(1100)% of UBase 1.0% of U
r
Absolute hysteresis (0100)% of UBase 1.0% of U
r
Internal blocking
level, low and high
step
(1100)% of UBase 1.0% of U
r
Inverse time
characteristics for
low and high step,
see table 623
- See table 623
Definite time delays (0.000-60.000) s 0.5% 10 ms
Minimum operate
time, inverse
characteristics
(0.00060.000) s 0.5% 10 ms
Operate time, start
function
25 ms typically at 2 to 0.5 x U
set
-
Reset time, start
function
25 ms typically at 0 to 2 x U
set
-
set
-
Voltage protection
351
8.2 Two step overvoltage protection OV2PTOV
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Two step overvoltage protection OV2PTOV
3U>
SYMBOL-C V1 EN
59
8.2.1 Introduction
Overvoltages may occur in the power system during abnormal conditions, such as,
sudden power loss, tap changer regulating failures, open line ends on long lines.
Two step overvoltage protection OV2PTOV can be used as open line end detector,
normally then combined with directional reactive over-power function or as system
voltage supervision, normally then giving alarm only or switching in reactors or
switch out capacitor banks to control the voltage.
OV2PTOV has two voltage steps, each of them with inverse or definite time delayed.
OV2PTOV has an extremely high reset ratio to allow setting close to system
service voltage.
Two step overvoltage protection OV2PTOV is used to detect high power system
voltage. OV2PTOV has two steps with separate time delays. If one-, two- or three-
phase voltages increase above the set value, a corresponding START signal is
issued. OV2PTOV can be set to START/TRIP, based on 1 out of 3, 2 out of 3 or 3
out of 3 of the measured voltages, being above the set point. If the voltage remains
above the set value for a time period corresponding to the chosen time delay, the
corresponding trip signal is issued.
The time delay characteristic is individually chosen for the two steps and can be
either, definite time delay or inverse time delay.
The voltage related settings are made in percent of the global set base voltage,
which is set in kV, phase-to-phase.
OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase
fundamental value, phase-to-earth RMS value or phase-to-phase RMS value. The
choice of measuring is done by the parameter ConnType.
The setting of the analog inputs are given as primary phase-to-earth or phase-to-
phase voltage. OV2PTOV will operate if the voltage gets higher than the set
Voltage protection
352
percentage of the set base voltage UBase. This means operation for phase-to-earth
voltage over:
(%) ( )
3
U UBase kV >
and operation for phase for phase voltage over:
U (%) UBase(kV) >
All the three voltages are measured continuously, and compared with the set
values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the
requirements to activate the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of
3 measured voltages have to be higher than the corresponding set point to issue the
corresponding START signal.
8.2.2.2 Time delay
time delay (IDMT). For the inverse time delay four different modes are available:
inverse curve A
inverse curve B
inverse curve C
k
t
U U
U
=
- >

>

IEC09000051 V1 EN (Equation 100)
2.0
480
0.035
32 0.5
k
t
U U
U
= -
- >
-
>

IECEQUATION2287 V1 EN (Equation 101)
Voltage protection
353
The type C curve is described as:
3.0
480
0.035
32 0.5
k
t
U U
U
= +
- >
-
>

p
k A
t D
U U
B C
U
= +
- >
-

>

infinity. There will be an undesired discontinuity. Therefore, a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down
to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/100). If
the programmable curve is used this parameter must be calculated so that:
0
100
CrvSatn
B C - >
The highest phase (or phase-to-phase) voltage is always used for the inverse time
delay integration, see figure 193. The details of the different inverse time
characteristics are shown in section "Inverse characteristics"
Voltage protection
354
en05000016.vsd
Voltage
IDMT Voltage
Time
UL1
UL2
UL3
IEC05000016 V1 EN
Figure 193: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite
time mode (DT) and by selected voltage level dependent time curves for the
inverse time mode (IDMT). If the START condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for
the inverse time) the corresponding START output is reset, after that the defined
reset time has elapsed. Here it should be noted that after leaving the hysteresis area,
the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area. The hysteresis value for each step is settable
(HystAbs2) to allow an high and accurate reset of the function. It should be noted
that for Two step overvoltage protection OV2PTOV the IDMT reset time is
value is linearly decreased during the reset time..
Voltage protection
355
Voltage
Time
Hysteresis
START
TRIP
U1>
START
TRIP
t1
tReset1
Time
Time
Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured
Voltage
tReset
1
IEC09000055 V1 EN
Figure 194: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
Voltage protection
356
Voltage
Time
Hysteresis
START
TRIP START
U1>
START
TRIP
t1
tReset1
Time
Time Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured Voltage
tReset1
IEC05000020 V2 EN
Figure 195: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay
instantaneous reset of the definite time delayed stage is ensured
Voltage protection
357
b<a
a
b
U1>
U
t
tReset1
t
t1
AND
TR1
ST1
OFF
Delay
ON
Delay
IEC10000100 V1 EN
Un>
START
TRIP
tResetn
tn

IEC10000037 V1 EN
Voltage protection
358
Un>
START
TRIP
tResetn
tn

IEC10000038 V1 EN
8.2.2.3 Blocking
It is possible to block Two step overvoltage protection OV2PTOV partially or
completely, by binary input signals where:
8.2.2.4 Design
The voltage measuring elements continuously measure the three phase-to-earth
voltages or the three phase-to-phase voltages. Recursive Fourier filters filter the
input voltage signals. The phase voltages are individually compared to the set
value, and the highest voltage is used for the inverse time characteristic integration.
A special logic is included to achieve the 1 out of 3, 2 out of 3 or 3 out of 3 criteria
to fulfill the START condition. The design of Two step overvoltage protection
(OV2PTOV) is schematically described in figure 199.
Voltage protection
359
START
ST1L1
ST1L2
ST1L3
TR1L1
TR1L2
TR1L3
ST1
TR1
START
ST2L1
ST2L2
ST2L3
TR2L1
TR2L2
TR2L3
ST2
TR2
START
TRIP
en05000013.vsd
Comparator
UL1 > U1>
Comparator
UL2 > U1>
Comparator
UL3 > U1>
MaxVoltSelect
or
Comparator
UL1 > U2>
Comparator
UL2 > U2>
Comparator
UL3 > U2>
MaxVoltSelect
or
Start
&
Trip
Output
Logic
Step 1
Start
&
Trip
Output
Logic
Step 2
Phase 3
Phase 2
Phase 1
Phase 3
Phase 2
Phase 1
Time integrator
t2
tReset2
ResetTypeCrv2
Voltage Phase
Selector
OpMode2
1 out of 3
2 outof 3
3 out of 3
Time integrator
t1
tReset1
ResetTypeCrv1
Voltage Phase
Selector
OpMode1
1 out of 3
2 outof 3
3 out of 3
UL1
UL2
UL3
TRIP
TRIP
OR
OR
OR
OR
OR
OR
IEC05000013-WMF V1 EN
Figure 199: Schematic design of Two step overvoltage protection OV2PTOV
Voltage protection
360
OV2PTOV
U3P*
BLOCK
BLKTR1
BLKST1
BLKTR2
BLKST2
TRIP
TR1
TR1L1
TR1L2
TR1L3
TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000277 V2 EN
Figure 200: OV2PTOV function block
Table 207: OV2PTOV Input signals
U3P GROUP
SIGNAL
- Group signal for three phase voltage input
Table 208: OV2PTOV Output signals
TRIP BOOLEAN Trip
Voltage protection
361
Table 209: OV2PTOV Group settings (basic)
Operation Off
On
OperationStep1 Off
On
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
step 1
OpMode1 1 out of 3
2 out of 3
3 out of 3
U1> 1 - 200 %UB 1 120 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
for step 1
for step 1
OperationStep2 Off
On
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
step 2
OpMode2 1 out of 3
2 out of 3
3 out of 3
U2> 1 - 200 %UB 1 150 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
Voltage protection
362
for step 2
for step 2
Table 210: OV2PTOV Group settings (advanced)
Time curve step 1
Frozen timer
Linearly decreased
curve for step 1
curve for step 1
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 1
Time curve step 2
Frozen timer
Linearly decreased
curve for step 2
curve for step 2
curve for step 2
IDMT curve, step 2
Voltage protection
363
Table 211: OV2PTOV Non group settings (basic)
ConnType PhN DFT
PhPh DFT
PhN RMS
PhPh RMS
- - PhN DFT TBD
Table 212: OV2PTOV technical data
and high step
(1-200)% of UBase 1.0% of U
r
at U U
r
r
at U U
r
Inverse time
characteristics for
low and high step,
see table 622
- See table 622
Definite time delays (0.000-60.000) s 0.5% 10 ms
Minimum operate
time, Inverse
characteristics
(0.000-60.000) s 0.5% 10 ms
Operate time, start
function
set
-
Reset time, start
function
set
-
set
-
8.3 Two step residual overvoltage protection
ROV2PTOV
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Two step residual overvoltage
protection
ROV2PTOV
3U0
TRV V1 EN
59N
8.3.1 Introduction
Residual voltages may occur in the power system during earth faults.
Voltage protection
364
Two step residual overvoltage protection ROV2PTOV calculates the residual
voltage from the three-phase voltage input transformers or from a single-phase
voltage input transformer fed from an open delta or neutral point voltage transformer.
ROV2PTOV has two voltage steps, each with inverse or definite time delayed.
Two step residual overvoltage protection ROV2PTOV is used to detect high single-
phase voltage, such as high residual voltage, also called 3U
0
. The residual voltage
can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary
windings are connected in an open delta. Another possibility is to measure the three-
phase voltages and internally in the IED calculate the corresponding residual
voltage and connect this calculated residual voltage to ROV2PTOV. ROV2PTOV
has two steps with separate time delays. If the single-phase (residual) voltage
remains above the set value for a time period corresponding to the chosen time
delay, the corresponding TRIP signal is issued.
The time delay characteristic is individually chosen for the two steps and can be
either, definite time delay or inverse time delay.
The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.
The residual voltage is measured continuously, and compared with the set values,
U1> and U2>.
8.3.2.2 Time delay
time delay (IDMT). For the inverse time delay four different modes are available:
inverse curve A
inverse curve B
inverse curve C
k
t
U U
U
=
- >

>

IEC09000051 V1 EN (Equation 105)
Voltage protection
365
2.0
480
0.035
32 0.5
k
t
U U
U
= -
- >
-
>

The type C curve is described as:
3.0
480
0.035
32 0.5
k
t
U U
U
= +
- >
-
>

p
k A
t D
U U
B C
U
= +
- >
-

>

infinity. There will be an undesired discontinuity. Therefore a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U> up to
U> (1.0 + CrvSatn/100) the used voltage will be: U> (1.0 + CrvSatn/100). If the
programmable curve is used this parameter must be calculated so that:
0
100
CrvSatn
B C - >
The details of the different inverse time characteristics are shown in section
"Inverse characteristics".
TRIP signal issuing requires that the residual overvoltage condition continues for at
least the user set time delay. This time delay is set by the parameter t1 and t2 for
definite time mode (DT) and by some special voltage level dependent time curves
for the inverse time mode (IDMT).
If the START condition, with respect to the measured voltage ceases during the
delay time, and is not fulfilled again within a user defined reset time (tReset1 and
tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the
corresponding START output is reset, after that the defined reset time has elapsed.
Here it should be noted that after leaving the hysteresis area, the START condition
must be fulfilled again and it is not sufficient for the signal to only return back to
Voltage protection
366
the hysteresis area. Also notice that for the overvoltage function IDMT reset time is
value is linearly decreased during the reset time. See figure 194 and figure 195.
Voltage
Time
Hysteresis
START
TRIP
U1>
START
TRIP
t1
tReset1
Time
Time
Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured
Voltage
tReset
1
IEC09000055 V1 EN
Figure 201: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
Voltage protection
367
Voltage
Time
Hysteresis
START
TRIP START
U1>
START
TRIP
t1
tReset1
Time
Time Integrator
t1
Frozen Timer
Linear Decrease
Instantaneous
Reset
Measured Voltage
tReset1
IEC05000020 V2 EN
Figure 202: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite timer delay
instantaneous reset of the definite time delayed stage is ensured
Voltage protection
368
b<a
a
b
U1>
U
t
tReset1
t
t1
AND
TR1
ST1
OFF
Delay
ON
Delay
IEC10000100 V1 EN
Un<
START
TRIP
tResetn
tn

IEC10000039 V1 EN
Voltage protection
369
Un<
START
TRIP
tResetn
tn

IEC10000040 V1 EN
8.3.2.3 Blocking
It is possible to block Two step residual overvoltage protection ROV2PTOV
partially or completely, by binary input signals where:
BLKST2: blocks all START and trip inputs related to step 2
8.3.2.4 Design
The voltage measuring elements continuously measure the residual voltage.
Recursive Fourier filters filter the input voltage signal. The single input voltage is
compared to the set value, and is also used for the inverse time characteristic
integration. The design of Two step residual overvoltage protection (ROV2PTOV)
is schematically described in figure 206.
Voltage protection
370
en05000748.vsd
UN ST1
TR1
ST2
TR2
START
TRIP
Comparator
UN > U1>
Start
&
Trip
Output
Logic
Step 2
Phase 1
Phase 1
Time integrator
t2
tReset2
ResetTypeCrv2
START
Start
&
Trip
Output
Logic
Step 1
Time integrator
t1
tReset1
ResetTypeCrv1
Comparator
UN > U2>
START
TRIP
TRIP
OR
OR
IEC05000748 V1 EN
Figure 206: Schematic design of Two step residual overvoltage protection
ROV2PTOV
ROV2PTOV
U3P*
BLOCK
BLKTR1
BLKST1
BLKTR2
BLKST2
TRIP
TR1
TR2
START
ST1
ST2
IEC06000278 V2 EN
Figure 207: ROV2PTOV function block
Voltage protection
371
Table 213: ROV2PTOV Input signals
U3P GROUP
SIGNAL
- Three phase voltages
Table 214: ROV2PTOV Output signals
TRIP BOOLEAN Trip
Table 215: ROV2PTOV Group settings (basic)
Operation Off
On
OperationStep1 Off
On
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
step 1
U1> 1 - 200 %UB 1 30 Voltage setting/start val (DT & IDMT),
step 1 in % of UBase
for step 1
for step 1
Voltage protection
372
OperationStep2 Off
On
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
step 2
U2> 1 - 100 %UB 1 45 Voltage setting/start val (DT & IDMT),
step 2 in % of UBase
for step 2
for step 2
Table 216: ROV2PTOV Group settings (advanced)
Time curve step 1
Frozen timer
Linearly decreased
curve for step 1
curve for step 1
curve for step 1
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Time delay in DT reset (s), step 2
Frozen timer
Linearly decreased
curve for step 2
curve for step 2
Voltage protection
373
curve for step 2
IDMT curve, step 2
Table 217: ROV2PTOV technical data
and high step
(1-200)% of UBase 1.0% of U
r
at U U
r
r
at U U
r
Inverse time
characteristics for
low and high step,
see table 624
- See table 624
Definite time setting (0.00060.000) s 0.5% 10 ms
Minimum operate
time
(0.000-60.000) s 0.5% 10 ms
Operate time, start
function
set
-
Reset time, start
function
set
-
set
-
8.4 Overexcitation protection OEXPVPH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Overexcitation protection OEXPVPH
U/f >
SYMBOL-Q V1 EN
24
8.4.1 Introduction
When the laminated core of a power transformer or generator is subjected to a
magnetic flux density beyond its design limits, stray flux will flow into non-
laminated components not designed to carry flux and cause eddy currents to flow.
Voltage protection
374
The eddy currents can cause excessive heating and severe damage to insulation and
adjacent parts in a relatively short time. Overexcitation protection OEXPVPH has
settable inverse operating curve and independent alarm stage.
The importance of Overexcitation protection OEXPVPH is growing as the power
transformers as well as other power system elements today operate most of the
time near their designated limits.
Modern design transformers are more sensitive to overexcitation than earlier types.
This is a result of the more efficient designs and designs which rely on the
improvement in the uniformity of the excitation level of modern systems. Thus, if
emergency that includes overexcitation does occur, transformers may be damaged
unless corrective action is promptly taken. Transformer manufacturers recommend
an overexcitation protection as a part of the transformer protection system.
Overexcitation results from excessive applied voltage, possibly in combination
with below-normal frequency. Such condition may occur when a transformer unit
is on load, but are more likely to arise when it is on open circuit, or at a loss of load
occurrence. Transformers directly connected to generators are in particular danger
to experience overexcitation condition. It follows from the fundamental
transformer equation, see equation 110, that peak flux density Bmax is directly
proportional to induced voltage E, and inversely proportional to frequency f, and
turns n.
E . f n Bmax A 4 44 =
The relative excitation M is therefore according to equation 111.
( )
( ) ( )
E f
M p.u. =
Ur fr
Disproportional variations in quantities E and f may give rise to core overfluxing.
If the core flux density Bmax increases to a point above saturation level (typically
1.9 Tesla), the flux will no longer be contained within the core only but will extend
into other (non-laminated) parts of the power transformer and give rise to eddy
current circulations.
Overexcitation will result in:
overheating of the non-laminated metal parts
a large increase in magnetizing currents
an increase in core and winding temperature
an increase in transformer vibration and noise
Voltage protection
375
Protection against overexcitation is based on calculation of the relative volt per
hertz (V/Hz) ratio. The action of the protection is usually to initiate a reduction of
excitation and, if this should fail, or is not possible, to trip the transformer after a
delay which can be from seconds to minutes, typically 5 - 10 seconds.
Overexcitation protection may be of particular concern on directly connected
generator unit transformers. Directly connected generator-transformers are
subjected to a wide range of frequencies during the acceleration and deceleration of
the turbine. In such cases, the overexcitation protection may trip the field breaker
during a start-up of a machine, by means of the overexcitation ALARM signal. If
this is not possible, the power transformer can be disconnected from the source,
after a delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers shall be capable of operating
continuously at 10% above rated voltage at no load, and rated frequency. At no
load, the ratio of the actual generator terminal voltage to the actual frequency
should not exceed 1.1 times the ratio of transformer rated voltage to the rated
frequency on a sustained basis, see equation 112.
E
f
---- 1.1
Ur
fr
------
or equivalently, with 1.1 Ur = V/Hz> according to equation 113.
E V Hz>
f fr

where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.
V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does
not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the
default value V/Hz> = 110% shall be used.
In OEXPVPH, the relative excitation M is expressed according to equation 114.
( )
E f
M p.u. =
Ur fr
It is clear from the above formula that, for an unloaded power transformer, M = 1
for any E and f, where the ratio E/f is equal to Ur/fr. A power transformer is not
overexcited as long as the relative excitation is M V/Hz>, V/Hz> expressed in %
of Ur/fr.
Voltage protection
376
The overexcitation protection algorithm is fed with an input voltage U which is in
general not the induced voltage E from the fundamental transformer equation. For
no load condition, these two voltages are the same, but for a loaded power
transformer the internally induced voltage E may be lower or higher than the
voltage U which is measured and fed to OEXPVPH , depending on the direction of
the power flow through the power transformer, the power transformer side where
OEXPVPH is applied, and the power transformer leakage reactance of the winding.
It is important to specify in the application configuration on which side of the
power transformer OEXPVPH is placed.
As an example, at a transformer with a 15% short circuit impedance Xsc, the full
load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the
transformer core, will not be significantly different from that at the 110% voltage,
no load, rated frequency, provided that the short circuit impedance X can be
equally divided between the primary and the secondary winding: Xleak = Xleak1 =
Xleak2 = Xsc / 2 = 0.075 pu.
OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage
reactance of the winding where OEXPVPH is connected) is known to the user. The
assumption taken for two-winding power transformers that Xleak = Xsc / 2 is
unfortunately most often not true. For a two-winding power transformer the
leakage reactances of the two windings depend on how the windings are located on
the core with respect to each other. In the case of three-winding power transformers
the situation is still more complex. If a user has the knowledge on the leakage
reactance, then it should applied. If a user has no idea about it, Xleak can be set to
X
c/2
. OEXPVPH protection will then take the given measured voltage U, as the
induced voltage E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events
such as loss-of-load, and so on. It will be observed that a high phase-to-earth
voltage does not mean overexcitation. For example, in an unearthed power system,
a single phase-to-earth fault means high voltages of the healthy two phases-to-
earth, but no overexcitation on any winding. The phase-to-phase voltages will
remain essentially unchanged. The important voltage is the voltage between the
two ends of each winding.
8.4.2.1 Measured voltage
If one phase-to-phase voltage is available from the side where overexcitation
protection is applied, then Overexcitation protection OEXPVPH shall be set to
measure this voltage, MeasuredU. The particular voltage which is used determines
the two currents that must be used. This must be chosen with the setting MeasuredI.
It is extremely important that MeasuredU and MeasuredI are set to
same value.
If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2
must be applied. From these two input currents, current IL1L2 = IL1 - IL2 is
Voltage protection
377
calculated internally by the OEXPVPH algorithm. The phase-to-phase voltage
must be higher than 70% of the rated value, otherwise the protection algorithm
exits without calculating the excitation. ERROR output is set to 1, and the
displayed value of relative excitation V/Hz shows 0.000.
If three phase-to-earth voltages are available from the side where overexcitation is
connected, then OEXPVPH shall be set to measure positive sequence voltage and
current. In this case the positive sequence voltage and the positive sequence current
are used by OEXPVPH. A check is made if the positive sequence voltage is higher
than 70% of rated phase-to-earth voltage, when below this value, OEXPVPH exits
immediately, and no excitation is calculated. ERROR output is set to 1, and the
displayed value of relative excitation V/Hz shows 0.000.
The frequency value is received from the pre-processing block. The function is in
operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and
60 Hz respectively.
OEXPVPH can be connected to any power transformer side, independent from
the power flow.
The side with a possible load tap changer must not be used.
8.4.2.2 Operate time of the overexcitation protection
The operate time of the overexcitation protection OEXPVPH is a function of the
relative overexcitation.
Basically there are two different delay laws available to choose between:
the so called IEEE law, and
a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on
analysis of the various transformers overexcitation capability characteristics. They
can match well a transformer core capability.
The square law is according to equation 115.
op
2
0.18
t
M
1
V Hz>
k
=
-

where:
M the relative excitation
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier for inverse time functions, see figure 209.
Parameter k (time multiplier setting) selects one delay curve from the family of curves.
Voltage protection
378
An analog overexcitation relay would have to evaluate the following integral
expression, which means to look for the instant of time t = t
op
according to
equation 116.
( ) ( )
op t
2
0
M t V Hz 0.18 dt k - >

A digital, numerical relay will instead look for the lowest j (that is, j = n) where it
becomes true that:
Dt M(j) V/Hz> ( )
2
j k =
n
0.18 k
where:
Dt is the time interval between two successive executions of OEXPVPH and
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is
given as Ur/fr.
As long as M > V/Hz> (that is, overexcitation condition), the above sum can only
be larger with time, and if the overexcitation persists, the protected transformer will
be tripped at j = n.
Inverse delays as per figure 209, can be modified (limited) by two special definite
delay settings, namely tMax and tMin, see figure 208.
0 M
max
- V/Hz>
M
max
tMin
V/Hz>
E
max
E (only if f = fr = const)
tMax
inverse delay law
overexcitation
under -
excitation
delay in s
99001067.vsd
Overexcitation M-V/Hz>
Excitation M M=V/Hz>
IEC99001067 V1 EN
Figure 208: Restrictions imposed on inverse delays by tMax and tMin
Voltage protection
379
A definite maximum time, tMax, can be used to limit the operate time at low
degrees of overexcitation. Inverse delays longer than tMax will not be allowed. In
case the inverse delay is longer than tMax, OEXPVPH trips after tMax seconds.
A definite minimum time, tMin, can be used to limit the operate time at high
degrees of overexcitation. In case the inverse delay is shorter than tMin,
OEXPVPH function trips after tMin seconds. Also, the inverse delay law is no
more valid beyond excitation Mmax. Beyond Mmax (for excitation M > V/Hz>),
the delay will always be tMin, irrespective of the overexcitation level.
1 10
1
10
100
1000
2 40 3 4 5 20 30
k = 2
k = 3
k = 4
k = 5
k = 6
k = 7
k = 8
k = 9
k = 10
k = 20
k = 60
k = 1
OVEREXCITATION IN %
Time (s) IEEE OVEREXCITATION CURVES
en01000373.vsd
(M-Emaxcont)*100)
IEC01000373 V1 EN
Figure 209: Delays inversely proportional to the square of the overexcitation
The critical value of excitation M is determined indirectly via OEXPVPH setting V/
Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the
inverse law should be replaced by a short definite delay, tMin. If, for example, V/
Hz>> = 140 %, then M is according to equation 118.
Voltage protection
380
( ) V Hz>> / f
M 1.40
Ur/fr
= =
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In
this case the interval between M = V/Hz>, and M = Mmax is automatically divided
into five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5 and t6) as
shown in figure 210. These times should be set so that t1 => t2 => t3 => t4 => t5
=> t6.
0
E
maxcont
M
max
- E
maxcont
M
max
tMin
tMax
delay in s
Overexcitation M-E
maxcont
Excitation M
under-
excitation
99001068.vsd
IEC99001068 V1 EN
Figure 210: An example of a Tailor-Made delay characteristic
Delays between two consecutive points, for example t3 and t4, are obtained by
linear interpolation.
Should it happen that tMax be lower than, for example, delays t1, and t2, the actual
delay would be tMax. Above Mmax, the delay can only be tMin.
8.4.2.3 Cooling
Overexcitation protection OEXPVPH is basically a thermal protection; therefore a
cooling process has been introduced. Exponential cooling process is applied.
Parameter Setting tool is an OEXPVPH setting, with a default time constant
tCooling of 20 minutes. This means that if the voltage and frequency return to their
previous normal values (no more overexcitation), the normal temperature is
assumed to be reached not before approximately 5 times tCooling minutes. If an
overexcitation condition would return before that, the time to trip will be shorter
than it would be otherwise.
8.4.2.4 Overexcitation protection function measurands
A monitored data value, TMTOTRIP, is available on the local HMI and in
PCM600. This value is an estimation of the remaining time to trip (in seconds), if
the overexcitation remained on the level it had when the estimation was done. This
information can be useful with small or moderate overexcitations.
Voltage protection
381
If the overexcitation is so low that the valid delay is tMax, then the estimation of
the remaining time to trip is done against tMax.
The relative excitation M, shown on the local HMI and in PCM600 as a monitored
data value VPERHZ, is calculated from the expression:
( )
E f
M p.u. =
Ur fr
If VPERHZ value is less than setting V/Hz> (in %), the power transformer is
underexcited. If VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal
to the power transformer continuous capability. If VPERHZ is higher than V/Hz>,
the protected power transformer is overexcited. For example, if VPERHZ = 1.100,
while V/Hz> = 110 %, then the power transformer is exactly on its maximum
continuous excitation limit.
Monitored data value THERMSTA shows the thermal status of the protected
power transformer iron core. THERMSTA gives the thermal status in % of the trip
value which corresponds to 100%. THERMSTA should reach 100% at the same
time, as TMTOTRIP reaches 0 seconds. If the protected power transformer is then
for some reason not switched off, THERMSTA shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin,
then the Thermal status will generally not reach 100% at the same time, when
tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the
very long delay is limited by tMax, then the OEXPVPH TRIP output signal will be
set to 1 before the Thermal status reaches 100%.
8.4.2.5 Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. It is normally set
2% lower than (V/Hz>) and has a definite time delay, tAlarm. This will give the
operator an early abnormal voltages warning.
Voltage protection
382
t
t
t
1
&
&
BLOCK
Xleak
Ei
M=
(Ei / f)
(Ur / fr)
M = relative V/Hz as service value
V/Hz>>
M>V/Hz>>
V/Hz>
M>V/Hz>
tAlarm
tMin
IEEE law
Tailor-made law
tMax
Calculation
of internal
induced
voltage Ei
k
M
M
M
t>tAlarm
t>tMin
ALARM
TRIP
AlarmLevel
U3P
I3P
IEC05000162 V2 EN
Figure 211: A simplified logic diagram of the Overexcitation protection
OEXPVPH
Simplification of the diagram is in the way the IEEE and Tailor-made delays are
calculated. The cooling process is not shown. It is not shown that voltage and
frequency are separately checked against their respective limit values.
OEXPVPH
I3P*
U3P*
BLOCK
RESET
TRIP
START
ALARM
IEC05000329 V3 EN
Figure 212: OEXPVPH function block
Table 218: OEXPVPH Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
- Voltage connection
RESET BOOLEAN 0 Reset operation
Voltage protection
383
Table 219: OEXPVPH Output signals
TRIP BOOLEAN Trip from overexcitation function
START BOOLEAN Overexcitation above set operate level
(instantaneous)
ALARM BOOLEAN Overexcitation above set alarm level (delayed)
Table 220: OEXPVPH Group settings (basic)
Operation Off
On
IBase 1 - 99999 A 1 3000 Base current (rated phase current) in A
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage (main voltage) in kV
V/Hz> 100.0 - 180.0 %UB/f 0.1 110.0 Operate level of V/Hz at no load and
rated freq in % of (Ubase/frated)
V/Hz>> 100.0 - 200.0 %UB/f 0.1 140.0 High level of V/Hz above which tMin is
used, in % of (Ubase/frated)
XLeak 0.000 - 200.000 ohm 0.001 0.000 Winding leakage reactance in primary
ohms
TrPulse 0.000 - 60.000 s 0.001 0.100 Length of the pulse for trip signal (in sec)
tMin 0.000 - 60.000 s 0.001 7.000 Minimum trip delay for V/Hz inverse
curve, in sec
tMax 0.00 - 9000.00 s 0.01 1800.00 Maximum trip delay for V/Hz inverse
curve, in sec
tCooling 0.10 - 9000.00 s 0.01 1200.00 Transformer magnetic core cooling time
constant, in sec
CurveType IEEE
Tailor made
- - IEEE Inverse time curve selection, IEEE/Tailor
made
kForIEEE 1 - 60 - 1 1 Time multiplier for IEEE inverse type
curve
AlarmLevel 50.0 - 120.0 % 0.1 100.0 Alarm operate level as % of operate level
tAlarm 0.00 - 9000.00 s 0.01 5.00 Alarm time delay, in sec
Table 221: OEXPVPH Group settings (advanced)
t1Tailor 0.00 - 9000.00 s 0.01 7200.00 Time delay t1 (longest) for tailor made
curve, in sec
t2Tailor 0.00 - 9000.00 s 0.01 3600.00 Time delay t2 for tailor made curve, in sec
t6Tailor 0.00 - 9000.00 s 0.01 225.00 Time delay t6 (shortest) for tailor made
curve, in sec
Voltage protection
384
Table 222: OEXPVPH Non group settings (basic)
MeasuredU PosSeq
L1L2
L2L3
L3L1
- - L1L2 Selection of measured voltage
MeasuredI L1L2
L2L3
L3L1
PosSeq
- - L1L2 Selection of measured current
Table 223: OEXPVPH technical data
Operate value, start (100180)% of (UBase/f
rated
) 1.0% of U
Operate value, alarm (50120)% of start level 1.0% of U
r
at U U
r
1.0% of U at U > U
r
Operate value, high level (100200)% of (UBase/f
rated
) 1.0% of U
Curve type IEEE or customer defined
2
(0.18 )
:
( 1)
k
IEEE t
M

=
-
where M = (E/f)/(Ur/fr)
Class 5 + 40 ms
Minimum time delay for inverse
function
(0.00060.000) s 0.5% 10 ms
Maximum time delay for inverse
function
(0.009000.00) s 0.5% 10 ms
Alarm time delay (0.00060.000) s 0.5% 10 ms
8.5 Voltage differential protection VDCPTOV
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Voltage differential protection VDCPTOV - 60
8.5.1 Introduction
A voltage differential monitoring function is available. It compares the voltages
from two three phase sets of voltage transformers and has one sensitive alarm step
and one trip step. It can be used to supervise the voltage from two fuse groups or
two different voltage transformers fuses as a fuse/MCB supervision function.
Voltage protection
385
The Voltage differential protection function VDCPTOV (60) is based on
comparison of the amplitudes of the two voltages connected in each phase.
Possible differences between the ratios of the two Voltage/Capacitive voltage
transformers can be compensated for with a ratio correction factors RFLx. The
voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip
level UDATrip signals for alarm (ALARM output) or trip (TRIP output) is given
after definite time delay tAlarm respectively tTrip. The two three phase voltage
supplies are also supervised with undervoltage settings U1Low and U2Low. The
outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage
is supervised for loss of individual phases whereas the U2 voltage is supervised for
loss of all three phases.
Loss of all U1or all U2 voltages will block the differential measurement. This
blocking can be switched off with setting BlkDiffAtULow = No.
VDCPTOV function can be blocked from an external condition with the binary
BLOCK input. It can for example, be activated from Fuse failure supervision
function SDDRFUF.
To allow easy commissioning the measured differential voltage is available as
service value. This allows simple setting of the ratio correction factor to achieve
full balance in normal service.
The principle logic diagram is shown in figure 213.
Voltage protection
386
UDTripL1>
U1<L1
AND
O
R
UDAlarmL1>
UDTripL1>
UDAlarmL1>
UDTripL1>
UDAlarmL1>
AND
AND
AND
AND
AND
t
tReset
t
tAlarm
O
R
t
tTrip
TRIP
START
ALARM
U1<L2
U1<L3
U2<L1
U2<L2
U2<L3
AND
t
tAlarm
t
t1
OR
AND
AND
AND
BLOCK
AND
AND
U1LOW
U2LOW
en06000382-1.vsd
BlkDiffAtULow
AND
AND
IEC06000382 V2 EN
Figure 213: Principle logic for Voltage differential function VDCPTOV
VDCPTOV
U3P1*
U3P2*
BLOCK
TRIP
START
ALARM
U1LOW
U2LOW
UL1DIFF
UL2DIFF
UL3DIFF
IEC06000528 V2 EN
Figure 214: VDCPTOV function block
Voltage protection
387
Table 224: VDCPTOV Input signals
U3P1 GROUP
SIGNAL
- Bus voltage
U3P2 GROUP
SIGNAL
- Capacitor voltage
Table 225: VDCPTOV Output signals
TRIP BOOLEAN Voltage differential protection operated
START BOOLEAN Start of voltage differential protection
ALARM BOOLEAN Voltage differential protection alarm
U1LOW BOOLEAN Loss of U1 voltage
U2LOW BOOLEAN Loss of U2 voltage
UL1DIFF REAL Differential Voltage phase L1
Table 226: VDCPTOV Group settings (basic)
Operation Off
On
- - Off Operation Off/On
BlkDiffAtULow No
Yes
- - Yes Block operation at low voltage
UDTrip 0.0 - 100.0 %UB 0.1 5.0 Operate level, in % of UBase
tTrip 0.000 - 60.000 s 0.001 1.000 Time delay for voltage differential
operate, in milliseconds
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for voltage differential reset,
in seconds
U1Low 0.0 - 100.0 %UB 0.1 70.0 Input 1 undervoltage level, in % of UBase
U2Low 0.0 - 100.0 %UB 0.1 70.0 Input 2 undervoltage level, in % of UBase
tBlock 0.000 - 60.000 s 0.001 0.000 Reset time for undervoltage block
UDAlarm 0.0 - 100.0 %UB 0.1 2.0 Alarm level, in % of UBase
tAlarm 0.000 - 60.000 s 0.001 2.000 Time delay for voltage differential alarm,
in seconds
Voltage protection
388
Table 227: VDCPTOV Group settings (advanced)
RFL1 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L1
U2L1*RFL1=U1L1
U2L2*RFL2=U1L2
U2L3*RFL3=U1L3
Table 228: VDCPTOV technical data
Voltage difference for alarm and
trip
(0.0100.0) % of UBase 0.5 % of U
r
Under voltage level (0.0100.0) % of UBase 0.5% of U
r
Timers (0.00060.000)s 0.5% 10 ms
8.6 Loss of voltage check LOVPTUV
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Loss of voltage check LOVPTUV - 27
8.6.1 Introduction
Loss of voltage check (LOVPTUV) is suitable for use in networks with an
automatic system restoration function. LOVPTUV issues a three-pole trip
command to the circuit breaker, if all three phase voltages fall below the set value
for a time longer than the set time and the circuit breaker remains closed.
The operation of Loss of voltage check LOVPTUV is based on line voltage
measurement. LOVPTUV is provided with a logic, which automatically recognises
if the line was restored for at least tRestore before starting the tTrip timer. All three
phases are required to be low before the output TRIP is activated. The START
output signal indicates start.
Additionally, LOVPTUV is automatically blocked if only one or two phase
voltages have been detected low for more than tBlock.
Voltage protection
389
LOVPTUV operates again only if the line has been restored to full voltage for at
least tRestore. Operation of the function is also inhibited by fuse failure and open
circuit breaker information signals, by their connection to dedicated inputs of the
function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a
length set by setting tPulse.
The operation of LOVPTUV is supervised by the fuse-failure function (VTSU
input) and the information about the open position (CBOPEN) of the associated
circuit breaker.
The BLOCK input can be connected to a binary input of the IED in order to receive
a block command from external devices or can be software connected to other
internal functions of the IED itself in order to receive a block command from
internal functions. LOVPTUV is also blocked when the IED is in TEST status and
the function has been blocked from the HMI test menu. (Blocked=Yes).
Voltage protection
390
Function Enable
TEST-ACTIVE
&
TEST
Blocked = Yes
>1
STUL1N
STUL2N
STUL3N
t
tTrip tPulse
&
&
>1 t
tBlock
&
only 1 or 2 phases are low for
at least 10 s (not three)
>1
&
>1
t
tRestore
Reset Enable
Set Enable
>1
Line restored for
at least 3 s
Latched
Enable
START
TRIP
CBOPEN
VTSU
BLOCK
IEC07000089 V2 EN
Figure 215: Simplified diagram of Loss of voltage check LOVPTUV
LOVPTUV
U3P*
BLOCK
CBOPEN
VTSU
TRIP
START
IEC07000039 V2 EN
Figure 216: LOVPTUV function block
Voltage protection
391
Table 229: LOVPTUV Input signals
U3P GROUP
SIGNAL
BLOCK BOOLEAN 0 Block the all outputs
CBOPEN BOOLEAN 0 Circuit breaker open
VTSU BOOLEAN 0 Block from voltage circuit supervision
Table 230: LOVPTUV Output signals
START BOOLEAN Start signal
Table 231: LOVPTUV Group settings (basic)
Operation Off
On
UPE 1 - 100 %UB 1 70 Operate voltagein% of base voltage
Ubase
tTrip 0.000 - 60.000 s 0.001 7.000 Operate time delay
Table 232: LOVPTUV Group settings (advanced)
tPulse 0.050 - 60.000 s 0.001 0.150 Duration of TRIP pulse
tBlock 0.000 - 60.000 s 0.001 5.000 Time delay to block when all 3ph
voltages are not low
tRestore 0.000 - 60.000 s 0.001 3.000 Time delay for enable the function after
restoration
Table 233: LOVPTUV technical data
Operate voltage (0100)% of UBase 0.5% of U
r
Pulse timer (0.05060.000) s 0.5% 10 ms
Timers (0.00060.000) s 0.5% 10 ms
Voltage protection
392
Section 9 Frequency protection
About this chapter
This chapter describes the frequency protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and
technical data are included for each function.
9.1 Underfrequency protection SAPTUF
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Underfrequency protection SAPTUF
f <
SYMBOL-P V1 EN
81
9.1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
Underfrequency protection SAPTUF is used for load shedding systems, remedial
action schemes, gas turbine startup and so on.
SAPTUF is provided with an under voltage blocking.
The operation may be based on single-phase, phase-to-phase or positive-sequence
voltage measurement.
Underfrequency protection SAPTUF is used to detect low power system frequency.
SAPTUF can either have a definite time delay or a voltage magnitude dependent
time delay. If the voltage magnitude dependent time delay is applied, the time
delay will be longer if the voltage is higher, and the delay will be shorter if the
voltage is lower. If the frequency remains below the set value for a time period
corresponding to the chosen time delay, the corresponding trip signal is issued. To
avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude, a voltage controlled blocking of the function is available, that is, if the
Frequency protection
393
voltage is lower than the set blocking voltage IntBlockLevel the function is blocked
and no START or TRIP signal is issued.
The fundamental frequency of the measured input voltage is measured
continuously, and compared with the set value, StartFrequency. The frequency
function is dependent on the voltage magnitude. If the voltage magnitude decreases
the setting IntBlockLevel, SAPTUF gets blocked, and the output BLKDMAGN is
issued. All voltage settings are made in percent of the setting UBase, which should
be set as a phase-phase voltage in kV.
9.1.2.2 Time delay
The time delay for underfrequency protection SAPTUF can be either a settable
definite time delay or a voltage magnitude dependent time delay, where the time
delay depends on the voltage level; a high voltage level gives a longer time delay
and a low voltage level causes a short time delay. For the definite time delay, the
setting TimeDlyOperate sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings
UNom, UMin, Exponent, tMax and tMin set the time delay according to figure 217
and equation 121. The setting TimerOperation is used to decide what type of time
delay to apply.
Trip signal issuing requires that the underfrequency condition continues for at least
the user set time delay TimeDlyOperate. If the START condition, with respect to
the measured frequency ceases during this user set delay time, and is not fulfilled
again within a user defined reset time, TimeDlyReset, the START output is reset,
after that the defined reset time has elapsed. Here it should be noted that after
leaving the hysteresis area, the START condition must be fulfilled again and it is
not sufficient for the signal to only return back to the hysteresis area.
On the output of SAPTUF a 100ms pulse is issued, after a time delay
corresponding to the setting of TimeDlyRestore, when the measured frequency
returns to the level corresponding to the setting RestoreFreq.
9.1.2.3 Voltage dependent time delay
Since the fundamental frequency in a power system is the same all over the system,
except some deviations during power oscillations, another criterion is needed to
decide, where to take actions, based on low frequency. In many applications the
voltage level is very suitable, and in most cases is load shedding preferable in areas
with low voltage. Therefore, a voltage dependent time delay has been introduced,
to make sure that load shedding, or other actions, take place at the right location. At
constant voltage, U, the voltage dependent time delay is calculated according to
equation 121. At non-constant voltage, the actual time delay is integrated in a
394
similar way as for the inverse time characteristic for the undervoltage and
overvoltage functions.
( )
Exponent
U UMin
t tMax tMin tMin
UNom UMin
-
= - +
-

where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
The inverse time characteristics are shown in figure 217, for:
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
90 95 100
0
0.5
1
en05000075.vsd
T
i
m
e
D
l
y
O
p
e
r
a
t
e

[
s
]
U [% of UBase]
Exponenent
0
1
2
3
4
IEC05000075 V1 EN
Figure 217: Voltage dependent inverse time characteristics for underfrequency
protection SAPTUF. The time delay to operate is plotted as a
function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4
respectively.
395
9.1.2.4 Blocking
It is possible to block underfrequency protection SAPTUF partially or completely,
by binary input signals or by parameter settings, where:
BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlockLevel, both the
START and the TRIP outputs, are blocked.
9.1.2.5 Design
The frequency measuring element continuously measures the frequency of the
positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults. The
time integrator can operate either due to a definite delay time or to the special
voltage dependent delay time. When the frequency has returned back to the setting
of RestoreFreq, the RESTORE output is issued after the time delay
TimeDlyRestore. The design of underfrequency protection SAPTUF is
schematically described in figure 218.
Frequency Comparator
f < StartFrequency
Voltage
START
START
TRIP
Comparator
U < IntBlockLevel
BLOCK
Comparator
f > RestoreFreq
Block
OR
Time integrator
TimerOperation Mode
Selector
TimeDlyOperate
TimeDlyReset
TimeDlyRestore
RESTORE
100 ms
Start
&
Trip
Output
Logic
en05000726.vsd
TRIP
BLKDMAGN
IEC05000726 V1 EN
Figure 218: Simplified logic diagram for SAPTUF
396
SAPTUF
U3P*
BLOCK
BLKTRIP
BLKREST
TRIP
START
RESTORE
BLKDMAGN
FREQ
IEC06000279 V2 EN
Figure 219: SAPTUF function block
Table 234: SAPTUF Input signals
U3P GROUP
SIGNAL
BLKTRIP BOOLEAN 0 Blocking operate output.
BLKREST BOOLEAN 0 Blocking restore output.
Table 235: SAPTUF Output signals
TRIP BOOLEAN Operate/trip signal for frequency.
START BOOLEAN Start/pick-up signal for frequency.
RESTORE BOOLEAN Restore signal for load restoring purposes.
BLKDMAGN BOOLEAN Blocking indication due to low amplitude.
FREQ REAL Measured frequency
Table 236: SAPTUF Group settings (basic)
Operation Off
On
StartFrequency 35.00 - 75.00 Hz 0.01 48.80 Frequency setting/start value.
IntBlockLevel 0 - 100 %UB 1 50 Internal blocking level in % of UBase.
TimeDlyOperate 0.000 - 60.000 s 0.001 0.200 Operate time delay in over/under-
frequency mode.
TimeDlyReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
TimeDlyRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay.
397
RestoreFreq 45.00 - 65.00 Hz 0.01 50.10 Restore frequency if frequency is above
frequency value.
TimerOperation Definite timer
Volt based timer
- - Definite timer Setting for choosing timer mode.
UNom 50 - 150 %UB 1 100 Nominal voltage in % of UBase for
voltage based timer.
UMin 50 - 150 %UB 1 90 Lower operation limit in % of UBase for
Exponent 0.0 - 5.0 - 0.1 1.0 For calculation of the curve form for
tMax 0.010 - 60.000 s 0.001 1.000 Maximum time operation limit for voltage
based timer.
tMin 0.010 - 60.000 s 0.001 1.000 Minimum time operation limit for voltage
based timer.
Table 237: SAPTUF technical data
Operate value, start function (35.00-75.00) Hz 2.0 mHz
Operate time, start function 100 ms typically -
Reset time, start function 100 ms typically -
Operate time, definite time function (0.000-60.000)s 0.5%
10 ms
Reset time, definite time function (0.000-60.000)s 0.5%
10 ms
Voltage dependent time delay
( )
Exponent
U UMin
t tMax tMin tMin
UNom UMin
-
= - +
-

U=U
measured
Settings:
UNom=(50-150)% of U
base
UMin=(50-150)% of U
base
Exponent=0.0-5.0
tMax=(0.000-60.000)s
tMin=(0.000-60.000)s
Class 5 +
200 ms
9.2 Overfrequency protection SAPTOF
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Overfrequency protection SAPTOF
f >
SYMBOL-O V1 EN
81
398
9.2.1 Introduction
Overfrequency protection function SAPTOF is applicable in all situations, where
reliable detection of high fundamental power system frequency is needed.
Overfrequency occurs at sudden load drops or shunt faults in the power network.
Close to the generating plant, generator governor problems can also cause over
frequency.
SAPTOF is used mainly for generation shedding and remedial action schemes. It is
also used as a frequency stage initiating load restoring.
SAPTOF is provided with an undervoltage blocking. The operation is based on single-
phase, phase-to-phase or positive-sequence voltage measurement.
Overfrequency protection SAPTOF is used to detect high power system frequency.
SAPTOF has a settable definite time delay. If the frequency remains above the set
value for a time period corresponding to the chosen time delay, the corresponding
TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency
measurement at low voltage magnitude, a voltage controlled blocking of the
function is available from the preprocessing function, that is, if the voltage is lower
than the set blocking voltage in the preprocessing function, the function is blocked
and no START or TRIP signal is issued.
The fundamental frequency of the positive sequence voltage is measured
continuously, and compared with the set value, StartFrequency. Overfrequency
protection SAPTOF is dependent on the voltage magnitude. If the voltage
magnitude decreases below the setting IntBlockLevel, SAPTOF is blocked, and the
output BLKDMAGN is issued. All voltage settings are made in percent of the
UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations
of the output START signal, a hysteresis has been included.
9.2.2.2 Time delay
The time delay for Overfrequency protection SAPTOF (81) is a settable definite
time delay, specified by the setting TimeDlyOperate.
TRIP signal issuing requires that the overfrequency condition continues for at least
the user set time delay, TimeDlyReset. If the START condition, with respect to the
measured frequency ceases during this user set delay time, and is not fulfilled again
within a user defined reset time, TimeDlyReset, the START output is reset, after
that the defined reset time has elapsed. It is to be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area.
399
9.2.2.3 Blocking
It is possible to block overfrequency protection SAPTOF partially or completely,
9.2.2.4 Design
The frequency measuring element continuously measures the frequency of the
positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults in the
power system. The time integrator operates due to a definite delay time. The design
of overfrequency protection SAPTOF is schematically described in figure 220.
Voltage
START START
TRIP
Start
&
Trip
Output
Logic
Time integrator
Definite Time Delay
TimeDlyOperate
TimeDlyReset
Comparator
U < IntBlockLevel
BLOCK
en05000735.vsd
Frequency Comparator
f > StartFrequency
TRIP
BLKDMAGN
BLOCK
OR
BLKTRIP
IEC05000735 V1 EN
Figure 220: Schematic design of overfrequency protection SAPTOF
400
SAPTOF
U3P*
BLOCK
BLKTRIP
TRIP
START
BLKDMAGN
FREQ
IEC06000280 V2 EN
Figure 221: SAPTOF function block
Table 238: SAPTOF Input signals
U3P GROUP
SIGNAL
Table 239: SAPTOF Output signals
TRIP BOOLEAN Operate/trip signal for frequency.
START BOOLEAN Start/pick-up signal for frequency.
FREQ REAL Measured frequency
Table 240: SAPTOF Group settings (basic)
Operation Off
On
StartFrequency 35.00 - 75.00 Hz 0.01 51.20 Frequency setting/start value.
TimeDlyOperate 0.000 - 60.000 s 0.001 0.000 Operate time delay in over/under-
frequency mode.
TimeDlyReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
401
Table 241: SAPTOF technical data
Operate value, start function (35.00-75.00) Hz 2.0 mHz at symmetrical three-
phase voltage
Reset time, start function 100 ms typically -
Operate time, definite time
function
(0.000-60.000)s 0.5% 10 ms
Reset time, definite time
function
(0.000-60.000)s 0.5% 10 ms
9.3 Rate-of-change frequency protection SAPFRC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Rate-of-change frequency protection SAPFRC
df/dt
>
<
SYMBOL-N V1 EN
81
9.3.1 Introduction
Rate-of-change frequency protection function (SAPFRC) gives an early indication
of a main disturbance in the system. SAPFRC can be used for generation shedding,
load shedding, remedial action schemes. SAPFRC can discriminate between
positive or negative change of frequency.
SAPFRC is provided with an undervoltage blocking. The operation may be based
on single-phase, phase-to-phase or positive-sequence voltage measurement.
Rate-of-change frequency protection SAPFRC is used to detect fast power system
frequency changes, increase as well as, decrease at an early stage. SAPFRC has a
settable definite time delay. If the rate-of-change of frequency remains below the
set value, for negative rate-of-change, for a time period equal to the chosen time
delay, the TRIP signal is issued. If the rate-of-change of frequency remains above
the set value, for positive rate-of-change, for a time period equal to the chosen time
delay, the TRIP signal is issued. To avoid an unwanted TRIP due to uncertain
frequency measurement at low voltage magnitude, a voltage controlled blocking of
the function is available, that is if the voltage is lower than the set blocking voltage
402
IntBlockLevel, the function is blocked and no START or TRIP signal is issued. If
the frequency recovers, after a frequency decrease, a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is
measured continuously, and compared with the set value, StartFreqGrad. Rate-of-
change frequency protection SAPFRC is also dependent on the voltage magnitude.
If the voltage magnitude decreases below the setting IntBlockLevel, SAPFRC is
blocked, and the output BLKDMAGN is issued. The sign of the setting
StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in
frequency. If SAPFRC is used for decreasing frequency that is, the setting
StartFreqGrad has been given a negative value, and a trip signal has been issued,
then a 100 ms pulse is issued on the RESTORE output, when the frequency
recovers to a value higher than the setting RestoreFreq. A positive setting of
StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases.
9.3.2.2 Time delay
Rate-of-change frequency protection SAPFRC has a settable definite time delay,
tTrip. .
Trip signal issuing requires that the rate-of-change of frequency condition
continues for at least the user set time delay, tTrip. If the START condition, with
respect to the measured frequency ceases during the delay time, and is not fulfilled
again within a user defined reset time, tReset, the START output is reset, after that
the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient
for the signal to only return back into the hysteresis area.
The RESTORE output of SAPFRC is set, after a time delay equal to the setting of
tRestore, when the measured frequency has returned to the level corresponding to
RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s
the restore functionality is disabled, and no output will be given. The restore
functionality is only active for lowering frequency conditions and the restore
sequence is disabled if a new negative frequency gradient is detected during the
restore period, defined by the settings RestoreFreq and tRestore.
9.3.2.3 Blocking
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked,
BLKREST: blocks the RESTORE output
403
9.3.2.4 Design
Rate-of-change frequency protection (SAPFRC) measuring element continuously
measures the frequency of the selected voltage and compares it to the setting
StartFreqGrad. The frequency signal is filtered to avoid transients due to power
system switchings and faults. The time integrator operates with a definite delay
time. When the frequency has returned back to the setting of RestoreFreq, the
RESTORE output is issued after the time delay tRestore, if the TRIP signal has
earlier been issued. The sign of the setting StartFreqGrad is essential, and controls
if the function is used for raising or lowering frequency conditions. The design of
SAPFRC is schematically described in figure 222.
en05000835.vsd
RESTORE
Voltage
START
START
TRIP
Start
&
Trip
Output
Logic
BLOCK
Frequency
100 ms
Comparator
If
[StartFreqGrad<0
AND
df/dt < StartFreqGrad]
OR
[StartFreqGrad>0
AND
df/dt > StartFreqGrad]
Then
START
Comparator
U < IntBlockLevel
Comparator
f > RestoreFreq
OR
Time integrator
Definite Time Delay
TimeDlyOperate
TimeDlyReset
TimeDlyRestore
BLKDMAGN
Rate-of-Change
of Frequency
BLOCK
BLKTRIP
BLKRESET
IEC05000835 V1 EN
Figure 222: Schematic design of Rate-of-change frequency protection SAPFRC
404
SAPFRC
U3P*
BLOCK
BLKTRIP
BLKREST
TRIP
START
RESTORE
BLKDMAGN
IEC06000281 V2 EN
Figure 223: SAPFRC function block
Table 242: SAPFRC Input signals
U3P GROUP
SIGNAL
BLKREST BOOLEAN 0 Blocking restore output.
Table 243: SAPFRC Output signals
TRIP BOOLEAN Operate/trip signal for frequencyGradient
START BOOLEAN Start/pick-up signal for frequencyGradient
RESTORE BOOLEAN Restore signal for load restoring purposes.
Table 244: SAPFRC Group settings (basic)
Operation Off
On
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for the phase-phase voltage
in kV
StartFreqGrad -10.00 - 10.00 Hz/s 0.01 0.50 Frequency gradient start value. Sign
defines direction.
tTrip 0.000 - 60.000 s 0.001 0.200 Operate time delay in pos./neg.
frequency gradient mode.
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency if frequency is above
frequency value (Hz)
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay.
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
405
Table 245: SAPFRC Technical data
Operate value, start function (-10.00-10.00) Hz/s 10.0 mHz/s
Operate value, internal
blocking level
(0-100)% of UBase 1.0% of U
r
406
Section 10 Multipurpose protection
About this chapter
This chapter describes Multipurpose protection and includes the General current
and voltage function. The way the functions work, their setting parameters,
function blocks, input and output signals and technical data are included for each
function.
10.1 General current and voltage protection CVGAPC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
General current and voltage protection CVGAPC - -
10.1.1 Introduction
The General current and voltage protection (CVGAPC) can be utilized as a
negative sequence current protection detecting unsymmetrical conditions such as
open phase or unsymmetrical faults.
CVGAPC can also be used to improve phase selection for high resistive earth
faults, outside the distance protection reach, for the transmission line. Three
functions are used, which measures the neutral current and each of the three phase
voltages. This will give an independence from load currents and this phase
selection will be used in conjunction with the detection of the earth fault from the
directional earth fault protection function.
10.1.2.1 Measured quantities within CVGAPC
General current and voltage protection (CVGAPC) function is always connected to
three-phase current and three-phase voltage input in the configuration tool, but it
will always measure only one current and one voltage quantity selected by the end
user in the setting tool.
The user can select to measure one of the current quantities shown in table 246.
Multipurpose protection
407
Table 246: Current selection for CVGAPC function
Set value for the
parameter
CurrentInput

Comment
1 Phase1 CVGAPC function will measure the phase L1 current phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence
current phasor
5 NegSeq CVGAPC function will measure internally calculated negative
sequence current phasor
6 3ZeroSeq CVGAPC function will measure internally calculated zero sequence
current phasor multiplied by factor 3
7 MaxPh CVGAPC function will measure current phasor of the phase with
maximum magnitude
8 MinPh CVGAPC function will measure current phasor of the phase with
minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance current, which
is internally calculated as the algebraic magnitude difference between
the current phasor of the phase with maximum magnitude and current
phasor of the phase with minimum magnitude. Phase angle will be set
to 0 all the time
10 Phase1-Phase2 CVGAPC function will measure the current phasor internally calculated
as the vector difference between the phase L1 current phasor and
phase L2 current phasor (I
L1
-I
L2
)
phase L3 current phasor (I
L2
-I
L3
)
phase L1 current phasor ( I
L3
-I
L1
)
13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the
maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the
minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which
is internally calculated as the algebraic magnitude difference between
the ph-ph current phasor with maximum magnitude and ph-ph current
phasor with minimum magnitude. Phase angle will be set to 0 all the
time
The user can select to measure one of the voltage quantities shown in table 247:
Table 247: Voltage selection for CVGAPC function
Set value for the
parameter
VoltageInput

Comment
1 Phase1 CVGAPC function will measure the phase L1 voltage phasor
408
Set value for the
parameter
VoltageInput

Comment
voltage phasor
5 -NegSeq CVGAPC function will measure internally calculated negative
sequence voltage phasor. This voltage phasor will be intentionally
rotated for 180 in order to enable easier settings for the directional
feature when used.
6 -3ZeroSeq CVGAPC function will measure internally calculated zero sequence
voltage phasor multiplied by factor 3. This voltage phasor will be
intentionally rotated for 180 in order to enable easier settings for the
directional feature when used.
7 MaxPh CVGAPC function will measure voltage phasor of the phase with
maximum magnitude
8 MinPh CVGAPC function will measure voltage phasor of the phase with
minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance voltage,
which is internally calculated as the algebraic magnitude difference
between the voltage phasor of the phase with maximum magnitude
and voltage phasor of the phase with minimum magnitude. Phase
angle will be set to 0 all the time
10 Phase1-Phase2 CVGAPC function will measure the voltage phasor internally
calculated as the vector difference between the phase L1 voltage
phasor and phase L2 voltage phasor (U
L1
-U
L2
)
phasor and phase L3 voltage phasor (U
L2
-U
L3
)
phasor and phase L1 voltage phasor ( U
L3
-U
L1
)
13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the
maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the
minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage,
which is internally calculated as the algebraic magnitude difference
between the ph-ph voltage phasor with maximum magnitude and ph-
ph voltage phasor with minimum magnitude. Phase angle will be set to
0 all the time
It is important to notice that the voltage selection from table 247 is always
applicable regardless the actual external VT connections. The three-phase VT
inputs can be connected to IED as either three phase-to-ground voltages U
L1
, U
L2
& U
L3
or three phase-to-phase voltages U
L1L2
, U
L2L3
& U
L3L1
). This information
about actual VT connection is entered as a setting parameter for the pre-processing
block, which will then take automatic care about it.
The user can select one of the current quantities shown in table 248 for built-in
current restraint feature:
409
Table 248: Restraint current selection for CVGAPC function
Set value for the
parameter RestrCurr

Comment
current phasor
2 NegSeq CVGAPC function will measure internally calculated negative
sequence current phasor
3 3ZeroSeq CVGAPC function will measure internally calculated zero sequence
current phasor multiplied by factor 3
4 MaxPh CVGAPC function will measure current phasor of the phase with
maximum magnitude
10.1.2.2 Base quantities for CVGAPC function
The parameter settings for the base quantities, which represent the base (100%) for
pickup levels of all measuring stages, shall be entered as setting parameters for
every CVGAPC function.
Base current shall be entered as:
1. rated phase current of the protected object in primary amperes, when the
measured Current Quantity is selected from 1 to 9, as shown in table 246.
2. rated phase current of the protected object in primary amperes multiplied by
3 (1.732 Iphase), when the measured Current Quantity is selected from 10
to 15, as shown in table 246.
Base voltage shall be entered as:
1. rated phase-to-earth voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 247.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 247.
10.1.2.3 Built-in overcurrent protection steps
Two overcurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 246) with the set pickup level. Non-directional overcurrent step will
pickup if the magnitude of the measured current quantity is bigger than this set
level. Reset ratio is settable, with default value of 0.96. However depending on
other enabled built-in features this overcurrent pickup might not cause the
overcurrent step start signal. Start signal will only come if all of the enabled built-
in features in the overcurrent step are fulfilled at the same time.
410
Second harmonic feature
The overcurrent protection step can be restrained by a second harmonic component
in the measured current quantity (see table 246). However it shall be noted that this
feature is not applicable when one of the following measured currents is selected:
PosSeq (positive sequence current)
NegSeq (negative sequence current)
UnbalancePh (unbalance phase current)
UnbalancePh-Ph (unbalance ph-ph current)
This feature will simple prevent overcurrent step start if the second-to-first
harmonic ratio in the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the
relevant phase angle between measured current phasor (see table 246) and
measured voltage phasor (see table 247). In protection terminology it means that
the General currrent and voltage protection (CVGAPC) function can be made
directional by enabling this built-in feature. In that case overcurrent protection step
will only operate if the current flow is in accordance with the set direction
(Forward, which means towards the protected object, or Reverse, which means
from the protected object). For this feature it is of the outmost importance to
understand that the measured voltage phasor (see table 247) and measured current
phasor (see table 246) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in
order to get a proper directional decision. CVGAPC function will NOT do this
automatically. It will just simply use the current and voltage phasors selected by
the end user to check for the directional criteria.
Table 249 gives an overview of the typical choices (but not the only possible ones)
for these two quantities for traditional directional relays.
Table 249: Typical current and voltage choices for directional feature
Set value for the
parameter
CurrentInput
Set value for the
parameter
VoltageInput

Comment
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45 to
-90 depending on the power
NegSeq -NegSeq Directional negative sequence overcurrent function is
obtained. Typical setting for RCADir is from -45 to
-90 depending on the power system voltage level (X/
R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is
obtained. Typical setting for RCADir is from 0 to
-90 depending on the power system earthing (that
is, solidly earthed, earthed via resistor)
411
Set value for the
parameter
CurrentInput
Set value for the
parameter
VoltageInput

Comment
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is
obtained. Typical setting for RCADir is +30 or +45
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase
is obtained. Typical setting for RCADir is +30 or +45
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is
obtained. Typical setting for RCADir is +30 or +45
Unbalance current or voltage measurement shall not be used when the directional
feature is enabled.
Two types of directional measurement principles are available, I & U and
IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool,
checks that:
the magnitude of the measured current is bigger than the set pick-up level
the phasor of the measured current is within the operating region (defined by
the relay operate angle, ROADir parameter setting; see figure 224).
U=-3U0
Ipickup
Operate region
I=3Io
mta line
RCADir
ROADir
en05000252.vsd
IEC05000252 V1 EN
Figure 224: I & U directional operating principle for CVGAPC function
where:
RCADir is -75
ROADir is 50
The second principle, referred to as "IcosPhi&U" in the parameter setting tool,
checks that:
412
that the product Icos() is bigger than the set pick-up level, where is angle
between the current phasor and the mta line
that the phasor of the measured current is within the operating region (defined
by the Icos() straight line and the relay operate angle, ROADir parameter
setting; see figure 224).
U=-3U0
Operate region
RCADir
ROADir Ipickup
I=3Io
mta line
F
en05000253.vsd
IEC05000253 V1 EN
Figure 225: CVGAPC, IcosPhi&U directional operating principle
where:
RCADir is -75
ROADir is 50
Note that it is possible to decide by a parameter setting how the directional feature
shall behave when the magnitude of the measured voltage phasor falls below the pre-
set value. User can select one of the following three options:
Non-directional (operation allowed for low magnitude of the reference voltage)
Block (operation prevented for low magnitude of the reference voltage)
Memory (memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100
ms. After that time the current direction will be locked to the one determined
during memory time and it will re-set only if the current fails below set pickup
level or voltage goes above set voltage memory limit.
Voltage restraint/control feature
The overcurrent protection step operation can be can be made dependent of a
measured voltage quantity (see table 247). Practically then the pickup level of the
overcurrent step is not constant but instead decreases with the decrease in the
magnitude of the measured voltage quantity. Two different types of dependencies
are available:
Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
413
Selected Voltage
Magnitude
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1 ULowLimit_OC1
en05000324.vsd
IEC05000324 V1 EN
Figure 226: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Slope mode of operation
Voltage controlled overcurrent (when setting parameter
VDepMode_OC1=Step)
Selected Voltage Magnitude
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1
en05000323.vsd
IEC05000323 V1 EN
Figure 227: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with
magnitude variations of the measured voltage. It shall be noted that this feature will
as well affect the pickup current value for calculation of operate times for IDMT
414
curves (overcurrent with IDMT curve will operate faster during low voltage
conditions).
Current restraint feature
The overcurrent protection step operation can be made dependent of a restraining
current quantity (see table 248). Practically then the pickup level of the overcurrent
step is not constant but instead increases with the increase in the magnitude of the
restraining current.
IsetHigh
IsetLow
I
Measured
Restraint
atan(RestrCoeff)
en05000255.vsd
O
p
e
r
a
t
e

a
r
e
a
I
>
R
e
s
t
r
C
o
e
f
f
*
I
r
e
s
t
r
a
i
n
IEC05000255 V1 EN
Figure 228: Current pickup variation with restraint current magnitude
This feature will simply prevent overcurrent step to start if the magnitude of the
measured current quantity is smaller than the set percentage of the restrain current
magnitude. However this feature will not affect the pickup current value for
calculation of operate times for IDMT curves. This means that the IDMT curve
operate time will not be influenced by the restrain current magnitude.
When set, the start signal will start definite time delay or inverse (IDMT) time
delay in accordance with the end user setting. If the start signal has value one for
longer time than the set time delay, the overcurrent step will set its trip signal to
one. Reset of the start and trip signal can be instantaneous or time delay in
accordance with the end user setting.
10.1.2.4 Built-in undercurrent protection steps
Two undercurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here. Undercurrent step simply compares the
magnitude of the measured current quantity (see table 246) with the set pickup
level. The undercurrent step will pickup and set its start signal to one if the
magnitude of the measured current quantity is smaller than this set level. The start
signal will start definite time delay with set time delay. If the start signal has value
one for longer time than the set time delay the undercurrent step will set its trip
415
signal to one. Reset of the start and trip signal can be instantaneous or time delay in
accordance with the setting.
10.1.2.5 Built-in overvoltage protection steps
Two overvoltage protection steps are available. They are absolutely identical and
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 247) with the set pickup level. The overvoltage step will pickup if the
magnitude of the measured voltage quantity is bigger than this set level. Reset ratio
is settable, with default value of 0.99.
The start signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer
time than the set time delay, the overvoltage step will set its trip signal to one.
Reset of the start and trip signal can be instantaneous or time delay in accordance
with the end user setting.
10.1.2.6 Built-in undervoltage protection steps
Two undervoltage protection steps are available. They are absolutely identical and
Undervoltage step simply compares the magnitude of the measured voltage
quantity (see table 247) with the set pickup level. The undervoltage step will
pickup if the magnitude of the measured voltage quantity is smaller than this set
level. Reset ratio is settable, with default value of 1.01.
The start signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer
time than the set time delay, the undervoltage step will set its trip signal to one.
Reset of the start and trip signal can be instantaneous or time delay in accordance
with the end user setting.
The simplified internal logics, for CVGAPC function are shown in the following
figures.
416
ADM
A
/
D

c
o
n
v
e
r
s
i
o
n

s
c
a
l
i
n
g

w
i
t
h

C
T

r
a
t
i
o
A
/
D

c
o
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v
e
r
s
i
o
n

s
c
a
l
i
n
g

w
i
t
h

C
T

r
a
t
i
o
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h
a
s
o
r

c
a
l
c
u
l
a
t
i
o
n

o
f

i
n
d
i
v
i
d
u
a
l

c
u
r
r
e
n
t
s
P
h
a
s
o
r

c
a
l
c
u
l
a
t
i
o
n

o
f

i
n
d
i
v
i
d
u
a
l

v
o
l
t
a
g
e
s
CVGAPC function
IED
P
h
a
s
o
r
s

&

s
a
m
p
l
e
s
P
h
a
s
o
r
s

&

s
a
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p
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e
s
Current and voltage selection
settings
Selection of which current
and voltage shall be given to
the built-in protection
elements
Restraint current selection
Selection of restraint current
Selected current
Selected voltage
Selected restraint current
IEC05000169 V2 EN
Figure 229: Treatment of measured currents within IED for CVGAPC function
Figure 229 shows how internal treatment of measured currents is done for
multipurpose protection function
The following currents and voltages are inputs to the multipurpose protection
function. They must all be expressed in true power system (primary) Amperes and
kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase
current and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-
phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-
phase voltage input calculated by the pre-processing modules.
The multipurpose protection function:
1. Selects one current from the three-phase input system (see table 246) for
internally measured current.
2. Selects one voltage from the three-phase input system (see table 247) for
internally measured voltage.
3. Selects one current from the three-phase input system (see table 248) for
internally measured restraint current.
417
UC2
UC1
CURRENT
TRUC1
STUC2
TRUC2
STOC1
BLK2ND
STOC2
TROC2
OV1
STOV1
TROV1
OV2
STOV2
TROV2
UV1
STUV1
TRUV1
UV2
STUV2
TRUV2
Selected current
Selected restraint current
en05000170.vsd
Selected voltage
1
1
UDIRLOW
TROC1
OC1
2
nd
Harmonic
restraint
Current restraint
Directionality
Voltage control /
restraint
OC2
2
nd
Harmonic
restraint
Current restraint
Directionality
Voltage control /
restraint
DIROC2
DIROC1
2
nd
Harmonic
restraint
2
nd
Harmonic
restraint
VOLTAGE
IEC05000170 V1 EN
Figure 230: CVGAPC function main logic diagram for built-in protection elements
418
Logic in figure 230 can be summarized as follows:
1. The selected currents and voltage are given to built-in protection elements.
Each protection element and step makes independent decision about status of
its START and TRIP output signals.
2. More detailed internal logic for every protection element is given in the
following four figures
3. Common START and TRIP signals from all built-in protection elements &
steps (internal OR logic) are available from multipurpose function as well.
1
Second
harmonic check
Selected voltage
X
StartCurr_OC1
a
b
a>b
Voltage
control or
restraint
feature
OC1=On
BLKOC1
Directionality
check
Current
Restraint
Feature
I
measured
> k I
restraint
DIR_OK
Inverse
DEF
DEF time
selected
Inverse
time
selected
OR
Enable
second
harmonic
en05000831.vsd
Selected current
STOC1
TROC1
AND
BLKTROC
1
Selected restrain current
AND
IEC05000831 V1 EN
Figure 231: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the
same internal logic)
419
a
b
b>a
Selected current
StartCurr_UC1
Operation_UC1=On
Bin input: BLKUC1
STUC1
en05000750.vsd
TRUC1
Bin input: BLKUC1TR
DEF
AND
AND
IEC05000750 V1 EN
Figure 232: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has
the same internal logic)
a
b
a>b
Selected voltage
StartVolt_OV1
Operation_OV1=On
BLKOV1
Inverse time
selected
en05000751.vsd
Inverse
DEF
DEF time
selected
STOV1
TROV1
AND
BLKTROV1
AND
OR
IEC05000751 V1 EN
Figure 233: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)
420
AND
a
b
b>a
Selected voltage
StartVolt_UV1
Operation_UV1=On
BLKUV1
Inverse time
selected
en05000752.vsd
Inverse
DEF
DEF time
selected
OR
STUV1
TRUV1
AND
BLKTRUV
1
IEC05000752 V1 EN
Figure 234: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same
internal logic)
CVGAPC
I3P*
U3P*
BLOCK
BLKOC1
BLKOC1TR
ENMLTOC1
BLKOC2
BLKOC2TR
ENMLTOC2
BLKUC1
BLKUC1TR
BLKUC2
BLKUC2TR
BLKOV1
BLKOV1TR
BLKOV2
BLKOV2TR
BLKUV1
BLKUV1TR
BLKUV2
BLKUV2TR
TRIP
TROC1
TROC2
TRUC1
TRUC2
TROV1
TROV2
TRUV1
TRUV2
START
STOC1
STOC2
STUC1
STUC2
STOV1
STOV2
STUV1
STUV2
BLK2ND
DIROC1
DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
IEC05000372 V2 EN
Figure 235: CVGAPC function block
421
Table 250: CVGAPC Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
BLKOC1 BOOLEAN 0 Block of over current function OC1
BLKOC1TR BOOLEAN 0 Block of trip for over current function OC1
ENMLTOC1 BOOLEAN 0 When activated, the current multiplier is in use for
OC1
BLKOC2 BOOLEAN 0 Block of over current function OC2
BLKOC2TR BOOLEAN 0 Block of trip for over current function OC2
ENMLTOC2 BOOLEAN 0 When activated, the current multiplier is in use for
OC2
BLKUC1 BOOLEAN 0 Block of under current function UC1
BLKUC1TR BOOLEAN 0 Block of trip for under current function UC1
BLKUC2 BOOLEAN 0 Block of under current function UC2
BLKUC2TR BOOLEAN 0 Block of trip for under current function UC2
BLKOV1 BOOLEAN 0 Block of over voltage function OV1
BLKOV1TR BOOLEAN 0 Block of trip for over voltage function OV1
BLKOV2 BOOLEAN 0 Block of over voltage function OV2
BLKOV2TR BOOLEAN 0 Block of trip for over voltage function OV2
BLKUV1 BOOLEAN 0 Block of under voltage function UV1
BLKUV1TR BOOLEAN 0 Block of trip for under voltage function UV1
BLKUV2 BOOLEAN 0 Block of under voltage function UV2
BLKUV2TR BOOLEAN 0 Block of trip for under voltage function UV2
Table 251: CVGAPC Output signals
TRIP BOOLEAN General trip signal
TROC1 BOOLEAN Trip signal from overcurrent function OC1
TROC2 BOOLEAN Trip signal from overcurrent function OC2
TRUC1 BOOLEAN Trip signal from undercurrent function UC1
TRUC2 BOOLEAN Trip signal from undercurrent function UC2
TROV1 BOOLEAN Trip signal from overvoltage function OV1
TROV2 BOOLEAN Trip signal from overvoltage function OV2
TRUV1 BOOLEAN Trip signal from undervoltage function UV1
TRUV2 BOOLEAN Trip signal from undervoltage function UV2
422
STOC1 BOOLEAN Start signal from overcurrent function OC1
STOC2 BOOLEAN Start signal from overcurrent function OC2
STUC1 BOOLEAN Start signal from undercurrent function UC1
STUC2 BOOLEAN Start signal from undercurrent function UC2
STOV1 BOOLEAN Start signal from overvoltage function OV1
STOV2 BOOLEAN Start signal from overvoltage function OV2
STUV1 BOOLEAN Start signal from undervoltage function UV1
STUV2 BOOLEAN Start signal from undervoltage function UV2
BLK2ND BOOLEAN Block from second harmonic detection
DIROC1 INTEGER Directional mode of OC1 (nondir, forward,reverse)
DIROC2 INTEGER Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW BOOLEAN Low voltage for directional polarization
CURRENT REAL Measured current value
ICOSFI REAL Measured current multiplied with cos (Phi)
VOLTAGE REAL Measured voltage value
UIANGLE REAL Angle between voltage and current
Table 252: CVGAPC Group settings (basic)
Operation Off
On
CurrentInput phase1
phase2
phase3
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
- - MaxPh Select current signal which will be
measured inside function
IBase 1 - 99999 A 1 3000 Base Current
423
VoltageInput phase1
phase2
phase3
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
- - MaxPh Select voltage signal which will be
measured inside function
OperHarmRestr Off
On
- - Off Operation of 2nd harmonic restrain Off /
On
l_2nd/l_fund 10.0 - 50.0 % 1.0 20.0 Ratio of second to fundamental current
harmonic in %
BlkLevel2nd 10 - 5000 %IB 1 5000 Harm analyse disabled above this
current level in % of Ibase
EnRestrainCurr Off
On
- - Off Enable current restrain function On / Off
RestrCurrInput PosSeq
NegSeq
3*ZeroSeq
Max
- - PosSeq Select current signal which will be used
for curr restrain
RestrCurrCoeff 0.00 - 5.00 - 0.01 0.00 Restraining current coefficient
RCADir -180 - 180 Deg 1 -75 Relay Characteristic Angle
ROADir 1 - 90 Deg 1 75 Relay Operate Angle
LowVolt_VM 0.0 - 5.0 %UB 0.1 0.5 Below this level in % of Ubase setting
ActLowVolt takes over
Operation_OC1 Off
On
- - Off Operation OC1 Off / On
StartCurr_OC1 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC1 in % of
Ibase
CurveType_OC1 ANSI Ext. inv.
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
- - ANSI Def. Time Selection of time delay curve type for OC1
424
tDef_OC1 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of
OC1
k_OC1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC1
tMin_OC1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC1
VCntrlMode_OC1 Voltage control
Input control
Volt/Input control
Off
- - Off Control mode for voltage controlled OC1
function
VDepMode_OC1 Step
Slope
- - Step Voltage dependent mode OC1 (step,
slope)
VDepFact_OC1 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC1
is U dependent
ULowLimit_OC1 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC1 in % of
Ubase
UHighLimit_OC1 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC1 in % of
Ubase
HarmRestr_OC1 Off
On
- - Off Enable block of OC1 by 2nd harmonic
restrain
DirMode_OC1 Non-directional
Forward
Reverse
- - Non-directional Directional mode of OC1 (nondir,
forward,reverse)
DirPrinc_OC1 I&U
IcosPhi&U
- - I&U Measuring on IandU or IcosPhiandU for
OC1
ActLowVolt1_VM Non-directional
Block
Memory
- - Non-directional Low voltage level action for Dir_OC1
(Nodir, Blk, Mem)
Operation_OC2 Off
On
- - Off Operation OC2 Off / On
StartCurr_OC2 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC2 in % of
Ibase
CurveType_OC2 ANSI Ext. inv.
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
- - ANSI Def. Time Selection of time delay curve type for OC2
tDef_OC2 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of
OC2
k_OC2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC2
425
tMin_OC2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC2
VCntrlMode_OC2 Voltage control
Input control
Volt/Input control
Off
- - Off Control mode for voltage controlled OC2
function
VDepMode_OC2 Step
Slope
- - Step Voltage dependent mode OC2 (step,
slope)
VDepFact_OC2 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC2
is U dependent
ULowLimit_OC2 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC2 in % of
Ubase
UHighLimit_OC2 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC2 in % of
Ubase
HarmRestr_OC2 Off
On
- - Off Enable block of OC2 by 2nd harmonic
restrain
DirMode_OC2 Non-directional
Forward
Reverse
- - Non-directional Directional mode of OC2 (nondir,
forward,reverse)
DirPrinc_OC2 I&U
IcosPhi&U
- - I&U Measuring on IandU or IcosPhiandU for
OC2
ActLowVolt2_VM Non-directional
Block
Memory
- - Non-directional Low voltage level action for Dir_OC2
(Nodir, Blk, Mem)
Operation_UC1 Off
On
- - Off Operation UC1 Off / On
EnBlkLowI_UC1 Off
On
- - Off Enable internal low current level blocking
for UC1
BlkLowCurr_UC1 0 - 150 %IB 1 20 Internal low current blocking level for
UC1 in % of Ibase
StartCurr_UC1 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC1 in %
of Ibase
tDef_UC1 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of UC1
tResetDef_UC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC1
HarmRestr_UC1 Off
On
- - Off Enable block of UC1 by 2nd harmonic
restrain
Operation_UC2 Off
On
- - Off Operation UC2 Off / On
EnBlkLowI_UC2 Off
On
- - Off Enable internal low current level blocking
for UC2
BlkLowCurr_UC2 0 - 150 %IB 1 20 Internal low current blocking level for
UC2 in % of Ibase
StartCurr_UC2 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC2 in %
of Ibase
tDef_UC2 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of UC2
HarmRestr_UC2 Off
On
- - Off Enable block of UC2 by 2nd harmonic
restrain
Operation_OV1 Off
On
- - Off Operation OV1 Off / On
426
StartVolt_OV1 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV1 in % of
Ubase
CurveType_OV1 Definite time
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
- - Definite time Selection of time delay curve type for OV1
tDef_OV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV1
tMin_OV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV1
k_OV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV1
Operation_OV2 Off
On
- - Off Operation OV2 Off / On
StartVolt_OV2 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV2 in % of
Ubase
CurveType_OV2 Definite time
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
- - Definite time Selection of time delay curve type for OV2
tDef_OV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV2
tMin_OV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV2
k_OV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV2
Operation_UV1 Off
On
- - Off Operation UV1 Off / On
StartVolt_UV1 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV1 in %
of Ubase
CurveType_UV1 Definite time
Inverse curve A
Inverse curve B
Prog. inv. curve
- - Definite time Selection of time delay curve type for UV1
tDef_UV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV1
tMin_UV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV1
k_UV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV1
EnBlkLowV_UV1 Off
On
- - On Enable internal low voltage level
blocking for UV1
BlkLowVolt_UV1 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV1 in % of Ubase
Operation_UV2 Off
On
- - Off Operation UV2 Off / On
StartVolt_UV2 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV2 in %
of Ubase
427
CurveType_UV2 Definite time
Inverse curve A
Inverse curve B
Prog. inv. curve
- - Definite time Selection of time delay curve type for UV2
tDef_UV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV2
tMin_UV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV2
k_UV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV2
EnBlkLowV_UV2 Off
On
- - On Enable internal low voltage level
blocking for UV2
BlkLowVolt_UV2 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV2 in % of Ubase
Table 253: CVGAPC Group settings (advanced)
CurrMult_OC1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC1
ResCrvType_OC1 Instantaneous
IEC Reset
ANSI reset
- - Instantaneous Selection of reset curve type for OC1
tResetDef_OC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC1
P_OC1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC1
A_OC1 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC1
B_OC1 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC1
C_OC1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OC1
PR_OC1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC1 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
CurrMult_OC2 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC2
ResCrvType_OC2 Instantaneous
IEC Reset
ANSI reset
- - Instantaneous Selection of reset curve type for OC2
tResetDef_OC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC2
P_OC2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC2
A_OC2 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC2
428
B_OC2 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC2
C_OC2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
PR_OC2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC2 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
tResetDef_UC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC2
ResCrvType_OV1 Instantaneous
Frozen timer
Linearly decreased
- - Instantaneous Selection of reset curve type for OV1
tResetDef_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV1
tResetIDMT_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for OV1
A_OV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV1
B_OV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV1
C_OV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OV1
D_OV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_OV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV1
ResCrvType_OV2 Instantaneous
Frozen timer
Linearly decreased
- - Instantaneous Selection of reset curve type for OV2
tResetDef_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV2
tResetIDMT_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for OV2
A_OV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV2
B_OV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV2
C_OV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_OV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_OV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV2
ResCrvType_UV1 Instantaneous
Frozen timer
Linearly decreased
- - Instantaneous Selection of reset curve type for UV1
429
tResetDef_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV1
tResetIDMT_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for UV1
A_UV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV1
B_UV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV1
C_UV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for UV1
D_UV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV1
ResCrvType_UV2 Instantaneous
Frozen timer
Linearly decreased
- - Instantaneous Selection of reset curve type for UV2
tResetDef_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV2
tResetIDMT_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for UV2
A_UV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV2
B_UV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV2
C_UV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_UV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV2
Table 254: CVGAPC technical data
Measuring current
input
phase1, phase2, phase3, PosSeq,
NegSeq, 3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, phase1-phase2, phase2-
phase3, phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
-
Base current (1 - 99999) A -
Measuring voltage
input
phase1, phase2, phase3, PosSeq, -
NegSeq, -3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, phase1-phase2, phase2-
phase3, phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
-
Base voltage (0.05 - 2000.00) kV -
430
Start overcurrent,
step 1 and 2
(2 - 5000)% of IBase 1.0% of I
r
for II
r
Start undercurrent,
step 1 and 2
(2 - 150)% of IBase 1.0% of I
r
for II
r
Definite time delay (0.00 - 6000.00) s 0.5% 10 ms
Operate time start
overcurrent
set
-
Reset time start
overcurrent
set
-
Operate time start
undercurrent
set
-
Reset time start
undercurrent
set
-
See table 619 and
table 620
Parameter ranges for customer defined
characteristic no 17:
k: 0.05 - 999.00
A: 0.0000 - 999.0000
B: 0.0000 - 99.0000
C: 0.0000 - 1.0000
P: 0.0001 - 10.0000
PR: 0.005 - 3.000
TR: 0.005 - 600.000
CR: 0.1 - 10.0
See table 619 and table 620
Voltage level where
voltage memory
takes over
(0.0 - 5.0)% of UBase 1.0% of U
r
Start overvoltage,
step 1 and 2
(2.0 - 200.0)% of UBase 1.0% of U
r
for UU
r
Start undervoltage,
step 1 and 2
(2.0 - 150.0)% of UBase 1.0% of U
r
for UU
r
Operate time, start
overvoltage
set
-
Reset time, start
overvoltage
set
-
Operate time start
undervoltage
25 ms typically 2 to 0 x U
set
-
Reset time start
undervoltage
set
-
High and low voltage
limit, voltage
dependent operation
(1.0 - 200.0)% of UBase 1.0% of U
r
for UU
r
Directional function Settable: NonDir, forward and reverse -
Relay characteristic
angle
(-180 to +180) degrees 2.0 degrees
Relay operate angle (1 to 90) degrees 2.0 degrees
Reset ratio,
overcurrent
> 95% -
Reset ratio,
undercurrent
< 105% -
431
Reset ratio,
overvoltage
> 95% -
Reset ratio,
undervoltage
< 105% -
Overcurrent:
set
-
Undercurrent:
set
-
Overvoltage:
set
-
Undervoltage:
set
-
432
Section 11 Secondary system supervision
About this chapter
This chapter describes functions like Current circuit supervision and Fuse failure
supervision. The way the functions work, their setting parameters, function blocks,
input and output signals and technical data are included for each function.
11.1 Current circuit supervision CCSRDIF
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Current circuit supervision CCSRDIF - 87
11.1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of
many protection functions such as differential, earth-fault current and negative-
sequence current functions.
It must be remembered that a blocking of protection functions at an occurrence of
open CT circuit will mean that the situation will remain and extremely high
voltages will stress the secondary circuit.
Current circuit supervision (CCSRDIF) compares the residual current from a three
phase set of current transformer cores with the neutral point current on a separate
input taken from another set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to
block protection functions expected to give unwanted tripping.
Current circuit supervision CCSRDIF compares the absolute value of the vectorial
sum of the three phase currents |Iphase| and the numerical value of the residual
current |Iref| from another current transformer set, see figure 236.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
Secondary system supervision
433
The numerical value of the difference |Iphase| |Iref| is higher than 80% of
the numerical value of the sum |Iphase| + |Iref|.
The numerical value of the current |Iphase| |Iref| is equal to or higher than
the set operate value IMinOp.
No phase current has exceeded Ip>Block during the last 10 ms.
CCSRDIF is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being
activated for more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM
will be issued. In this case the FAIL and ALARM will remain activated 1 s after
the AND-gate resets. This prevents unwanted resetting of the blocking function
when phase current supervision element(s) operate, for example, during a fault.
IEC05000463 V1 EN
Figure 236: Simplified logic diagram for Current circuit supervision CCSRDIF
The operate characteristic is percentage restrained, see figure 237.
434
Slope = 0.8
Slope = 1
Operation
area
I
MinOp
99000068.vsd
phase ref
| I | - | I |
phase ref
| I | + | I |
IEC99000068 V1 EN
Figure 237: Operate characteristics
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S
I phase | + | I ref | respectively, the slope can not be above 2.
CCSRDIF
I3P*
IREF*
BLOCK
FAIL
ALARM
IEC05000389 V2 EN
Figure 238: CCSRDIF function block
Table 255: CCSRDIF Input signals
I3P GROUP
SIGNAL
- Group signal for three phase current input
IREF GROUP
SIGNAL
- TBD
435
Table 256: CCSRDIF Output signals
FAIL BOOLEAN Detection of current circuit failure
ALARM BOOLEAN Alarm for current circuit failure
Table 257: CCSRDIF Group settings (basic)
Operation Off
On
IBase 1 - 99999 A 1 3000 IBase value for current level detectors
IMinOp 5 - 200 %IB 1 20 Minimum operate current differential
level in % of IBase
Table 258: CCSRDIF Group settings (advanced)
Ip>Block 5 - 500 %IB 1 150 Block of the function at high phase
current, in % of IBase
Table 259: CCSRDIF technical data
Operate current (5-200)% of I
r
10.0% of I
r
at I I
r
10.0% of I at I > I
r
Block current (5-500)% of I
r
5.0% of I
r
at I I
r
5.0% of I at I > I
r
11.2 Fuse failure supervision SDDRFUF
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Fuse failure supervision SDDRFUF - -
11.2.1 Introduction
The aim of the fuse failure supervision function (SDDRFUF) is to block voltage
measuring functions at failures in the secondary circuits between the voltage
436
transformer and the IED in order to avoid unwanted operations that otherwise
might occur.
The fuse failure supervision function basically has two different algorithms,
negative sequence and zero sequence based algorithm and an additional delta
voltage and delta current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in
isolated or high-impedance earthed networks. It is based on the negative-sequence
measuring quantities, a high value of voltage 3U
2
without the presence of the
negative-sequence current 3I
2
.
The zero sequence detection algorithm is recommended for IEDs used in directly
or low impedance earthed networks. It is based on the zero sequence measuring
quantities, a high value of voltage 3U
0
without the presence of the residual current
3I
0
.
A criterion based on delta current and delta voltage measurements can be added to
the fuse failure supervision function in order to detect a three phase fuse failure,
which in practice is more associated with voltage transformer switching during
station operations.
For better adaptation to system requirements, an operation mode setting has been
introduced which makes it possible to select the operating conditions for negative
sequence and zero sequence based function. The selection of different operation
modes makes it possible to choose different interaction possibilities between the
negative sequence and zero sequence based algorithm.
11.2.2.1 Zero and negative sequence detection
The zero and negative sequence function continuously measures the currents and
voltages in all three phases and calculates, see figure 239:
the zero-sequence voltage 3U
0
the zero-sequence current 3I
0
the negative sequence current 3I
2
the negative sequence voltage 3U
2
The measured signals are compared with their respective set values 3U0< and
3I0>, 3U2< and 3I2>.
The function enable the internal signal FuseFailDetZeroSeq if the measured zero-
sequence voltage is higher than the set value 3U0> and the measured zero-
sequence current is below the set value 3I0<.
437
The function enable the internal signal FuseFailDetNegSeq if the measured
negative sequence voltage is higher than the set value 3U2> and the measured
negative sequence current is below the set value 3I2<.
A drop off delay of 100 ms for the measured zero-sequence and negative sequence
current will prevent a false fuse failure detection at un-equal breaker opening at the
two line ends.
IL1
IL2
IL3
Zero
sequence
filter
Negative
sequence
filter
UL1
UL2
UL3
Zero
sequence
filter
Negative
sequence
filter
CurrZeroSeq
CurrNegSeq
a
b
a>b
a
b
a>b
a
b
a>b
a
b
a>b
3I0<
3I2<
t
100 ms
t
100 ms
VoltZeroSeq
VoltNegSeq
AND
AND
FuseFailDetZeroSeq
FuseFailDetNegSeq
Sequence Detection
3U0>
3U2>
3I0
3I2
3U0
3U2
IEC10000036 V1 EN
Figure 239: Simplified logic diagram for sequence detection part
The calculated values 3U
0
, 3I
0
, 3I
2
and 3U
2
are available as service values on local
HMI and monitoring tool in PCM600.
Input and output signals
The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions:
The input BLOCK is activated
The input BLKTRIP is activated at the same time as the internal signal
fufailStarted is not present
The operation mode selector OpMode is set to Off.
The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to
other internal functions of the IED itself in order to receive a block command from
438
internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The input BLKSP is intended to be connected to the trip output at any of the
protection functions included in the IED. When activated for more than 20 ms, the
operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to
increase the security against unwanted operations during the opening of the
breaker, which might cause unbalance conditions for which the fuse failure might
operate.
The output signal BLKZ will also be blocked if the internal dead line detection is
activated. The block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT
secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in
order to block all the voltage related functions when the MCB is open independent
of the setting of OpMode selector. The additional drop-off timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of
voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the
output signal BLKU in order to block the voltage related functions when the line
disconnector is open. The impedance protection function is not affected by the
position of the line disconnector since there will be no line currents that can cause
maloperation of the distance protection. If DISCPOS=0 it signifies that the line is
connected to the system and when the DISCPOS=1 it signifies that the line is
disconnected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions
(undervoltage protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection
function.
The BLKZ will only be activated if not the internal dead line detection is activated
at the same time.
The fuse failure condition is unlatched when the normal voltage conditions are
restored.
When the output 3PH is activated, all three voltage are low.
11.2.2.2 Delta current and delta voltage detection
A simplified diagram for the functionality is found in figure 240. The calculation of
the change is based on vector change which means that it detects both amplitude
and phase angle changes. The calculated delta quantities are compared with their
439
respective set values DI< and DU> and the algorithm, detects a fuse failure if a
sufficient change in voltage without a sufficient change in current is detected in
each phase separately. The following quantities are calculated in all three phases:
The change in voltage DU
The change in current DI
The internal FuseFailDetDUDI signal is activated if the following conditions are
fulfilled for a phase:
The magnitude of the phase-ground voltage has been above UPh> for more
than 1.5 cycle
The magnitude of DU is higher than the corresponding setting DU>
The magnitude of DI is below the setting DI>
and at least one of the following conditions are fulfilled:
The magnitude of the phase current in the same phase is higher than the setting
IPh>
The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in one phase together with high
current for the same phase will set the output. The measured phase current is used
to reduce the risk of false fuse failure detection. If the current on the protected line
is low, a voltage drop in the system (not caused by fuse failure) is not by certain
followed by current change and a false fuse failure might occur
The second criterion requires that the delta condition shall be fulfilled in any phase
at the same time as circuit breaker is closed. Opening circuit breaker at one end and
energizing the line from other end onto a fault could lead to wrong start of the fuse
failure function at the end with the open breaker. If this is considering to be an
important disadvantage, connect the CBCLOSED input to FALSE. In this way
only the first criterion can activate the delta function.
440
IL1
|DI|
a
b
a>b
DI<
One cycle
delay
UL1
a
b
a>b
One cycle
delay
DU>
|DU|
a
b
a>b t
20 ms
t
1.5 cycle
AND
DUDI detection Phase 1
UPh>
Same logic as for phase 1
IL2
UL2
Same logic as for phase 1
IL3
UL3
a
b
ab
IPh> AND
AND CBCLOSED
OR
OR
AND
a
b
ab
AND
AND
OR
OR
AND
a
b
ab
AND
AND
OR
OR
AND
OR
FuseFailDetDUDI
DUDI Detection
IEC10000034 V1 EN
Figure 240: Simplified logic diagram for DU/DI detection part
441
11.2.2.3 Dead line detection
A simplified diagram for the functionality is found in figure 241. A dead phase
condition is indicated if both the voltage and the current in one phase is below their
respective setting values UDLD< and IDLD<. If at least one phase is considered to
be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated.
If all three phases are considered to be dead the output DLD3PH is activated
IL1
IL2
IL3
a
b
a<b
a
b
a<b
a
b
a<b
IDLD<
UL1
UL2
UL3
a
b
a<b
a
b
a<b
a
b
a<b
UDLD<
OR
AND
AND
AND
AND
AND
AND
AND
AllCurrLow
DeadLineDet1Ph
DLD3PH
DLD1PH
intBlock
Dead Line Detection
IEC10000035 V1 EN
Figure 241: Simplified logic diagram for Dead Line detection part
11.2.2.4 Main logic
A simplified diagram for the functionality is found in figure 242. The fuse failure
supervision function (SDDRFUF) can be switched on or off by the setting
parameter Operation to On or Off.
For increased flexibility and adaptation to system requirements an operation mode
selector, OpMode, has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithms. The
different operation modes are:
Off; The negative and zero sequence function is switched off
UNsINs; Negative sequence is selected
UZsIZs; Zero sequence is selected
442
UZsIZsORUNsINs; Both negative and zero sequence is activated and working
in parallel in an OR-condition
UZsIZs AND UNsINs; Both negative and zero sequence is activated and
working in series (AND-condition for operation)
OptimZsNs; Optimum of negative and zero sequence (the function that has the
highest magnitude of measured negative and zero sequence current will be
activated)
The delta function can be activated by setting the parameter OpDUDI to On. When
selected it operates in parallel with the sequence based algorithms.
As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq,
FuseFailDetNegSeq or FuseFailDetDUDI, and the specific functionality is
released, the function will activate the output signal BLKU. The output signal
BLKZ will be activated as well if not the internal dead phase detection,
DeadLineDet1Ph, is activated at the same time. The output BLKU can be used for
blocking voltage related measuring functions (under voltage protection, synchro-
check, and so on). For blocking of impedance protection functions output BLKZ
shall be used.
If the fuse failure situation is present for more than 5 seconds and the setting
parameter SealIn is set to On it will be sealed in over under-voltage as long as at
least one phase voltages is below the set value USealIn<. This will keep the BLKU
and BLKZ signals activated as long as any phase voltage is below the set value
USealIn<. If all three phase voltages drop below the set value USealIn< and the
setting parameter SealIn is set to On also the output signal 3PH will be activated.
The signals 3PH, BLKU and BLKZ signals will now be active as long as any phase
voltage is below the set value USealIn<.
If SealIn is set to On fuse failure condition is stored in the non volatile memory in
the IED. At start-up (due to auxiliary power interruption or re-start due to
configuration change) the IED checks the stored value in its non volatile memory
and re-establishes the conditions present before the shut down. All phase voltages
must became above USealIn< before fuse failure is de-activated and inhibits the
block of different protection functions.
The output signal BLKU will also be active if all phase voltages have been above
the setting USealIn< for more than 60 seconds, the zero or negative sequence
voltage has been above the set value 3U0> and 3U2> for more than 5 seconds, all
phase currents are below the setting IDLD< (operate level for dead line detection)
and the circuit breaker is closed (input CBCLOSED is activated).
The input signal MCBOP is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT
secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in
order to block all the voltage related functions when the MCB is open independent
of the setting of OpMode or OpDUDI. An additional drop-out timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of
443
voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the
output signal BLKU in order to block the voltage related functions when the line
disconnector is open. The impedance protection function does not have to be
affected since there will be no line currents that can cause malfunction of the
distance protection.
The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and
DLD3PH from dead line detections are blocked if any of the following conditions
occur:
The operation mode selector OpMode is set to Off
The input BLOCK is activated
The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to
other internal functions of the IED. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The input BLKTRIP is intended to be connected to the trip output of any of the
protection functions included in the IED and/or trip from external equipments via
binary inputs. When activated for more than 20 ms without any fuse fail detected,
the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim
is to increase the security against unwanted operations during the opening of the
breaker, which might cause unbalance conditions for which the fuse failure might
operate.
444
SealIn = On
All UL < USealIn<
Any UL < UsealIn<
t
5 s
AND
3PH
MCBOP
All UL > UsealIn< t
60 sec
CBCLOSED
BLOCK
AND
TEST
TEST ACTIVE
AND
BlocFuse = Yes
OpMode
AND
t
200 ms
AND
OR
DISCPOS
BLKU
BLKZ
AND
AND
FuseFailDetZeroSeq
UZsIZs OR UNsINs
UZsIZs AND UNsINs
UZsIZs
UNsINs
OptimZsNs
AND
FuseFailDetNegSeq
OR
AND
AND
CurrZeroSeq
CurrNegSeq
a
b
a>b
OR
AND
AND
AND
FuseFailDetDUDI
AND
OpDUDI = On
DeadLineDet1Ph
OR
OR
OR
OR
AND
VoltZeroSeq
VoltNegSeq
OR
t
5 sec
AllCurrLow
t
150 ms
intBlock
Fuse failure detection
Main logic
BLKTRIP
AND t
100 ms
OR
t
20 ms
OR
IEC10000033 V1 EN
Figure 242: Simplified logic diagram for fuse failure supervision function, Main
logic
445
SDDRFUF
I3P*
U3P*
BLOCK
CBCLOSED
MCBOP
DISCPOS
BLKTRIP
BLKZ
BLKU
3PH
DLD1PH
DLD3PH
IEC05000700 V3 EN
Figure 243: SDDRFUF function block
Table 260: SDDRFUF Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
CBCLOSED BOOLEAN 0 Active when circuit breaker is closed
MCBOP BOOLEAN 0 Active when external MCB opens protected
voltage circuit
DISCPOS BOOLEAN 0 Active when line disconnector is open
BLKTRIP BOOLEAN 0 Blocks operation of function when active
Table 261: SDDRFUF Output signals
BLKZ BOOLEAN Start of current and voltage controlled function
BLKU BOOLEAN General start of function
3PH BOOLEAN Three-phase start of function
DLD1PH BOOLEAN Dead line condition in at least one phase
DLD3PH BOOLEAN Dead line condition in all three phases
Table 262: SDDRFUF Group settings (basic)
Operation Off
On
446
OpMode Off
UNsINs
UZsIZs
UZsIZs OR UNsINs
UZsIZs AND
UNsINs
OptimZsNs
- - UZsIZs Operating mode selection
3U0> 1 - 100 %UB 1 30 Operate level of residual overvoltage
element in % of UBase
3I0< 1 - 100 %IB 1 10 Operate level of residual undercurrent
element in % of IBase
3U2> 1 - 100 %UB 1 30 Operate level of neg seq overvoltage
element in % of UBase
3I2< 1 - 100 %IB 1 10 Operate level of neg seq undercurrent
element in % of IBase
OpDUDI Off
On
- - Off Operation of change based function Off/
On
DU> 1 - 100 %UB 1 60 Operate level of change in phase voltage
in % of UBase
DI< 1 - 100 %IB 1 15 Operate level of change in phase current
in % of IBase
UPh> 1 - 100 %UB 1 70 Operate level of phase voltage in % of
UBase
IPh> 1 - 100 %IB 1 10 Operate level of phase current in % of
IBase
SealIn Off
On
- - On Seal in functionality Off/On
USealln< 1 - 100 %UB 1 70 Operate level of seal-in phase voltage in
% of UBase
IDLD< 1 - 100 %IB 1 5 Operate level for open phase current
detection in % of IBase
UDLD< 1 - 100 %UB 1 60 Operate level for open phase voltage
detection in % of UBase
Table 263: SDDRFUF technical data
Operate voltage, zero sequence (1-100)% of UBase 1.0% of U
r
Operate current, zero sequence (1100)% of IBase 1.0% of I
r
Operate voltage, negative sequence (1100)% of UBase 1.0% of U
r
Operate current, negative sequence (1100)% of IBase 1.0% of I
r
Operate voltage change level (1100)% of UBase 5.0% of U
r
Operate current change level (1100)% of IBase 5.0% of I
r
447
448
Section 12 Control
About this chapter
This chapter describes the control functions. The way the functions work, their
setting parameters, function blocks, input and output signals and technical data are
included for each function.
12.1 Synchrocheck, energizing check, and synchronizing
SESRSYN
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Synchrocheck, energizing check, and
synchronizing
SESRSYN
sc/vc
SYMBOL-M V1 EN
25
12.1.1 Introduction
The Synchronizing function allows closing of asynchronous networks at the correct
moment including the breaker closing time. The systems can thus be reconnected
after an autoreclose or manual closing, which improves the network stability.
Synchrocheck, energizing check (SESRSYN) function checks that the voltages on
both sides of the circuit breaker are in synchronism, or with at least one side dead
to ensure that closing can be done safely.
SESRSYN function includes a built-in voltage selection scheme for double bus and
1 breaker or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and
can have different settings.
For systems which are running asynchronous a synchronizing function is provided.
The main purpose of the synchronizing function is to provide controlled closing of
circuit breakers when two asynchronous systems are going to be connected. It is
used for slip frequencies that are larger than those for synchrocheck and lower than
a set maximum level for the synchronizing function.
Control
449
12.1.2.1 Basic functionality
The synchrocheck function measures the conditions across the circuit breaker and
compares them to set limits. The output is only given when all measured quantities
are simultaneously within their set limits.
The energizing check function measures the bus and line voltages and compares
them to both high and low threshold detectors. The output is given only when the
actual measured quantities match the set conditions.
The synchronizing function measures the conditions across the circuit breaker, and
also determines the angle change occurring during the closing delay of the circuit
breaker, from the measured slip frequency. The output is given only when all
measured conditions are simultaneously within their set limits. The issue of the
output is timed to give closure at the optimal time including the time for the circuit
breaker and the closing circuit.
For single circuit breaker and 1 breaker circuit breaker arrangements, the
SESRSYN function blocks have the capability to make the necessary voltage
selection. For single circuit breaker arrangements, selection of the correct voltage
is made using auxiliary contacts of the bus disconnectors. For 1 breaker circuit
breaker arrangements, correct voltage selection is made using auxiliary contacts of
the bus disconnectors as well as the circuit breakers.
The internal logic for each function block as well as, the input and outputs, and the
setting parameters with default setting and setting ranges is described in this
document. For application related information, please refer to the application manual.
12.1.2.2 Logic diagrams
Logic diagrams
The logic diagrams that follow illustrate the main principles of the synchronizing
function components such as Synchrocheck, Energizing check and Voltage
selection, and are intended to simplify the understanding of the function.
Synchrocheck
The voltage difference, frequency difference and phase angle difference values are
measured in the IED centrally and are available for the synchrocheck function for
evaluation. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral (or the opposite), this need to be compensated. This is done with a
setting, which scales up the line voltage to a level equal to the bus voltage.
When the function is set to OperationSC = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for
UHighBusSC and UHighLineSC.
Control
450
If both sides are higher than the set values, the measured values are compared with
the set values for acceptable frequency, phase angle and voltage difference:
FreqDiff, PhaseDiff and UDiff. If a compensation factor is set due to the use of
different voltages on the bus and line, the factor is deducted from the line voltage
before the comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The
frequencies must not deviate from the rated frequency more than +/-5Hz. The
frequency difference between the bus frequency and the line frequency is measured
and may not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are
available and used for the manual closing and autoreclose functions respectively, as
required.
The inputs BLOCK and BLKSC are available for total block of the complete
Synchrocheck function and block of the Synchrocheck function respectively. Input
TSTSC will allow testing of the function where the fulfilled conditions are
connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured
conditions match the set conditions for the respective output. The output signal can
be delayed independently for MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking
conditions. UOKSC shows that the voltages are high, UDIFFSC, FRDIFFA,
FRDIFFM, PHDIFFA, PHDIFFM shows when the voltage difference, frequency
difference and phase angle difference conditions are met.
Control
451
OperationSC = On
TSTSC
BLKSC
BLOCK
TSTAUTSY
AUTOSYOK
PHDIFFME
FRDIFFME
UDIFFME
PHDIFFA
FRDIFFA
UOKSC
UDIFFSC
OR
t
0-60 s
AND
AND
AND
AND
AND
AND
t
50 ms
UHighLineSC
UHighBusSC
UDiffSC
phaseAngleDifferenceValue
frequencyDifferenceValue
voltageDifferenceValue
1
1
1
AND
tSCA
PhaseDiffA
FreqDiffA
Note! Similar logic for Manual Synchrocheck.
IEC07000114 V2 EN
Figure 244: Simplified logic diagram for the Synchrocheck function
Synchronizing
When the function is set to OperationSynch = On the measuring will be performed.
The function will compare the values for the bus and line voltage with the set
values for UHighBusSynch and UHighLineSynch, which is a supervision that the
voltages are both live. If both sides are higher than the set values the measured
values are compared with the set values for acceptable frequency, rate of change of
frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and
UDiffSynch.
Measured frequencies between the settings for the maximum and minimum
frequency will initiate the measuring and the evaluation of the angle change to
allow operation to be sent in the right moment including the set tBreaker time.
There is a phase angle release internally to block any incorrect closing pulses. At
operation the SYNOK output will be activated with a pulse tClosePulse and the
function reset. The function will also reset if the synchronizing conditions are not
fulfilled within the set tMaxSynch time. This prevents that the functions are, by
mistake, maintained in operation for a long time, waiting for conditions to be fulfilled.
Control
452
The inputs BLOCK and BLKSYNCH are available for total block of the complete
function respective of the synchronizing part. TSTSYNCH will allow testing of the
function where the fulfilled conditions are connected to a separate output.
OPERATION SYNCH
OFF
ON
OFF
ON
TEST MODE
OR
AND
S
R
UDiffSynch
UHighBusSynch
UHighLineSynch
FreqDiffMax
FreqDiffMin
FreqRateChange
fBus&fLine 5 Hz
PhaseDiff < 15 deg
PhaseDiff=closing angle
AND
t
50 ms
AND
AND
AND
AND
tClose
Pulse
OR
AND
OR
SYN1
STARTSYN
BLKSYNCH
SYNPROGR
SYNOK
SYNFAIL
tMax
Synch
TSTSYNOK
IEC06000636 V2 EN
Figure 245: Simplified logic diagram for the synchronizing function
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation
by the Energizing check function. If the bus voltage is connected as phase-phase
and the line voltage as phase-neutral, (or the opposite) this needs to be
compensated. This is done with a setting, which scales the line voltage to a level
equal to the bus voltage.
The function measures voltages on the busbar and the line to verify whether they
are live or dead. This is done by comparing with the set values UHighBusEnerg
and ULowBusEnerg for bus energizing and UHighLineEnerg and ULowLineEnerg
for line energizing.
The frequency on both sides of the circuit breaker is also measured. The
frequencies must not deviate from the rated frequency more than +/-5Hz. The
frequency difference between the bus frequency and the line frequency is measured
and shall not exceed a set value.
Control
453
The Energizing direction can be selected individually for the Manual and the
Automatic functions respectively. When the conditions are met the outputs
AUTOENOK and MANENOK respectively will be activated if the fuse
supervision conditions are fulfilled. The output signal can be delayed
independently for MANENOK and AUTOENOK conditions. The Energizing
direction can also be selected by an integer input AENMODE respective
MENMODE, which for example, can be connected to a Binary to Integer function
block (B16I). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both.
Not connected input with connection of INTZERO output from Fixed Signals
(FIXDSIGN) function block will mean that the setting is done from Parameter
Setting tool. The active position can be read on outputs MODEAEN resp
MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete
Synchronizing function respective block of the Energizing check function.
TSTENERG will allow testing of the function where the fulfilled conditions are
connected to a separate test output.
Voltage selection
The voltage selection module including supervision of included voltage
transformer fuses for the different arrangements is a basic part of the
Synchronizing function and determines the parameters fed to the Synchronizing,
Synchrocheck and Energizing check functions. This includes the selection of the
appropriate Line and Bus voltages and fuse supervision.
The voltage selection type to be used is set with the parameter CBConfig.
If No voltage sel. is set the default voltages used will be ULine1 and UBus1. This
is also the case when external voltage selection is provided. Fuse failure
supervision for the used inputs must also be connected.
The voltage selection function, selected voltages, and fuse conditions are the
Synchronizing, Synchrocheck and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type
contacts to supply Disconnector Open and Closed positions but, it is also possible
to use an inverter for one of the positions.
Voltage selection for a single circuit breaker with double busbars
This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select
between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed
and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All
other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL
respectively indicate the selected Bus voltage.
The function checks the fuse-failure signals for bus 1, bus 2 and line voltage
transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1 and UB2OK-
UB2FF supervises the fuse for Bus 2. ULN1OK-ULN1FF supervises the fuse for
the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively
Control
454
be used dependent on the available signal. If a fuse-failure is detected in the
selected voltage source an output signal USELFAIL is set. This output signal is
true if the selected bus or line voltages have a fuse failure. This output as well as
the function can be blocked with the input signal BLOCK. The function logic
diagram is shown in figure 246.
AND
AND
AND
bus1Voltage
OR
OR
OR
ULN1FF
ULN1OK
UB1FF
UB1OK
UB2FF
UB2OK
B2QCLD
B2QOPEN
B1QCLD
B1QOPEN
selectedFuseOK
BLOCK
bus2Voltage
busVoltage
AND
1
invalidSelection
B2SEL
B1SEL
AND
AND
AND
USELFAIL
en05000779.vsd
OR
IEC05000779 V1 EN
Figure 246: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
Voltage selection for a 1 1/2 circuit breaker arrangement
Note that with 1 breaker schemes two Synchrocheck functions must be used in
the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus
breaker and the Tie breakers is described.
This voltage selection function uses the binary inputs from the disconnectors and
circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck
(Synchronism and Energizing check) function. For the bus circuit breaker one side
of the circuit breaker is connected to the busbar and the other side is connected
either to line 1, line 2 or the other busbar depending on the arrangement.
Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD,
LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors
Control
455
respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL
will give indication of the selected Line voltage as a reference to the fixed Bus 1
voltage.
The fuse supervision is connected to ULNOK-ULNFF, and with alternative
Healthy or Failing fuse signals depending on what is available for each of fuse (MCB).
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the
other side is connected either to bus 2 or line 2. Four different output combinations
are possible, bus to bus, bus to line, line to bus and line to line.
The line 1 voltage is selected if the line 1 disconnector is closed.
The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1
circuit breaker is closed.
The line 2 voltage is selected if the line 2 disconnector is closed.
The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2
Circuit breaker is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2.
If a fuse-failure is detected in the selected voltage an output signal USELFAIL is
set. This output signal is true if the selected bus or line voltages have a fuse failure.
This output as well as the function can be blocked with the input signal BLOCK.
The function block diagram for the voltage selection of a bus circuit breaker is
shown in figure 247 and for the tie circuit breaker in figure 248
Control
456
AND
AND
OR
OR
ULN1FF
ULN1OK
UB1FF
UB1OK
UB2FF
UB2OK
B1QCLD
B1QOPEN
LN1QCLD
LN1QOPEN
selectedFuseOK
BLOCK
lineVoltage
invalidSelection
LN1SEL
AND
AND
USELFAIL
ULN2FF
ULN2OK
OR
AND
AND
B2QCLD
B2QOPEN
LN2QCLD
LN2QOPEN
AND
AND
LN2SEL
OR
AND
B2SEL
AND
AND
AND
en05000780.vsd
OR
OR
line2Voltage
bus2Voltage
line1Voltage
IEC05000780 V1 EN
Figure 247: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2
breaker arrangement
Control
457
AND
AND
OR
OR
ULN1FF
ULN1OK
UB1FF
UB1OK
UB2FF
UB2OK
B1QCLD
B1QOPEN
LN1QCLD
LN1QOPEN
selectedFuseOK
BLOCK
line1Voltage
LN1SEL
AND
AND
USELFAIL
ULN2FF
ULN2OK
OR
AND
AND
AND
AND
AND
1
B1SEL
bus1Voltage
busVoltage
AND
AND
AND
B2QCLD
B2QOPEN
LN2QCLD
LN2QOPEN
bus2Voltage
LN2SEL
AND
AND
1
B2SEL
line2Voltage
lineVoltage
invalidSelection OR
en05000781.vsd
OR
OR
IEC05000781 V1 EN
Figure 248: Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2
breaker arrangement.
Fuse failure supervision
External fuse failure signals or signals from a tripped fuse switch/MCB are
connected to binary inputs that are configured to the inputs of the synchronizing
functions in the IED. Alternatively, the internal signals from fuse failure
supervision can be used when available. There are two alternative connection
possibilities. Inputs labelled OK must be connected if the available contact
indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if
the available contact indicates that the voltage circuit is faulty.
Control
458
The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage
and the ULN1OK/ULN2OK and ULN1FF/ULN2FF inputs are related to the line
voltage. Configure them to the binary input or function outputs that indicate the
status of the external fuse failure of the busbar and line voltages. In the event of a
fuse failure, the energizing check functions are blocked. The synchronizing and the
synchrocheck function requires full voltage on both sides and will be blocked
automatically in the event of fuse failures.
SESRSYN
U3PBB1*
U3PBB2*
U3PLN1*
U3PLN2*
BLOCK
BLKSYNCH
BLKSC
BLKENERG
B1QOPEN
B1QCLD
B2QOPEN
B2QCLD
LN1QOPEN
LN1QCLD
LN2QOPEN
LN2QCLD
UB1OK
UB1FF
UB2OK
UB2FF
ULN1OK
ULN1FF
ULN2OK
ULN2FF
STARTSYN
TSTSYNCH
TSTSC
TSTENERG
AENMODE
MENMODE
SYNOK
AUTOSYOK
AUTOENOK
MANSYOK
MANENOK
TSTSYNOK
TSTAUTSY
TSTMANSY
TSTENOK
USELFAIL
B1SEL
B2SEL
LN1SEL
LN2SEL
SYNPROGR
SYNFAIL
UOKSYN
UDIFFSYN
FRDIFSYN
FRDIFFOK
FRDERIVA
UOKSC
UDIFFSC
FRDIFFA
PHDIFFA
FRDIFFM
PHDIFFM
UDIFFME
FRDIFFME
PHDIFFME
MODEAEN
MODEMEN
IEC06000534 V2 EN
Figure 249: SESRSYN function block
Table 264: SESRSYN Input signals
U3PBB1 GROUP
SIGNAL
- Group signal for voltage input busbar 1
U3PBB2 GROUP
SIGNAL
- Group signal for voltage input busbar 2
U3PLN1 GROUP
SIGNAL
- Group signal for voltage input line 1
U3PLN2 GROUP
SIGNAL
- Group signal for voltage input line 2
Control
459
BLOCK BOOLEAN 0 General block
BLKSYNCH BOOLEAN 0 Block synchronizing
BLKSC BOOLEAN 0 Block synchro check
BLKENERG BOOLEAN 0 Block energizing check
B1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
bus1
B1QCLD BOOLEAN 0 Close status for CB or disconnector connected to
bus1
B2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
bus2
B2QCLD BOOLEAN 0 Close status for CB or disconnector connected to
bus2
LN1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
line1
LN1QCLD BOOLEAN 0 Close status for CB or disconnector connected to
line1
LN2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
line2
LN2QCLD BOOLEAN 0 Close status for CB or disconnector connected to
line2
UB1OK BOOLEAN 0 Bus1 voltage transformer OK
UB1FF BOOLEAN 0 Bus1 voltage transformer fuse failure
UB2OK BOOLEAN 0 Bus2 voltage transformer OK
UB2FF BOOLEAN 0 Bus2 voltage transformer fuse failure
ULN1OK BOOLEAN 0 Line1 voltage transformer OK
ULN1FF BOOLEAN 0 Line1 voltage transformer fuse failure
ULN2OK BOOLEAN 0 Line2 voltage transformer OK
ULN2FF BOOLEAN 0 Line2 voltage transformer fuse failure
STARTSYN BOOLEAN 0 Start synchronizing
TSTSYNCH BOOLEAN 0 Set synchronizing in test mode
TSTSC BOOLEAN 0 Set synchro check in test mode
TSTENERG BOOLEAN 0 Set energizing check in test mode
AENMODE INTEGER 0 Input for setting of automatic energizing mode
MENMODE INTEGER 0 Input for setting of manual energizing mode
Table 265: SESRSYN Output signals
SYNOK BOOLEAN Synchronizing OK output
AUTOSYOK BOOLEAN Auto synchro check OK
AUTOENOK BOOLEAN Automatic energizing check OK
MANSYOK BOOLEAN Manual synchro check OK
MANENOK BOOLEAN Manual energizing check OK
Control
460
TSTSYNOK BOOLEAN Synchronizing OK test output
TSTAUTSY BOOLEAN Auto synchro check OK test output
TSTMANSY BOOLEAN Manual synchro check OK test output
TSTENOK BOOLEAN Energizing check OK test output
USELFAIL BOOLEAN Selected voltage transformer fuse failed
B1SEL BOOLEAN Bus1 selected
B2SEL BOOLEAN Bus2 selected
LN1SEL BOOLEAN Line1 selected
LN2SEL BOOLEAN Line2 selected
SYNPROGR BOOLEAN Synchronizing in progress
SYNFAIL BOOLEAN Synchronizing failed
UOKSYN BOOLEAN Voltage amplitudes for synchronizing above set
limits
UDIFFSYN BOOLEAN Voltage difference out of limit for synchronizing
FRDIFSYN BOOLEAN Frequency difference out of limit for synchronizing
FRDIFFOK BOOLEAN Frequency difference in band for synchronizing
FRDERIVA BOOLEAN Frequency derivative out of limit for synchronizing
UOKSC BOOLEAN Voltage amplitudes above set limits
UDIFFSC BOOLEAN Voltage difference out of limit
FRDIFFA BOOLEAN Frequency difference out of limit for Auto operation
PHDIFFA BOOLEAN Phase angle difference out of limit for Auto
operation
FRDIFFM BOOLEAN Frequency difference out of limit for Manual
operation
PHDIFFM BOOLEAN Phase angle difference out of limit for Manual
Operation
UDIFFME REAL Calculated difference in voltage
FRDIFFME REAL Calculated difference in frequency
PHDIFFME REAL Calculated difference of phase angle
MODEAEN INTEGER Selected mode for automatic energizing
MODEMEN INTEGER Selected mode for manual energizing
Control
461
Table 266: SESRSYN Group settings (basic)
Operation Off
On
SelPhaseBus1 phase1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
- - phase2 Select phase for bus1
SelPhaseBus2 phase1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
- - phase2 Select phase for bus2
SelPhaseLine1 phase1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
- - phase2 Select phase for line1
SelPhaseLine2 phase1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
- - phase2 Select phase for line2
CBConfig No voltage sel.
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
- - No voltage sel. Select CB configuration
UBase 0.001 - 9999.999 kV 0.001 400.000 Base voltage in kV
PhaseShift -180 - 180 Deg 5 0 Phase shift
URatio 0.040 - 25.000 - 0.001 1.000 Voltage ratio
OperationSynch Off
On
- - Off Operation for synchronizing function Off/
On
UHighBusSynch 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for synchronizing
in % of UBase
UHighLineSynch 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for synchronizing
in % of UBase
UDiffSynch 2.0 - 50.0 %UB 1.0 10.0 Voltage difference limit for synchronizing
in % of UBase
FreqDiffMin 0.003 - 0.250 Hz 0.001 0.010 Minimum frequency difference limit for
synchronizing
FreqDiffMax 0.050 - 0.250 Hz 0.001 0.200 Maximum frequency difference limit for
synchronizing
FreqRateChange 0.000 - 0.500 Hz/s 0.001 0.300 Maximum allowed frequency rate of
change
tBreaker 0.000 - 60.000 s 0.001 0.080 Closing time of the breaker
Control
462
tClosePulse 0.050 - 60.000 s 0.001 0.200 Breaker closing pulse duration
tMaxSynch 0.00 - 6000.00 s 0.01 600.00 Resets synch if no close has been made
before set time
tMinSynch 0.000 - 60.000 s 0.001 2.000 Minimum time to accept synchronizing
conditions
OperationSC Off
On
- - On Operation for synchronism check
function Off/On
UHighBusSC 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for synchrocheck
in % of UBase
UHighLineSC 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for synchrocheck
in % of UBase
UDiffSC 2.0 - 50.0 %UB 1.0 15.0 Voltage difference limit in % of UBase
FreqDiffA 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Auto
FreqDiffM 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Manual
PhaseDiffA 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Auto
PhaseDiffM 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Manual
tSCA 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck Auto
tSCM 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck
Manual
AutoEnerg Off
DLLB
DBLL
Both
- - DBLL Automatic energizing check mode
ManEnerg Off
DLLB
DBLL
Both
- - Both Manual energizing check mode
ManEnergDBDL Off
On
- - Off Manual dead bus, dead line energizing
UHighBusEnerg 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for energizing
check in % of UBase
UHighLineEnerg 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for energizing
check in % of UBase
ULowBusEnerg 10.0 - 80.0 %UB 1.0 40.0 Voltage low limit bus for energizing
check in % of UBase
ULowLineEnerg 10.0 - 80.0 %UB 1.0 40.0 Voltage low limit line for energizing
check in % of UBase
UMaxEnerg 50.0 - 180.0 %UB 1.0 115.0 Maximum voltage for energizing in % of
UBase
tAutoEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for automatic energizing
check
tManEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for manual energizing check
Control
463
Table 267: SESRSYN technical data
Phase shift, j
line
- j
bus
(-180 to 180) degrees -
Voltage ratio, U
bus
/U
line
(0.40-25.000) % of UBase -
Voltage high limit for
synchronizing and
synchrocheck
(50.0-120.0)% of UBase 1.0% of U
r
at U U
r
1.0% of U at U >U
r
Reset ratio, synchrocheck > 95% -
Frequency difference limit
between bus and line
(0.003-1.000) Hz 2.0 mHz
Phase angle difference limit
(5.0-90.0) degrees 2.0 degrees
Voltage difference limit
(2.0-50.0)% of UBase 1.0% of U
r
Time delay output for
synchrocheck
(0.000-60.000) s 0.5% 10 ms
Voltage high limit for
energizing check
(50.0-120.0)% of UBase 1.0% of U
r
at U U
r
1.0% of U at U >U
r
Reset ratio, voltage high limit > 95% -
Voltage low limit for
energizing check
(10.0-80.0)% of UBase 1.0% of U
r
Reset ratio, voltage low limit < 105% -
Maximum voltage for
energizing
(50.0-180.0)% of UBase 1.0% of U
r
at U U
r
1.0% of U at U >U
r
Time delay for energizing
check
(0.000-60.000) s 0.5% 10 ms
Operate time for
synchrocheck function
160 ms typically -
Operate time for energizing
function
80 ms typically -
12.2 Autorecloser SMBRREC
Function Description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Autorecloser SMBRREC
O->I
SYMBOL-L V1 EN
79
Control
464
12.2.1 Introduction
The autorecloser (SMBRREC) function provides high-speed and/or delayed auto-
reclosing for single or multi-breaker applications.
Up to five reclosing attempts can be programmed. The first attempt can be single-,
two and/or three phase for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A
priority circuit allows one circuit breaker to close first and the second will only
close if the fault proved to be transient.
Each autoreclosing function can be configured to co-operate with a synchrocheck
function.
12.2.2.1 Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding
of the functionality.
12.2.2.2 Auto-reclosing operation Off and On
Operation of the automatic reclosing can be set to Off or On via the setting
parameters and through external control. With the setting Operation = On, the
function is activated while with the setting Operation = Off the function is
deactivated. With the setting Operation = External ctrl, the activation/deactivation
is made by input signal pulses, for example, from a control system.
When the function is set On and is operative the output SETON is activated (high).
Other input conditions such as CBPOS and CBREADY must also be fulfilled. At
this point the automatic recloser is prepared to start the reclosing cycle and the
output signal READY on the SMBRREC function block is activated (high).
12.2.2.3 Auto-reclosing mode selection
The Auto-reclosing mode is selected with setting ARMode = 3phase(0), 1/2/3ph(1),
1/2ph(2), 1ph+1*2ph(3), 1/2ph+1*3ph(4), 1ph+1*2/3ph(5). The selected mode
can be read as integer as per above list on output MODE.
As an alternative to setting the mode can be selected by connecting an integer, for
example from function block B16I to input MODEINT.
Following integers shall be used: 1=3phase, 2=1/2/3ph, 3=1/2ph, 4=1ph+1*2ph,
5=1/2ph+1*3ph or 6=1ph+1*2/3ph.
When INTZERO from Fixed signal function block is connected to the input
MODEINT the parameter setting selected will be valid.
Control
465
12.2.2.4 Start auto-reclosing and conditions for start of a reclosing cycle
The usual way in which to start a reclosing cycle, or sequence, is to start it when a
line protection tripping has occurred, by applying a signal to the START input. It
should be necessary to adjust three-phase auto-reclosing open time, (dead time) for
different power system configurations or during tripping at different protection
stages, the input STARTHS (start high-speed reclosing) can also be used.
For a new auto-reclosing cycle to be started, a number of conditions need to be
met. They are linked to dedicated inputs. The inputs are:
CBREADY: CB ready for a reclosing cycle, for example, charged operating gear
CBPOS: to ensure that the CB was closed when the line fault occurred and
start was applied
No blocking or inhibit signal shall be present.
After the start has been accepted, it is latched in and an internal signal Started is
set. It can be interrupted by certain events, like an inhibit signal.
To start auto-reclosing by CB position Open instead of from protection trip signals,
one has to configure the CB Open position signal to inputs CBPOS and START
and set a parameter StartByCBOpen = On and CBAuxContType = NormClosed
(normally closed). One also has to configure and connect signals from manual trip
commands to input INHIBIT.
The logic for switching the auto-recloser On/Off and the starting of the reclosing is
shown in figure 250. The following should be considered:
Setting Operation can be set to Off, External ctrl or On. External ctrl offers
the possibility of switching by external switches to inputs ON and OFF,
communication commands to the same inputs, and so on.
SMBRREC is normally started by tripping. It is either a Zone 1 and
Communication aided trip, or a general trip. If the general trip is used the
function must be blocked from all back-up tripping connected to INHIBIT. In
both alternatives the breaker failure function must be connected to inhibit the
function. START makes a first attempt with synchrocheck, STARTHS makes
its first attempt without synchrocheck. TRSOTF starts shots 2-5.
Circuit breaker checks that the breaker was closed for a certain length of time
before the starting occurred and that the CB has sufficient stored energy to
perform an auto-reclosing sequence and is connected to inputs CBPOS and
CBREADY.
Control
466
Operation:On
Operation:Off
Operation:External Ctrl
AND
AND
AND
S
R
AND
AND
AND
SETON
initiate
start
READY
CBPOS
CBREADY
TRSOTF
START
OFF
ON
Additional conditions
en05000782.vsd
STARTHS
autoInitiate
t
tCBClosedMin
CB Closed
AND
S
Blocking conditions
Inhibit condistions
count 0
AND
OR
OR
OR
OR
R
OR
t
120 ms
AND
IEC05000782 V1 EN
Figure 250: Auto-reclosing Off/On and start
12.2.2.5 Control of the auto-reclosing open time for shot 1
It is possible to use up to four different time settings for the first shot, and one
extension time. There are separate settings for single- , two- and three-phase auto-
reclosing open times, t1 1Ph, t1 2Ph, t1 3Ph. If no particular input signal is applied,
and an auto-reclosing program with single-phase reclosing is selected, the auto-
reclosing open time t1 1Ph will be used. If one of the inputs TR2P or TR3P is
activated in connection with the input START, the auto-reclosing open time for two-
phase or three-phase reclosing is used. There is also a separate time setting facility
for three-phase high-speed auto-reclosing, t1 3PhHS available for use when
required. It is activated by input STARTHS.
An auto-reclosing open time extension delay, tExtended t1, can be added to the
normal shot 1 delay. It is intended to come into use if the communication channel
for permissive line protection is lost. In a case like this there can be a significant
time difference in fault clearance at the two line ends. A longer auto-reclosing open
time can then be useful. This extension time is controlled by setting parameter
Extended t1 = On and the input PLCLOST.
12.2.2.6 Long trip signal
In normal circumstances the trip command resets quickly due to fault clearing. The
user can set a maximum trip pulse duration tTrip. When trip signals are longer, the
Control
467
auto-reclosing open time is extended by tExtended t1. If Extended t1 = Off, a long
trip signal interrupts the reclosing sequence in the same way as a signal to input
INHIBIT.
AND
AND
t
tTrip
AND
initiate
PLCLOST
AND
Extend t1
long duration
start
Extended t1
AND
(block SMBRREC)
OR
IEC05000783 V2 EN
Figure 251: Control of extended auto-reclosing open time and long trip pulse detection
Reclosing checks and the reclaim timer
When dead time has elapsed during the auto-reclosing procedure certain conditions
must be fulfilled before the CB closing command is issued. To achieve this, signals
are exchanged between program modules to check that these conditions are met. In
three-phase reclosing a synchronizing and/or energizing check can be used. It is
possible to use a synchrocheck function in the same physical device or an external
one. The release signal is configured by connecting to the auto-reclosing function
input SYNC. If reclosing without checking is preferred the SYNC input can be set
to TRUE (set high). Another possibility is to set the output of the synchro-check
function to a permanently activated state. At confirmation from the synchro-check,
or if the reclosing is of single-phase or two-phase type, the signal passes on. At single-
phase, two-phase reclosing and at three-phase high-speed reclosing started by
STARTHS, synchronization is not checked, and the state of the SYNC input is
disregarded.
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the
readiness of the circuit breaker is also checked before issuing the CB closing
command. If the CB has a readiness contact of type CBReadyType = OCO (CB
ready for an Open-Close-Open sequence) this condition may not be complied with
after the tripping and at the moment of reclosure. The Open-Close-Open condition
was however checked at the start of the reclosing cycle and it is then likely that the
CB is prepared for a Close-Open sequence.
Control
468
The synchro-check or energizing check must be fulfilled within a set time interval,
tSync. If it is not, or if other conditions are not met, the reclosing is interrupted and
blocked.
The reclaim timer defines a time from the issue of the reclosing command, after
which the reclosing function resets. Should a new trip occur during this time, it is
treated as a continuation of the first fault. The reclaim timer is started when the CB
closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state
in the reclosing sequence.
Control
469
AND
OR
OR
AND
t
t1 1Ph
t
t1 2Ph
t
t1 3Ph HS
From logic for
reclosing
programs
AND
AND OR
AND t
tSync
"SMBRREC Open time" timers
1P2PTO
3PHSTO
Pulse AR
Blocking out
CBREADY
initiate
SYNC
3PT4TO
3PT3TO
3PT2TO
3PT1TO
3PHSTO
OR
AND t
tReclaim
1
OR t
tInhibit
INPROGR
PERMIT1P
PREP3P
Inhibit (internal)
Blocking out
INHIBIT
Pulse SMBRREC (above)
t
t1 3Ph
3PT1TO
OR
1P2PTO
3PT5TO
Reclaim Timer On
0
CL
COUNTER
SMRREC State
Control
Shot 0
R
1
2
3
4
5
Shot 1
Shot 2
Shot 3
Shot 4
Shot 5
LOGIC
reclosing
programs
1PT1
2PT1
3PHS
3PT1
3PT2
3PT3
OR
Shot 0
start
initiate
TR3P
TR2P
Shot 1
Shot 2
Shot 3
Shot 4
Shot 5
3PT4
3PT5
IEC05000784 V2 EN
Figure 252: Reclosing Reclaim and Inhibit timers
Pulsing of the CB closing command
The CB closing command, CLOSECB is a pulse with a duration set by parameter
tPulse. For circuit-breakers without anti-pumping function, the close pulse cutting
described below can be used. This is done by selecting the parameter
Control
470
CutPulse=On. In case of a new trip pulse, the closing command pulse is cut
(interrupted). The minimum duration of the pulse is always 50 ms. See figure 253
When a reclosing command is issued, the appropriate reclosing operation counter is
incremented. There is a counter for each type of reclosing and one for the total
number of reclosing commands issued.
tPulse
AND
AND
pulse
50 ms
**)
AND
AND
AND
AND
AND
CLOSECB
COUNT1P
COUNT2P
COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
initiate
1PT1
2PT1
3PT1
3PT2
3PT3
3PT4
**) Only if "CutPulse" = On
en05000785.vsd
AND
COUNT3P5
COUNTAR
3PT5
RSTCOUNT
counter
counter
counter
counter
counter
counter
counter
counter
OR
IEC05000785 V1 EN
Figure 253: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reclaim timer tReclaim starts running for the set
time. If no tripping occurs within this time, the auto-reclosing will reset.
Permanent fault and reclosing unsuccessful signal
If a new trip occurs after the CB closing command, and a new input signal START
or TRSOTF appears, the output UNSUCCL (unsuccessful closing) is set high. The
timers for the first shot can no longer be started. Depending on the setting for the
number of reclosing shots, further shots may be made or the reclosing sequence
Control
471
will be ended. After the reclaim time has elapsed, the auto-reclosing function resets
but the CB remains open. The CB closed data at the CBPOS input will be missing.
Because of this, the reclosing function will not be ready for a new reclosing cycle.
Normally the signal UNSUCCL appears when a new trip and start is received after
the last reclosing shot has been made and the auto-reclosing function is blocked.
The signal resets once the reclaim time has elapsed. The unsuccessful signal can
also be made to depend on CB position input. The parameter UnsucClByCBChk
should then be set to CBCheck, and a timer tUnsucCl should also be set. If the CB
does not respond to the closing command and does not close, but remains open, the
output UNSUCCL is set high after time tUnsucCl.
AND
OR
AND
S AND
t
tUnsucCl
AND
OR
eno5000786.vsd
initiate
block start
UnsucClByCBchk = CBcheck
UNSUCCL
shot 0
Pulse AR (Closing)
CBPOS CBclosed
R
IEC05000786 V1 EN
Figure 254: Issue of signal UNSUCCL, unsuccessful reclosing
Automatic continuation of the reclosing sequence
The auto-reclosing function can be programmed to proceed to the following
reclosing shots (if selected) even if the start signals are not received from the
protection functions, but the breaker is still not closed. This is done by setting
parameter AutoCont = On and tAutoContWait to the required delay for the function
to proceed without a new start.
Control
472
AND
AND
AND
t
tAutoContWait
OR
OR START
CBPOS
initiate
en05000787.vsd
CLOSECB
S
R
Q
CBClosed
IEC05000787 V1 EN
Figure 255: Automatic proceeding of shot 2 to 5
Start of reclosing from CB open information
If a user wants to apply starting of auto-reclosing from CB open position instead of
from protection trip signals, the function offers such a possibility. This starting
mode is selected by a setting parameter StartByCBOpen = On. One needs then to
block reclosing at all manual trip operations. Typically, one also set
CBAuxContType = NormClosed and connect a CB auxiliary contact of type NC
(normally closed) to inputs CBPOS and START. When the signal changes from
CB closed to CB open an auto-reclosing start pulse of limited length is generated
and latched in the function, subject to the usual checks. Then the reclosing
sequence continues as usual. One needs to connect signals from manual tripping
and other functions, which shall prevent reclosing, to the input INHIBIT.
Control
473
en05000788.vsd
AND
AND
AND
AND
1
1
100 ms
100 ms
StartByCBOpen = On
START
STARTHS
start
IEC05000788 V1 EN
Figure 256: Pulsing of the start inputs
12.2.2.7 Time sequence diagrams
Some examples of the timing of internal and external signals at typical transient
and permanent faults are shown below in figures 257 to 260.
CB READY
Fault
SUCCL
PREP3P
CLOSE CB
ACTIVE
1PT1
INPROG
READY
SYNC
START
CB POS
Closed
(Trip)
Open Closed
tPulse
t1 1Ph
tReclaim
Time
en04000196-2-en.vsd
IEC04000196 V2 EN
Figure 257: Transient single-phase fault. Single -phase reclosing
Control
474
CB READY
Fault
UNSUCCL
ACTIVE
3PT2
3PT1
INPROGR
READY
SYNC
TR3P
START
CB POS
Closed
(Trip)
Time
en04000197.vsd
PREP3P
CLOSE CB
Open
C
Open
C
t1 3Ph
tPulse
t2 3Ph
tPulse
tReclaim
IEC04000197 V1 EN
Figure 258: Permanent fault. Three-phase trip. Two-shot reclosing
Control
475
AR01-CBREADY(CO)
Fault
AR01-UNSUC
AR01-T2
AR01-T1
AR01-1PT1
AR01-INPROGR
AR01-READY
AR01-SYNC
AR01-TR3P
AR01-START
AR01-CBCLOSED
en04000198.vsd
AR01-P3P
AR01-CLOSECB
t1s
tReclaim
IEC04000198 V1 EN
Figure 259: Permanent single-phase fault. Program 1/2/3ph, single-phase
single-shot reclosing
AR01-CBREADY(CO)
Fault
AR01-UNSUC
AR01-T2
AR01-T1
AR01-1PT1
AR01-INPROGR
AR01-READY
AR01-SYNC
AR01-TR3P
AR01-START
AR01-CBCLOSED
en04000199.vsd
AR01-P3P
AR01-CLOSECB
t1s
t2
tReclaim
IEC04000199 V1 EN
Figure 260: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph,
two-shot reclosing
Control
476
SMBRREC
ON
OFF
BLKON
BLKOFF
RESET
INHIBIT
START
STARTHS
TRSOTF
SKIPHS
ZONESTEP
TR2P
TR3P
THOLHOLD
CBREADY
CBPOS
PLCLOST
SYNC
WAIT
RSTCOUNT
MODEINT
BLOCKED
SETON
READY
ACTIVE
SUCCL
UNSUCCL
INPROGR
1PT1
2PT1
3PT1
3PT2
3PT3
3PT4
3PT5
PERMIT1P
PREP3P
CLOSECB
WFMASTER
COUNT1P
COUNT2P
COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
IEC06000189 V2 EN
Figure 261: SMBRREC function block
Table 268: SMBRREC Input signals
ON BOOLEAN 0 Switches the AR On (at Operation = ExternalCtrl)
OFF BOOLEAN 0 Switches the AR Off (at Operation = ExternalCtrl)
BLKON BOOLEAN 0 Sets the AR in blocked state
BLKOFF BOOLEAN 0 Releases the AR from the blocked state
RESET BOOLEAN 0 Resets the AR to initial conditions
INHIBIT BOOLEAN 0 Interrupts and inhibits reclosing sequence
START BOOLEAN 0 Reclosing sequence starts by a protection trip
signal
STARTHS BOOLEAN 0 Start HS reclosing without SC: t13PhHS
TRSOTF BOOLEAN 0 Makes AR to continue to shots 2-5 at a trip from
SOTF
SKIPHS BOOLEAN 0 Will skip the high speed shot and continue on
delayed shots
ZONESTEP BOOLEAN 0 Coordination between local AR and down stream
devices
TR2P BOOLEAN 0 Signal to the AR that a two-phase tripping occurred
TR3P BOOLEAN 0 Signal to the AR that a three-phase tripping
occurred
Control
477
THOLHOLD BOOLEAN 0 Hold the AR in wait state
CBREADY BOOLEAN 0 CB must be ready for CO/OCO operation to allow
start / close
CBPOS BOOLEAN 0 Status of the circuit breaker Closed/Open
PLCLOST BOOLEAN 0 Power line carrier or other form of permissive sig
nal lost
SYNC BOOLEAN 0 Synchronizing check fulfilled (for 3Ph attempts)
WAIT BOOLEAN 0 Wait for master (in Multi-breaker arrangements)
RSTCOUNT BOOLEAN 0 Resets all counters
MODEINT INTEGER 0 Integer input used to set the reclosingMode,
alternative to setting
Table 269: SMBRREC Output signals
BLOCKED BOOLEAN The AR is in blocked state
SETON BOOLEAN The AR operation is switched on, operative
READY BOOLEAN Indicates that the AR function is ready for a new
sequence
ACTIVE BOOLEAN Reclosing sequence in progress
SUCCL BOOLEAN Activated if CB closes during the time tUnsucCl
UNSUCCL BOOLEAN Reclosing unsuccessful, signal resets after the
reclaim time
INPROGR BOOLEAN Reclosing shot in progress, activated during open
time
1PT1 BOOLEAN Single-phase reclosing is in progress, shot 1
2PT1 BOOLEAN Two-phase reclosing is in progress, shot 1
3PT1 BOOLEAN Three-phase reclosing in progress, shot 1
PERMIT1P BOOLEAN Permit single-phase trip, inverse signal to PREP3P
PREP3P BOOLEAN Prepare three-phase trip, control of the next trip
operation
CLOSECB BOOLEAN Closing command for CB
WFMASTER BOOLEAN Signal to Slave issued by Master for sequential
reclosing
COUNT1P INTEGER Counting the number of single-phase reclosing
shots
COUNT2P INTEGER Counting the number of two-phase reclosing shots
COUNT3P1 INTEGER Counting the number of three-phase reclosing
shot 1
Control
478
shot 2
shot 3
shot 4
shot 5
COUNTAR INTEGER Counting total number of reclosing shots
MODE INTEGER Integer output for reclosing mode
Table 270: SMBRREC Group settings (basic)
Operation Off
External ctrl
On
- - External ctrl Off, ExternalCtrl, On
ARMode 3 phase
1/2/3ph
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
- - 1/2/3ph The AR mode selection e.g. 3ph, 1/3ph
t1 1Ph 0.000 - 60.000 s 0.001 1.000 Open time for shot 1, single-phase
t1 3Ph 0.000 - 60.000 s 0.001 6.000 Open time for shot 1, delayed reclosing
3ph
t1 3PhHS 0.000 - 60.000 s 0.001 0.400 Open time for shot 1, high speed
reclosing 3ph
tReclaim 0.00 - 6000.00 s 0.01 60.00 Duration of the reclaim time
tSync 0.00 - 6000.00 s 0.01 30.00 Maximum wait time for synchrocheck OK
tTrip 0.000 - 60.000 s 0.001 0.200 Maximum trip pulse duration
tPulse 0.000 - 60.000 s 0.001 0.200 Duration of the circuit breaker closing
pulse
tCBClosedMin 0.00 - 6000.00 s 0.01 5.00 Min time that CB must be closed before
new sequence allows
tUnsucCl 0.00 - 6000.00 s 0.01 30.00 Wait time for CB before indicating
Unsuccessful/Successful
Priority None
Low
High
- - None Priority selection between adjacent
terminals None/Low/High
tWaitForMaster 0.00 - 6000.00 s 0.01 60.00 Maximum wait time for release from
Master
Control
479
Table 271: SMBRREC Group settings (advanced)
NoOfShots 1
2
3
4
5
- - 1 Max number of reclosing shots 1-5
StartByCBOpen Off
On
- - Off To be set ON if AR is to be started by
CB open position
CBAuxContType NormClosed
NormOpen
- - NormOpen Select the CB aux contact type NC/NO
for CBPOS input
CBReadyType CO
OCO
- - CO Select type of circuit breaker ready
signal CO/OCO
t1 2Ph 0.000 - 60.000 s 0.001 1.000 Open time for shot 1, two-phase
t2 3Ph 0.00 - 6000.00 s 0.01 30.00 Open time for shot 2, three-phase
Extended t1 Off
On
- - Off Extended open time at loss of
permissive channel Off/On
tExtended t1 0.000 - 60.000 s 0.001 0.500 3Ph Dead time is extended with this
value at loss of perm ch
tInhibit 0.000 - 60.000 s 0.001 5.000 Inhibit reclosing reset time
CutPulse Off
On
- - Off Shorten closing pulse at a new trip Off/On
Follow CB Off
On
- - Off Advance to next shot if CB has been
closed during dead time
AutoCont Off
On
- - Off Continue with next reclosing-shot if
breaker did not close
tAutoContWait 0.000 - 60.000 s 0.001 2.000 Wait time after close command before
proceeding to next shot
UnsucClByCBChk NoCBCheck
CB check
- - NoCBCheck Unsuccessful closing signal obtained by
checking CB position
BlockByUnsucCl Off
On
- - Off Block AR at unsuccessful reclosing
ZoneSeqCoord Off
On
- - Off Coordination of down stream devices to
local prot units AR
Control
480
Table 272: SMBRREC technical data
Number of autoreclosing shots 1 - 5 -
Autoreclosing open time:
shot 1 - t1 1Ph
shot 1 - t1 2Ph
shot 1 - t1 3PhHS
shot 1 - t1 3PhDld

(0.000-60.000) s

0.5% 10 ms
shot 2 - t2
shot 3 - t3
shot 4 - t4
shot 5 - t5
(0.00-6000.00) s
Extended autorecloser open time (0.000-60.000) s
Autorecloser maximum wait time for sync (0.00-6000.00) s
Maximum trip pulse duration (0.000-60.000) s
Inhibit reset time (0.000-60.000) s
Reclaim time (0.00-6000.00) s
Minimum time CB must be closed before AR
becomes ready for autoreclosing cycle
(0.00-6000.00) s
Circuit breaker closing pulse length (0.000-60.000) s
CB check time before unsuccessful (0.00-6000.00) s
Wait for master release (0.00-6000.00) s
Wait time after close command before
proceeding to next shot
(0.000-60.000) s
12.3 Apparatus control APC
12.3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given
after evaluation of conditions from other functions such as interlocking,
synchrocheck, operator place selection and external or internal blockings.
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor
bank. The different primary apparatuses within the bay can be controlled via the
apparatus control function directly by the operator or indirectly by automatic
sequences.
Control
481
Because a primary apparatus can be allocated to many functions within a
Substation Automation system, the object-oriented approach with a function
module that handles the interaction and status of each process object ensures
consistency in the process information used by higher-level control functions.
Primary apparatuses such as breakers and disconnectors are controlled and
supervised by one software module (SCSWI) each. Because the number and type
of signals connected to a breaker and a disconnector are almost the same, the same
software is used to handle these two types of apparatuses.
The software module is connected to the physical process in the switchyard via an
interface module by means of a number of digital inputs and outputs. One type of
interface module is intended for a circuit breaker (SXCBR) and another type is
intended for a disconnector or earthing switch (SXSWI). Four types of function
blocks are available to cover most of the control and supervision within the bay.
These function blocks are interconnected to form a control function reflecting the
switchyard configuration. The total number used depends on the switchyard
configuration. These four types are:
Bay control QCBAY
Switch controller SCSWI
Circuit breaker SXCBR
Circuit switch SXSWI
The three latter functions are logical nodes according to IEC 61850. The functions
Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle
the local/remote switch, and the functions Bay reserve (QCRSV) and Reservation
input (RESIN), for the reservation function, also belong to the apparatus control
function. The principles of operation, function block, input and output signals and
setting parameters for all these functions are described below.
12.3.3 Error handling
Depending on the error that occurs during the command sequence the error signal
will be set with a value. Table 273 describes vendor specific cause values in
addition to these specified in IEC 61850-8-1 standard. The list of values of the
cause are in order of priority. The values are available over the IEC 61850. An
output L_CAUSE on the function block for Switch controller (SCSWI), Circuit
breaker (SXCBR) and Circuit switch (SXSWI) indicates the latest value of the
error during the command.
Control
482
Table 273: Values for "cause" signal in priority order
Attribute value Description Supported
Defined in IEC 61850 0 no error X
1 serviceError-type
2 blocked-by-switching-
hierarchy
X
3 select-failed X
4 invalid-position X
5 position-reached X
6 parameter-change-in-
execution
X
7 step-limit X
8 blocked-by-mode X
9 blocked-by-process X
10 blocked-by-interlocking X
11 blocked-by-
synchrocheck
X
12 command-already-in-
execution
X
13 blocked-by-health X
14 1-of-n-control X
15 abortion-by-cancel X
16 time-limit-over X
17 abortion-by-trip X
18 object-not-selected X
19 Not in use

Control
483
Attribute value Description Supported
Vendor specific -20 Not in use
-21 Not in use
-23 blocked-for-command X
-24 blocked-for-open-
command
X
-25 blocked-for-close-
command
X
-26 Not in use
-27 Not in use
-28 Not in use
-29 Not in use
-30 long-operation-time X
-31 switch-not-start-moving X
-32 persisting-intermediate-
state
X
-33 switch-returned-to-initial-
position
X
-34 switch-in-bad-state X
-35 not-expected-final-
position
X
12.3.4 Bay control QCBAY
The bay control (QCBAY) function is used to handle the selection of the operator
place per bay. QCBAY also provides blocking functions that can be distributed to
different apparatuses within the bay.
The functionality of the Bay control (QCBAY) function is not defined in the IEC
6185081 standard, which means that the function is a vendor specific logical node.
The function sends information about the Permitted Source To Operate (PSTO)
and blocking conditions to other functions within the bay for example, switch
control functions, voltage control functions and measurement functions.
Local panel switch
The local panel switch is a switch that defines the operator place selection. The
switch connected to this function can have three positions remote/local/off. The
positions are here defined so that remote means that operation is allowed from station/
remote level and local from the IED level. The local/remote switch is normally
situated on the control/protection IED itself, which means that the position of the
Control
484
switch and its validity information are connected internally, and not via I/O boards.
When the switch is mounted separately on the IED the signals are connected to the
function via I/O boards.
When the local panel switch is in Off position all commands from remote and local
level will be ignored. If the position for the local/remote switch is not valid the
PSTO output will always be set to faulty state (3), which means no possibility to
operate.
To adapt the signals from the local HMI or from an external local/remote switch,
the function blocks LOCREM and LOCREMCTRL are needed and connected to
QCBAY.
Permitted Source To Operate (PSTO)
The actual state of the operator place is presented by the value of the Permitted
Source To Operate, PSTO signal. The PSTO value is evaluated from the local/
remote switch position according to table 274. In addition, there is one
configuration parameter that affects the value of the PSTO signal. If the parameter
AllPSTOValid is set and LR-switch position is in Local or Remote state, the PSTO
value is set to 5 (all), that is, it is permitted to operate from both local and remote
level without any priority. When the external panel switch is in Off position the
PSTO value shows the actual state of switch that is, 0. In this case it is not possible
to control anything.
Table 274: PSTO values for different Local panel switch positions
Local panel switch
positions
PSTO value AllPSTOValid
(configuration
parameter)
Possible locations that shall be able to
operate
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any
priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any
priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide
the possibility for the user to make common blockings for the functions configured
within a complete bay.
The blocking facilities provided by the bay control function are the following:
Control
485
Blocking of position indications, BL_UPD. This input will block all inputs
related to apparatus positions for all configured functions within the bay.
Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
6185081). If DO Behavior is set to "blocked" it means that the function is
active, but no outputs are generated, no reporting, control commands are
rejected and functional and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level.
The password will be requested at an attempt to operate if authority levels have
been defined in the IED. Otherwise the default authority level, SuperUser, can
handle the control without LogOn. The users and passwords are defined in PCM600.
QCBAY
LR_OFF
LR_LOC
LR_REM
LR_VALID
BL_UPD
BL_CMD
PSTO
UPD_BLKD
CMD_BLKD
IEC05000796 V2 EN
Figure 262: QCBAY function block
Table 275: QCBAY Input signals
LR_OFF BOOLEAN 0 External Local/Remote switch is in Off position
LR_LOC BOOLEAN 0 External Local/Remote switch is in Local position
LR_REM BOOLEAN 0 External Local/Remote switch is in Remote
position
LR_VALID BOOLEAN 0 Data representing the L/R switch position is valid
BL_UPD BOOLEAN 0 Steady signal to block the position updates
BL_CMD BOOLEAN 0 Steady signal to block the command
Table 276: QCBAY Output signals
PSTO INTEGER The value for the operator place allocation
UPD_BLKD BOOLEAN The update of position is blocked
CMD_BLKD BOOLEAN The function is blocked for commands
Control
486
Table 277: QCBAY Non group settings (basic)
AllPSTOValid Priority
No priority
- - Priority The priority of originators
12.3.5 Local/Remote switch
The signals from the local HMI or from an external local/remote switch are applied
via function blocks LOCREM and LOCREMCTRL to the Bay control (QCBAY)
function block. A parameter in function block LOCREM is set to choose if the
switch signals are coming from the local HMI or from an external hardware switch
connected via binary inputs.
The function block Local remote (LOCREM) handles the signals coming from the
local/remote switch. The connections are seen in figure 263, where the inputs on
function block LOCREM are connected to binary inputs if an external switch is
used. When a local HMI is used, the inputs are not used and are set to FALSE in
the configuration. The outputs from the LOCREM function block control the
output PSTO (Permitted Source To Operate) on Bay control (QCBAY).
Control
487
QCBAY
LR_OFF
LR_LOC
LR_REM
LR_VALID
BL_UPD
BL_CMD
PSTO
UPD_BLKD
CMD_BLKD
LOCREM
CTRLOFF
LOCCTRL
REMCTRL
LHMICTRL
OFF
LOCAL
REMOTE
VALID
LOCREMCTRL
PSTO1
PSTO2
PSTO3
PSTO4
PSTO5
PSTO6
PSTO7
PSTO8
PSTO9
PSTO10
PSTO11
PSTO12
HMICTR1
HMICTR2
HMICTR3
HMICTR4
HMICTR5
HMICTR6
HMICTR7
HMICTR8
HMICTR9
HMICTR10
HMICTR11
HMICTR12
QCBAY
LR_OFF
LR_LOC
LR_REM
LR_VALID
BL_UPD
BL_CMD
PSTO
UPD_BLKD
CMD_BLKD
LOCREM
CTRLOFF
LOCCTRL
REMCTRL
LHMICTRL
OFF
LOCAL
REMOTE
VALID
IEC05000250 V2 EN
Figure 263: Configuration for the local/remote handling for a local HMI with two
bays and two screen pages
If the IED contains control functions for several bays, the local/remote position can
be different for the included bays. When the local HMI is used the position of the
local/remote switch can be different depending on which single line diagram screen
page that is presented on the local HMI. The function block Local remote control
(LOCREMCTRL) controls the presentation of the LEDs for the local/remote
position to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level.
The password will be requested at an attempt to operate if authority levels have
been defined in the IED. Otherwise the default authority level, SuperUser, can
handle the control without LogOn. The users and passwords are defined in PCM600.
LOCREM
CTRLOFF
LOCCTRL
REMCTRL
LHMICTRL
OFF
LOCAL
REMOTE
VALID
IEC05000360 V2 EN
Figure 264: LOCREM function block
Control
488
LOCREMCTRL
PSTO1
PSTO2
PSTO3
PSTO4
PSTO5
PSTO6
PSTO7
PSTO8
PSTO9
PSTO10
PSTO11
PSTO12
HMICTR1
HMICTR2
HMICTR3
HMICTR4
HMICTR5
HMICTR6
HMICTR7
HMICTR8
HMICTR9
HMICTR10
HMICTR11
HMICTR12
IEC05000361 V2 EN
Figure 265: LOCREMCTRL function block
Table 278: LOCREM Input signals
CTRLOFF BOOLEAN 0 Disable control
LOCCTRL BOOLEAN 0 Local in control
REMCTRL BOOLEAN 0 Remote in control
LHMICTRL INTEGER 0 LHMI control
Table 279: LOCREM Output signals
OFF BOOLEAN Control is disabled
LOCAL BOOLEAN Local control is activated
REMOTE BOOLEAN Remote control is activated
VALID BOOLEAN Outputs are valid
Table 280: LOCREMCTRL Input signals
PSTO1 INTEGER 0 PSTO input channel 1
Control
489
Table 281: LOCREMCTRL Output signals
HMICTR1 INTEGER Bitmask output 1 to local remote LHMI input
Table 282: LOCREM Non group settings (basic)
ControlMode Internal LR-switch
External LR-switch
- - Internal LR-switch Control mode for internal/external LR-
switch
12.3.6 Switch controller SCSWI
The Switch controller (SCSWI) initializes and supervises all functions to properly
select and operate switching primary apparatuses. The Switch controller may
handle and operate on one three-phase device.
The Switch controller (SCSWI) is provided with verification checks for the select -
execute sequence, that is, checks the conditions prior each step of the operation.
The involved functions for these condition verifications are interlocking,
reservation, blockings and synchrocheck.
Control
490
Control handling
.
Two types of control models can be used. The two control models are "direct with
normal security" and "SBO (Select-Before-Operate) with enhanced security". The
parameter CtlModel defines which one of the two control models is used. The
control model "direct with normal security" does not require a select whereas, the
"SBO with enhanced security" command model requires a select before execution.
The parameter CtlModel's alternative settings Dir Norm and Dir
Norm (ABB) have identical functionality and so have SBO Enh
(ABB) and SBO Enh.
Normal security means that only the command is evaluated and the resulting
position is not supervised. Enhanced security means that the command sequence is
supervised in three steps, the selection, command evaluation and the supervision of
position. Each step ends up with a pulsed signal to indicate that the respective step
in the command sequence is finished. If an error occurs in one of the steps in the
command sequence, the sequence is terminated and the error is mapped into the
enumerated variable "cause" attribute belonging to the pulsed response signal for
the IEC 61850 communication. The last cause L_CAUSE can be read from the
function block and used for example at commissioning.
There is no relation between the command direction and the actual
position. For example, if the switch is in close position it is possible
to execute a close command.
Before an execution command, an evaluation of the position is done. If the
parameter PosDependent is true and the position is in intermediate state or in bad
state no execution command is sent. If the parameter is false the execution
command is sent independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control
function, the switch control will "merge" the position of the three switches to the
resulting three-phase position. In the case when the position differ between the one-
phase switches, following principles will be applied:
The position output from switch (SXCBR or SXSWI) is connected to SCSWI.
With the group signal connection the SCSWI obtains the position, time stamps and
quality attributes of the position which is used for further evaluation.
All switches in open position: switch control position = open
All switches in close position: switch control position = close
One switch =open, two switches= close (or
inversely):
switch control position = intermediate
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state
Control
491
The time stamp of the output three-phase position from switch control will have the
time stamp of the last changed phase when it goes to end position. When it goes to
intermediate position or bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will
change position at any time due to a trip. Such situation is here called pole
discordance and is supervised by this function. In case of a pole discordance
situation, that is, the position of the one-phase switches are not equal for a time
longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause"
values from the switch modules Circuit breaker (SXCBR)/ Circuit switch
(SXSWI). At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY)
and via the IEC 61850 communication from the operator place.
The different blocking possibilities are:
Block/deblock of command. It is used to block command for operation of
position.
61850). If DO Behavior is set to "blocked" it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and
functional and configuration data is visible.
The different block conditions will only affect the operation of this
function, that is, no blocking signals will be "forwarded" to other
functions. The above blocking outputs are stored in a non-volatile
memory.
Interaction with synchrocheck and synchronizing functions
The Switch controller (SCSWI) works in conjunction with the synchrocheck and
the synchronizing function (SESRSYN). It is assumed that the synchrocheck
function is continuously in operation and gives the result to SCSWI. The result
from the synchrocheck function is evaluated during the close execution. If the
operator performs an override of the synchrocheck, the evaluation of the
synchrocheck state is omitted. When there is a positive confirmation from the
synchrocheck function, SCSWI will send the close signal EXE_CL to the switch
function Circuit breaker (SXCBR).
When there is no positive confirmation from the synchrocheck function, SCSWI
will send a start signal START_SY to the synchronizing function, which will send
the closing command to SXCBR when the synchronizing conditions are fulfilled,
see figure 266. If no synchronizing function is included, the timer for supervision
of the "synchronizing in progress signal" is set to 0, which means no start of the
Control
492
synchronizing function. SCSWI will then set the attribute "blocked-by-
synchrocheck" in the "cause" signal. See also the time diagram in figure 270.
Synchro
check
OR
SCSWI
SXCBR
CLOSE
SYNC_OK
EXE_CL
Synchronizing
function
SY_INPRO
START_SY
CLOSECB
SESRSYN
IEC09000209 V1 EN
Figure 266: Example of interaction between SCSWI, SESRSYN (synchrocheck
and synchronizing function) and SXCBR function
Time diagrams
The Switch controller (SCSWI) function has timers for evaluating different time
supervision conditions. These timers are explained here.
The timer tSelect is used for supervising the time between the select and the
execute command signal, that is, the time the operator has to perform the command
execution after the selection of the object to operate.
select
tSelect
timer
execute command
t1
t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
IEC05000092 V1 EN
Figure 267: tSelect
The parameter tResResponse is used to set the maximum allowed time to make the
reservation, that is, the time between reservation request and the feedback
reservation granted from all bays involved in the reservation function.
Control
493
select
tResResponse
timer
reservation granted RES_GRT
t1>tResResponse, then
1-of-n-control in 'cause'
is set
t1
reservation request RES_RQ
command termination
en05000093.vsd
IEC05000093 V1 EN
Figure 268: tResResponse
The timer tExecutionFB supervises the time between the execute command and the
command termination, see figure 269.
execute command
position L1
t1>tExecutionFB, then
long-operation-time in
'cause' is set
open
close
close
open position L3
close
open position L2
t1
tExecutionFB
timer
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination
position open
close
* The cmd termination will be delayed one execution sample.
*
en05000094.vsd
IEC05000094 V1 EN
Figure 269: tExecutionFB
The parameter tSynchrocheck is used to define the maximum allowed time between
the execute command and the input SYNC_OK to become true. If SYNC_OK=true
at the time the execute command signal is received, the timer "tSynchrocheck" will
not start. The start signal for the synchronizing is obtained if the synchrocheck
conditions are not fulfilled.
Control
494
execute command
SY_INPRO
SYNC_OK
t2>tSynchronizing, then
blocked-by-synchrocheck in
'cause' is set
tSynchrocheck
t1
START_SY
tSynchronizing
t2
en05000095.vsd
IEC05000095 V1 EN
Figure 270: tSynchroCheck and tSynchronizing
SCSWI
BLOCK
PSTO
L_SEL
L_OPEN
L_CLOSE
AU_OPEN
AU_CLOSE
BL_CMD
RES_GRT
RES_EXT
SY_INPRO
SYNC_OK
EN_OPEN
EN_CLOSE
XPOS1
XPOS2
XPOS3
EXE_OP
EXE_CL
SELECTED
RES_RQ
START_SY
POSITION
OPENPOS
CLOSEPOS
POLEDISC
CMD_BLK
L_CAUSE
XOUT
POS_INTR
IEC05000337 V2 EN
Figure 271: SCSWI function block
Table 283: SCSWI Input signals
PSTO INTEGER 2 Operator place selection
L_SEL BOOLEAN 0 Select signal from local panel
L_OPEN BOOLEAN 0 Open signal from local panel
L_CLOSE BOOLEAN 0 Close signal from local panel
AU_OPEN BOOLEAN 0 Used for local automation function
AU_CLOSE BOOLEAN 0 Used for local automation function
BL_CMD BOOLEAN 0 Steady signal for block of the command
Control
495
RES_GRT BOOLEAN 0 Positive acknowledge that all reservations are
made
RES_EXT BOOLEAN 0 Reservation is made externally
SY_INPRO BOOLEAN 0 Synchronizing function in progress
SYNC_OK BOOLEAN 0 Closing is permitted at set to true by the
synchrocheck
EN_OPEN BOOLEAN 0 Enables open operation
EN_CLOSE BOOLEAN 0 Enables close operation
XPOS1 GROUP
SIGNAL
- Pos 1
XPOS2 GROUP
SIGNAL
- Pos 2
XPOS3 GROUP
SIGNAL
- Pos 3
Table 284: SCSWI Output signals
EXE_OP BOOLEAN Execute command for open direction
EXE_CL BOOLEAN Execute command for close direction
SELECTED BOOLEAN The select conditions are fulfilled
RES_RQ BOOLEAN Request signal to the reservation function
START_SY BOOLEAN Starts the synchronizing function
POSITION INTEGER Position indication
OPENPOS BOOLEAN Open position indication
CLOSEPOS BOOLEAN Closed position indication
POLEDISC BOOLEAN The positions for poles L1-L3 are not equal after
a set time
CMD_BLK BOOLEAN Commands are blocked
L_CAUSE INTEGER Latest value of the error indication during command
XOUT BOOLEAN Execution information to XCBR/XSWI
POS_INTR BOOLEAN Stopped in intermediate position
Control
496
Table 285: SCSWI Non group settings (basic)
CtlModel Dir Norm
SBO Enh (ABB)
Dir Norm (ABB)
SBO Enh
- - SBO Enh Specifies the type for control model
according to IEC 61850
PosDependent Always permitted
Not perm at 00/11
- - Always permitted Permission to operate depending on the
position
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tResResponse 0.000 - 60.000 s 0.001 5.000 Allowed time from reservation request to
reservation granted
tSynchrocheck 0.00 - 600.00 s 0.01 10.00 Allowed time for synchrocheck to fulfil
close conditions
tSynchronizing 0.00 - 600.00 s 0.01 0.00 Supervision time to get the signal
synchronizing in progress
tExecutionFB 0.00 - 600.00 s 0.01 30.00 Max time from command execution to
termination
tPoleDiscord 0.000 - 60.000 s 0.001 2.000 Allowed time to have discrepancy
between the poles
12.3.7 Circuit breaker SXCBR
The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions
and to perform the control operations, that is, pass all the commands to primary
apparatuses in the form of circuit breakers via output boards and to supervise the
switching operation and position.
The users of the Circuit breaker function (SXCBR) is other functions such as for
example, switch controller, protection functions, autorecloser function or an IEC
61850 client residing in another IED or the operator place. This switch function
executes commands, evaluates block conditions and evaluates different time
supervision conditions. Only if all conditions indicate a switch operation to be
allowed, the function performs the execution command. In case of erroneous
conditions, the function indicates an appropriate "cause" value.
SXCBR has an operation counter for closing and opening commands. The counter
value can be read remotely from the operator place. The value is reset from a
binary input or remotely from the operator place by configuring a signal from the
Single Point Generic Control 8 signals (SPC8GGIO) for example.
Control
497
Local/Remote switch
One binary input signal LR_SWI is included in SXCBR to indicate the local/
remote switch position from switchyard provided via the I/O board. If this signal is
set to TRUE it means that change of position is allowed only from switchyard
level. If the signal is set to FALSE it means that command from IED or higher
level is permitted. When the signal is set to TRUE all commands (for change of
position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is
described in figure 272.
From I/O switchLR
T
R
U
E
F
A
L
S
E
Local= Operation at
switch yard level
Remote= Operation at
IED or higher level
en05000096.vsd
IEC05000096 V1 EN
Figure 272: Local/Remote switch
Blocking principles
SXCBR includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients for example,
operators place, protection functions, autoreclosure and so on.
The blocking possibilities are:
Block/deblock for open command. It is used to block operation for open
command. Note that this block signal also affects the input OPEN for
immediate command.
Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for
immediate command.
Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in SXCBR is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because that the real process value is erroneous for some reason. SXCBR will then
Control
498
use the manually entered value instead of the value for positions determined by the
process.
It is always possible to make a substitution, independently of the
position indication and the status information of the I/O board.
When substitution is enabled, the position values are blocked for
updating and other signals related to the position are reset. The
substituted values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 273 explains these two timers during the execute phase.
EXE_CL
tStartMove timer
OPENPOS
CLOSEPOS
tIntermediate timer
t1
t2
tStartMove
tIntermediate
if t1 > tStartMove then
"switch-not-start-moving"
attribute in 'cause' is set
if t2 > tIntermediate then
"persisting-intermediate-state"
Close pulse duration
AdaptivePulse = TRUE
en05000097.vsd
IEC05000097 V1 EN
Figure 273: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be
adaptive with the configuration parameter AdaptivePulse. Figure 274 shows the
principle of the execute output pulse. The AdaptivePulse parameter will have affect
on both execute output pulses.
Control
499
EXE_CL
CLOSEPOS
EXE_CL
OPENPOS
AdaptivePulse=FALSE
tClosePulse
tClosePulse
AdaptivePulse=TRUE
en05000098.vsd
IEC05000098 V1 EN
Figure 274: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:
the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
the timer tOpenPulse or tClosePulse has elapsed
an error occurs due to the switch does not start moving, that is, tStartMove has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in closed
position and a close command is executed. In these cases, with the additional
condition that the configuration parameter AdaptivePulse is true, the execute output
pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and
CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer tOpenPulse or tClosePulse has elapsed.
An example of when a primary device is open and an open command is executed is
shown in figure 275 .
Control
500
EXE_OP
CLOSEPOS
EXE_OP
OPENPOS
AdaptivePulse=FALSE
tOpenPulse
tOpenPulse
AdaptivePulse=TRUE
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN
Figure 275: Open command with open position indication
SXCBR
BLOCK
LR_SWI
OPEN
CLOSE
BL_OPEN
BL_CLOSE
BL_UPD
POSOPEN
POSCLOSE
TR_OPEN
TR_CLOSE
RS_CNT
XIN
XPOS
EXE_OP
EXE_CL
SUBSTED
OP_BLKD
CL_BLKD
UPD_BLKD
POSITION
OPENPOS
CLOSEPOS
TR_POS
CNT_VAL
L_CAUSE
IEC05000338 V2 EN
Figure 276: SXCBR function block
Table 286: SXCBR Input signals
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
Control
501
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
TR_OPEN BOOLEAN 0 Signal for open position of truck from I/O
TR_CLOSE BOOLEAN 0 Signal for close position of truck from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
XIN BOOLEAN 0 Execution information from CSWI
Table 287: SXCBR Output signals
XPOS GROUP SIGNAL Group signal for XCBR output
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open
commands
CL_BLKD BOOLEAN Indication that the function is blocked for close
commands
UPD_BLKD BOOLEAN The update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
TR_POS INTEGER Truck position indication
CNT_VAL INTEGER The value of the operation counter
Table 288: SXCBR Non group settings (basic)
tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate position
AdaptivePulse Not adaptive
Adaptive
- - Not adaptive The output resets when a new correct
end position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
12.3.8 Circuit switch SXSWI
Control
502
The purpose of Circuit switch (SXSWI) function is to provide the actual status of
positions and to perform the control operations, that is, pass all the commands to
primary apparatuses in the form of disconnectors or earthing switches via output
boards and to supervise the switching operation and position.
The users of the Circuit switch (SXSWI) is other functions such as for example,
switch controller, protection functions, autorecloser function, or a 61850 client
residing in another IED or the operator place. SXSWI executes commands,
evaluates block conditions and evaluates different time supervision conditions.
Only if all conditions indicate a switch operation to be allowed, SXSWI performs
the execution command. In case of erroneous conditions, the function indicates an
appropriate "cause" value.
SXSWI has an operation counter for closing and opening commands. The counter
value can be read remotely from the operator place. The value is reset from a
binary input or remotely from the operator place by configuring a signal from the
Single Point Generic Control 8 signals (SPC8GGIO) for example.
Local/Remote switch
One binary input signal LR_SWI is included in SXSWI to indicate the local/remote
switch position from switchyard provided via the I/O board. If this signal is set to
TRUE it means that change of position is allowed only from switchyard level. If
the signal is set to FALSE it means that command from IED or higher level is
permitted. When the signal is set to TRUE all commands (for change of position)
from internal IED clients are rejected, even trip commands from protection
functions are rejected. The functionality of the local/remote switch is described in
figure 277.
From I/O switchLR
T
R
U
E
F
A
L
S
E
Local= Operation at
switch yard level
Remote= Operation at
IED or higher level
en05000096.vsd
IEC05000096 V1 EN
Figure 277: Local/Remote switch
Blocking principles
SXSWI includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients for example,
operators place, protection functions, autorecloser and so on.
Control
503
The blocking possibilities are:
Block/deblock for open command. It is used to block operation for open
command. Note that this block signal also affects the input OPEN for
immediate command.
Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for
immediate command.
Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in SXSWI is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because the real process value is erroneous of some reason. SXSWI will then use
the manually entered value instead of the value for positions determined by the
process.
It is always possible to make a substitution, independently of the
position indication and the status information of the I/O board.
When substitution is enabled, the position values are blocked for
updating and other signals related to the position are reset. The
substituted values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 278 explains these two timers during the execute phase.
Control
504
EXE_CL
tStartMove timer
OPENPOS
CLOSEPOS
tIntermediate timer
t1
t2
tStartMove
tIntermediate
if t1 > tStartMove then
"switch-not-start-moving"
if t2 > tIntermediate then
"persisting-intermediate-state"
Close pulse duration
AdaptivePulse = TRUE
en05000097.vsd
IEC05000097 V1 EN
Figure 278: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be
adaptive with the configuration parameter AdaptivePulse. Figure 279 shows the
principle of the execute output pulse. The AdaptivePulse parameter will have affect
on both execute output pulses.
EXE_CL
CLOSEPOS
EXE_CL
OPENPOS
AdaptivePulse=FALSE
tClosePulse
tClosePulse
AdaptivePulse=TRUE
en05000098.vsd
IEC05000098 V1 EN
Figure 279: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:
Control
505
If the start position indicates bad state (OPENPOS=1 and
CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer tOpenPulse or tClosePulse has elapsed.
the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
the timer tOpenPulse or tClosePulse has elapsed
an error occurs due to the switch does not start moving, that is, tStartMove has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in close
position and a close command is executed. In these cases, with the additional
condition that the configuration parameter AdaptivePulse is true, the execute output
pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.
An example when a primary device is open and an open command is executed is
shown in figure 280.
EXE_OP
CLOSEPOS
EXE_OP
OPENPOS
AdaptivePulse=FALSE
tOpenPulse
tOpenPulse
AdaptivePulse=TRUE
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN
Figure 280: Open command with open position indication
Control
506
SXSWI
BLOCK
LR_SWI
OPEN
CLOSE
BL_OPEN
BL_CLOSE
BL_UPD
POSOPEN
POSCLOSE
RS_CNT
XIN
XPOS
EXE_OP
EXE_CL
SUBSTED
OP_BLKD
CL_BLKD
UPD_BLKD
POSITION
OPENPOS
CLOSEPOS
CNT_VAL
L_CAUSE
IEC05000339 V2 EN
Figure 281: SXSWI function block
Table 289: SXSWI Input signals
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
XIN BOOLEAN 0 Execution information from CSWI
Table 290: SXSWI Output signals
XPOS GROUP SIGNAL Group signal for XSWI output
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open
commands
CL_BLKD BOOLEAN Indication that the function is blocked for close
commands
UPD_BLKD BOOLEAN The update of position indication is blocked
POSITION INTEGER Apparatus position indication
Control
507
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
CNT_VAL INTEGER The value of the operation counter
Table 291: SXSWI Non group settings (basic)
tStartMove 0.000 - 60.000 s 0.001 3.000 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 15.000 Allowed time for intermediate position
AdaptivePulse Not adaptive
Adaptive
- - Not adaptive The output resets when a new correct
end position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
SwitchType Load Break
Disconnector
Earthing Switch
HS Earthing Switch
- - Disconnector Switch Type
12.3.9 Bay reserve QCRSV
The purpose of the reservation function is primarily to transfer interlocking
information between IEDs in a safe way and to prevent double operation in a bay,
switchyard part, or complete substation.
The Bay reserve (QCRSV) function handles the reservation. QCRSV function
starts to operate in two ways. It starts when there is a request for reservation of the
own bay or if there is a request for reservation from another bay. It is only possible
to reserve the function if it is not currently reserved. The signal that can reserve the
own bay is the input signal RES_RQx (x=1-8) coming from switch controller
(SCWI). The signals for request from another bay are the outputs RE_RQ_B and
V_RE_RQ from function block RESIN. These signals are included in signal
EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV.
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay
only (TRUE) or other bays (FALSE). To reserve the own bay only means that no
reservation request RES_BAYS is created.
Control
508
Reservation request of own bay
If the reservation request comes from the own bay, the function QCRSV has to
know which apparatus the request comes from. This information is available with
the input signal RES_RQx and parameter ParamRequestx (where x=1-8 is the
number of the requesting apparatus). In order to decide if a reservation request of
the current bay can be permitted QCRSV has to know whether the own bay already
is reserved by itself or another bay. This information is available in the output
signal RESERVED.
If the RESERVED output is not set, the selection is made with the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus), which is
connected to switch controller SCSWI. If the bay already is reserved the command
sequence will be reset and the SCSWI will set the attribute "1-of-n-control" in the
"cause" signal.
Reservation of other bays
When the function QCRSV receives a request from an apparatus in the own bay
that requires other bays to be reserved as well, it checks if it already is reserved. If
not, it will send a request to the other bays that are predefined (to be reserved) and
wait for their response (acknowledge). The request of reserving other bays is done
by activating the output RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the
output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not
acknowledgement from all bays is received within a certain time defined in SCSWI
(tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-n-
control" in the "cause" signal.
Reservation request from another bay
When another bay requests for reservation, the input BAY_RES in corresponding
function block RESIN is activated. The signal for reservation request is grouped
into the output signal EXCH_OUT in RESIN, which is connected to input
RES_DATA in QCRSV. If the bay is not reserved, the bay will be reserved and the
acknowledgment from output ACK_T_B is sent back to the requested bay. If the
bay already is reserved the reservation is kept and no acknowledgment is sent.
Blocking and overriding of reservation
If QCRSV function is blocked (input BLK_RES is set to true) the reservation is
blocked. That is, no reservation can be made from the own bay or any other bay.
This can be set, for example, via a binary input from an external device to prevent
operations from another operator place at the same time.
The reservation function can also be overridden in the own bay with the
OVERRIDE input signal, that is, reserving the own bay without waiting for the
external acknowledge.
Bay with more than eight apparatuses
If only one instance of QCRSV is used for a bay that is, use of up to eight
apparatuses, the input EXCH_IN must be set to FALSE.
Control
509
If there are more than eight apparatuses in the bay there has to be one additional
QCRSV. The two QCRSV functions have to communicate and this is done through
the input EXCH_IN and EXCH_OUT according to figure 282. If more then one
QCRSV are used, the execution order is very important. The execution order must
be in the way that the first QCRSV has a lower number than the next one.
QCRSV
EXCH_IN
RES_RQ1
RES_RQ2
RES_RQ3
RES_RQ4
RES_RQ5
RES_RQ6
RES_RQ7
RES_RQ8
BLK_RES
OVERRIDE
RES_DATA
RES_GRT1
RES_GRT2
RES_GRT3
RES_GRT4
RES_GRT5
RES_GRT6
RES_GRT7
RES_GRT8
RES_BAYS
ACK_TO_B
RESERVED
EXCH_OUT
QCRSV
EXCH_IN
RES_RQ1
RES_RQ2
RES_RQ3
RES_RQ4
RES_RQ5
RES_RQ6
RES_RQ7
RES_RQ8
BLK_RES
OVERRIDE
RES_DATA
RES_GRT1
RES_GRT2
RES_GRT3
RES_GRT4
RES_GRT5
RES_GRT6
RES_GRT7
RES_GRT8
RES_BAYS
ACK_TO_B
RESERVED
EXCH_OUT
1
1
1
RESERVED
ACK_TO_B
RES_BAYS
IEC05000088 V2 EN
Figure 282: Connection of two QCRSV function blocks
QCRSV
EXCH_IN
RES_RQ1
RES_RQ2
RES_RQ3
RES_RQ4
RES_RQ5
RES_RQ6
RES_RQ7
RES_RQ8
BLK_RES
OVERRIDE
RES_DATA
RES_GRT1
RES_GRT2
RES_GRT3
RES_GRT4
RES_GRT5
RES_GRT6
RES_GRT7
RES_GRT8
RES_BAYS
ACK_TO_B
RESERVED
EXCH_OUT
IEC05000340 V2 EN
Figure 283: QCRSV function block
Control
510
Table 292: QCRSV Input signals
EXCH_IN INTEGER 0 Used for exchange signals between different
BayRes blocks
RES_RQ1 BOOLEAN 0 Signal for app. 1 that requests to do a reservation
BLK_RES BOOLEAN 0 Reservation is not possible and the output signals
are reset
OVERRIDE BOOLEAN 0 Signal to override the reservation
RES_DATA INTEGER 0 Reservation data coming from function block ResIn
Table 293: QCRSV Output signals
RES_GRT1 BOOLEAN Reservation is made and the app. 1 is allowed to
operate
operate
operate
operate
operate
operate
operate
operate
RES_BAYS BOOLEAN Request for reservation of other bays
ACK_TO_B BOOLEAN Acknowledge to other bays that this bay is reserved
RESERVED BOOLEAN Indicates that the bay is reserved
EXCH_OUT INTEGER Used for exchange signals between different
BayRes blocks
Control
511
Table 294: QCRSV Non group settings (basic)
tCancelRes 0.000 - 60.000 s 0.001 10.000 Supervision time for canceling the
reservation
ParamRequest1 Other bays res.
Only own bay res.
- - Only own bay res. Reservation of the own bay only, at
selection of apparatus 1
Only own bay res.
Only own bay res.
Only own bay res.
Only own bay res.
Only own bay res.
Only own bay res.
Only own bay res.
12.3.10 Reservation input RESIN
The Reservation input (RESIN) function receives the reservation information from
other bays. The number of instances is the same as the number of involved bays
(up to 60 instances are available).
The reservation input (RESIN) function is based purely on Boolean logic
conditions. The logic diagram in figure 284 shows how the output signals are
created. The inputs of the function block are connected to a receive function block
representing signals transferred over the station bus from another bay.
Control
512
en05000089.vsd
&
1
1
&
1
1
&
1
FutureUse
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V _RE_RQ
BAY_VAL
BAY_RES
EXCH_IN
INT
BIN
BIN
INT
EXCH_OUT
BAY_ACK
IEC05000089 V1 EN
Figure 284: Logic diagram for RESIN
Figure 285 describes the principle of the data exchange between all RESIN
modules in the current bay. There is one RESIN function block per "other bay"
used in the reservation mechanism. The output signal EXCH_OUT in the last
RESIN functions are connected to the module bay reserve (QCRSV) that handles
the reservation function in the own bay. The value to the input EXCH_IN on the
first RESIN module in the chain has the integer value 5. This is provided by the use
of instance number one of the function block RESIN, where the input EXCH_IN is
set to #5, but is hidden for the user.
Control
513
Bay 1
Bay 2
Bay n
QCRSV
RES_DATA
RESIN
EXCH_IN
BAY_ACK
BAY_VAL
BAY_RES
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
BAY_ACK
BAY_VAL
BAY_RES
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN
BAY_ACK
BAY_VAL
BAY_RES
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
en05000090.vsd
IEC05000090 V2 EN
Figure 285: Diagram of the chaining principle for RESIN
RESIN1
BAY_ACK
BAY_VAL
BAY_RES
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC05000341 V2 EN
Figure 286: RESIN1 function block
RESIN2
EXCH_IN
BAY_ACK
BAY_VAL
BAY_RES
ACK_F_B
ANY_ACK
VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC09000807 V1 EN
Figure 287: RESIN2 function block
Control
514
Table 295: RESIN1 Input signals
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req.
from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another
bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 296: RESIN1 Output signals
ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from
this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from
this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays
are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
ResIn blocks
Table 297: RESIN2 Input signals
EXCH_IN INTEGER 5 Used for exchange signals between different
ResIn blocks
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req.
from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another
bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 298: RESIN2 Output signals
ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from
this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from
this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays
are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
ResIn blocks
Control
515
Table 299: RESIN1 Non group settings (basic)
FutureUse Bay in use
Bay future use
- - Bay in use The bay for this ResIn block is for future
use
Table 300: RESIN2 Non group settings (basic)
FutureUse Bay in use
Bay future use
- - Bay in use The bay for this ResIn block is for future
use
12.4 Interlocking
12.4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching
devices, for instance when a disconnector is under load, in order to prevent
material damage and/or accidental human injury.
Each control IED has interlocking functions for different switchyard arrangements,
each handling the interlocking of one bay. The function is distributed to each
control IED and not dependent on any central function. For the station-wide
interlocking, the IEDs communicate via the station bus or by using hard wired
binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the
installation at any given time.
The interlocking function consists of software modules located in each control
IED. The function is distributed and not dependent on any central function.
Communication between modules in different bays is performed via the station bus.
The reservation function (see section "Introduction") is used to ensure that HV
apparatuses that might affect the interlock are blocked during the time gap, which
arises between position updates. This can be done by means of the communication
system, reserving all HV apparatuses that might influence the interlocking
condition of the intended operation. The reservation is maintained until the
operation is performed.
After the selection and reservation of an apparatus, the function has complete data
on the status of all apparatuses in the switchyard that are affected by the selection.
Control
516
Other operators cannot interfere with the reserved apparatus or the status of
switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules
distributed in the control IEDs. Each module contains the interlocking logic for a
bay. The interlocking logic in a module is different, depending on the bay function
and the switchyard arrangements, that is, double-breaker or 1 1/2 breaker bays have
different modules. Specific interlocking conditions and connections between
standard interlocking modules are performed with an engineering tool. Bay-level
interlocking signals can include the following kind of information:
Positions of HV apparatuses (sometimes per phase)
Valid positions (if evaluated in the control module)
External release (to add special conditions for release)
Line voltage (to block operation of line earthing switch)
Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as
shown in figure 288.
Interlocking
modules in
other bays
Interlocking
module
SCILO SCSWI
Apparatus control
modules
SXCBR
SCILO SCSWI SXSWI
Apparatus control
modules
SCILO SCSWI SXSWI
Apparatus control
modules
en04000526.vsd
IEC04000526 V1 EN
Figure 288: Interlocking module on bay level
Bays communicate via the station bus and can convey information regarding the
following:
Unearthed busbars
Busbars connected together
Other bays connected to a busbar
Received data from other bays is valid
Figure 289 illustrates the data exchange principle.
Control
517
Disc QB1 and QB2 closed
WA1 not earthed
WA2 not earthed
WA1 and WA2 interconn
Disc QB1 and QB2 closed
WA1 not earthed
WA2 not earthed
. . .
. .
Station bus
QB1
WA1
WA2
Bay 1 Bay n Bus coupler
WA1 unearthed
WA1 unearthed
in other bay
QB2
QA1
QB9
QB1 QB2
QA1
QB9
QB2 QB1
QA1
QC1 QC2
en05000494.vsd
IEC05000494 V1 EN
Figure 289: Data exchange between interlocking modules
When invalid data such as intermediate position, loss of a control IED, or input
board error are used as conditions for the interlocking condition in a bay, a release
for execution of the function will not be given.
On the local HMI an override function exists, which can be used to bypass the
interlocking function in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
The interlocking conditions for opening or closing of disconnectors and
earthing switches are always identical.
Earthing switches on the line feeder end, for example, rapid earthing switches,
are normally interlocked only with reference to the conditions in the bay where
they are located, not with reference to switches on the other side of the line. So
a line voltage indication may be included into line interlocking modules. If
there is no line voltage supervision within the bay, then the appropriate inputs
must be set to no voltage, and the operator must consider this when operating.
Earthing switches can only be operated on isolated sections for example,
without load/voltage. Circuit breaker contacts cannot be used to isolate a
section, that is, the status of the circuit breaker is irrelevant as far as the
earthing switch operation is concerned.
Disconnectors cannot break power current or connect different voltage
systems. Disconnectors in series with a circuit breaker can only be operated if
the circuit breaker is open, or if the disconnectors operate in parallel with other
closed connections. Other disconnectors can be operated if one side is
completely isolated, or if the disconnectors operate in parallel to other closed
connections, or if they are earthed on both sides.
Circuit breaker closing is only interlocked against running disconnectors in its
bay or additionally in a transformer bay against the disconnectors and earthing
Control
518
switch on the other side of the transformer, if there is no disconnector between
CB and transformer.
Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar
transfer is in progress.
To make the implementation of the interlocking function easier, a number of
standardized and tested software interlocking modules containing logic for the
interlocking conditions are available:
Line for double and transfer busbars, ABC_LINE
Bus for double and transfer busbars, ABC_BC
Transformer bay for double busbars, AB_TRAFO
Bus-section breaker for double busbars, A1A2_BS
Bus-section disconnector for double busbars, A1A2_DC
Busbar earthing switch, BB_ES
Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customer specific
requirements, by adding configurable logic by means of the graphical configuration
tool PCM600. The inputs Qx_EXy on the interlocking modules are used to add
these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at
the transfer of information from other bays. Required signals with designations
ending in TR are intended for transfer to other bays.
12.4.3 Logical node for interlocking SCILO
The Logical node for interlocking SCILO function is used to enable a switching
operation if the interlocking conditions permit. SCILO function itself does not
provide any interlocking functionality. The interlocking conditions are generated in
separate function blocks containing the interlocking logic.
The function contains logic to enable the open and close commands respectively if
the interlocking conditions are fulfilled. That means also, if the switch has a
defined end position for example, open, then the appropriate enable signal (in this
case EN_OPEN) is false. The enable signals EN_OPEN and EN_CLOSE can be
true at the same time only in the intermediate and bad position state and if they are
enabled by the interlocking function. The position inputs come from the logical
nodes Circuit breaker/Circuit switch (SXCBR/SXSWI) and the enable signals
Control
519
come from the interlocking logic. The outputs are connected to the logical node
Switch controller (SCSWI). One instance per switching device is needed.
OPEN_EN
POSOPEN
POSCLOSE
1
EN_OPEN
EN_CLOSE CLOSE_EN
SCILO
=1
&
>1
>1
&
&
&
en04000525.vsd
IEC04000525 V1 EN
Figure 290: SCILO function logic diagram
SCILO
POSOPEN
POSCLOSE
OPEN_EN
CLOSE_EN
EN_OPEN
EN_CLOSE
IEC05000359 V2 EN
Figure 291: SCILO function block
Table 301: SCILO Input signals
POSOPEN BOOLEAN 0 Open position of switch device
POSCLOSE BOOLEAN 0 Closed position of switch device
OPEN_EN BOOLEAN 0 Open operation from interlocking logic is enabled
CLOSE_EN BOOLEAN 0 Close operation from interlocking logic is enabled
Table 302: SCILO Output signals
EN_OPEN BOOLEAN Open operation at closed or interm. or bad pos. is
enabled
EN_CLOSE BOOLEAN Close operation at open or interm. or bad pos. is
enabled
12.4.4 Interlocking for busbar earthing switch BB_ES
Control
520
The interlocking for busbar earthing switch (BB_ES) function is used for one
busbar earthing switch on any busbar parts according to figure 292.
QC
en04000504.vsd
IEC04000504 V1 EN
Figure 292: Switchyard layout BB_ES
BB_ES
QC_OP
QC_CL
BB_DC_OP
VP_BB_DC
EXDU_BB
QCREL
QCITL
BBESOPTR
BBESCLTR
IEC05000347 V2 EN
Figure 293: BB_ES function block
EXDU_BB
en04000546.vsd
VP_BB_DC
BB_DC_OP
1
QCREL
QCITL
&
BBESOPTR
BBESCLTR
QC_OP
QC_CL
BB_ES
IEC04000546 V1 EN
Table 303: BB_ES Input signals
QC_OP BOOLEAN 0 Busbar earthing switch QC is in open position
QC_CL BOOLEAN 0 Busbar earthing switch QC is in closed position
BB_DC_OP BOOLEAN 0 All disconnectors on this busbar part are open
VP_BB_DC BOOLEAN 0 Status for all disconnectors on this busbar part
are valid
EXDU_BB BOOLEAN 0 No transm error from bays with disc on this
busbar part
Control
521
Table 304: BB_ES Output signals
QCREL BOOLEAN Switching of QC is allowed
QCITL BOOLEAN Switching of QC is forbidden
BBESOPTR BOOLEAN QC on this busbar part is in open position
BBESCLTR BOOLEAN QC on this busbar part is in closed position
12.4.5 Interlocking for bus-section breaker A1A2_BS
The interlocking for bus-section breaker (A1A2_BS) function is used for one bus-
section circuit breaker between section 1 and 2 according to figure 294. The
function can be used for different busbars, which includes a bus-section circuit
breaker.
QA1
WA1 (A1)
QB2
QC4
QB1
QC3
WA2 (A2)
en04000516.vsd
QC2 QC1
A1A2_BS
IEC04000516 V1 EN
Figure 294: Switchyard layout A1A2_BS
Control
522
A1A2_BS
QA1_OP
QA1_CL
QB1_OP
QB1_CL
QB2_OP
QB2_CL
QC3_OP
QC3_CL
QC4_OP
QC4_CL
S1QC1_OP
S1QC1_CL
S2QC2_OP
S2QC2_CL
BBTR_OP
VP_BBTR
EXDU_12
EXDU_ES
QA1O_EX1
QA1O_EX2
QA1O_EX3
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
QA1OPREL
QA1OPITL
QA1CLREL
QA1CLITL
QB1REL
QB1ITL
QB2REL
QB2ITL
QC3REL
QC3ITL
QC4REL
QC4ITL
S1S2OPTR
S1S2CLTR
QB1OPTR
QB1CLTR
QB2OPTR
QB2CLTR
VPS1S2TR
VPQB1TR
VPQB2TR
IEC05000348 V2 EN
Figure 295: A1A2_BS function block
Control
523
QA1_OP
QB1_OP
QA1_CL
QB1_CL
QB2_CL
QB2_OP
QC3_OP
QC4_CL
S2QC2_CL
QC4_OP
S2QC2_OP
S1QC1_CL
S1QC1_OP
1
QA1OPITL
QA1OPREL
en04000542.vsd
=1
=1
=1
=1
=1
=1
=1
QC3_CL
VPS2QC2
VPS1QC1
VPQC4
VPQC3
VPQB2
VPQB1
VPQA1
A1A2_BS
& >1
&
&
VPQB1
QB1_OP
QA1O_EX1
VPQB2
QB2_OP
QA1O_EX2
VP_BBTR
BBTR_OP
EXDU_12
QA1O_EX3
1
QA1CLITL &
QA1CLREL VPQB1
VPQB2
& >1
&
1
QB1ITL
QB1REL
VPQA1
VPQC3
VPQC4
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
VPQC3
VPS1QC1
QC3_CL
S1QC1_CL
EXDU_ES
EXDU_ES
QB1_EX1
QB1_EX2
IEC04000542 V1 EN
Control
524
VPQA1
VPQC4
VPQC3
VPS2QC2
QC3_OP
QA1_OP
QC4_OP
EXDU_ES
VPS2QC2
S2QC2_OP
QB2_EX1
VPQC4
S2QC2_CL
QC4_CL
QB1_OP
QB2_OP
QB1_OP
QA1_OP
QB2_CL
VPQB2
QB2_OP
VPQB1
QB1_CL
QB1_OP
VPQB2
VPQB1
VPQA1
1
QB2ITL
QB2REL
en04000543.vsd
EXDU_ES
QB2_EX2
VPQB1
VPQB2
1
QC3REL
QC3ITL
QB2_OP
>1
1
S1S2CLTR
QB2OPTR
&
&
1
QC4REL
QC4ITL
QB1OPTR
QB1CLTR
VPQB1TR
QB2CLTR
VPQB2TR
& >1
&
S1S2OPTR
VPS1S2TR
IEC04000543 V1 EN
Table 305: A1A2_BS Input signals
QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
S1QC1_OP BOOLEAN 0 QC1 on bus section 1 is in open position
S1QC1_CL BOOLEAN 0 QC1 on bus section 1 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar
transfer
Control
525
EXDU_12 BOOLEAN 0 No transm error from any bay connected to
busbar 1 and 2
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw.
QC1 or QC2
QA1O_EX1 BOOLEAN 0 External open condition for apparatus QA1
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
Table 306: A1A2_BS Output signals
QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
S1S2OPTR BOOLEAN No bus section connection between bus section 1
and 2
S1S2CLTR BOOLEAN Bus coupler connection between bus section 1
and 2 exists
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
VPS1S2TR BOOLEAN Status of the app. between bus section 1 and 2
are valid
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
12.4.6 Interlocking for bus-section disconnector A1A2_DC
Control
526
The interlocking for bus-section disconnector (A1A2_DC) function is used for one
bus-section disconnector between section 1 and 2 according to figure 296.
A1A2_DC function can be used for different busbars, which includes a bus-section
disconnector.
WA1 (A1) WA2 (A2)
QB
QC1 QC2
A1A2_DC
en04000492.vsd
IEC04000492 V1 EN
Figure 296: Switchyard layout A1A2_DC
A1A2_DC
QB_OP
QB_CL
S1QC1_OP
S1QC1_CL
S2QC2_OP
S2QC2_CL
S1DC_OP
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
QBOPREL
QBOPITL
QBCLREL
QBCLITL
DCOPTR
DCCLTR
VPDCTR
IEC05000349 V2 EN
Figure 297: A1A2_DC function block
Control
527
QB_OP
QB_CL
S1QC1_CL
en04000544.vsd
=1
=1
=1
VPQB VPDCTR
DCOPTR
DCCLTR
S1QC1_OP
S2QC2_OP
S2QC2_CL
VPS1QC1
VPS2QC2
& >1
&
&
1
QBOPITL
QBOPREL
VPS1QC1
VPS2QC2
VPS1_DC
S1QC1_OP
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL
S2QC2_CL
EXDU_ES
QBOP_EX3
A1A2_DC
IEC04000544 V1 EN
IEC04000545 V1 EN
Table 307: A1A2_DC Input signals
QB_OP BOOLEAN 0 QB is in open position
QB_CL BOOLEAN 0 QB is in closed position
Control
528
S1DC_OP BOOLEAN 0 All disconnectors on bus section 1 are in open
position
S2DC_OP BOOLEAN 0 All disconnectors on bus section 2 are in open
position
VPS1_DC BOOLEAN 0 Switch status of disconnectors on bus section 1
are valid
VPS2_DC BOOLEAN 0 Switch status of disconnectors on bus section 2
are valid
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw.
QC1 or QC2
EXDU_BB BOOLEAN 0 No transm error from bays with disc conn to
section 1 and 2
QBCL_EX1 BOOLEAN 0 External close condition for section disconnector
QB
QBCL_EX2 BOOLEAN 0 External close condition for section disconnector
QB
QBOP_EX1 BOOLEAN 0 External open condition for section disconnector
QB
QB
QB
Table 308: A1A2_DC Output signals
QBOPREL BOOLEAN Opening of QB is allowed
QBOPITL BOOLEAN Opening of QB is forbidden
QBCLREL BOOLEAN Closing of QB is allowed
QBCLITL BOOLEAN Closing of QB is forbidden
DCOPTR BOOLEAN The bus section disconnector is in open position
DCCLTR BOOLEAN The bus section disconnector is in closed position
VPDCTR BOOLEAN Switch status of QB is valid (open or closed)
12.4.7 Interlocking for bus-coupler bay ABC_BC
The interlocking for bus-coupler bay (ABC_BC) function is used for a bus-coupler
bay connected to a double busbar arrangement according to figure 298. The
function can also be used for a single busbar arrangement with transfer busbar or
double busbar arrangement without transfer busbar.
Control
529
QB1 QB2
QC1
QA1
WA1 (A)
WA2 (B)
WA7 (C)
QB7 QB20
QC2
en04000514.vsd
IEC04000514 V1 EN
Figure 298: Switchyard layout ABC_BC
ABC_BC
QA1_OP
QA1_CL
QB1_OP
QB1_CL
QB2_OP
QB2_CL
QB7_OP
QB7_CL
QB20_OP
QB20_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QC11_OP
QC11_CL
QC21_OP
QC21_CL
QC71_OP
QC71_CL
BBTR_OP
BC_12_CL
VP_BBTR
VP_BC_12
EXDU_ES
EXDU_12
EXDU_BC
QA1O_EX1
QA1O_EX2
QA1O_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB20_EX1
QB20_EX2
QB7_EX1
QB7_EX2
QA1OPREL
QA1OPITL
QA1CLREL
QA1CLITL
QB1REL
QB1ITL
QB2REL
QB2ITL
QB7REL
QB7ITL
QB20REL
QB20ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QB1OPTR
QB1CLTR
QB220OTR
QB220CTR
QB7OPTR
QB7CLTR
QB12OPTR
QB12CLTR
BC12OPTR
BC12CLTR
BC17OPTR
BC17CLTR
BC27OPTR
BC27CLTR
VPQB1TR
VQB220TR
VPQB7TR
VPQB12TR
VPBC12TR
VPBC17TR
VPBC27TR
IEC05000350 V2 EN
Figure 299: ABC_BC function block
Control
530
QA1_OP
QB1_OP
QA1_CL
QB1_CL
QB20_CL
QB20_OP
QB7_OP
QB2_CL
QC11_OP
QC2_CL
QB2_OP
QC2_OP
QC1_CL
QC1_OP
QC11_CL
QC71_OP
VPQB1
QC71_CL
QB1_OP
QC21_CL
QC21_OP
QA1O_EX1
VPQB2
VPQB1
QA1O_EX3
EXDU_12
BBTR_OP
VP_BBTR
QA1O_EX2
QB20_OP
VPQB20
VPQB7
VPQB20
1
QA1OPITL
QA1OPREL
QA1CLREL
1
QA1CLITL
en04000533.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QB7_CL
VPQC71
VPQC21
VPQC11
VPQC2
VPQC1
VPQB2
VPQB7
VPQB20
VPQB1
VPQA1
ABC_BC
&
&
&
>1
&
IEC04000533 V1 EN
VPQA1
VPQC1
VPQB2
VPQC2
QA1_OP
VPQC11
QB2_OP
QC2_OP
VPQB2
QB1_EX1
QC1_OP
EXDU_ES
QC11_OP
VP_BC_12
EXDU_BC
VPQC1
QB1_EX2
VPQC11
BC_12_CL
QB2_CL
QC1_CL
QB1_EX3
EXDU_ES
QC11_CL
1
QB1ITL
en04000534.vsd
&
&
>1
&
QB1REL
IEC04000534 V1 EN
Control
531
VPQA1
VPQC1
VPQB1
VPQC2
QA1_OP
VPQC21
QB1_OP
QC2_OP
VPQB1
QB2_EX1
QC1_OP
EXDU_ES
QC21_OP
VP_BC_12
EXDU_BC
VPQC1
QB2_EX2
VPQC21
BC_12_CL
QB1_CL
QC1_CL
QB2_EX3
EXDU_ES
QC21_CL
1
QB2ITL
en04000535.vsd
&
&
>1
&
QB2REL
IEC04000535 V1 EN
VPQA1
VPQC1
VPQB20
VPQC2
QA1_OP
VPQC71
QB20_OP
QC2_OP
VPQC2
QB7_EX1
QC1_OP
EXDU_ES
QC71_OP
VPQC71
EXDU_ES
VPQA1
QB7_EX2
VPQB7
QC71_CL
QC2_CL
VPQC1
QB20_EX1
EXDU_ES
QC21_OP
QC2_OP
QC1_OP
QB7_OP
QA1_OP
VPQC21
VPQC2
VPQC2
VPQC21
EXDU_ES
QC21_CL
QC2_CL
QB20_EX2
QB20REL
1
QB20ITL
en04000536.vsd
&
&
>1
&
&
>1
QB7REL
1
QB7ITL
IEC04000536 V1 EN
Control
532
VPQB1
VPQB7
VPQB20
VPQB2
QB20_OP
QB1_OP
QB7_OP
QB1_OP
QB2_OP
QB2_OP
VPQB1
QB1_CL
QB20_OP
VPQB2
VPQB20
VPQB1
VPQA1
QB7_OP
VPQB1
QA1_OP
QB1_OP
VPQB1
VPQA1
QB20_OP
QB1_OP
QA1_OP
QB2_OP
VPQB7
VPQA1
QB7_OP
VPQB2
QA1_OP
VPQB7
1
1
QC1ITL
QC1REL
QC2REL
QC2ITL
BC27OPTR
1
en04000537.vsd
&
&
&
QB220OTR
1
QB220CTR
QB1OPTR
QB1CLTR
VPQB1TR
VQB220TR
QB7_OP
QB7_CL
VPQB7
QB7OPTR
QB7CLTR
VPQB7TR
>1
QB1_OP
QB2_OP
1
QB12OPTR
QB12CLTR
& VPQB2
VPQB12TR
>1
1
BC12CLTR
BC12OPTR
&
VPQB20
VPBC12TR
>1
1
BC17CLTR
BC17OPTR
&
VPBC17TR
>1
BC27CLTR
&
VPBC27TR
IEC04000537 V1 EN
Table 309: ABC_BC Input signals
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open
position
Control
533
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed
position
position
position
position
position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar
WA1 and WA2
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar
transfer
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and
WA2 are valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing
switches
EXDU_12 BOOLEAN 0 No transm error from any bay connected to WA1/
WA2 busbars
EXDU_BC BOOLEAN 0 No transmission error from any other bus coupler
bay
Table 310: ABC_BC Output signals
QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
Control
534
QB220OTR BOOLEAN QB2 and QB20 are in open position
QB220CTR BOOLEAN QB2 or QB20 or both are not in open position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
QB12CLTR BOOLEAN QB1 and QB2 are not in open position
BC12OPTR BOOLEAN No connection via the own bus coupler between
WA1 and WA2
BC12CLTR BOOLEAN Conn. exists via the own bus coupler between
WA1 and WA2
WA1 and WA7
WA1 and WA7
WA2 and WA7
WA2 and WA7
VQB220TR BOOLEAN Switch status of QB2 and QB20 are valid (open
or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or
closed)
VPBC12TR BOOLEAN Status of the bus coupler app. between WA1 and
WA2 are valid
WA7 are valid
WA7 are valid
Control
535
12.4.8 Interlocking for 1 1/2 CB BH
Introduction
The interlocking for 1 1/2 breaker diameter (BH_CONN, BH_LINE_A,
BH_LINE_B) functions are used for lines connected to a 1 1/2 breaker diameter
according to figure 300.
WA1 (A)
WA2 (B)
QB1
QC1
QA1
QC2
QC9
QB6
QB9
QB2
QC1
QA1
QC2
QC3
QB6
QC3
QB62 QB61 QA1
QC1 QC2
QC9
QB9
BH_LINE_A BH_LINE_B
BH_CONN
en04000513.vsd
IEC04000513 V1 EN
Figure 300: Switchyard layout 1 1/2 breaker
Three types of interlocking modules per diameter are defined. BH_LINE_A and
BH_LINE_B are the connections from a line to a busbar. BH_CONN is the
connection between the two lines of the diameter in the 1 1/2 breaker switchyard
layout.
Control
536
12.4.8.2 Function blocks
BH_LINE_A
QA1_OP
QA1_CL
QB6_OP
QB6_CL
QB1_OP
QB1_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QC3_OP
QC3_CL
QB9_OP
QB9_CL
QC9_OP
QC9_CL
CQA1_OP
CQA1_CL
CQB61_OP
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
QA1CLREL
QA1CLITL
QB6REL
QB6ITL
QB1REL
QB1ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QC3REL
QC3ITL
QB9REL
QB9ITL
QC9REL
QC9ITL
QB1OPTR
QB1CLTR
VPQB1TR
IEC05000352 V2 EN
Figure 301: BH_LINE_A function block
Control
537
BH_LINE_B
QA1_OP
QA1_CL
QB6_OP
QB6_CL
QB2_OP
QB2_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QC3_OP
QC3_CL
QB9_OP
QB9_CL
QC9_OP
QC9_CL
CQA1_OP
CQA1_CL
CQB62_OP
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
QA1CLREL
QA1CLITL
QB6REL
QB6ITL
QB2REL
QB2ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QC3REL
QC3ITL
QB9REL
QB9ITL
QC9REL
QC9ITL
QB2OPTR
QB2CLTR
VPQB2TR
IEC05000353 V2 EN
Figure 302: BH_LINE_B function block
BH_CONN
QA1_OP
QA1_CL
QB61_OP
QB61_CL
QB62_OP
QB62_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
QA1CLREL
QA1CLITL
QB61REL
QB61ITL
QB62REL
QB62ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
IEC05000351 V2 EN
Figure 303: BH_CONN function block
Control
538
QA1_OP
QB61_OP
QA1_CL
QB61_CL
QB62_CL
QB62_OP
QC1_OP
QC2_CL
2QC3_CL
QC2_OP
2QC3_OP
1QC3_CL
1QC3_OP
en04000560.vsd
=1
=1
=1
=1
=1
=1
=1
QC1_CL
VP2QC3
VP1QC3
VPQC2
VPQC1
VPQB62
VPQB61
VPQA1
BH_CONN
VPQB61
1
QA1CLITL &
1
QB62ITL
QB62REL
VPQA1
VPQC1
VPQC2
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QC2_CL
2QC3_CL
QB62_EX2
QB62_EX1
VPQC2
VP2QC3
QA1CLREL
1
QB61ITL
QB61REL
VPQA1
VPQC1
VPQC2
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QC1_CL
1QC3_CL
QB61_EX2
QB61_EX1
VPQC1
VP1QC3
& >1
&
VPQB62
& >1
&
&
1
QC1ITL
QC1REL
1
QC2ITL
QC2REL
VPQB61
VPQB62
QB61_OP
QB62_OP
IEC04000560 V1 EN
Control
539
QA1_OP
QB1_OP
QA1_CL
QB1_CL
QB6_CL
QB6_OP
QC9_OP
QB9_CL
QC3_OP
QC2_CL
QB9_OP
QC2_OP
QC1_CL
QC1_OP
QC3_CL
CQC1_OP
CQC1_CL
CQA1_CL
CQA1_OP
1
QB6ITL
QB6REL
en04000554.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QC9_CL
VPCQC1
VPCQA1
VPQC3
VPQC2
VPQC1
VPQB9
VPQC9
VPQB6
VPQB1
VPQA1
BH_LINE_A
=1
=1
CQC2_OP
CQC2_CL
CQB61_OP
VPCQC2
VPCQB61
& >1
VPQA1
VPQC1
VPQC2
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
QC2_CL
QC3_CL
QB6_EX2
=1
=1
QC11_CL
VOLT_OFF
VPQC11
VPVOLT
QC11_OP
CQB61_CL
VOLT_ON
1
QA1CLITL
QA1CLREL
&
VPQB1
VPQB6
VPQB9
&
IEC04000554 V1 EN
Control
540
VPQA1
VPQB6
VPQC9
QB9_EX2
QB6_OP
QB9_EX1
VPCQC2
VPCQC1
VPCQB61
VPQC3
VPQC2
VPQC1
QA1_OP
1
QB9ITL
QB9REL
en04000555.vsd
&
VPCQA1
>1
&
& >1
&
1
QB1ITL
QB1REL
1
QC1ITL
QC1REL
&
1
QC2ITL
QC2REL
&
1
QC3ITL
QC3REL
>1
QC1_OP
QC2_OP
QB9_EX3
VPQA1
VPQC1
VPQC2
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1
VPQB6
QB1_OP
QB6_OP
VPQB6
VPQB9
VPCQB61
QB6_OP
QB9_OP
CQB61_OP
IEC04000555 V1 EN
QB9_EX4
CQB61_OP
CQA1_OP
en04000556.vsd
&
>1
1
QC9ITL
QC9REL
&
CQC1_OP
CQC2_OP
QB9_EX5
VPQB9
VPVOLT
QB9_OP
VOLT_OFF
&
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
QC9_CL
QC3_CL
QB9_EX7
&
QB1OPTR
QB1CLTR
VPQB1TR
QB1_OP
QB1_CL
VPQB1
>1
IEC04000556 V1 EN
Control
541
QA1_OP
QB2_OP
QA1_CL
QB2_CL
QB6_CL
QB6_OP
QC9_OP
QB9_CL
QC3_OP
QC2_CL
QB9_OP
QC2_OP
QC1_CL
QC1_OP
QC3_CL
CQC1_OP
CQC1_CL
CQA1_CL
CQA1_OP
1
QB6ITL
QB6REL
en04000557.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QC9_CL
VPCQC1
VPCQA1
VPQC3
VPQC2
VPQC1
VPQB9
VPQC9
VPQB6
VPQB2
VPQA1
BH_LINE_B
=1
=1
CQC2_OP
CQC2_CL
CQB62_OP
VPCQC2
VPCQB62
& >1
VPQA1
VPQC1
VPQC2
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
QC2_CL
QC3_CL
QB6_EX2
=1
=1
QC21_CL
VOLT_OFF
VPQC21
VPVOLT
QC21_OP
CQB62_CL
VOLT_ON
1
QA1CLITL
QA1CLREL
&
VPQB2
VPQB6
VPQB9
&
IEC04000557 V1 EN
Control
542
VPQA1
VPQB6
VPQC9
QB9_EX2
QB6_OP
QB9_EX1
VPCQC2
VPCQC1
VPCQB62
VPQC3
VPQC2
VPQC1
QA1_OP
1
QB9ITL
QB9REL
en04000558.vsd
&
VPCQA1
>1
&
& >1
&
1
QB2ITL
QB2REL
1
QC1ITL
QC1REL
&
1
QC2ITL
QC2REL
&
1
QC3ITL
QC3REL
>1
QC1_OP
QC2_OP
QB9_EX3
VPQA1
VPQC1
VPQC2
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2
VPQB6
QB2_OP
QB6_OP
VPQB6
VPQB9
VPCQB62
QB6_OP
QB9_OP
CQB62_OP
IEC04000558 V1 EN
QB9_EX4
CQB62_OP
CQA1_OP
en04000559.vsd
&
>1
1
QC9ITL
QC9REL
&
CQC1_OP
CQC2_OP
QB9_EX5
VPQB9
VPVOLT
QB9_OP
VOLT_OFF
&
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
QC9_CL
QC3_CL
QB9_EX7
&
QB2OPTR
QB2CLTR
VPQB2TR
QB2_OP
QB2_CL
VPQB2
>1
IEC04000559 V1 EN
Control
543
Table 311: BH_LINE_A Input signals
QB6_CL BOOLEAN 0 QB6 is in close position
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB61_OP BOOLEAN 0 QB61 in module BH_CONN is in open position
CQB61_CL BOOLEAN 0 QB61 in module BH_CONN is in closed position
CQC1_OP BOOLEAN 0 QC1 in module BH_CONN is in open position
CQC1_CL BOOLEAN 0 QC1 in module BH_CONN is in closed position
position
position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse)
failure
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing
switch QC11
Control
544
Table 312: BH_LINE_A Output signals
Table 313: BH_LINE_B Input signals
QB6_CL BOOLEAN 0 QB6 is in close position
Control
545
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB62_OP BOOLEAN 0 QB62 in module BH_CONN is in open position
CQB62_CL BOOLEAN 0 QB62 in module BH_CONN is in closed position
position
position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
failure
switch QC21
Control
546
Table 314: BH_LINE_B Output signals
Table 315: BH_CONN Input signals
1QC3_OP BOOLEAN 0 QC3 on line 1 is in open position
1QC3_CL BOOLEAN 0 QC3 on line 1 is in closed position
2QC3_OP BOOLEAN 0 QC3 on line 2 is in open position
2QC3_CL BOOLEAN 0 QC3 on line 2 is in closed position
Control
547
Table 316: BH_CONN Output signals
12.4.9 Interlocking for double CB bay DB
The interlocking for 1 1/2 breaker diameter including DB_BUS_A, DB_BUS_B,
DB_LINEfunctions are used for a line connected to a double circuit breaker
arrangement according to figure 304.
Control
548
WA1 (A)
WA2 (B)
QB1
QC1
QA1
QC2
QC9
QB61
QB9
QB2
QC4
QA2
QC5
QC3
QB62
DB_BUS_B
DB_LINE
DB_BUS_A
en04000518.vsd
IEC04000518 V1 EN
Figure 304: Switchyard layout double circuit breaker
Three types of interlocking modules per double circuit breaker bay are defined.
DB_LINE is the connection from the line to the circuit breaker parts that are
connected to the busbars. DB_BUS_A and DB_BUS_B are the connections from
the line to the busbars.
DB_BUS_A
IB01-
QA1_OP
QA1_CL
QB1_OP
QB1_CL
QB61_OP
QB61_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QC3_OP
QC3_CL
QC11_OP
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
QA1CLREL
QA1CLITL
QB61REL
QB61ITL
QB1REL
QB1ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QB1OPTR
QB1CLTR
VPQB1TR
en05000354.vsd
IEC05000354 V1 EN
Figure 305: IB function block
Control
549
DB_LINE
QA1_OP
QA1_CL
QA2_OP
QA2_CL
QB61_OP
QB61_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9REL
QB9ITL
QC3REL
QC3ITL
QC9REL
QC9ITL
IEC05000356 V2 EN
Figure 306: DB_LINE function block
DB_BUS_B
QA2_OP
QA2_CL
QB2_OP
QB2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QC3_OP
QC3_CL
QC21_OP
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
QA2CLREL
QA2CLITL
QB62REL
QB62ITL
QB2REL
QB2ITL
QC4REL
QC4ITL
QC5REL
QC5ITL
QB2OPTR
QB2CLTR
VPQB2TR
IEC05000355 V2 EN
Figure 307: DB_BUS_B function block
Control
550
QA1_OP
QB61_OP
QA1_CL
QB61_CL
QB1_CL
QB1_OP
QC1_OP
QC2_CL
QC11_CL
QC2_OP
QC11_OP
QC3_CL
QC3_OP
en04000547.vsd
=1
=1
=1
=1
=1
=1
=1
QC1_CL
VPQC11
VPQC3
VPQC2
VPQC1
VPQB1
VPQB61
VPQA1
DB_BUS_A
VPQB61
1
QA1CLITL &
& >1
&
1
QB1ITL
QB1REL
VPQA1
VPQC1
VPQC2
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
VPQC1
VPQC11
QC1_CL
QC11_CL
EXDU_ES
EXDU_ES
QB1_EX1
QB1_EX2
QA1CLREL
1
QB61ITL
QB61REL
VPQA1
VPQC1
VPQC2
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC2_CL
QC3_CL
QB61_EX2
QB61_EX1
VPQC2
VPQC3
& >1
&
VPQB1
IEC04000547 V1 EN
QB61_OP
en04000548.vsd
VPQB61
VPQB1
1
QC1REL
QC1ITL
QB1_OP
QB1_OP
QB1_CL
&
1
QC2REL
QC2ITL
VPQB1
QB1OPTR
QB1CLTR
VPQB1TR
IEC04000548 V1 EN
Control
551
QA2_OP
QB62_OP
QA2_CL
QB62_CL
QB2_CL
QB2_OP
QC4_OP
QC5_CL
QC21_CL
QC5_OP
QC21_OP
QC3_CL
QC3_OP
en04000552.vsd
=1
=1
=1
=1
=1
=1
=1
QC4_CL
VPQC21
VPQC3
VPQC5
VPQC4
VPQB2
VPQB62
VPQA2
DB_BUS_B
VPQB62
1
QA2CLITL &
& >1
&
1
QB2ITL
QB2REL
VPQA2
VPQC4
VPQC5
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
VPQC4
VPQC21
QC4_CL
QC21_CL
EXDU_ES
EXDU_ES
QB2_EX1
QB2_EX2
QA2CLREL
1
QB62ITL
QB62REL
VPQA2
VPQC4
VPQC5
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QC5_CL
QC3_CL
QB62_EX2
QB62_EX1
VPQC5
VPQC3
& >1
&
VPQB2
IEC04000552 V1 EN
QB62_OP
en04000553.vsd
VPQB62
VPQB2
1
QC4REL
QC4ITL
QB2_OP
QB2_OP
QB2_CL
&
1
QC5REL
QC5ITL
VPQB2
QB2OPTR
QB2CLTR
VPQB2TR
IEC04000553 V1 EN
Control
552
QA1_OP
QA2_OP
QA1_CL
QA2_CL
QB61_CL
QB61_OP
QC1_OP
QC2_CL
QC5_OP
QC4_CL
QC2_OP
QC4_OP
QB62_CL
QB62_OP
QC5_CL
QC3_OP
QC3_CL
QB9_CL
QB9_OP
1
QB9ITL
QB9REL
en04000549.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QC1_CL
VPQC3
VPQB9
VPQC5
VPQC4
VPQB62
VPQC2
VPQC1
VPQB61
VPQA2
VPQA1
DB_LINE
=1
=1
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
VPQC9
VPVOLT
& >1
&
VPQA1
VPQA2
VPQC1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
IEC04000549 V1 EN
en04000550.vsd
& >1
VPQA1
VPQC1
VPQC2
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
VPQC3
VPQC4
&
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
&
VPQC3
VPQC9
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
&
VPQC3
VPQC9
QC3_CL
QC9_CL
QB9_EX5
IEC04000550 V1 EN
Control
553
1
QC3ITL
QC3REL
en04000551.vsd
VPQB62
VPQB9
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT
QB9_OP
VOLT_OFF
&
&
VPQB61
1
QC9ITL
QC9REL
IEC04000551 V1 EN
Table 317: DB_BUS_A Input signals
position
position
switch QC11
Table 318: DB_BUS_A Output signals
Control
554
Table 319: DB_LINE Input signals
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse)
failure
failure
Control
555
Table 320: DB_LINE Output signals
Table 321: DB_BUS_B Input signals
position
position
switch QC21
Control
556
Table 322: DB_BUS_B Output signals
12.4.10 Interlocking for line bay ABC_LINE
The interlocking for line bay (ABC_LINE) function is used for a line connected to
a double busbar arrangement with a transfer busbar according to figure 308. The
function can also be used for a double busbar arrangement without transfer busbar
or a single busbar arrangement with/without transfer busbar.
QB1 QB2
QC1
QA1
QC2
QB9
QC9
WA1 (A)
WA2 (B)
WA7 (C)
QB7
en04000478.vsd
IEC04000478 V1 EN
Figure 308: Switchyard layout ABC_LINE
Control
557
ABC_LINE
QA1_OP
QA1_CL
QB9_OP
QB9_CL
QB1_OP
QB1_CL
QB2_OP
QB2_CL
QB7_OP
QB7_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QC9_OP
QC9_CL
QC11_OP
QC11_CL
QC21_OP
QC21_CL
QC71_OP
QC71_CL
BB7_D_OP
BC_12_CL
BC_17_OP
BC_17_CL
BC_27_OP
BC_27_CL
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
QA1CLREL
QA1CLITL
QB9REL
QB9ITL
QB1REL
QB1ITL
QB2REL
QB2ITL
QB7REL
QB7ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QC9REL
QC9ITL
QB1OPTR
QB1CLTR
QB2OPTR
QB2CLTR
QB7OPTR
QB7CLTR
QB12OPTR
QB12CLTR
VPQB1TR
VPQB2TR
VPQB7TR
VPQB12TR
IEC05000357 V2 EN
Figure 309: ABC_LINE function block
Control
558
QA1_OP
QB9_OP
QA1_CL
QB9_CL
QB1_CL
QB1_OP
QB2_OP
QB7_CL
QC9_OP
QC2_CL
QB7_OP
QC2_OP
QC1_CL
QC1_OP
QC9_CL
QC21_OP
QC21_CL
QC11_CL
QC11_OP
1
QB9ITL
QB9REL
en04000527.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QB2_CL
VPQC21
VPQC11
VPQC9
VPQC2
VPQC1
VPQB7
VPQB2
VPQB1
VPQB9
VPQA1
ABC_LINE
=1
=1
QC71_OP
QC71_CL
VOLT_OFF
VOLT_ON
VPQC71
VPVOLT
& >1
&
VPQA1
VPQC1
VPQC2
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
QC2_CL
QC9_CL
QB9_EX2
& 1
QA1CLITL
QA1CLREL
IEC04000527 V1 EN
Control
559
&
&
&
1
QB1REL
QB1ITL
VPQA1
VPQB2
VPQC1
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd
1
IEC04000528 V1 EN
Control
560
&
&
&
1
1
QB2REL
QB2ITL
VPQA1
VPQB1
VPQC1
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd
IEC04000529 V1 EN
Control
561
&
&
>1
1
VPQC9
VPQC71
VP_BB7_D
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2
QB7REL
QB7ITL
IEC04000530 V1 EN
Control
562
VPQA1
VPQC9
VPQB2
VPQB9
VP_BB7_D
VPQC71
VP_BC_27
QB2_CL
EXDU_ES
QA1_CL
QC71_OP
QB9_CL
QC9_OP
BB7_D_OP
BC_27_CL
QB7_EX3
EXDU_BC
VPQC9
EXDU_BPB
VPQC71
QB2_OP
QB1_OP
VPQB9
VPQB2
VPQB1
QB7_EX4
EXDU_ES
QC71_CL
QC9_CL
QB9_OP
VPQB7
QB9_OP
QB7_OP
VPVOLT
VPQB9
VOLT_OFF
&
&
&
&
>1
1
1
QC1ITL
QC1REL
QC2REL
QC2ITL
QC9REL
1
QC9ITL
en04000531.vsd
IEC04000531 V1 EN
Control
563
VPQB2
VPQB1
QB2_OP
QB1_OP
1
QB12CLTR
QB12OPTR
en04000532.vsd
>1
&
VPQB12TR
QB7OPTR
QB7CLTR
VPQB7TR
QB7_OP
QB7_CL
VPQB7
VPQB2
QB2_CL
QB2_OP QB2OPTR
QB2CLTR
VPQB2TR
QB1OPTR
QB1CLTR
VPQB1TR
QB1_OP
QB1_CL
VPQB1
IEC04000532 V1 EN
Table 323: ABC_LINE Input signals
position
position
position
Control
564
position
position
position
BB7_D_OP BOOLEAN 0 Disconnectors on busbar WA7 except in the own
bay are open
WA1 and WA2
BC_17_OP BOOLEAN 0 No bus coupler connection exists between busbar
WA1 and WA7
WA1 and WA7
BC_27_OP BOOLEAN 0 No bus coupler connection exists between busbar
WA2 and WA7
WA2 and WA7
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse)
failure
failure
VP_BB7_D BOOLEAN 0 Switch status of the disconnectors on busbar
WA7 are valid
WA2 are valid
WA7 are valid
WA7 are valid
switches
EXDU_BPB BOOLEAN 0 No transm error from any bay with disconnectors
on WA7
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
Control
565
Table 324: ABC_LINE Output signals
closed)
12.4.11 Interlocking for transformer bay AB_TRAFO
Control
566
The interlocking for transformer bay (AB_TRAFO) function is used for a
transformer bay connected to a double busbar arrangement according to figure 310.
The function is used when there is no disconnector between circuit breaker and
transformer. Otherwise, the interlocking for line bay (ABC_LINE) function can be
used. This function can also be used in single busbar arrangements.
QB1 QB2
QC1
QA1
QC2
WA1 (A)
WA2 (B)
QA2
QC3
T
QC4
QB4 QB3
QA2 and QC4 are not
used in this interlocking
AB_TRAFO
en04000515.vsd
IEC04000515 V1 EN
Figure 310: Switchyard layout AB_TRAFO
Control
567
AB_TRAFO
QA1_OP
QA1_CL
QB1_OP
QB1_CL
QB2_OP
QB2_CL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB3_OP
QB3_CL
QB4_OP
QB4_CL
QC3_OP
QC3_CL
QC11_OP
QC11_CL
QC21_OP
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QA1CLREL
QA1CLITL
QB1REL
QB1ITL
QB2REL
QB2ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
QB1OPTR
QB1CLTR
QB2OPTR
QB2CLTR
QB12OPTR
QB12CLTR
VPQB1TR
VPQB2TR
VPQB12TR
IEC05000358 V2 EN
Figure 311: AB_TRAFO function block
Control
568
QA1_OP
QB1_OP
QA1_CL
QB1_CL
QB2_CL
QB2_OP
QC1_OP
QC2_CL
QC3_OP
QB4_CL
QC2_OP
QB4_OP
QB3_CL
QB3_OP
QC3_CL
QC21_OP
VPQB1
QC21_CL
VPQB2
QC11_CL
QC11_OP
VPQC1
QC3_CL
QC2_CL
QC1_CL
QA1_EX3
QC3_OP
QA1_EX2
VPQB4
VPQB3
VPQC2
QA1_EX1
1
QA1CLITL
QA1CLREL
en04000538.vsd
=1
=1
=1
=1
=1
=1
=1
=1
=1
=1
QC1_CL
VPQC21
VPQC11
VPQC3
VPQB4
VPQB3
VPQC2
VPQC1
VPQB2
VPQB1
VPQA1
AB_TRAFO
&
VPQC3
>1
&
IEC04000538 V1 EN
VPQA1
VPQC1
VPQB2
VPQC2
VPQC11
VPQC3
QA1_OP
QC1_OP
EXDU_ES
QB2_OP
QC11_OP
QC3_OP
QC2_OP
QB1_EX1
VP_BC_12
BC_12_CL
QC3_OP
QB2_CL
EXDU_BC
VPQC3
VPQB2
VPQC3
VPQC2
VPQC1
QB1_EX2
1
QB1ITL
en04000539.vsd
&
&
>1
&
QB1REL
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
IEC04000539 V1 EN
Control
569
VPQA1
VPQC1
VPQB1
VPQC2
VPQC21
VPQC3
QA1_OP
QC1_OP
EXDU_ES
QB1_OP
QC21_OP
QC3_OP
QC2_OP
QB2_EX1
VP_BC_12
BC_12_CL
QC3_OP
QB1_CL
EXDU_BC
VPQC3
VPQB1
VPQC3
VPQC2
VPQC1
QB2_EX2
1
QB2ITL
en04000540.vsd
&
&
>1
&
QB2REL
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
IEC04000540 V1 EN
VPQB1
VPQB3
VPQB2
VPQB4
QB2_OP
QB1_OP
QB3_OP
QB1_OP
QB4_OP
VPQB1
QB1_CL
QB2_OP
VPQB1
1
1
QC1ITL
QC1REL
QC2REL
QC2ITL
en04000541.vsd
&
QB1OPTR
QB1CLTR
VPQB1TR
>1
QB1_OP
QB2_OP
1
QB12OPTR
QB12CLTR
& VPQB2
VPQB12TR
QB2_CL
VPQB2
QB2OPTR
QB2CLTR
VPQB2TR
IEC04000541 V1 EN
Table 325: AB_TRAFO Input signals
Control
570
QC11_OP BOOLEAN 0 QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 QC21 on busbar WA2 is in closed position
WA1 and WA2
WA2 are valid
switches
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
QA1_EX1 BOOLEAN 0 External condition for apparatus QA1
Table 326: AB_TRAFO Output signals
Control
571
closed)
12.4.12 Position evaluation POS_EVAL
Position evaluation (POS_EVAL) function converts the input position data signal
POSITION, consisting of value, time and signal status, to binary signals
OPENPOS or CLOSEPOS.
The output signals are used by other functions in the interlocking scheme.
POS_EVAL
POSITION OPENPOS
CLOSEPOS
Position including quality
Open/close position of
switch device
IEC08000469-1-EN V1 EN
Only the value, open/close, and status is used in this function. Time information is
not used.
Input position (Value) Signal quality Output OPENPOS Output CLOSEPOS
0 (Breaker
intermediate)
Good 0 0
1 (Breaker open) Good 1 0
2 (Breaker closed) Good 0 1
3 (Breaker faulty) Good 0 0
Any Invalid 0 0
Any Oscillatory 0 0
Control
572
POS_EVAL
POSITION OPENPOS
CLOSEPOS
IEC09000079 V1 EN
Figure 312: POS_EVAL function block
Table 327: POS_EVAL Input signals
POSITION INTEGER 0 Position status including quality
Table 328: POS_EVAL Output signals
OPENPOS BOOLEAN Open position
CLOSEPOS BOOLEAN Close position
12.5 Logic rotating switch for function selection and
LHMI presentation SLGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Logic rotating switch for function
selection and LHMI presentation
SLGGIO - -
12.5.1 Introduction
The logic rotating switch for function selection and LHMI presentation function
(SLGGIO) (or the selector switch function block) is used to get a selector switch
functionality similar with the one provided by a hardware selector switch.
Hardware selector switches are used extensively by utilities, in order to have
different functions operating on pre-set values. Hardware switches are however
sources for maintenance issues, lower system reliability and extended purchase
portfolio. The virtual selector switches eliminate all these problems.
The logic rotating switch for function selection and LHMI presentation (SLGGIO)
function has two operating inputs UP and DOWN. When a signal is received on
the UP input, the block will activate the output next to the present activated output,
Control
573
in ascending order (if the present activated output is 3 for example and one
operates the UP input, then the output 4 will be activated). When a signal is
received on the DOWN input, the block will activate the output next to the present
activated output, in descending order (if the present activated output is 3 for
example and one operates the DOWN input, then the output 2 will be activated).
Depending on the output settings the output signals can be steady or pulsed. In case
of steady signals, in case of UP or DOWN operation, the previously active output
will be deactivated. Also, depending on the settings one can have a time delay
between the UP or DOWN activation signal positive front and the output activation.
Besides the inputs visible in the application configuration in the Application
Configuration tool, there are other possibilities that will allow an user to set the
desired position directly (without activating the intermediate positions), either
locally or remotely, using a select before execute dialog. One can block the
function operation, by activating the BLOCK input. In this case, the present
position will be kept and further operation will be blocked. The operator place
(local or remote) is specified through the PSTO input. If any operation is allowed
the signal INTONE from the Fixed signal function block can be connected.
SLGGIO function block has also an integer value output, that generates the actual
position number. The positions and the block names are fully settable by the user.
These names will appear in the menu, so the user can see the position names
instead of a number.
Control
574
12.5.2.1 Functionality and behaviour
Ctrl/Com
Single Command
Selector Switch (GGIO)
../Ctrl/Com/Sel Sw
SLGGIO1
SLGGIO2
..
..
SLGGIO15
Control
Measurements
Events
Disturbance records
Settings
Diagnostics
Test
Reset
Authorization
Language
4
Control
Single Line Diagram
Commands
../Com/Sel Sw/
SLGGIO3
Damage ctrl
../Com/Sel Sw/
SLGGIO3
Damage ctrl
4
P:Disc All
N: Disc Fe
OK Cancel
../Com/Sel Sw/
DmgCtrl
Damage ctrl:
7
The dialog window that appears
shows the present position (P:)
and the new position (N:), both
in clear names, given by the
user (max. 13 characters).
E
Modify the position with arrows.
The pos will not be modified (outputs
will not be activated) until you press
the E-button for O.K.
1 2 3
4
5
IEC06000420 V2 EN
Figure 313: Example 1 on handling the switch from the local HMI.
From the local HMI:
1 SLGGIO instances in the ACT application configuration
2 Switch name given by the user (max 13 characters)
3 Position number, up to 32 positions
4 Change position
5 New position
12.5.2.2 Graphical display
There are two possibilities for SLGGIO
Control
575
if it is used just for the monitoring, the switches will be listed with their actual
position names, as defined by the user (max. 13 characters).
if it is used for control, the switches will be listed with their actual positions,
but only the first three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it
when building the Graphical Display Editor, under the "Caption". If used for the
control, the following sequence of commands will ensure:
From the graphical display:
I
../Control/SLD/Switch
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DAL
SMBRREC control
WFM
Pilot setup
OFF
P: Disc N: Disc Fe
OK Cancel
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DFW
Change to the "Switches" page
of the SLD by left-right arrows.
Select switch by up-down
arrows
Control
Single Line Diagram
Commands
Control
Measurements
Events
Disturbance records
Settings
Diagnostics
Test
Reset
Authorization
Language
O
Select switch. Press the
I or O key. A dialog box
appears.
E
The pos will not be modified
(outputs will not be activated) until
you press the E-button for O.K.
IEC06000421 V2 EN
Figure 314: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
Control
576
SLGGIO
BLOCK
PSTO
UP
DOWN
^SWPOS01
^SWPOS02
^SWPOS03
^SWPOS04
^SWPOS05
^SWPOS06
^SWPOS07
^SWPOS08
^SWPOS09
^SWPOS10
^SWPOS11
^SWPOS12
^SWPOS13
^SWPOS14
^SWPOS15
^SWPOS16
^SWPOS17
^SWPOS18
^SWPOS19
^SWPOS20
^SWPOS21
^SWPOS22
^SWPOS23
^SWPOS24
^SWPOS25
^SWPOS26
^SWPOS27
^SWPOS28
^SWPOS29
^SWPOS30
^SWPOS31
^SWPOS32
SWPOSN
IEC05000658 V2 EN
Figure 315: SLGGIO function block
Table 329: SLGGIO Input signals
UP BOOLEAN 0 Binary "UP" command
DOWN BOOLEAN 0 Binary "DOWN" command
Table 330: SLGGIO Output signals
SWPOS01 BOOLEAN Selector switch position 1
Control
577
SWPOSN INTEGER Switch position (integer)
Table 331: SLGGIO Non group settings (basic)
Operation Off
On
NrPos 2 - 32 - 1 32 Number of positions in the switch
OutType Pulsed
Steady
- - Steady Output type, steady or pulse
Control
578
tPulse 0.000 - 60.000 s 0.001 0.200 Operate pulse duration, in [s]
tDelay 0.000 - 60000.000 s 0.010 0.000 Time delay on the output, in [s]
StopAtExtremes Disabled
Enabled
- - Disabled Stop when min or max position is reached
12.6 Selector mini switch VSGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Selector mini switch VSGGIO - -
12.6.1 Introduction
Selector mini switch (VSGGIO) function block is a multipurpose function used in
the configuration tool in PCM600 for a variety of applications, as a general purpose
switch.
VSGGIO can be controlled from the menu or from a symbol on the single line
diagram (SLD) on the local HMI.
Selector mini switch (VSGGIO) function can be used for double purpose, in the
same way as switch controller (SCSWI) functions are used:
for indication on the single line diagram (SLD). Position is received through
the IPOS1 and IPOS2 inputs and distributed in the configuration through the
POS1 and POS2 outputs, or to IEC 61850 through reporting, or GOOSE.
for commands that are received via the local HMI or IEC 61850 and
distributed in the configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command
from the local HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command
from the local HMI when the SLD is displayed and the object is chosen.
It is important for indication in the SLD that the a symbol is
associated with a controllable object, otherwise the symbol won't be
displayed on the screen. A symbol is created and configured in
GDE tool in PCM600.
The PSTO input is connected to the Local remote switch to have a selection of
operators place , operation from local HMI (Local) or through IEC 61850
Control
579
(Remote). An INTONE connection from Fixed signal function block (FXDSIGN)
will allow operation from local HMI.
As it can be seen, both indications and commands are done in double-bit
representation, where a combination of signals on both inputs/outputs generate the
desired result.
The following table shows the relationship between IPOS1/IPOS2 inputs and the
name of the string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 IPOS2 Name of displayed string Default string value
0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11
VSGGIO
BLOCK
PSTO
IPOS1
IPOS2
BLOCKED
POSITION
POS1
POS2
CMDPOS12
CMDPOS21
IEC06000508 V3 EN
Figure 316: VSGGIO function block
Table 332: VSGGIO Input signals
IPOS1 BOOLEAN 0 Position 1 indicating input
IPOS2 BOOLEAN 0 Position 2 indicating input
Table 333: VSGGIO Output signals
BLOCKED BOOLEAN The function is active but the functionality is
blocked
POSITION INTEGER Position indication, integer
POS1 BOOLEAN Position 1 indication, logical signal
Control
580
POS2 BOOLEAN Position 2 indication, logical signal
CMDPOS12 BOOLEAN Execute command from position 1 to position 2
CMDPOS21 BOOLEAN Execute command from position 2 to position 1
Table 334: VSGGIO Non group settings (basic)
Operation Off
On
CtlModel Dir Norm
SBO Enh
- - Dir Norm Specifies the type for control model
according to IEC 61850
Mode Steady
Pulsed
- - Pulsed Operation mode
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tPulse 0.000 - 60.000 s 0.001 0.200 Command pulse lenght
12.7 Generic double point function block DPGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
IEC 61850 generic communication I/O
functions
DPGGIO - -
12.7.1 Introduction
The IEC 61850 generic communication I/O functions (DPGGIO) function block is
used to send three logical signals to other systems or equipment in the substation. It
is especially used in the interlocking and reservation station-wide logics.
Upon receiving the input signals, the IEC 61850 generic communication I/O
functions (DPGGIO) function block will send the signals over IEC 61850-8-1 to
the equipment or system that requests these signals. To be able to get the signals,
other tools must be used, as described in the application manual, to PCM600 must
be used to define which function block in which equipment or system should
receive this information.
Control
581
DPGGIO
OPEN
CLOSE
VALID
POSITION
IEC07000200 V2 EN
Figure 317: DPGGIO function block
Table 335: DPGGIO Input signals
OPEN BOOLEAN 0 Open indication
CLOSE BOOLEAN 0 Close indication
VALID BOOLEAN 0 Valid indication
Table 336: DPGGIO Output signals
POSITION INTEGER Double point indication
12.7.5 Settings
12.8 Single point generic control 8 signals SPC8GGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Single point generic control 8 signals SPC8GGIO - -
12.8.1 Introduction
The Single point generic control 8 signals (SPC8GGIO) function block is a
collection of 8 single point commands, designed to bring in commands from
REMOTE (SCADA) to those parts of the logic configuration that do not need
complicated function blocks that have the capability to receive commands (for
example, SCSWI). In this way, simple commands can be sent directly to the IED
outputs, without confirmation. Confirmation (status) of the result of the commands
Control
582
is supposed to be achieved by other means, such as binary inputs and SPGGIO
function blocks.
The PSTO input will determine which the allowed position for the operator
(LOCAL, REMOTE, ALL) is. Upon sending a command from an allowed operator
position, one of the 8 outputs will be activated. The settings Latchedx and tPulsex
(where x is the respective output) will determine if the signal will be pulsed (and
how long the pulse is) or latched (steady). BLOCK will block the operation of the
function in case a command is sent, no output will be activated.
PSTO is the universal operator place selector for all control
functions. Even if PSTO can be configured to allow LOCAL or
ALL operator positions, the only functional position usable with the
SPC8GGIO function block is REMOTE.
SPC8GGIO
BLOCK
PSTO
ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
IEC07000143 V2 EN
Figure 318: SPC8GGIO function block
Table 337: SPC8GGIO Input signals
BLOCK BOOLEAN 0 Blocks the function operation
Table 338: SPC8GGIO Output signals
OUT1 BOOLEAN Output 1
OUT2 BOOLEAN Output2
Control
583
Table 339: SPC8GGIO Non group settings (basic)
Operation Off
On
Latched1 Pulsed
Latched
- - Pulsed Setting for pulsed/latched mode for
output 1
tPulse1 0.01 - 6000.00 s 0.01 0.10 Output1 Pulse Time
Latched2 Pulsed
Latched
output 2
Latched3 Pulsed
Latched
output 3
Latched4 Pulsed
Latched
output 4
Latched5 Pulsed
Latched
output 5
Latched6 Pulsed
Latched
output 6
Latched7 Pulsed
Latched
output 7
Latched8 Pulsed
Latched
output 8
tPulse8 0.01 - 6000.00 s 0.01 0.10 Output8 pulse time
12.9 AutomationBits, command function for DNP3.0
AUTOBITS
Control
584
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
AutomationBits, command function for
DNP3.0
AUTOBITS - -
12.9.1 Introduction
AutomationBits function for DNP3 (AUTOBITS) is used within PCM600 to get
into the configuration of the commands coming through the DNP3 protocol. The
AUTOBITS function plays the same role as functions GOOSEBINRCV (for IEC
61850) and MULTICMDRCV (for LON).
AutomationBits function (AUTOBITS) has 32 individual outputs which each can
be mapped as a Binary Output point in DNP3. The output is operated by a "Object
12" in DNP3. This object contains parameters for control-code, count, on-time and
off-time. To operate an AUTOBITS output point, send a control-code of latch-On,
latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining parameters will be
regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give 5 positive 100 ms pulses, 300 ms apart.
There is a BLOCK input signal, which will disable the operation of the function, in
the same way the setting Operation: On/Off does. That means that, upon activation
of the BLOCK input, all 32 CMDBITxx outputs will be set to 0. The BLOCK acts
like an overriding, the function still receives data from the DNP3 master. Upon
deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the DNP3
master again, momentarily. For AUTOBITS , the PSTO input determines the
operator place. The command can be written to the block while in Remote. If
PSTO is in Local then no change is applied to the outputs.
Control
585
AUTOBITS
BLOCK
PSTO
^CMDBIT1
^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32
IEC09000925 V1 EN
Figure 319: AUTOBITS function block
Table 340: AUTOBITS Input signals
Table 341: AUTOBITS Output signals
CMDBIT1 BOOLEAN Command out bit 1
Control
586
Table 342: AUTOBITS Non group settings (basic)
Operation Off
On
Table 343: DNPGEN Non group settings (basic)
Operation Off
On
- - Off Operation mode Off / On
Control
587
Table 344: CHSERRS485 Non group settings (basic)
Operation Off
Serial-Mode
- - Off Operation mode
BaudRate 300 Bd
600 Bd
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
- - 9600 Bd Baud-rate for serial port
WireMode Four-wire
Two-wire
- - Two-wire RS485 wire mode
Table 345: CHSERRS485 Non group settings (advanced)
DLinkConfirm Never
Sometimes
Always
- - Never Data-link confirm
tDLinkTimeout 0.000 - 60.000 s 0.001 2.000 Data-link confirm timeout in s
DLinkRetries 0 - 255 - 1 3 Data-link maximum retries
tRxToTxMinDel 0.000 - 60.000 s 0.001 0.000 Rx to Tx minimum delay in s
ApLayMaxRxSize 20 - 2048 - 1 2048 Application layer maximum Rx fragment
size
ApLayMaxTxSize 20 - 2048 - 1 2048 Application layer maximum Tx fragment
size
StopBits 1 - 2 - 1 1 Stop bits
Parity No
Even
Odd
- - Even Parity
tRTSWarmUp 0.000 - 60.000 s 0.001 0.000 RTS warm-up in s
tRTSWarmDown 0.000 - 60.000 s 0.001 0.000 RTS warm-down in s
tBackOffDelay 0.000 - 60.000 s 0.001 0.050 RS485 back-off delay in s
tMaxRndDelBkOf 0.000 - 60.000 s 0.001 0.100 RS485 maximum back-off random delay
in s
Table 346: CH2TCP Non group settings (basic)
Operation Off
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 - 1 20000 TCP/IP listen port
UDPPortAccData 1 - 65535 - 1 20000 UDP port to accept UDP datagrams from
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP portfor initial NULL response
UDPPortCliMast 0 - 65535 - 1 0 UDP port to remote client/master
Control
588
Table 347: CH2TCP Non group settings (advanced)
size
size
Operation Off
TCP/IP
UDP-Only
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP port for initial NULL response
size
size
Operation Off
TCP/IP
UDP-Only
master
size
size
Control
589
Operation Off
TCP/IP
UDP-Only
master
size
size
Table 354: MSTRS485 Non group settings (basic)
Operation Off
On
SlaveAddress 0 - 65519 - 1 1 Slave address
MasterAddres 0 - 65519 - 1 1 Master address
Obj1DefVar 1:BISingleBit
2:BIWithStatus
- - 1:BISingleBit Object 1, default variation
Obj2DefVar 1:BIChWithoutTim
e
2:BIChWithTime
3:BIChWithRelTim
e
- - 3:BIChWithRelTim
e
Object 2, default variation
Obj4DefVar 1:DIChWithoutTim
e
2:DIChWithTime
3:DIChWithRelTim
e
- - 3:DIChWithRelTim
e
Obj10DefVar 1:BO
2:BOStatus
- - 2:BOStatus Object 10, default variation
Obj20DefVar 1:BinCnt32
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
- - 5:BinCnt32WoutF Object 20, default variation
Control
590
Obj22DefVar 1:BinCnt32EvWout
T
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
- - 1:BinCnt32EvWou
tT
Obj30DefVar 1:AI32Int
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
- - 3:AI32IntWithoutF Object 30, default variation
Obj32DefVar 1:AI32IntEvWoutF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
- - 1:AI32IntEvWoutF Object 32, default variation
Table 355: MSTRS485 Non group settings (advanced)
ValMasterAddr No
Yes
- - Yes Validate source (master) address
AddrQueryEnbl No
Yes
- - Yes Address query enable
tApplConfTout 0.00 - 300.00 s 0.01 10.00 Application layer confim timeout
ApplMultFrgRes No
Yes
- - Yes Enable application for multiple fragment
response
ConfMultFrag No
Yes
- - Yes Confirm each multiple fragment
UREnable No
Yes
- - Yes Unsolicited response enabled
URSendOnline No
Yes
- - No Unsolicited response sends when on-line
UREvClassMask Off
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
- - Off Unsolicited response, event class mask
UROfflineRetry 0 - 10 - 1 5 Unsolicited response retries before off-
line retry mode
tURRetryDelay 0.00 - 60.00 s 0.01 5.00 Unsolicited response retry delay in s
tUROfflRtryDel 0.00 - 60.00 s 0.01 30.00 Unsolicited response off-line retry delay
in s
UREvCntThold1 1 - 100 - 1 5 Unsolicited response class 1 event count
report treshold
Control
591
tUREvBufTout1 0.00 - 60.00 s 0.01 5.00 Unsolicited response class 1 event
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No
Yes
- - No Delete oldest event when buffer is full
tSynchTimeout 30 - 3600 s 1 1800 Time synch timeout before error status is
generated
TSyncReqAfTout No
Yes
- - No Time synchronization request after
timeout
DNPToSetTime No
Yes
- - Yes Allow DNP to set time in IED
Averag3TimeReq No
Yes
- - No Use average of 3 time requests
PairedPoint No
Yes
- - Yes Enable paired point
tSelectTimeout 1.0 - 60.0 s 0.1 30.0 Select timeout
Table 356: MST1TCP Non group settings (basic)
Operation Off
On
ValMasterAddr No
Yes
MasterIP-Addr 0 - 18 - 1 0.0.0.0 Master IP-address
MasterIPNetMsk 0 - 18 - 1 255.255.255.255 Master IP net mask
2:BIWithStatus
e
2:BIChWithTime
3:BIChWithRelTim
e
e
e
2:DIChWithTime
3:DIChWithRelTim
e
e
Obj10DefVar 1:BO
2:BOStatus
Control
592
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
- - 1:BinCnt32EvWou
tT
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 357: MST1TCP Non group settings (advanced)
AddrQueryEnbl No
Yes
ApplMultFrgRes No
Yes
response
ConfMultFrag No
Yes
UREnable No
Yes
URSendOnline No
Yes
UREvClassMask Off
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
Control
593
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No
Yes
generated
TSyncReqAfTout No
Yes
timeout
DNPToSetTime No
Yes
- - No Allow DNP to set time in IED
Averag3TimeReq No
Yes
PairedPoint No
Yes
tBrokenConTout 0 - 3600 s 1 0 Broken connection timeout
tKeepAliveT 0 - 3600 s 1 10 Keep-Alive timer
Operation Off
On
ValMasterAddr No
Yes
2:BIWithStatus
e
2:BIChWithTime
3:BIChWithRelTim
e
e
Control
594
e
2:DIChWithTime
3:DIChWithRelTim
e
e
Obj10DefVar 1:BO
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
- - 1:BinCnt32EvWou
tT
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
AddrQueryEnbl No
Yes
ApplMultFrgRes No
Yes
response
ConfMultFrag No
Yes
UREnable No
Yes
URSendOnline No
Yes
Control
595
UREvClassMask Off
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No
Yes
generated
TSyncReqAfTout No
Yes
timeout
DNPToSetTime No
Yes
Averag3TimeReq No
Yes
PairedPoint No
Yes
Operation Off
On
Control
596
ValMasterAddr No
Yes
2:BIWithStatus
e
2:BIChWithTime
3:BIChWithRelTim
e
e
e
2:DIChWithTime
3:DIChWithRelTim
e
e
Obj10DefVar 1:BO
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
- - 1:BinCnt32EvWou
tT
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
AddrQueryEnbl No
Yes
ApplMultFrgRes No
Yes
response
Control
597
ConfMultFrag No
Yes
UREnable No
Yes
URSendOnline No
Yes
UREvClassMask Off
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No
Yes
generated
TSyncReqAfTout No
Yes
timeout
DNPToSetTime No
Yes
Averag3TimeReq No
Yes
PairedPoint No
Yes
Control
598
Operation Off
On
ValMasterAddr No
Yes
2:BIWithStatus
e
2:BIChWithTime
3:BIChWithRelTim
e
e
e
2:DIChWithTime
3:DIChWithRelTim
e
e
Obj10DefVar 1:BO
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
- - 1:BinCnt32EvWou
tT
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Control
599
AddrQueryEnbl No
Yes
ApplMultFrgRes No
Yes
response
ConfMultFrag No
Yes
UREnable No
Yes
URSendOnline No
Yes
UREvClassMask Off
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No
Yes
generated
TSyncReqAfTout No
Yes
timeout
DNPToSetTime No
Yes
Averag3TimeReq No
Yes
PairedPoint No
Yes
Control
600
12.10 Single command, 16 signals SINGLECMD
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Single command, 16 signals SINGLECMD - -
12.10.1 Introduction
The IEDs can receive commands either from a substation automation system or
from the local HMI. The command function block has outputs that can be used, for
example, to control high voltage apparatuses or for other user defined functionality.
Single command, 16 signals (SINGLECMD) function has 16 binary output signals.
The outputs can be individually controlled from a substation automation system or
from the local HMI. Each output signal can be given a name with a maximum of
13 characters in PCM600.
The output signals can be of the types Off, Steady, or Pulse. This configuration
setting is done via the local HMI or PCM600 and is common for the whole
function block. The length of the output pulses are 100 ms. In steady mode,
SINGLECMD function has a memory to remember the output values at power
interruption of the IED. Also a BLOCK input is available used to block the
updating of the outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in
functions or via the configuration logic circuits to the binary outputs of the IED.
Control
601
SINGLECMD
BLOCK ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
ÔUT9
ÔUT10
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
IEC05000698 V3 EN
Figure 320: SINGLECMD function block
Table 364: SINGLECMD Input signals
BLOCK BOOLEAN 0 Block single command function
Table 365: SINGLECMD Output signals
OUT1 BOOLEAN Single command output 1
Control
602
Table 366: SINGLECMD Non group settings (basic)
Mode Off
Steady
Pulsed
Control
603
604
Section 13 Scheme communication
About this chapter
This chapter describes the scheme communication logic that is used in distance and
earth fault protection function to obtain almost instantaneous fault clearance for
faults on the protected line. The chapter considers scheme communication logic
(ZCPSCH), current reversal and weak-end in-feed logic (ZCRWPSCH) for the
distance protection function and scheme communication logic for residual
overcurrent protection (ECPSCH) and current reversal and weak-end in-feed logic
(ECRWPSCH) for the residual overcurrent function.
Also Local acceleration logic (ZCLCPLAL) is discussed which is a function that
can generate instantaneous tripping as a result of remote end faults without any
telecommunication.
The chapter contains a short description of the design, simplified logical block
diagrams, figure of the function block, input and output signals and setting
parameters.
13.1 Scheme communication logic for distance or
overcurrent protection ZCPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Scheme communication logic for
distance or overcurrent protection
ZCPSCH - 85
13.1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme
communication logic is provided. All types of communication schemes for
example, permissive underreaching, permissive overreaching, blocking,
unblocking, intertrip are available.
The built-in communication module (LDCM) can be used for scheme
communication signaling when included.
Phase segregated communication is also available for correct operation at
simultaneous faults when three distance protection communication channels are
available between the line ends.
Scheme communication
605
Depending on whether a reverse or forward directed impedance zone is used to
issue the send signal, the communication schemes are divided into Blocking and
Permissive schemes, respectively.
A permissive scheme is inherently faster and has better security against false
tripping than a blocking scheme. On the other hand, a permissive scheme depends
on a received signal for a fast trip, so its dependability is lower than that of a
blocking scheme.
13.1.2.1 Blocking scheme
The principle of operation for a blocking scheme is that an overreaching zone is
allowed to trip instantaneously after the settable co-ordination time tCoord has
elapsed, when no signal is received from the remote IED.
The received signal, which shall be connected to CR, is used to not release the zone
to be accelerated to clear the fault instantaneously (after time tCoord). The
overreaching zone to be accelerated is connected to the input CACC, see figure 321.
In case of external faults, the blocking signal (CR) must be received before the
settable timer tCoord elapses, to prevent a false trip, see figure 321.
The function can be totally blocked by activating the input BLOCK, block of trip
by activating the input BLKTR, Block of signal send by activating the input BLKCS.
CACC
CR
tCoord
TRIP
AND
t
en05000512.vsd
IEC05000512 V1 EN
Figure 321: Basic logic for trip signal in blocking scheme
Channels for communication in each direction must be available.
13.1.2.2 Permissive underreaching scheme
In a permissive underreaching scheme, a forward directed underreach measuring
element (normally zone1) sends a permissive signal CS to the remote end if a fault
is detected in forward direction. The received signal CR is used to allow an
overreaching zone to trip after the tCoord timer has elapsed. The tCoord in
permissive underreaching schemes is normally set to zero.
The logic for trip signal in permissive scheme is shown in figure 322.
606
CACC
CR
tCoord
TRIP
AND
t
en05000513.vsd
IEC05000513 V1 EN
Figure 322: Logic for trip signal in permissive scheme
The permissive underreaching scheme has the same blocking possibilities as
mentioned for blocking scheme.
13.1.2.3 Permissive overreaching scheme
In a permissive overreaching scheme, a forward directed overreach measuring
element (normally zone2) sends a permissive signal CS to the remote end if a fault
is detected in forward direction. The received signal CR is used to allow an
overreaching zone to trip after the settable tCoord timer has elapsed. The tCoord in
permissive overreaching schemes is normally set to zero.
The logic for trip signal is the same as for permissive underreaching, as in
figure 322.
The permissive overreaching scheme has the same blocking possibilities as
mentioned for blocking scheme.
13.1.2.4 Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome
by using the loss of guard signal from the communication equipment to locally
create a receive signal. It is common or suitable to use the function when older, less
reliable, power-line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present,
even when no CR signal is received. The absence of the CRG signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 323. This
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The received signal created by the unblocking function is reset 150 ms after the
security timer has elapsed. When that occurs an output signal LCG is activated for
signalling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.
607
CRG
t
200 ms
1
tSecurity
t
150 ms
>1
CR
CRL
LCG
AND
OR
t
AND
en05000746.vsd
IEC05000746 V1 EN
Figure 323: Guard signal logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off The unblocking function is out of operation
No restart Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling
13.1.2.5 Intertrip scheme
In the direct intertrip scheme, the send signal CS is sent from an underreaching
zone that is tripping the line.
The received signal CR is directly transferred to a TRIP for tripping without local
criteria. The signal is further processed in the tripping logic.
In case of single-pole tripping in multi-phase systems, a phase selection is performed.
13.1.2.6 Simplified logic diagram
The simplified logic diagram for the complete logic is shown in figure 324.
608
CRG
CR
CRL
CRL
1
tSecurit
y
t
200 ms
t
150 ms LCG
Unblock =
Restart
Unblock =
NoRestart
Unblock =Off
CSUR
BLOCK
CSBLK
CRL
BLKCS
CSOR
CACC
CS
TRIP
t
25 ms
tCoord
tSendMin
tSendMi
n
SchemeType =
Blocking
Schemetype =
Permissive OR
Schemetype =
Permissive UR
SchemeType =
Intertrip
t
OR
AND
AND
AND
AND
AND
AND
AND
AND
AND
AND
OR
OR
AND
AND
t
OR
OR
OR
OR
OR
IEC05000515 V2 EN
Figure 324: Scheme communication logic for distance or overcurrent
protection, simplified logic diagram
609
ZCPSCH
BLOCK
BLKTR
BLKCS
CSBLK
CACC
CSOR
CSUR
CR
CRG
TRIP
CS
CRL
LCG
IEC06000286 V2 EN
Figure 325: ZCPSCH function block
Table 367: ZCPSCH Input signals
BLKTR BOOLEAN 0 Signal for block of trip output from communication
logic
BLKCS BOOLEAN 0 Block of carrier send in permissive OR and
blocking schemes
CSBLK BOOLEAN 0 Reverse directed distance protection zone signal
CACC BOOLEAN 0 Permissive distance protection zone signal
CSOR BOOLEAN 0 Overreaching distance protection zone signal
CSUR BOOLEAN 0 Underreaching distance protection zone signal
CR BOOLEAN 0 Carrier Signal Received
CRG BOOLEAN 0 Carrier guard signal received
Table 368: ZCPSCH Output signals
CS BOOLEAN Carrier Send signal
CRL BOOLEAN Carrier signal received or missing carrier guard
signal
LCG BOOLEAN Loss of carrier guard signal
610
Table 369: ZCPSCH Group settings (basic)
Operation Off
On
SchemeType Off
Intertrip
Permissive UR
Permissive OR
Blocking
- - Permissive UR Scheme type
tCoord 0.000 - 60.000 s 0.001 0.035 Co-ordination time for blocking
communication scheme
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
Table 370: ZCPSCH Group settings (advanced)
Unblock Off
NoRestart
Restart
- - Off Operation mode of unblocking logic
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection
Table 371: ZCPSCH technical data
Scheme type Intertrip
Permissive Underreach
Permissive Overreach
Blocking
-
Co-ordination time for blocking
(0.000-60.000) s 0.5% 10 ms
Minimum duration of a send signal (0.000-60.000) s 0.5% 10 ms
Security timer for loss of guard
signal detection
(0.000-60.000) s 0.5% 10 ms
Operation mode of unblocking logic Off
NoRestart
Restart
-
611
13.2 Phase segregated scheme communication logic for
distance protection ZC1PPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Phase segregated Scheme
communication logic for distance
protection
ZC1PPSCH - 85
13.2.1 Introduction
Communication between line ends is used to achieve fault clearance for all faults
on a power line. All possible types of communication schemes for example,
permissive underreach, permissive overreach and blocking schemes are available.
To manage problems with simultaneous faults on parallel power lines phase
segregated communication is needed. This will then replace the standard Scheme
communication logic for distance or Overcurrent protection (ZCPSCH) on
important lines where three communication channels (in each subsystem) are
available for the distance protection communication.
The main purpose of the Phase segregated scheme communication logic for
distance protection (ZC1PPSCH) function is to supplement the distance protection
function such that:
fast clearance of faults is also achieved at the line end for which the faults are
on the part of the line not covered by its underreaching zone.
correct phase selection can be maintained to support single-pole tripping for
faults occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, that is, one per phase,
each capable of transmitting a signal in each direction is required.
ZC1PPSCH can be completed with the current reversal and WEI logic for phase
segregated communication, when found necessary in Blocking and Permissive
overreaching schemes.
Depending on whether a reverse or forward directed impedance zone is used to
issue the send signal, the communication schemes are divided into Blocking and
Permissive schemes, respectively.
A permissive scheme is inherently faster and has better security against false
tripping than a blocking scheme. On the other hand, a permissive scheme depends
on a received signal for a fast trip, so its dependability is lower than that of a
blocking scheme.
612
The Phase segregated scheme communication logic for distance protection
(ZC1PPSCH) function is a logical function built-up from logical elements. It is a
supplementary function to the distance protection, requiring for its operation inputs
from the distance protection and the communication equipment.
The type of communication-aided scheme to be used can be selected by way of the
settings.
The ability to select which distance protection zone is assigned to which input of
ZC1PPSCH makes this logic able to support practically any scheme
communication requirements regardless of their basic operating principle. The
outputs to initiate tripping and sending of the teleprotection signal are given in
accordance with the type of communication-aided scheme selected and the zone(s)
and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes
communication, unblocking logic which uses the loss of guard signal as a receive
criteria is provided. This logic compensates for the lack of dependability due to the
transmission of the command signal over the faulted line.
The principle of operation for a blocking scheme is that an overreaching zone is
allowed to trip instantaneously after the settable co-ordination time tCoord has
elapsed, when no signal is received from the remote IED. The received signal (sent
by a reverse looking element in the remote IED), which shall be connected to
CRLx, is used to not release the zone to be accelerated to clear the fault
instantaneously (after time tCoord). The overreaching zone to be accelerated is
connected to the input CACCLx, see figure 326. In case of external faults, the
blocking signal (CRLx) must be received before the settable timer tCoord elapses,
to prevent an unneccesary trip, see figure 326.
ZC1PPSCH can be totally blocked by activating the input BLOCK, block of trip is
achieved by activating the input BLKTRLx, Block of carrier send is done by
activating the input BLKCSLx.
CACCLx
CRLx
tCoord
AND
t
TRLx
t
25 ms
IEC06000310 V2 EN
Figure 326: Basic logic for trip carrier in one phase of a blocking scheme
13.2.2.2 Permissive underreach scheme
In a permissive underreach scheme, a forward directed underreach measuring
element (normally zone1) sends a permissive signal CSLx to the remote end if a
fault is detected in forward direction. The received signal CRLx is used to allow an
613
overreaching zone (connected to CACCLx) to trip after the tCoord timer has
elapsed. The tCoord is in permissive underreach schemes normally set to zero. The
logic for trip carrier in permissive scheme is shown in figure 327. Three channels
for communication in each direction must be available.
CACCLx
CRLx
tCoord
AND
t
TRLx
t
25 ms
IEC07000088 V2 EN
Figure 327: Basic logic for trip carrier in one phase of a permissive underreach
scheme
13.2.2.3 Permissive overreach scheme
In a permissive overreach scheme, a forward directed overreach measuring element
(normally zone2) sends a permissive signal CSLx to the remote end if a fault is
detected in forward direction. The received signal CRLx is used to allow an
overreaching zone to trip after the settable tCoord timer has elapsed. The tCoord is
in permissive overreach schemes normally set to zero. The logic for trip carrier is
the same as for permissive underreach, see figure 326.
The permissive overreach scheme has the same blocking possibilities as mentioned
for blocking scheme above. The blocking inputs are activated from the current
reversal logic when this function is included.
Three channels for communication in each direction must be available.
In an unblocking scheme, the lower dependability in permissive scheme is
overcome by using the loss of guard signal from the communication equipment to
locally create a carrier receive signal. It is common or suitable to use the function
when older, less reliable, power-line carrier (PLC) communication is used. As
phase segregated communication schemes uses phases individually and the PLC is
typically connected single-phase or phase-to-phase it is not possible to evaluate
which of the phases to release and the unblocking scheme has thus not been supported.
13.2.2.5 Intertrip scheme
In the direct intertrip scheme, the carrier send signal CS is sent from an
underreaching zone that is tripping the line.
The received signal per phase is directly transferred to the trip function block for
tripping without local criteria. The signal is not further processed in the phase
segregated communication logic. In case of single-pole tripping the phase selection
and logic for tripping the three phases is performed in the trip function block.
614
13.2.2.6 Simplified logic diagram
The simplified logic diagram for one phase is shown in figure 328.
CSURLx
BLOCK
CSBLKLx
CRLx
BLKCSx
CSORLx
CACCLx
CSLx
TRLx
t
25 ms
tSendMin
tSendMin
Scheme Type =
Blocking
Scheme Type =
Permissive OR
SchemeType =
Intertrip
t
OR
AND
AND
AND
AND
AND
AND
AND
AND
OR
OR
OR
OR
OR
CSL1
CSL2
CSL2
CSL3
CSL3
CSL1
AND
AND
AND
OR
CSMPH
OR
CSL1
CSL2
CSL3
GENERAL
tCoord
Scheme Type =
Permissive UR
IEC06000311 V2 EN
Figure 328: Simplified logic diagram for one phase
615
ZC1PPSCH
BLOCK
BLKTR
BLKTRL1
BLKTRL2
BLKTRL3
CACCL1
CACCL2
CACCL3
CSURL1
CSURL2
CSURL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
TRIP
TRL1
TRL2
TRL3
CSL1
CSL2
CSL3
CSMPH
CRLL1
CRLL2
CRLL3
IEC06000427 V2 EN
Figure 329: ZC1PPSCH function block
Table 372: ZC1PPSCH Input signals
BLKTR BOOLEAN 0 Common signal for block of trip output from
communication logic in all phases
BLKTRL1 BOOLEAN 0 Signal for block of trip output from communication
logic in Phase L1
logic in Phase L2
logic in Phase L3
CACCL1 BOOLEAN 0 Accelerated Distance protection zone start in
Phase L1
CACCL2 BOOLEAN 0 Accelerated Distance protection zone signal in
Phase L2
CACCL3 BOOLEAN 0 Accelerated Distance protection zone signal in
Phase L3
CSURL1 BOOLEAN 0 Underreaching distance protection zone signal in
Phase L1
Phase L2
Phase L3
616
CSORL1 BOOLEAN 0 Overreaching distance protection zone signal in
Phase L1
Phase L2
Phase L3
CSBLKL1 BOOLEAN 0 Reverse directed distance protection zone signal
in Phase L1
in Phase L2
in Phase L3
BLKCSL1 BOOLEAN 0 Block of carrier send in POR and Blocking
schemes in Phase L1
schemes in Phase L2
schemes in Phase L3
CRL1 BOOLEAN 0 Carrier signal received in Phase L1
CRMPH BOOLEAN 0 Carrier Signal received for multiphase fault
Table 373: ZC1PPSCH Output signals
TRIP BOOLEAN Common trip output in any of the phase
TRL1 BOOLEAN Trip output in Phase L1
CSL1 BOOLEAN Carrier Send in phase L1
CSMPH BOOLEAN carrier Send for multi phase fault
CRLL1 BOOLEAN Carrier signal received in Phase L1
617
Table 374: ZC1PPSCH Group settings (basic)
Operation Off
On
- - Off Operation On / Off
Scheme Type Off
Intertrip
Permissive UR
Permissive OR
Blocking
- - Permissive UR Scheme type
tCoord 0.000 - 60.000 s 0.001 0.000 Trip coordinate time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of Carrier Send signal
Table 375: ZC1PPSCH technical data
Scheme type Intertrip
Permissive UR
Permissive OR
Blocking
-
Co-ordination time for blocking
(0.000-60.000) s 0.5% 10 ms
Minimum duration of a carrier send
signal
(0.000-60.000) s 0.5% 10 ms
Security timer for loss of carrier
guard detection
(0.000-60.000) s 0.5% 10 ms
Operation mode of unblocking logic Off
NoRestart
Restart
-
13.3 Current reversal and weak-end infeed logic for
distance protection ZCRWPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Current reversal and weak-end infeed
logic for distance protection
ZCRWPSCH - 85
13.3.1 Introduction
The current reversal function is used to prevent unwanted operations due to current
reversal when using permissive overreach protection schemes in application with
parallel lines when the overreach from the two ends overlap on the parallel line.
618
The weak-end infeed logic is used in cases where the apparent power behind the
protection can be too low to activate the distance protection function. When
activated, received carrier signal together with local under voltage criteria and no
reverse zone operation gives an instantaneous trip. The received signal is also
echoed back to accelerate the sending end.
Three phase or phase segregated scheme logic is available.
13.3.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRV to
recognize the fault on the parallel line in any of the phases. When the reverse zone
has been activated for a certain settable time tPickUpRev it prevents sending of a
communication signal and activation of trip signal for a predefined time tDelayRev.
This makes it possible for the receive signal to reset before the trip signal is
activated due to the current reversal by the forward directed zone, see figure 330.
en05000122_2_en.vsd
IRV
IRVBLK
IRVL
t
tDelayRev
AND
t
tPickUpRev
t
10 ms
t
tPickUpRev
IEC05000122 V2 EN
Figure 330: Current reversal logic
The preventing of sending the send signal CS and activating of the TRIP in the
scheme communication block ZCPSCH is carried out by connecting the IRVL
signal to input BLOCK in the ZCPSCH function.
The function has an internal 10 ms drop-off timer which secure that the current
reversal logic will be activated for short input signals even if the pick-up timer is
set to zero.
13.3.2.2 Weak-end infeed logic
The weak-end infeed logic (WEI) function sends back (echoes) the received signal
under the condition that no fault has been detected on the weak-end by different
fault detection elements (distance protection in forward and reverse direction).
The WEI function returns the received signal, see figure 331, when:
619
No active signal present on the input BLOCK.
The functional input CRL is active. This input is usually connected to the CRL
output on the scheme communication logic ZCPSCH .
The WEI function is not blocked by the active signal connected to the
WEIBLK1 functional input or to the VTSZ functional input. The later is
usually configured to the BLOCK functional output of the fuse-failure function.
No active signal has been present for at least 200 ms on the WEIBLK2
functional input. An OR combination of all fault detection functions (not
undervoltage) as present within the IED is usually used for this purpose.
IEC05000123 V1 EN
Figure 331: Echo of a received signal by the WEI function
When an echo function is used in both IEDs (should generally be avoided), a
spurious signal can be looped round by the echo logics. To avoid a continuous lock-
up of the system, the duration of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping
of the local breaker is selected, setting WEI = Echo&Trip, together with the WEI
function and ECHO signal has been issued by the echo logic, see figure 332.
Figure 332: Tripping part of the WEI logic, simplified diagram
620
ZCRWPSCH
U3P*
BLOCK
IRVBLK
IRV
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
IRVL
TRWEI
TRWEIL1
TRWEIL2
TRWEIL3
ECHO
IEC06000287 V2 EN
Figure 333: ZCRWPSCH function block
Table 376: ZCRWPSCH Input signals
U3P GROUP
SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other
protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure
function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POR Carrier receive for WEI logic
Table 377: ZCRWPSCH Output signals
IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip of WEI logic
TRWEIL1 BOOLEAN Trip of WEI logic in phase L1
ECHO BOOLEAN Carrier send by WEI logic
621
Table 378: ZCRWPSCH Group settings (basic)
CurrRev Off
On
- - Off Operating mode of Current Reversal
Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
WEI Off
Echo
Echo & Trip
- - Off Operating mode of WEI logic
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition
UPN< 10 - 90 %UB 1 70 Phase to Neutral voltage for detection of
fault condition
Table 379: ZCRWPSCH technical data
Detection level phase-to-neutral
voltage
(10-90)% of UBase 1.0% of U
r
Detection level phase-to-phase
voltage
(10-90)% of UBase 1.0% of U
r
Reset ratio <105% -
Operate time for current reversal
logic
(0.000-60.000) s 0.5% 10 ms
Delay time for current reversal (0.000-60.000) s 0.5% 10 ms
Coordination time for weak-end
infeed logic
(0.000-60.000) s 0.5% 10 ms
13.4 Local acceleration logic ZCLCPLAL
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Local acceleration logic ZCLCPLAL - -
622
13.4.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication
channel is available, local acceleration logic (ZCLCPLAL) can be used. This logic
enables fast fault clearing during certain conditions, but naturally, it can not fully
replace a communication channel.
The logic can be controlled either by the autorecloser (zone extension) or by the loss-
of-load current (loss-of-load acceleration).
13.4.2.1 Zone extension
The overreaching zone is connected to the input EXACC. For this reason,
configure the ARREADY functional input to a READY functional output of a used
autoreclosing function or via the selected binary input to an external autoreclosing
device, see figure 334.
This will allow the overreaching zone to trip instantaneously.
IEC05000157 V1 EN
Figure 334: Simplified logic diagram for local acceleration logic
After the autorecloser initiates the close command and remains in the reclaim state,
there will be no ARREADY signal, and the protection will trip normally with step
distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an
unwanted autoreclosing cycle will occur. The step distance function at the
reclosing attempt will prevent an unwanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by
instantaneous zone (normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss-of-
load acceleration).
623
13.4.2.2 Loss-of-Load acceleration
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used
for "acceleration" connected to input LLACC is not allowed to trip
"instantaneously" during normal non-fault system conditions. When all three-phase
currents have been above the set value MinCurr for more than setting tLowCurr, an
overreaching zone will be allowed to trip "instantaneously" during a fault condition
when one or two of the phase currents will become low due to a three-phase trip at
the opposite IED, see figure 335. The current measurement is performed internally
and the internal STILL signal becomes logical one under the described conditions.
The load current in a healthy phase is in this way used to indicate the tripping at the
opposite IED. Note that this function will not operate in case of three-phase faults,
because none of the phase currents will be low when the opposite IED is tripped.
IEC05000158 V1 EN
Figure 335: Loss-of-load acceleration - simplified logic diagram
Breaker closing signals can if decided be connected to block the function during
normal closing.
ZCLCPLAL
I3P*
BLOCK
ARREADY
NDST
EXACC
BC
LLACC
TRZE
TRLL
IEC05000333 V2 EN
Figure 336: ZCLCPLAL function block
624
Table 380: ZCLCPLAL Input signals
I3P GROUP
SIGNAL
ARREADY BOOLEAN 0 Autoreclosure ready, releases function used for
fast trip
NDST BOOLEAN 0 Non directional criteria used to prevent
instantaneous trip
EXACC BOOLEAN 0 Connected to function used for tripping at zone
xtension
BC BOOLEAN 0 Breaker Close
LLACC BOOLEAN 0 Connected to function used for tripping at loss of
load
Table 381: ZCLCPLAL Output signals
TRZE BOOLEAN Trip by zone extension
TRLL BOOLEAN Trip by loss of load
Table 382: ZCLCPLAL Group settings (basic)
Operation Off
On
IBase 1 - 99999 A 1 3000 Base setting for current values
LoadCurr 1 - 100 %IB 1 10 Load current before disturbance in % of
IBase
LossOfLoad Off
On
- - Off Enable/Disable operation of Loss of load.
ZoneExtension Off
On
- - Off Enable/Disable operation of Zone
extension
MinCurr 1 - 100 %IB 1 5 Lev taken as curr loss due to remote CB
trip in % of IBase
tLowCurr 0.000 - 60.000 s 0.001 0.200 Time delay on pick-up for MINCURR
value
tLoadOn 0.000 - 60.000 s 0.001 0.000 Time delay on pick-up for load current
release
tLoadOff 0.000 - 60.000 s 0.001 0.300 Time delay on drop off for load current
release
625
13.5 Scheme communication logic for residual
overcurrent protection ECPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Scheme communication logic for
residual overcurrent protection
ECPSCH - 85
13.5.1 Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by
the instantaneous step of the residual overcurrent protection, the directional
residual overcurrent protection can be supported with a logic that uses
communication channels.
In the directional scheme, information of the fault current direction must be
transmitted to the other line end. With directional comparison, a short operates time
of the protection including a channel transmission time, can be achieved. This short
operate time enables rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection
enables blocking as well as permissive under/overreaching schemes. The logic can
also be supported by additional logic for weak-end infeed and current reversal,
included in Current reversal and weak-end infeed logic for residual overcurrent
protection Current reversal and weak-end infeed logic for residual overcurrent
protection (ECRWPSCH) function.
The four step directional residual overcurrent protection EF4PTOC is configured to
give input information, that is directional fault detection signals, to the ECPSCH
logic:
626
Input signal CACC is used for tripping of the communication scheme,
normally the start signal of a forward overreaching step of STFW.
Input signal CSBLK is used for sending block signal in the blocking
communication scheme, normally the start signal of a reverse overreaching
step of STRV.
Input signal CSUR is used for sending permissive signal in the underreaching
permissive communication scheme, normally the start signal of a forward
underreaching step of STINn, where n corresponds to the underreaching step.
Input signal CSOR is used for sending permissive signal in the overreaching
permissive communication scheme, normally the start signal of a forward
overreaching step of STINn, where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to
the BLKCS input for blocking of the function at a single phase reclosing cycle.
In the blocking scheme a signal is sent to the other line end if the directional
element detects an earth fault in the reverse direction. When the forward directional
element operates, it trips after a short time delay if no blocking signal is received
from the opposite line end. The time delay, normally 30 40 ms, depends on the
communication transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency)
is needed if the ratio of source impedances at both end is approximately equal for
zero and positive sequence source impedances, the channel can be shared with the
impedance measuring system, if that system also works in the blocking mode. The
communication signal is transmitted on a healthy line and no signal attenuation will
occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is
no zero-sequence outfeed from the tapping. The blocking scheme is immune to
current reversals because the received signal is maintained long enough to avoid
unwanted operation due to current reversal. There is never any need for weak-end
infeed logic, because the strong end trips for an internal fault when no blocking
signal is received from the weak end. The fault clearing time is however generally
longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no
blocking signal comes from the other line end via the CR binary input (received
signal) the TRIP output is activated after the tCoord set time delay.
627
IEC05000448 V1 EN
Figure 337: Simplified logic diagram for blocking scheme
13.5.2.2 Permissive under/overreaching scheme
In the permissive scheme the forward directed earth-fault measuring element sends
a permissive signal to the other end, if an earth fault is detected in the forward
direction. The directional element at the other line end must wait for a permissive
signal before activating a trip signal. Independent channels must be available for
the communication in each direction.
An impedance measuring IED, which works in the same type of permissive mode,
with one channel in each direction, can share the channels with the communication
scheme for residual overcurrent protection. If the impedance measuring IED works
in the permissive overreaching mode, common channels can be used in single line
applications. In case of double lines connected to a common bus at both ends, use
common channels only if the ratio Z
1S
/Z
0S
(positive through zero-sequence source
impedance) is about equal at both ends. If the ratio is different, the impedance
measuring and the directional earth-fault current system of the healthy line may
detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end infeed function is used in
the distance or earth-fault protection.
In case of an internal earth-fault, the forward directed measuring element operates
and sends a permissive signal to the remote end via the CS output (sent signal).
Local tripping is permitted when the forward direction measuring element operates
and a permissive signal is received via the CR binary input (received signal).
The permissive scheme can be of either underreaching or overreaching type. In the
underreaching alternative, an underreaching directional residual overcurrent
measurement element will be used as sending criterion of the permissive input
signal CSUR.
628
In the overreaching alternative, an overreaching directional residual overcurrent
measurement element will be used as sending criterion of the permissive input
signal CSOR. Also the underreaching input signal CSUR can initiate sending.
BLOCK
CR
CACC
BLKCS
CRL
Overreach
CSOR
t
0 - 60 s
tCoord
t
t
25 ms
50 ms
CSUR
TRIP
CS
en05000280_2_en.vsd
AND
AND AND
AND
AND
AND
OR
OR
IEC05000280 V2 EN
In unblocking scheme, the lower dependability in permissive scheme is overcome
by using the loss of guard signal from the communication equipment to locally
create a receive signal. It is common or suitable to use the function when older, less
reliable, power line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present,
even when no CR signal is received. The absence of the CRG signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 338. This
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The received signal created by the unblocking function is reset 150 ms after the
security timer has elapsed. When that occurs an output signal LCG is activated for
signaling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.
629
CRG
t
200 ms
1
tSecurity
t
150 ms
>1
CR
CRL
LCG
AND
OR
t
AND
en05000746.vsd
IEC05000746 V1 EN
Figure 338: Guard signal logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation
No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears, a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signaling
ECPSCH
BLOCK
BLKTR
BLKCS
CSBLK
CACC
CSOR
CSUR
CR
CRG
TRIP
CS
CRL
LCG
IEC06000288 V2 EN
Figure 339: ECPSCH function block
630
Table 383: ECPSCH Input signals
BLKTR BOOLEAN 0 Signal for blocking trip due to communication logic
BLKCS BOOLEAN 0 Signal for blocking CS in Overreach and Blocking
schemes
CSBLK BOOLEAN 0 Reverse residual overcurrent signal for Carrier
Send
CACC BOOLEAN 0 Signal to be used for tripping by Communication
Scheme
CSOR BOOLEAN 0 Overreaching residual overcurrent signal for
Carrier Send
CSUR BOOLEAN 0 Underreaching residual overcurrent signal for
Carrier Send
CR BOOLEAN 0 Carrier Receive for Communication Scheme Logic
CRG BOOLEAN 0 Carrier guard signal received
Table 384: ECPSCH Output signals
TRIP BOOLEAN Trip by Communication Scheme Logic
CS BOOLEAN Carrier Send by Communication Scheme Logic
CRL BOOLEAN Carrier Receive from Communication Scheme
Logic
LCG BOOLEAN loss of carrier guard signal
Table 385: ECPSCH Group settings (basic)
Operation Off
On
SchemeType Off
Intertrip
Permissive UR
Permissive OR
Blocking
- - Permissive UR Scheme type, Mode of Operation
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme coordination
time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
631
Table 386: ECPSCH Group settings (advanced)
Unblock Off
NoRestart
Restart
- - Off Operation mode of unblocking logic
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection
Table 387: ECPSCH technical data
Scheme type Permissive Underreaching
Permissive Overreaching
Blocking
-
Communication scheme
coordination time
(0.000-60.000) s 0.5% 10 ms
residual overcurrent protection ECRWPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
logic for residual overcurrent protection
ECRWPSCH - 85
13.6.1 Introduction
The Current reversal and weak-end infeed logic for residual overcurrent protection
ECRWPSCH is a supplement to Scheme communication logic for residual
overcurrent protection ECPSCH.
To achieve fast fault clearing for all earth faults on the line, the directional earth-
fault protection function can be supported with logic that uses communication
channels.
The 670 series IEDs have for this reason available additions to scheme
communication logic.
If parallel lines are connected to common busbars at both terminals, overreaching
permissive communication schemes can trip unselectively due to fault current
reversal. This unwanted tripping affects the healthy line when a fault is cleared on
the other line. This lack of security can result in a total loss of interconnection
between the two buses. To avoid this type of disturbance, a fault current reversal
logic (transient blocking logic) can be used.
632
Permissive communication schemes for residual overcurrent protection can
basically operate only when the protection in the remote IED can detect the fault.
The detection requires a sufficient minimum residual fault current, out from this
IED. The fault current can be too low due to an opened breaker or high-positive and/
or zero-sequence source impedance behind this IED. To overcome these
conditions, weak-end infeed (WEI) echo logic is used.
13.6.2.1 Directional comparison logic function
The directional comparison function contains logic for blocking overreaching and
permissive overreaching schemes.
The circuits for the permissive overreaching scheme contain logic for current
reversal and weak-end infeed functions. These functions are not required for the
blocking overreaching scheme.
Use the independent or inverse time functions in the directional earth-fault
protection module to get back-up tripping in case the communication equipment
malfunctions and prevents operation of the directional comparison logic.
Figure 340 and figure 341 show the logic circuits.
Connect the necessary signal from the autorecloser for blocking of the directional
comparison scheme, during a single-phase autoreclosing cycle, to the BLOCK
input of the directional comparison module.
13.6.2.2 Fault current reversal logic
The fault current reversal logic uses a reverse directed element, connected to input
signal IRV, which recognizes that the fault is in reverse direction. When the
reverse direction element is activated during the tPickUpRev time, the output signal
IRVL is activated, see figure 340. The logic is now ready to handle a current
reversal without tripping. Output signal IRVL will be connected to the block input
on the permissive overreaching scheme.
When the fault current is reversed on the non faulty line, IRV is deactivated and
IRVBLK is activated. The reset of IRVL is delayed by the tDelayRev time, see
figure 340. This ensures the reset of the received CR signal.
633
t t
10 ms 0-60 s
t
0-60 s
tPickUp
Rev
AND
0-60 s
t
tDelayRev
BLOCK
IRV
IRVBLK
IRVL
tPickUp
Rev
IEC09000031 V1 EN
Figure 340: Simplified logic diagram, current reversal
13.6.2.3 Weak-end infeed logic
The weak-end infeed function can be set to send only an echo signal (WEI=Echo)
or an echo signal and a trip signal (WEI=Echo & Trip). See figure 341 and figure
342.
The weak-end infeed logic uses normally a reverse and a forward direction
element, connected to WEIBLK1 via an OR-gate. See figure 341. If neither the
forward nor the reverse directional measuring element is activated during the last
200 ms, the weak-end infeed logic echoes back the received permissive signal. See
figure 341.
If the forward or the reverse directional measuring element is activated during the
last 200 ms, the fault current is sufficient for the IED to detect the fault with the
earth-fault function that is in operation.
t
200 ms
t
50 ms
t
200 ms
AND
&
CRL
WEIBLK1
BLOCK
ECHO
WEI = Echo
IEC09000032 V1 EN
Figure 341: Simplified logic diagram, weak-end infeed - Echo
With the Echo & Trip setting, the logic sends an echo according to above. Further,
it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled
and the neutral point voltage is above the set operate value for 3U0>.
The voltage signal that is used to calculate the zero sequence voltage is set in the
earth-fault function that is in operation.
634
CRL
BLOCK
WEIBLK1
TRWEI
CBOPEN
t
200 ms
t
50 ms
t
200 ms
AND
AND
ECHO
WEI = Echo&Trip
AND
ST3U0
AND
IEC09000020 V1 EN
Figure 342: Simplified logic diagram, weak-end infeed - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of
200 ms. When this time period has elapsed, the conditions that enable the echo
signal to be sent are set to zero for a time period of 50 ms. This avoids ringing
action if the weak-end echo is selected for both line ends.
ECRWPSCH
U3P*
BLOCK
IRVBLK
IRV
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
IRVL
TRWEI
ECHO
CR
IEC06000289 V2 EN
Figure 343: ECRWPSCH function block
Table 388: ECRWPSCH Input signals
U3P GROUP
SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI Logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other
protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure
function
CRL BOOLEAN 0 POR Carrier receive for WEI logic
635
Table 389: ECRWPSCH Output signals
IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip of WEI logic
ECHO BOOLEAN Carrier send by WEI logic
CR BOOLEAN POR Carrier signal received from remote end
Table 390: ECRWPSCH Group settings (basic)
CurrRev Off
On
Logic
local trip
WEI Off
Echo
Echo & Trip
3U0> 5 - 70 %UB 1 25 Neutral voltage setting for fault
conditions measurement
Table 391: ECRWPSCH technical data
Operating mode of WEI logic Off
Echo
Echo & Trip
-
Operate voltage 3U
o
for WEI trip (5-70)% of UBase 1.0% of U
r
Reset ratio >95% -
Operate time for current reversal
logic
(0.000-60.000) s 0.5% 10 ms
infeed logic
(0.00060.000) s 0.5% 10 ms
636
phase segregated communication ZC1WPSCH
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
logic for phase segregated
communication
ZC1WPSCH - 85
13.7.1 Introduction
Current reversal and weak-end infeed logic for phase segregated communication
(ZC1WPSCH) function is used to prevent unwanted operations due to current
reversal when using permissive overreach protection schemes in application with
parallel lines when the overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the
protection can be too low to activate the distance protection function. When
activated, received carrier signal together with local under voltage criteria and no
reverse zone operation gives an instantaneous trip. The received signal is also
echoed back to accelerate the sending end.
13.7.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRVLx to
recognize the fault on the parallel line in phase Lx. When the reverse zone has been
activated for a certain settable time tPickUpRev it prevents sending of a
communication signal and activation of trip signal for a predefined time tDelayRev.
This makes it possible for the carrier receive signal to reset before the carrier aided
trip signal is activated due to the current reversal by the forward directed zone, see
figure 344.
IRVLn
IRVBLKLn
IRVOPLn
t
tDelayRev
&
t
tPickUpRev
t
10 ms
t
tPickUpRev
IEC06000474 V2 EN
Figure 344: Current reversal logic
The preventing of sending carrier send signal CSLn and activating of the TRIPLn
in the Scheme communication logic for distance or Overcurrent protection
637
(ZCPSCH) is carried out by connecting the IRVOPLn signal to input BLOCKLn in
ZCPSCH function.
The Current reversal and weak-end infeed logic for phase segregated
communication (ZC1WPSCH) function has an internal 10 ms drop-off timer which
secure that the current reversal logic will be activated for short input signals even if
the pick-up timer is set to zero.
Weak-end infeed logic
The WEI function sends back (echoes) the received carrier signal under the
condition that no fault has been detected at the weak end by different fault
detection elements (distance protection in forward and reverse direction).
BLOCK
CRLn
WEIBLKL1
ECHOLn
ECHOLn - cont.
VTSZ
>1
t
tWEI
t
200 ms
& t
50 ms
t
200 ms
&
WEIBLKL2
t
200 ms
IEC07000085 V2 EN
Figure 345: Weak-end infeed logic
The WEI function returns the received carrier signal, see figure 345, when:
The input CRLx is active. This input is usually connected to the CRLx output
on the scheme communication logic for distance or Overcurrent protection
(ZCPSCH).
The WEI function is not blocked by the active signal connected to the
WEIBLKLx input or to the VTSZ input. The later is usually configured to the
STGEN output of the fuse-failure function.
No active signal has been present for at least 200 ms on the WEIBLK2 input.
An OR combination of all fault detection functions (not undervoltage) as
present within the IED is usually used for this purpose.
When an echo function is used in both IEDs (should generally be avoided), a
spurious signal can be looped round by the echo logics. To avoid a continuous lock-
up of the system, the duration of the echoed signal is limited to 200 ms. An
undervoltage criteria is used as an additional tripping criteria, when the tripping of
the local breaker is selected, setting WEI = Echo &Trip, together with the WEI
function and ECHO signal has been issued by the echo logic, see figure 346.
638
CBOPEN
STUL1N
STUL2N
STUL3N
t
100 ms
AND
ECHOLn - cont.
t
15 ms
t
15 ms
t
15 ms
TRWEI
TRWEIL1
TRWEIL2
TRWEIL3
en00000551.vsd
WEI = Echo&Trip
AND
AND
OR
OR
AND
Figure 346: Tripping part of the WEI logic, simplified diagram
ZC1WPSCH
U3P*
BLOCK
BLKZ
CBOPEN
CRL1
CRL2
CRL3
IRVL1
IRVL2
IRVL3
IRVBLKL1
IRVBLKL2
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
TRPWEI
TRPWEIL1
TRPWEIL2
TRPWEIL3
IRVOP
IRVOPL1
IRVOPL2
IRVOPL3
ECHO
ECHOL1
ECHOL2
ECHOL3
IEC06000477 V2 EN
Figure 347: ZC1WPSCH function block
639
Table 392: ZC1WPSCH Input signals
U3P GROUP
SIGNAL
- Voltage
BLKZ BOOLEAN 0 Block of trip from WEI logic by the fuse-failure
function
CRL1 BOOLEAN 0 Carrier receive for WEI logic in Phase L1
IRVL1 BOOLEAN 0 Activation of current reversal logic in Phase L1
IRVL2 BOOLEAN 0 Activation of current reversal logic in Phase L2
IRVL3 BOOLEAN 0 Activation of current reversal logic in phase L3
IRVBLKL1 BOOLEAN 0 Block of current reversal function in Phase L1
WEIBLK BOOLEAN 0 Block of WEI logic
WEIBLKL1 BOOLEAN 0 Block of WEI logic in Phase L1
WEIBLKOP BOOLEAN 0 Block of WEI logic due to operation of other
protection
WEIBLKO1 BOOLEAN 0 Block of WEI logic in Phase L1 due to operation
of other protection
of other protections
of other protections
Table 393: ZC1WPSCH Output signals
TRPWEI BOOLEAN Trip of WEI logic
TRPWEIL1 BOOLEAN Trip of WEI logic in Phase L1
IRVOP BOOLEAN Operation of current reversal logic
IRVOPL1 BOOLEAN Operation of current reversal logic in Phase L1
640
ECHO BOOLEAN Carrier Send by WEI logic
ECHOL1 BOOLEAN Carrier Send by WEI logic in Phase L1
Table 394: ZC1WPSCH Group settings (basic)
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for Voltage level
OperCurrRev Off
On
Logic
local trip
OperationWEI Off
Echo
Echo & Trip
UPE< 10 - 90 %UB 1 70 Phase to Earth voltage for detection of
fault condition
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition
Table 395: ZC1WPSCH technical data
Detection level phase to neutral
voltage
(10-90)% of UBase 1.0% of U
r
Detection level phase to phase
voltage
(10-90)% of UBase 1.0% of U
r
Reset ratio <105% -
Operate time for current reversal (0.000-60.000) s 0.5% 10 ms
infeed logic
(0.000-60.000) s 0.5% 10 ms
641
642
Section 14 Logic
About this chapter
This chapter describes primarily tripping and trip logic functions. The way the
functions work, their setting parameters, function blocks, input and output signals
and technical data are included for each function.
14.1 Tripping logic SMPPTRC
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Tripping logic SMPPTRC
I->O
SYMBOL-K V1 EN
94
14.1.1 Introduction
A function block for protection tripping is provided for each circuit breaker
involved in the tripping of the fault. It provides the pulse prolongation to ensure a
trip pulse of sufficient length, as well as all functionality necessary for correct co-
operation with autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-
out.
The duration of a trip output signal from tripping logic SMPPTRC is settable
(tTripMin). The pulse length should be long enough to secure the breaker opening.
For three-phase tripping, SMPPTRC has a single input (TRIN) through which all
trip output signals from the protection functions within the IED, or from external
protection functions via one or more of the IEDs binary inputs, are routed. It has a
single trip output (TRIP) for connection to one or more of the IEDs binary outputs,
as well as to other functions within the IED requiring this signal.
Logic
643
AND
BLOCK
TRIN
Operation Mode = On
OR
t
tTripMin TRIP
en05000789.vsd
Program = 3Ph
IEC05000789 V1 EN
Figure 348: Simplified logic diagram for three phase trip
SMPPTRC function for single-phase and two-phase tripping has additional phase
segregated inputs for this, as well as inputs for faulted phase selection. The latter
inputs enable single- phase and two-phase tripping for those functions which do not
have their own phase selection capability, and therefore which have just a single
trip output and not phase segregated trip outputs for routing through the phase
segregated trip inputs of the expanded SMPPTRC function. Examples of such
protection functions are the residual overcurrent protections. The expanded
SMPPTRC function has two inputs for these functions, one for impedance tripping
(for example, carrier-aided tripping commands from the scheme communication
logic), and one for earth fault tripping (for example, tripping output from a residual
overcurrent protection).
Additional logic secures a three-phase final trip command for these protection
functions in the absence of the required phase selection signals.
The expanded SMPPTRC function has three trip outputs TRL1, TRL2, TRL3
(besides the trip output TRIP), one per phase, for connection to one or more of the
IEDs binary outputs, as well as to other functions within the IED requiring these
signals. There are also separate output signals indicating single-phase, two-phase or
three-phase trip. These signals are important for cooperation with the autorecloser
SMBRREC function.
The expanded SMPPTRC function is equipped with logic which secures correct
operation for evolving faults as well as for reclosing on to persistent faults. A
special input is also provided which disables single- phase and two-phase tripping,
forcing all tripping to be three-phase.
In multi-breaker arrangements, one SMPPTRC function block is used for each
breaker. This can be the case if single pole tripping and autoreclosing is used.
The breaker close lockout function can be activated from an external trip signal
from another protection function via input (SETLKOUT) or internally at a three-
phase trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of
closing only the choice is by setting TripLockout.
Logic
644
The TRPx function for single- and two-pole tripping has additional phase
segregated inputs for this, as well as inputs for faulted phase selection. The latter
inputs enable single- and two-pole tripping for those functions which do not have
their own phase selection capability, and therefore which have just a single trip
output and not phase segregated trip outputs for routing through the phase
segregated trip inputs of the expanded TRPx function. Examples of such protection
functions are the residual overcurrent protections. The expanded TRPx function
has two inputs for these functions, one for impedance tripping (e.g. carrier-aided
tripping commands from the scheme communication logic), and one for earth fault
tripping (e.g. tripping output from a residual overcurrent protection). Additional
logic secures a three-pole final trip command for these protection functions in the
absence of the required phase selection signals.
The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides
the trip output TRIP), one per phase, for connection to one or more of the IEDs
binary outputs, as well as to other functions within the IED requiring these signals.
There are also separate output signals indicating single pole, two pole or three pole
trip. These signals are important for cooperation with the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct
operation for evolving faults as well as for reclosing on to persistent faults. A
special input is also provided which disables single- and two-pole tripping, forcing
all tripping to be three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker.
This can be the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal
from another protection function via input (SETLKOUT) or internally at a three
pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of
closing only the choice is by setting TripLockout.
en05000517.vsd
TRINL1
TRINL2
TRINL3
1PTRZ
1PTREF
TRIN
OR
OR
OR
Program = 3ph
AND
RSTTRIP - cont.
IEC05000517 V1 EN
Figure 349: Three-phase front logic simplified logic diagram
Logic
645
en05000518.vsd
TRINL1
PSL1
TRINL2
PSL2
TRINL3
PSL3
1PTREF
1PTRZ
-loop
-loop
TRIN
L1TRIP
L2TRIP
L3TRIP
OR
OR
OR
AND
AND
AND
OR
OR
OR
AND
OR
AND
OR
AND
AND
t
50 ms
Figure 350: Phase segregated front logic
Logic
646
en05000519.vsd
L1TRIP
L2TRIP
L3TRIP
P3PTR
-loop
RTRIP
STRIP
TTRIP
150 ms
t
OR
t
2000 ms
OR
AND
OR
OR
150 ms
t
OR
t
2000 ms
OR
AND
OR
OR
AND
OR
150 ms
t
t
2000 ms
OR
AND
OR
OR
Figure 351: Additional logic for the 1ph/3ph operating mode
Logic
647
en05000520.vsd
L1TRIP - cont.
150 ms
t
t
2000 ms
L2TRIP
L3TRIP
TRIP
-loop
RTRIP
STRIP
TTRIP
AND
OR
OR
OR
OR
AND
OR
OR
t
2000 ms
150 ms
t
t
2000 ms
150 ms
t
AND
AND
AND
OR
OR
OR
Figure 352: Additional logic for the 1ph/2ph/3ph operating mode
Logic
648
en05000521.vsd
BLOCK
RTRIP
OR
OR
OR
STRIP
TTRIP
RSTTRIP
AND
AND
AND
OR
AND
OR
AND
-loop
AND
AND
AND
OR
AND
-loop
AND t
10 ms
t
5 ms
TR2P
TR1P
TR3P
TRL1
TRL2
TRL3
TRIP
Figure 353: Final tripping circuits
SMPPTRC
BLOCK
BLKLKOUT
TRIN
TRINL1
TRINL2
TRINL3
PSL1
PSL2
PSL3
1PTRZ
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
TRIP
TRL1
TRL2
TRL3
TR1P
TR2P
TR3P
CLLKOUT
IEC05000707 V2 EN
Figure 354: SMPPTRC function block
Table 396: SMPPTRC Input signals
BLKLKOUT BOOLEAN 0 Blocks circuit breaker lockout output (CLLKOUT)
TRIN BOOLEAN 0 Trip all phases
Logic
649
TRINL1 BOOLEAN 0 Trip phase 1
PSL1 BOOLEAN 0 Functional input for phase selection in phase L1
1PTRZ BOOLEAN 0 Zone Trip with a separate phase selection
1PTREF BOOLEAN 0 Single phase DEF Trip for separate phase
selection
P3PTR BOOLEAN 0 Prepare all tripping to be three-phase
SETLKOUT BOOLEAN 0 Input for setting the circuit breaker lockout function
RSTLKOUT BOOLEAN 0 Input for resetting the circuit breaker lockout
function
Table 397: SMPPTRC Output signals
TRIP BOOLEAN General trip output signal
TR1P BOOLEAN Tripping single-pole
TR2P BOOLEAN Tripping two-pole
TR3P BOOLEAN Tripping three-pole
CLLKOUT BOOLEAN Circuit breaker lockout output (set until reset)
Table 398: SMPPTRC Group settings (basic)
Operation Off
On
Program 3 phase
1ph/3ph
1ph/2ph/3ph
- - 1ph/3ph Three ph; single or three ph; single, two
or three ph trip
tTripMin 0.000 - 60.000 s 0.001 0.150 Minimum duration of trip output signal
Table 399: SMPPTRC Group settings (advanced)
TripLockout Off
On
- - Off On: activate output (CLLKOUT) and trip
latch, Off: only outp
AutoLock Off
On
- - Off On: lockout from input (SETLKOUT) and
trip, Off: only inp
Logic
650
Table 400: SMPPTRC technical data
Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s 0.5% 10 ms
Timers (0.000-60.000) s 0.5% 10 ms
14.2 Trip matrix logic TMAGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Trip matrix logic TMAGGIO - -
14.2.1 Introduction
Trip matrix logic (TMAGGIO) function is used to route trip signals and/or other
logical output signals to different output contacts on the IED.
TMAGGIO output signals and the physical outputs are available in PCM600 and
this allows the user to adapt the signals to the physical tripping outputs according
to the specific application needs.
Trip matrix logic (TMAGGIO) block is provided with 32 input signals and 3
output signals. The function block incorporates internal logic OR gates in order to
provide the necessary grouping of connected input signals (for example, for
tripping and alarming purposes) to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical
value 1 (TRUE) the first output signal (OUTPUT1) will get logical value 1
(TRUE).
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical
value 1 (TRUE) the second output signal (OUTPUT2) will get logical value 1
(TRUE).
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value
1 (TRUE) the third output signal (OUTPUT3) will get logical value 1 (TRUE).
By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime,
OnDelay and OffDelay the behavior of each output can be customized. The
OnDelay is always active and will delay the input to output transition by the set
Logic
651
time. The ModeOutput for respective output decides wether the output shall be
steady with an drop-off delay as set by OffDelay or if it shall give a pulse with
duration set by PulseTime. Note that for pulsed operation since the inputs are
connected in an OR-function a new pulse will only be given on the output if all
related inputs are reset and then one is activated again. And for steady operation
the of delay will start when all related inputs have reset. Detailed logical diagram is
shown in figure 355
PulseTime
Ondelay
Output 1
PulseTime
Ondelay
Output 2
PulseTime
Ondelay
Output 3

Input 17
Input 32
Input 1
Input 16
1
1
1
1
&
&
&
&
&
&
ModeOutput1
1
ModeOutput2
1
ModeOutput3
t
t
t
Offdelay
t
t
t
t
Offdelay
t
Offdelay
t
IEC09000612 V1 EN
Figure 355: Trip matrix internal logic
Output signals from TMAGGIO are typically connected to other logic blocks or
directly to output contacts in the IED. When used for direct tripping of the circuit
breaker(s) the pulse time delay shall be set to approximately 0.150 seconds in order
to obtain satisfactory minimum duration of the trip pulse to the circuit breaker trip
coils.
Logic
652
TMAGGIO
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
OUTPUT1
OUTPUT2
OUTPUT3
IEC09000830 V1 EN
Figure 356: TMAGGIO function block
Table 401: TMAGGIO Input signals
INPUT1 BOOLEAN 0 Binary input 1
Logic
653
Table 402: TMAGGIO Output signals
OUTPUT1 BOOLEAN OR function betweeen inputs 1 to 16
OUTPUT2 BOOLEAN OR function between inputs 17 to 32
OUTPUT3 BOOLEAN OR function between inputs 1 to 32
Table 403: TMAGGIO Group settings (basic)
Operation Off
On
PulseTime 0.050 - 60.000 s 0.001 0.150 Output pulse time
OnDelay 0.000 - 60.000 s 0.001 0.000 Output on delay time
OffDelay 0.000 - 60.000 s 0.001 0.000 Output off delay time
ModeOutput1 Steady
Pulsed
- - Steady Mode for output ,1 steady or pulsed
ModeOutput2 Steady
Pulsed
- - Steady Mode for output 2, steady or pulsed
ModeOutput3 Steady
Pulsed
- - Steady Mode for output 3, steady or pulsed
Logic
654
14.3 Configurable logic blocks
14.3.1 Introduction
A number of logic blocks and timers are available for user to adapt the
configuration to the specific application needs.
OR function block.
INVERTER function blocks that inverts the input signal.
PULSETIMER function block can be used, for example, for pulse extensions
or limiting of operation of outputs.
GATE function block is used for controlling if a signal should be able to pass
from the input to the output or not depending on a setting.
XOR function block.
LOOPDELAY function block used to delay the output signal one execution
cycle.
TIMERSET function has pick-up and drop-out delayed outputs related to the
input signal. The timer has a settable time delay.
AND function block.
SRMEMORY function block is a flip-flop that can set or reset an output from
two inputs respectively. Each block has two outputs where one is inverted. The
memory setting controls if the block after a power interruption should return to
the state before the interruption, or be reset. Set input has priority.
RSMEMORY function block is a flip-flop that can reset or set an output from
two inputs respectively. Each block has two outputs where one is inverted. The
memory setting controls if the block after a power interruption should return to
the state before the interruption, or be reset. Reset input has priority.
14.3.2 Inverter function block INV
INV
INPUT OUT
IEC04000404 V2 EN
Figure 357: INV function block
Logic
655
Table 404: INV Input signals
INPUT BOOLEAN 0 Input
Table 405: INV Output signals
OUT BOOLEAN Output
14.3.3 OR function block OR
The OR function is used to form general combinatory expressions with boolean
variables. The OR function block has six inputs and two outputs. One of the
outputs is inverted.
OR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
OUT
NOUT
IEC04000405 V2 EN
Figure 358: OR function block
Table 406: OR Input signals
INPUT1 BOOLEAN 0 Input 1 to OR gate
Table 407: OR Output signals
OUT BOOLEAN Output from OR gate
NOUT BOOLEAN Inverted output from OR gate
Logic
656
14.3.4 AND function block AND
The AND function is used to form general combinatory expressions with boolean
variables. The AND function block has four inputs and two outputs. One of the
outputs are inverted.
AND
INPUT1
INPUT2
INPUT3
INPUT4N
OUT
NOUT
IEC04000406 V2 EN
Figure 359: AND function block
Table 408: AND Input signals
INPUT1 BOOLEAN 0 Input 1
INPUT4N BOOLEAN 1 Input 4 inverted
Table 409: AND Output signals
OUT BOOLEAN Output
NOUT BOOLEAN Output inverted
14.3.5 Timer function block TIMER
The function block TIMER has drop-out and pick-up delayed outputs related to the
input signal. The timer has a settable time delay (T).
TIMER
INPUT
T
ON
OFF
IEC04000378 V2 EN
Figure 360: TIMER function block
Table 410: TIMER Input signals
INPUT BOOLEAN 0 Input to timer
Logic
657
Table 411: TIMER Output signals
ON BOOLEAN Output from timer , pick-up delayed
OFF BOOLEAN Output from timer, drop-out delayed
Table 412: TIMER Non group settings (basic)
T 0.000 - 90000.000 s 0.001 0.000 Time delay of function
14.3.6 Pulse timer function block PULSETIMER
The pulse (PULSETIMER) function can be used, for example, for pulse extensions
or limiting of operation of outputs. The pulse timer TP has a settable length.
PULSETIMER
INPUT
T
OUT
IEC04000407 V2 EN
Figure 361: PULSETIMER function block
Table 413: PULSETIMER Input signals
INPUT BOOLEAN 0 Input to pulse timer
Table 414: PULSETIMER Output signals
OUT BOOLEAN Output from pulse timer
Table 415: PULSETIMER Non group settings (basic)
T 0.000 - 90000.000 s 0.001 0.010 Time delay of function
14.3.7 Exclusive OR function block XOR
The exclusive OR function (XOR) is used to generate combinatory expressions
with boolean variables. XOR has two inputs and two outputs. One of the outputs is
inverted. The output signal is 1 if the input signals are different and 0 if they are equal.
Logic
658
XOR
INPUT1
INPUT2
OUT
NOUT
IEC04000409 V2 EN
Figure 362: XOR function block
Table 416: XOR Input signals
INPUT1 BOOLEAN 0 Input 1 to XOR gate
INPUT2 BOOLEAN 0 Input 2 to XOR gate
Table 417: XOR Output signals
OUT BOOLEAN Output from XOR gate
NOUT BOOLEAN Inverted output from XOR gate
14.3.8 Loop delay function block LOOPDELAY
The Logic loop delay function block (LOOPDELAY) function is used to delay the
output signal one execution cycle.
LOOPDELAY
INPUT OUT
IEC09000296 V1 EN
Figure 363: LOOPDELAY function block
Table 418: LOOPDELAY Input signals
INPUT BOOLEAN 0 Input signal
Table 419: LOOPDELAY Output signals
OUT BOOLEAN Output signal, signal is delayed one execution
cycle
14.3.9 Set-reset with memory function block SRMEMORY
The Set-reset with memory function block (SRMEMORY) is a flip-flop with
memory that can set or reset an output from two inputs respectively. Each
SRMEMORY function block has two outputs, where one is inverted. The memory
Logic
659
setting controls if the flip-flop after a power interruption will return the state it had
before or if it will be reset.
Table 420: Truth table for SRMEMORY function block
SET RESET OUT NOUT
0 0 Last
value
Inverted
last value
0 1 0 1
1 0 1 0
1 1 1 0
SRMEMORY
SET
RESET
OUT
NOUT
IEC04000408 V2 EN
Figure 364: SRMEMORY function block
Table 421: SRM Input signals
SET BOOLEAN 0 Set input
RESET BOOLEAN 0 Reset input
Table 422: SRM Output signals
OUT BOOLEAN Output
NOUT BOOLEAN Output inverted
Table 423: SRM Group settings (basic)
Memory Off
On
- - On Operating mode of the memory function
14.3.10 Controllable gate function block GATE
The Controllable gate function block (GATE) is used for controlling if a signal
should be able to pass from the input to the output or not depending on a setting.
GATE
INPUT OUT
IEC04000410 V2 EN
Figure 365: GATE function block
Logic
660
Table 424: GATE Input signals
INPUT BOOLEAN 0 Input to gate
Table 425: GATE Output signals
OUT BOOLEAN Output from gate
Table 426: GATE Group settings (basic)
Operation Off
On
14.3.11 Settable timer function block TIMERSET
The Settable timer function block (TIMERSET) timer has outputs for delayed input
signal at drop-out and at pick-up. The timer has a settable time delay. It also has an
Operation setting On/, Off/ that controls the operation of the timer.
TIMERSET
INPUT ON
OFF
IEC04000411 V2 EN
Figure 366: TIMERSET function block
Table 427: TIMERSET Input signals
INPUT BOOLEAN 0 Input to timer
Table 428: TIMERSET Output signals
ON BOOLEAN Output from timer, pick-up delayed
OFF BOOLEAN Output from timer, drop-out delayed
Table 429: TIMERSET Group settings (basic)
Operation Off
On
t 0.000 - 90000.000 s 0.001 0.000 Delay for settable timer n
Logic
661
Table 430: Configurable logic blocks
Logic block Quantity with cycle time Range or
value
Accuracy
fast medium normal
LogicAND 60 60 160 - -
LogicOR 60 60 160 - -
LogicXOR 10 10 20 - -
LogicInverter 30 30 80 - -
LogicSRMemory 10 10 20 - -
LogicGate 10 10 20 - -
LogicTimer 10 10 20 (0.000
90000.000) s
0.5% 10 ms
LogicPulseTimer 10 10 20 (0.000
90000.000) s
0.5% 10 ms
LogicTimerSet 10 10 20 (0.000
90000.000) s
0.5% 10 ms
LogicLoopDelay 10 10 20 (0.000
90000.000) s
0.5% 10 ms
14.4 Fixed signal function block FXDSIGN
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Fixed signals FXDSIGN - -
The Fixed signals function (FXDSIGN) generates a number of pre-set (fixed)
signals that can be used in the configuration of an IED, either for forcing the
unused inputs in other function blocks to a certain level/value, or for creating
certain logic.
There are eight outputs from FXDSIGN function block:
OFF is a boolean signal, fixed to OFF (boolean 0) value
ON is a boolean signal, fixed to ON (boolean 1) value
INTZERO is an integer number, fixed to integer value 0
INTONE is an integer number, fixed to integer value 1
REALZERO is a floating point real number, fixed to 0.0 value
STRNULL is a string, fixed to an empty string (null) value
ZEROSMPL is a channel index, fixed to 0 value
GRP_OFF is a group signal, fixed to 0 value
Logic
662
FXDSIGN
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
IEC05000445 V2 EN
Figure 367: FXDSIGN function block
Table 431: FXDSIGN Output signals
OFF BOOLEAN Boolean signal fixed off
ON BOOLEAN Boolean signal fixed on
INTZERO INTEGER Integer signal fixed zero
INTONE INTEGER Integer signal fixed one
REALZERO REAL Real signal fixed zero
STRNULL STRING String signal with no characters
ZEROSMPL GROUP SIGNAL Channel id for zero sample
GRP_OFF GROUP SIGNAL Group signal fixed off
14.5 Boolean 16 to Integer conversion B16I
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Boolean 16 to integer conversion B16I - -
14.5.1 Introduction
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16
binary (logical) signals into an integer.
Logic
663
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16
binary (logical) signals into an integer. The BLOCK input will freeze the output at
the last value.
B16I
BLOCK
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
OUT
IEC07000128 V2 EN
Figure 368: B16I function block
Table 432: B16I Input signals
IN1 BOOLEAN 0 Input 1
Logic
664
Table 433: B16I Output signals
OUT INTEGER Output value
14.6 Boolean 16 to Integer conversion with logic node
representation B16IGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Boolean 16 to integer conversion with
logic node representation
B16IGGIO - -
14.6.1 Introduction
Boolean 16 to integer conversion with logic node representation function
(B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer.
B16IGGIO can receive remote values via IEC 61850 depending on the operator
position input (PSTO).
Boolean 16 to integer conversion with logic node representation function
(B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer.
The BLOCK input will freeze the output at the last value.
Logic
665
B16IGGIO
BLOCK
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
OUT
IEC07000129 V2 EN
Figure 369: B16IGGIO function block
Table 434: B16IGGIO Input signals
Table 435: B16IGGIO Output signals
OUT INTEGER Output value
Logic
666
14.7 Integer to Boolean 16 conversion IB16
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Integer to boolean 16 conversion IB16 - -
14.7.1 Introduction
Integer to boolean 16 conversion function (IB16) is used to transform an integer
into a set of 16 binary (logical) signals.
Integer to boolean 16 conversion function (IB16) is used to transform an integer
into a set of 16 binary (logical) signals. IB16 function is designed for receiving the
integer input locally. The BLOCK input will freeze the logical outputs at the last
value.
IB16
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC06000501 V2 EN
Figure 370: IB16 function block
Logic
667
Table 436: IB16 Input signals
INP INTEGER 0 Integer Input
Table 437: IB16 Output signals
14.8 Integer to Boolean 16 conversion with logic node
representation IB16GGIO
identification
ANSI/IEEE C37.2
device number
Integer to boolean 16 conversion with
logic node representation
IB16GGIO - -
Logic
668
14.8.1 Introduction
Integer to boolean conversion with logic node representation function (IB16GGIO)
is used to transform an integer to 16 binary (logic) signals.
IB16GGIO function can receive remote values over IEC61850 depending on the
operator position input (PSTO).
Integer to boolean conversion with logic node representation function (IB16GGIO)
is used to transform an integer into a set of 16 binary (logical) signals. IB16GGIO
function can receive an integer from a station computer for example, over IEC
61850. The BLOCK input will freeze the logical outputs at the last value.
The operator position input (PSTO) determines the operator place. The integer
number can be written to the block while in Remote. If PSTO is in Off
or Local, then no change is applied to the outputs.
IB16GGIO
BLOCK
PSTO
IN
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC06000502 V2 EN
Figure 371: IB16GGIO function block
Table 438: IB16GGIO Input signals
IN INTEGER 0 input
Logic
669
Table 439: IB16GGIO Output signals
This function does not have any setting parameters.
Logic
670
Section 15 Monitoring
About this chapter
This chapter describes the functions that handle measurements, events and
disturbances. The way the functions work, their setting parameters, function
blocks, input and output signals, and technical data are included for each function.
15.1 Measurements
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Measurements CVMMXU
P, Q, S, I, U, f
SYMBOL-RR V1 EN
-
Phase current measurement CMMXU
I
SYMBOL-SS V1 EN
-
Phase-phase voltage measurement VMMXU
U
SYMBOL-UU V1 EN
-
Current sequence component
measurement
CMSQI
I1, I2, I0
SYMBOL-VV V1 EN
-
Voltage sequence measurement VMSQI
U1, U2, U0
SYMBOL-TT V1 EN
-
Phase-neutral voltage measurement VNMMXU
U
SYMBOL-UU V1 EN
-
Monitoring
671
15.1.1 Introduction
Measurement functions is used for power system measurement, supervision and
reporting to the local HMI, monitoring tool within PCM600 or to station level for
example, via IEC 61850. The possibility to continuously monitor measured values
of active power, reactive power, currents, voltages, frequency, power factor etc. is
vital for efficient production, transmission and distribution of electrical energy. It
provides to the system operator fast and easy overview of the present status of the
power system. Additionally, it can be used during testing and commissioning of
protection and control IEDs in order to verify proper operation and connection of
instrument transformers (CTs and VTs). During normal service by periodic
comparison of the measured value from the IED with other independent meters the
proper operation of the IED analog measurement chain can be verified. Finally, it
can be used to verify proper direction orientation for distance or directional
overcurrent protection function.
The available measured values of an IED are depending on the
actual hardware (TRM) and the logic configuration made in PCM600.
All measured values can be supervised with four settable limits that is, low-low
limit, low limit, high limit and high-high limit. A zero clamping reduction is also
supported, that is, the measured value below a settable limit is forced to zero which
reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level
when change in measured value is above set threshold limit or time integral of all
changes since the last time value updating exceeds the threshold limit. Measure
value can also be based on periodic reporting.
The measurement function, CVMMXU, provides the following power system
quantities:
P, Q and S: three phase active, reactive and apparent power
PF: power factor
U: phase-to-phase voltage amplitude
I: phase current amplitude
F: power system frequency
The measuring functions CMMXU, VNMMXU and VMMXU provide physical
quantities:
I: phase currents (amplitude and angle) (CMMXU)
U: voltages (phase-to-earth and phase-to-phase voltage, amplitude and angle)
(VMMXU, VNMMXU)
It is possible to calibrate the measuring function above to get better then class 0.5
presentation. This is accomplished by angle and amplitude compensation at 5, 30
and 100% of rated current and at 100% of rated voltage.
Monitoring
672
The power system quantities provided, depends on the actual
hardware, (TRM) and the logic configuration made in PCM600.
The measuring functions CMSQI and VMSQI provide sequential quantities:
I: sequence currents (positive, zero, negative sequence, amplitude and angle)
U: sequence voltages (positive, zero and negative sequence, amplitude and
angle).
The CVMMXU function calculates three-phase power quantities by using
fundamental frequency phasors (DFT values) of the measured current respectively
voltage signals. The measured power quantities are available either, as
instantaneously calculated quantities or, averaged values over a period of time (low
pass filtered) depending on the selected settings.
15.1.2.1 Measurement supervision
The protection, control, and monitoring IEDs have functionality to measure and
further process information for currents and voltages obtained from the pre-
processing blocks. The number of processed alternate measuring quantities
depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
Locally by means of the local HMI
Remotely using the monitoring tool within PCM600 or over the station bus
Internally by connecting the analogue output signals to the Disturbance Report
function
Phase angle reference
All phase angles are presented in relation to a defined reference channel. The
General setting parameter PhaseAngleRef defines the reference, see section
"Analog inputs".
Zero point clamping
Measured value below zero point clamping limit is forced to zero. This allows the
noise in the input signal to be ignored. The zero point clamping limit is a general
setting (XZeroDb where X equals S, P, Q, PF, U, I, F, IL1-3, UL1-3, UL12-31, I1,
I2, 3I0, U1, U2 or 3U0). Observe that this measurement supervision zero point
clamping might be overridden by the zero point clamping used for the
measurement values within CVMMXU.
Monitoring
673
Continuous monitoring of the measured quantity
Users can continuously monitor the measured quantity available in each function
block by means of four defined operating thresholds, see figure 372. The
monitoring has two different modes of operating:
Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE is illustrated in figure 372.
en05000657.vsd
X_RANGE= 1
X_RANGE = 3
X_RANGE=0
Hysteresis
High-high limit
High limit
Low limit
Low-low limit
X_RANGE=2
X_RANGE=4
Y
t
X_RANGE=0
IEC05000657 V1 EN
Figure 372: Presentation of operating limits
Each analogue output has one corresponding supervision level output
(X_RANGE). The output signal is an integer in the interval 0-4 (0: Normal, 1:
High limit exceeded, 3: High-high limit exceeded, 2: below Low limit and 4: below
Low-low limit). The output may be connected to a measurement expander block
(XP (RANGE_XP)) to get measurement supervision as binary signals.
The logical value of the functional output signals changes according to figure 372.
The user can set the hysteresis (XLimHyst), which determines the difference
between the operating and reset value at each operating point, in wide range for
each measuring channel separately. The hysteresis is common for all operating
values within one channel.
Actual value of the measured quantity
The actual value of the measured quantity is available locally and remotely. The
measurement is continuous for each measured quantity separately, but the reporting
of the value to the higher levels depends on the selected reporting mode. The
following basic reporting modes are available:
Monitoring
674
Cyclic reporting (Cyclic)
Amplitude dead-band supervision (Dead band)
Integral dead-band supervision (Int deadband)
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting
(XRepTyp). The measuring channel reports the value independent of amplitude or
integral dead-band reporting.
In addition to the normal cyclic reporting the IED also report spontaneously when
measured value passes any of the defined threshold limits.
en05000500.vsd
V
a
l
u
e

1
Y
t
V
a
l
u
e

2
V
a
l
u
e

3
V
a
l
u
e

4
Value Reported
(1st)
Value Reported
V
a
l
u
e

5
Value Reported
Y1
Y2
Y5
Value Reported Value Reported
Y3
Y4
(*)Set value for t: XDbRepInt
t (*) t (*) t (*) t (*)
IEC05000500 V1 EN
Figure 373: Periodic reporting
Amplitude dead-band supervision
If a measuring value is changed, compared to the last reported value, and the
change is larger than the Y pre-defined limits that are set by user (XZeroDb),
then the measuring channel reports the new value to a higher level, if this is
detected by a new measured value. This limits the information flow to a minimum
necessary. Figure 374 shows an example with the amplitude dead-band
supervision. The picture is simplified: the process is not continuous but the values
are evaluated with a time interval of one execution cycle from each other.
Monitoring
675
99000529.vsd
Y
t
Value Reported
(1st)
Value Reported
Value Reported
Y1
Y2
Y3
DY
DY
DY
DY
DY
DY
Value Reported
IEC99000529 V1 EN
Figure 374: Amplitude dead-band supervision reporting
After the new value is reported, the Y limits for dead-band are automatically set
around it. The new value is reported only if the measured quantity changes more
than defined by the Y set limits. Even if amplitude dead-band reporting is
selected, there will be a 30 s "back-ground" cyclic reporting as well.
Integral dead-band reporting
The measured value is reported if the time integral of all changes exceeds the pre-
set limit (XZeroDb), figure 375, where an example of reporting with integral dead-
band supervision is shown. The picture is simplified: the process is not continuous
but the values are evaluated with a time interval of one execution cycle from each
other.
The last value reported, Y1 in figure 375 serves as a basic value for further
measurement. A difference is calculated between the last reported and the newly
measured value and is multiplied by the time increment (discrete integral). The
absolute values of these integral values are added until the pre-set value is
exceeded. This occurs with the value Y2 that is reported and set as a new base for
the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals
with small variations that can last for relatively long periods. Even if integral dead-
band reporting is selected, there will be a 30 s "back-ground" cyclic reporting as well.
Monitoring
676
99000530.vsd
Y
t
Value Reported
(1st)
Y1
Value
Reported
A1 Y2
Value
Reported
Y3
Y4
A
Value
Reported
A2
Y5
A3
A4
A5 A7
A6
Value
Reported
A2 >=
pre-set value
A1 >=
pre-set value
A >=
pre-set value
A3 + A4 + A5 + A6 + A7 >=
pre-set value
IEC99000530 V1 EN
Figure 375: Reporting with integral dead-band supervision
15.1.2.2 Measurements CVMMXU
Mode of operation
The measurement function must be connected to three-phase current and three-
phase voltage input in the configuration tool (group signals), but it is capable to
measure and calculate above mentioned quantities in nine different ways depending
on the available VT inputs connected to the IED. The end user can freely select by
a parameter setting, which one of the nine available measuring modes shall be used
within the function. Available options are summarized in the following table:
Set value for
parameter
Mode
Formula used for complex, three-
phase power calculation
Formula used for voltage and
current magnitude calculation
Comment
1 L1, L2, L3
* * *
1 1 2 2 3 3
= + +
L L L L L L
S U I U I U I
EQUATION1385 V1 EN
1 2 3
1 2 3
( ) / 3
( ) / 3
= + +
= + +
L L L
L L L
U U U U
I I I I
EQUATION1386 V1 EN
Used when
three phase-
to-earth
voltages are
available
2 Arone
* *
1 2 1 2 3 3
= -
L L L L L L
S U I U I
1 2 2 3
1 3
( ) / 2
( ) / 2
= +
= +
L L L L
L L
U U U
I I I
Used when
three two
phase-to-
phase
voltages are
available
3 PosSeq
*
3 =
PosSeq PosSeq
S U I
3 =
=
PosSeq
PosSeq
U U
I I
Used when
only
symmetrical
three phase
power shall
be measured
Monitoring
677
Set value for
parameter
Mode
Formula used for complex, three-
phase power calculation
Formula used for voltage and
current magnitude calculation
Comment
4 L1L2
* *
1 2 1 2
( ) = -
L L L L
S U I I
1 2
1 2
( ) / 2
=
= +
L L
L L
U U
I I I
Used when
only U
L1L2
phase-to-
phase
voltage is
available
5 L2L3
* *
2 3 2 3
( ) = -
L L L L
S U I I
2 3
2 3
( ) / 2
=
= +
L L
L L
U U
I I I
Used when
only U
L2L3
phase-to-
phase
voltage is
available
6 L3L1
* *
3 1 3 1
( ) = -
L L L L
S U I I
3 1
3 1
( ) / 2
=
= +
L L
L L
U U
I I I
Used when
only U
L3L1
phase-to-
phase
voltage is
available
7 L1
*
1 1
3 =
L L
S U I
1
1
3 =
=
L
L
U U
I I
Used when
only U
L1
phase-to-
earth voltage
is available
8 L2
*
2 2
3 =
L L
S U I
2
2
3 =
=
L
L
U U
I I
Used when
only U
L2
phase-to-
earth voltage
is available
9 L3
*
3 3
3 =
L L
S U I
3
3
3 =
=
L
L
U U
I I
Used when
only U
L3
phase-to-
earth voltage
is available
* means complex conjugated value
It shall be noted that only in the first two operating modes that is, 1 & 2 the
measurement function calculates exact three-phase power. In other operating
modes that is, from 3 to 9 it calculates the three-phase power under assumption that
the power system is fully symmetrical. Once the complex apparent power is
calculated then the P, Q, S, & PF are calculated in accordance with the following
formulas:
Re( ) = P S
Monitoring
678
Im( ) = Q S
2 2
= = + S S P Q
cos
P
PF
S
j = =
Additionally to the power factor value the two binary output signals from the
function are provided which indicates the angular relationship between current and
voltage phasors. Binary output signal ILAG is set to one when current phasor is
lagging behind voltage phasor. Binary output signal ILEAD is set to one when
current phasor is leading the voltage phasor.
Each analogue output has a corresponding supervision level output (X_RANGE).
The output signal is an integer in the interval 0-4, see section "Measurement
supervision".
Calibration of analog inputs
Measured currents and voltages used in the CVMMXU function can be calibrated
to get class 0.5 measuring accuracy. This is achieved by amplitude and angle
below 5% and above 100% is constant and linear in between, see example in
figure 376.
Monitoring
679
IEC05000652 V2 EN
Low pass filtering
possible to introduce the recursive, low pass filtering of the measured values for P,
Q, S, U, I and power factor. This will make slower measurement response to the
step changes in the measured quantity. Filtering is performed in accordance with
the following recursive formula:
(1 )
Old Calculated
X k X k X = + -
where:
X is a new measured value (that is P, Q, S, U, I or PF) to be given out from the function
X
Old
is the measured value given from the measurement function in previous execution cycle
X
Calculated
is the new calculated value in the present execution cycle
Monitoring
680
immediately given out without any filtering (that is, without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. Appropriate value of k
shall be determined separately for every application. Some typical value for k =0.14.
Zero point clamping
In order to avoid erroneous measurements when either current or voltage signal is
not present, it is possible for the end user to set the amplitudeIGenZeroDb level for
current and voltage measurement UGenZeroDb is forced to zero. When either
current or voltage measurement is forced to zero automatically the measured values
for power (P, Q and S) and power factor are forced to zero as well. Since the
measurement supervision functionality, included in CVMMXU, is using these
values the zero clamping will influence the subsequent supervision (observe the
possibility to do zero point clamping within measurement supervision, see section
"Measurement supervision").
Compensation facility
In order to compensate for small amplitude and angular errors in the complete
measurement chain (CT error, VT error, IED input transformer errors and so on.) it
is possible to perform on site calibration of the power measurement. This is
achieved by setting the complex constant which is then internally used within the
function to multiply the calculated complex apparent power S. This constant is set
as amplitude (setting parameter PowAmpFact, default value 1.000) and angle
(setting parameter PowAngComp, default value 0.0 degrees). Default values for
these two parameters are done in such way that they do not influence internally
calculated value (complex constant has default value 1). In this way calibration, for
specific operating range (for example, around rated power) can be done at site.
However, to perform this calibration it is necessary to have an external power
meter with high accuracy class available.
Directionality
If CT earthing parameter is set as described in section "Analog inputs", active and
reactive power will be measured always towards the protected object. This is
shown in the following figure 377.
Monitoring
681
Busbar
Protected
Object
P Q
IED
IEC09000038-1-EN V1 EN
Figure 377: Internal IED directionality convention for P & Q measurements
Practically, it means that active and reactive power will have positive values when
they flow from the busbar towards the protected object and they will have negative
values when they flow from the protected object towards the busbar.
In some application, for example, when power is measured on the secondary side
of the power transformer it might be desirable, from the end client point of view, to
have actually opposite directional convention for active and reactive power
measurements. This can be easily achieved by setting parameter PowAngComp to
value of 180.0 degrees. With such setting the active and reactive power will have
positive values when they flow from the protected object towards the busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply
obtained from the pre-processing block and then just given out from the
measurement block as an output.
15.1.2.3 Phase current measurement CMMXU
The Phase current measurement (CMMXU) function must be connected to three-
phase current input in the configuration tool to be operable. Currents handled in the
function can be calibrated to get better then class 0.5 measuring accuracy for
internal use, on the outputs and IEC 61850. This is achieved by amplitude and
Monitoring
682
angle compensation at 5, 30 and 100% of rated current. The compensation below
5% and above 100% is constant and linear in between, see figure 376.
Phase currents (amplitude and angle) are available on the outputs and each
amplitude output has a corresponding supervision level output (ILx_RANG). The
supervision output signal is an integer in the interval 0-4, see section
"Measurement supervision".
15.1.2.4 Phase-phase and phase-neutral voltage measurements VMMXU,
VNMMXU
The voltage function must be connected to three-phase voltage input in the
configuration tool to be operable. Voltages are handled in the same way as currents
when it comes to class 0.5 calibrations, see above.
The voltages (phase or phase-phase voltage, amplitude and angle) are available on
the outputs and each amplitude output has a corresponding supervision level output
(ULxy_RANG). The supervision output signal is an integer in the interval 0-4, see
section "Measurement supervision".
15.1.2.5 Voltage and current sequence measurements VMSQI, CMSQI
The measurement functions must be connected to three-phase current (CMSQI) or
voltage (VMSQI) input in the configuration tool to be operable. No outputs, but
XRANG, are calculated within the measuring block and it is not possible to
calibrate the signals. Input signals are obtained from the pre-processing block and
transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the
outputs (voltage and current, amplitude and angle). Each amplitude output has a
corresponding supervision level output (X_RANGE). The output signal is an
integer in the interval 0-4, see section "Measurement supervision".
The available function blocks of an IED are depending on the actual hardware
(TRM) and the logic configuration made in PCM600.
Monitoring
683
CVMMXU
I3P*
U3P*
S
S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
IEC05000772 V2 EN
Figure 378: CVMMXU function block
CMMXU
I3P* IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
IEC05000699 V2 EN
Figure 379: CMMXU function block
VNMMXU
U3P* UL1
UL1RANG
UL1ANGL
UL2
UL2RANG
UL2ANGL
UL3
UL3RANG
UL3ANGL
IEC09000850 V1 EN
Figure 380: VNMMXU function block
VMMXU
U3P* UL12
UL12RANG
UL12ANGL
UL23
UL23RANG
UL23ANGL
UL31
UL31RANG
UL31ANGL
IEC05000701 V2 EN
Figure 381: VMMXU function block
Monitoring
684
CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
IEC05000703 V2 EN
Figure 382: CMSQI function block
VMSQI
U3P* 3U0
3U0RANG
3U0ANGL
U1
U1RANG
U1ANGL
U2
U2RANG
U2ANGL
IEC05000704 V2 EN
Figure 383: VMSQI function block
Table 440: CVMMXU Input signals
I3P GROUP
SIGNAL
U3P GROUP
SIGNAL
Table 441: CVMMXU Output signals
S REAL Apparent Power magnitude of deadband value
S_RANGE INTEGER Apparent Power range
P_INST REAL Active Power
P REAL Active Power magnitude of deadband value
P_RANGE INTEGER Active Power range
Q_INST REAL Reactive Power
Q REAL Active Power magnitude of deadband value
Q_RANGE INTEGER Reactive Power range
PF REAL Power Factor magnitude of deadband value
PF_RANGE INTEGER Power Factor range
ILAG BOOLEAN Current is lagging voltage
Monitoring
685
ILEAD BOOLEAN Current is leading voltage
U REAL Calculate voltage magnitude of deadband value
U_RANGE INTEGER Calcuate voltage range
I REAL Calculated current magnitude of deadband value
I_RANGE INTEGER Calculated current range
F REAL System frequency magnitude of deadband value
F_RANGE INTEGER System frequency range
Table 442: CMMXU Input signals
I3P GROUP
SIGNAL
- Group connection abstract block 1
Table 443: CMMXU Output signals
IL1 REAL IL1 Amplitude, magnitude of reported value
IL1RANG INTEGER IL1 Amplitude range
IL1ANGL REAL IL1 Angle, magnitude of reported value
Table 444: VNMMXU Input signals
U3P GROUP
SIGNAL
Table 445: VNMMXU Output signals
UL1 REAL UL1 Amplitude, magnitude of reported value
UL1RANG INTEGER UL1 Amplitude range
UL1ANGL REAL UL1 Angle, magnitude of reported value
Monitoring
686
Table 446: VMMXU Input signals
U3P GROUP
SIGNAL
Table 447: VMMXU Output signals
Table 448: CMSQI Input signals
I3P GROUP
SIGNAL
Table 449: CMSQI Output signals
3I0 REAL 3I0 Amplitude, magnitude of reported value
3I0RANG INTEGER 3I0 Amplitude range
3I0ANGL REAL 3I0 Angle, magnitude of reported value
I1 REAL I1 Amplitude, magnitude of reported value
I1RANG INTEGER I1 Amplitude range
I1ANGL REAL I1 Angle, magnitude of reported value
I2 REAL I2 Amplitude, magnitude of reported value
I2RANG INTEGER I2 Amplitude range
I2ANGL REAL I2 Angle, magnitude of reported value
Monitoring
687
Table 450: VMSQI Input signals
U3P GROUP
SIGNAL
Table 451: VMSQI Output signals
3U0 REAL 3U0 Amplitude, magnitude of reported value
3U0RANG INTEGER 3U0 Amplitude range
3U0ANGL REAL 3U0 Angle, magnitude of reported value
U1 REAL U1 Amplitude, magnitude of reported value
U1RANG INTEGER U1 Amplitude range
U1ANGL REAL U1 Angle, magnitude of reported value
U2 REAL U2 Amplitude, magnitude of reported value
U2RANG INTEGER U2 Amplitude range
U2ANGL REAL U2 Angle, magnitude of reported value
The available setting parameters of the measurement function (MMXU, MSQI) are
depending on the actual hardware (TRM) and the logic configuration made in
PCM600.
Table 452: CVMMXU Non group settings (basic)
SLowLim 0.000 -
10000000000.000
VA 0.001 0.000 Low limit (physical value)
SLowLowLim 0.000 -
10000000000.000
VA 0.001 0.000 Low Low limit (physical value)
SMin 0.000 -
10000000000.000
VA 0.001 0.000 Minimum value
SMax 0.000 -
10000000000.000
VA 0.001 1000000000.000 Maximum value
SRepTyp Cyclic
Dead band
Int deadband
- - Cyclic Reporting type
PMin -10000000000.000
- 10000000000.000
W 0.001 -1000000000.000 Minimum value
PMax -10000000000.000
- 10000000000.000
W 0.001 1000000000.000 Maximum value
PRepTyp Cyclic
Dead band
Int deadband
QMin -10000000000.000
- 10000000000.000
VAr 0.001 -1000000000.000 Minimum value
Monitoring
688
Operation Off
On
IBase 1 - 99999 A 1 3000 Base setting for current level in A
QMax -10000000000.000
- 10000000000.000
VAr 0.001 1000000000.000 Maximum value
QRepTyp Cyclic
Dead band
Int deadband
Mode L1, L2, L3
Arone
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
- - L1, L2, L3 Selection of measured current and
voltage
PowAmpFact 0.000 - 6.000 - 0.001 1.000 Amplitude factor to scale power
calculations
PowAngComp -180.0 - 180.0 Deg 0.1 0.0 Angle compensation for phase shift
between measured I & U
measurement, U and I
PFMin -1.000 - 0.000 - 0.001 -1.000 Minimum value
PFMax 0.000 - 1.000 - 0.001 1.000 Maximum value
PFRepTyp Cyclic
Dead band
Int deadband
UMin -10000000000.000
- 10000000000.000
V 0.001 0.000 Minimum value
UMax -10000000000.000
- 10000000000.000
V 0.001 400000.000 Maximum value
URepTyp Cyclic
Dead band
Int deadband
IMin -10000000000.000
- 10000000000.000
A 0.001 0.000 Minimum value
IMax -10000000000.000
- 10000000000.000
A 0.001 1000.000 Maximum value
IRepTyp Cyclic
Dead band
Int deadband
FrMin -10000000000.000
- 10000000000.000
Hz 0.001 0.000 Minimum value
FrMax -10000000000.000
- 10000000000.000
Hz 0.001 70.000 Maximum value
FrRepTyp Cyclic
Dead band
Int deadband
Monitoring
689
Table 453: CVMMXU Non group settings (advanced)
SDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
range, Int Db: In %s
SZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
SHiHiLim 0.000 -
10000000000.000
VA 0.001 900000000.000 High High limit (physical value)
SHiLim 0.000 -
10000000000.000
VA 0.001 800000000.000 High limit (physical value)
SLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
PZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
PHiHiLim -10000000000.000
- 10000000000.000
W 0.001 900000000.000 High High limit (physical value)
PHiLim -10000000000.000
- 10000000000.000
W 0.001 800000000.000 High limit (physical value)
PLowLim -10000000000.000
- 10000000000.000
W 0.001 -800000000.000 Low limit (physical value)
PLowLowLim -10000000000.000
- 10000000000.000
W 0.001 -900000000.000 Low Low limit (physical value)
PLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
QDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
QZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
QHiHiLim -10000000000.000
- 10000000000.000
VAr 0.001 900000000.000 High High limit (physical value)
QHiLim -10000000000.000
- 10000000000.000
VAr 0.001 800000000.000 High limit (physical value)
QLowLim -10000000000.000
- 10000000000.000
VAr 0.001 -800000000.000 Low limit (physical value)
QLowLowLim -10000000000.000
- 10000000000.000
VAr 0.001 -900000000.000 Low Low limit (physical value)
QLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PFDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
PFZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UGenZeroDb 1 - 100 % 1 5 Zero point clamping in % of Ubase
PFHiHiLim -3.000 - 3.000 - 0.001 3.000 High High limit (physical value)
IGenZeroDb 1 - 100 % 1 5 Zero point clamping in % of Ibase
PFHiLim -3.000 - 3.000 - 0.001 2.000 High limit (physical value)
PFLowLim -3.000 - 3.000 - 0.001 -2.000 Low limit (physical value)
PFLowLowLim -3.000 - 3.000 - 0.001 -3.000 Low Low limit (physical value)
Monitoring
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PFLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
UDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
UZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UHiHiLim -10000000000.000
- 10000000000.000
V 0.001 460000.000 High High limit (physical value)
UHiLim -10000000000.000
- 10000000000.000
V 0.001 450000.000 High limit (physical value)
ULowLim -10000000000.000
- 10000000000.000
V 0.001 380000.000 Low limit (physical value)
ULowLowLim -10000000000.000
- 10000000000.000
V 0.001 350000.000 Low Low limit (physical value)
ULimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
IDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
IZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
IHiHiLim -10000000000.000
- 10000000000.000
A 0.001 900.000 High High limit (physical value)
IHiLim -10000000000.000
- 10000000000.000
A 0.001 800.000 High limit (physical value)
ILowLim -10000000000.000
- 10000000000.000
A 0.001 -800.000 Low limit (physical value)
ILowLowLim -10000000000.000
- 10000000000.000
A 0.001 -900.000 Low Low limit (physical value)
ILimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
FrDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
FrZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
FrHiHiLim -10000000000.000
- 10000000000.000
Hz 0.001 65.000 High High limit (physical value)
FrHiLim -10000000000.000
- 10000000000.000
Hz 0.001 63.000 High limit (physical value)
FrLowLim -10000000000.000
- 10000000000.000
Hz 0.001 47.000 Low limit (physical value)
FrLowLowLim -10000000000.000
- 10000000000.000
Hz 0.001 45.000 Low Low limit (physical value)
FrLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
5% of Ur
30% of Ur
100% of Ur
Monitoring
691
5% of Ir
30% of Ir
100% of Ir
Table 454: CMMXU Non group settings (basic)
IL1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
Operation Off
On
IBase 1 - 99999 A 1 3000 Base setting for current level in A
IL1Max 0.000 -
10000000000.000
IL1RepTyp Cyclic
Dead band
Int deadband
IL1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
IL2Max 0.000 -
10000000000.000
IL2RepTyp Cyclic
Dead band
Int deadband
IL3Max 0.000 -
10000000000.000
IL3RepTyp Cyclic
Dead band
Int deadband
Monitoring
692
Table 455: CMMXU Non group settings (advanced)
IL1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
IL1HiHiLim 0.000 -
10000000000.000
IL1HiLim 0.000 -
10000000000.000
5% of Ir
30% of Ir
IL1LowLim 0.000 -
10000000000.000
A 0.001 0.000 Low limit (physical value)
IL1LowLowLim 0.000 -
10000000000.000
A 0.001 0.000 Low Low limit (physical value)
100% of Ir
IL1Min 0.000 -
10000000000.000
IL1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
common for all limits
IL2HiHiLim 0.000 -
10000000000.000
IL2HiLim 0.000 -
10000000000.000
IL2LowLim 0.000 -
10000000000.000
10000000000.000
IL2Min 0.000 -
10000000000.000
IL3HiHiLim 0.000 -
10000000000.000
IL3HiLim 0.000 -
10000000000.000
IL3LowLim 0.000 -
10000000000.000
Monitoring
693
10000000000.000
IL3Min 0.000 -
10000000000.000
Table 456: VNMMXU Non group settings (basic)
UL1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
Operation Off
On
UL1Max 0.000 -
10000000000.000
UL1RepTyp Cyclic
Dead band
Int deadband
UL1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
UL1AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
UL2Max 0.000 -
10000000000.000
UL2RepTyp Cyclic
Dead band
Int deadband
UL3Max 0.000 -
10000000000.000
UL3RepTyp Cyclic
Dead band
Int deadband
Monitoring
694
Table 457: VNMMXU Non group settings (advanced)
UL1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UL1HiHiLim 0.000 -
10000000000.000
UL1HiLim 0.000 -
10000000000.000
UL1LowLim 0.000 -
10000000000.000
UL1LowLowLim 0.000 -
10000000000.000
100% of Ur
UL1Min 0.000 -
10000000000.000
UL2HiHiLim 0.000 -
10000000000.000
UL2HiLim 0.000 -
10000000000.000
UL2LowLim 0.000 -
10000000000.000
10000000000.000
UL2Min 0.000 -
10000000000.000
UL3HiHiLim 0.000 -
10000000000.000
UL3HiLim 0.000 -
10000000000.000
UL3LowLim 0.000 -
10000000000.000
10000000000.000
UL3Min 0.000 -
10000000000.000
Table 458: VMMXU Non group settings (basic)
Operation Off
On
UL12Max 0.000 -
10000000000.000
Monitoring
695
UL12RepTyp Cyclic
Dead band
Int deadband
UL23Max 0.000 -
10000000000.000
UL23RepTyp Cyclic
Dead band
Int deadband
UL31Max 0.000 -
10000000000.000
UL31RepTyp Cyclic
Dead band
Int deadband
Table 459: VMMXU Non group settings (advanced)
UL12HiHiLim 0.000 -
10000000000.000
UL12HiLim 0.000 -
10000000000.000
UL12LowLim 0.000 -
10000000000.000
10000000000.000
100% of Ur
UL12Min 0.000 -
10000000000.000
UL23HiHiLim 0.000 -
10000000000.000
UL23HiLim 0.000 -
10000000000.000
UL23LowLim 0.000 -
10000000000.000
Monitoring
696
10000000000.000
UL23Min 0.000 -
10000000000.000
UL31HiHiLim 0.000 -
10000000000.000
UL31HiLim 0.000 -
10000000000.000
UL31LowLim 0.000 -
10000000000.000
10000000000.000
UL31Min 0.000 -
10000000000.000
Table 460: CMSQI Non group settings (basic)
3I0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
3I0Min 0.000 -
10000000000.000
3I0Max 0.000 -
10000000000.000
3I0RepTyp Cyclic
Dead band
Int deadband
3I0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3I0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
Operation Off
On
3I0AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
3I0AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
3I0AngRepTyp Cyclic
Dead band
Int deadband
I1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I1Min 0.000 -
10000000000.000
Monitoring
697
I1Max 0.000 -
10000000000.000
I1RepTyp Cyclic
Dead band
Int deadband
I1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I1AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
I1AngRepTyp Cyclic
Dead band
Int deadband
I2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I2Min 0.000 -
10000000000.000
I2Max 0.000 -
10000000000.000
I2RepTyp Cyclic
Dead band
Int deadband
I2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I2AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
I2AngRepTyp Cyclic
Dead band
Int deadband
Table 461: CMSQI Non group settings (advanced)
3I0ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3I0HiHiLim 0.000 -
10000000000.000
3I0HiLim 0.000 -
10000000000.000
3I0LowLim 0.000 -
10000000000.000
3I0LowLowLim 0.000 -
10000000000.000
3I0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1HiHiLim 0.000 -
10000000000.000
I1HiLim 0.000 -
10000000000.000
Monitoring
698
I1LowLim 0.000 -
10000000000.000
I1LowLowLim 0.000 -
10000000000.000
I1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
I2ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I2HiHiLim 0.000 -
10000000000.000
I2HiLim 0.000 -
10000000000.000
I2LowLim 0.000 -
10000000000.000
I2LowLowLim 0.000 -
10000000000.000
I2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I2AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
Table 462: VMSQI Non group settings (basic)
3U0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
3U0Min 0.000 -
10000000000.000
3U0Max 0.000 -
10000000000.000
3U0RepTyp Cyclic
Dead band
Int deadband
3U0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3U0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
Operation Off
On
3U0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3U0AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
3U0AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
3U0AngRepTyp Cyclic
Dead band
Int deadband
U1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
Monitoring
699
U1Min 0.000 -
10000000000.000
U1Max 0.000 -
10000000000.000
U1RepTyp Cyclic
Dead band
Int deadband
U1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
U1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2Min 0.000 -
10000000000.000
U2Max 0.000 -
10000000000.000
U2RepTyp Cyclic
Dead band
Int deadband
U2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
U2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
U2AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
U2AngRepTyp Cyclic
Dead band
Int deadband
UAmpPreComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to pre-calibrate voltage
at 5% of Ir
at 30% of Ir
at 100% of Ir
Table 463: VMSQI Non group settings (advanced)
3U0ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3U0HiHiLim 0.000 -
10000000000.000
3U0HiLim 0.000 -
10000000000.000
3U0LowLim 0.000 -
10000000000.000
3U0LowLowLim 0.000 -
10000000000.000
Monitoring
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U1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U1HiHiLim 0.000 -
10000000000.000
U1HiLim 0.000 -
10000000000.000
U1LowLim 0.000 -
10000000000.000
U1LowLowLim 0.000 -
10000000000.000
U1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U1AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
U1AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
U1AngRepTyp Cyclic
Dead band
Int deadband
U2ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U2HiHiLim 0.000 -
10000000000.000
U2HiLim 0.000 -
10000000000.000
U2LowLim 0.000 -
10000000000.000
U2LowLowLim 0.000 -
10000000000.000
U2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
Table 464: CVMMXU technical data
Frequency (0.95-1.05) f
r
2.0 mHz
Voltage (0.1-1.5) U
r
0.5% of U
r
at UU
r
0.5% of U at U > U
r
Connected current (0.2-4.0) I
r
0.5% of I
r
at I I
r
0.5% of I at I > I
r
Active power, P 0.1 x U
r
 S
r
Conditions:
0.8 x U
r
< U < 1.2 U
r
0.2 x I
r
< I < 1.2 I
r
Reactive power, Q 0.1 x U
r
< U < 1.5 x U
r
0.2 x I
r
< I < 4.0 x I
r
Apparent power, S 0.1 x U
r
< U < 1.5 x U
r
0.2 x I
r
< I < 4.0 x I
r
Power factor, cos () 0.1 x U
r
< U < 1.5 x U
r
0.2 x I
r
< I < 4.0 x I
r
0.02
Monitoring
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15.2 Event counter CNTGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Event counter CNTGGIO
S00946 V1 EN
-
15.2.1 Introduction
Event counter (CNTGGIO) has six counters which are used for storing the number
of times each counter input has been activated.
Event counter (CNTGGIO) has six counter inputs. CNTGGIO stores how many
times each of the inputs has been activated. The counter memory for each of the six
inputs is updated, giving the total number of times the input has been activated, as
soon as an input is activated. The maximum count up speed is 10 pulses per
second. The maximum counter value is 10 000. For counts above 10 000 the
counter will stop at 10 000 and no restart will take place.
To not risk that the flash memory is worn out due to too many writings, a
mechanism for limiting the number of writings per time period is included in the
product. This however gives as a result that it can take long time, up to several
minutes, before a new value is stored in the flash memory. And if a new
CNTGGIO value is not stored before auxiliary power interruption, it will be lost.
CNTGGIO stored values in flash memory will however not be lost at an auxiliary
power interruption.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked. The input can for example, be used for blocking the counters
at testing.The function block has an input RESET. At activation of this input all six
counters are set to 0.
All inputs are configured via PCM600.
15.2.2.1 Reporting
The content of the counters can be read in the local HMI.
Reset of counters can be performed in the local HMI and a binary input.
Reading of content can also be performed remotely, for example from a IEC 61850
client. The value can also be presented as a measuring value on the local HMI
graphical display.
Monitoring
702
15.2.2.2 Design
The function block has six inputs for increasing the counter values for each of the
six counters respectively. The content of the counters are stepped one step for each
positive edge of the input respectively.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked and are not updated. Valid number is held.
The function block has an input RESET. At activation of this input all six counters
are set to 0.
CNTGGIO
BLOCK
COUNTER1
COUNTER2
COUNTER3
COUNTER4
COUNTER5
COUNTER6
RESET
VALUE1
VALUE2
VALUE3
VALUE4
VALUE5
VALUE6
IEC05000345 V2 EN
Figure 384: CNTGGIO function block
15.2.4 Input signals
Table 465: CNTGGIO Input signals
COUNTER1 BOOLEAN 0 Input for counter1
RESET BOOLEAN 0 Reset of function
Table 466: CNTGGIO Output signals
VALUE1 INTEGER Output of counter1
Monitoring
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Table 467: CNTGGIO Group settings (basic)
Operation Off
On
Table 468: CNTGGIO technical data
Counter value 0-10000 -
Max. count up speed 10 pulses/s -
15.3 Event function EVENT
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Event function EVENT
S00946 V1 EN
-
15.3.1 Introduction
When using a Substation Automation system with LON or SPA communication,
time-tagged events can be sent at change or cyclically from the IED to the station
level. These events are created from any available signal in the IED that is
connected to the Event function (EVENT). The event function block is used for
LON and SPA communication.
Analog and double indication values are also transferred through EVENT function.
The main purpose of the event function (EVENT) is to generate events when the
state or value of any of the connected input signals is in a state, or is undergoing a
state transition, for which event generation is enabled.
Monitoring
704
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given
a name from the Application Configuration tool. The inputs are normally used to
create single events, but are also intended for double indication events.
EVENT function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical
signals and binary input channels. The internal signals are time-tagged in the main
processing module, while the binary input channels are time-tagged directly on the
input module. The time-tagging of the events that are originated from internal
logical signals have a resolution corresponding to the execution cyclicity of
EVENT function. The time-tagging of the events that are originated from binary
input signals have a resolution of 1 ms.
The outputs from EVENT function are formed by the reading of status, events and
alarms by the station level on every single input. The user-defined name for each
input is intended to be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to
1000 events. If new events appear before the oldest event in the buffer is read, the
oldest event is overwritten and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are
treated commonly for both the LON and SPA communication. The EventMask can
be set individually for each input channel. These settings are available:
NoEvents
OnSet
OnReset
OnChange
AutoDetect
It is possible to define which part of EVENT function generates the events. This
can be performed individually for the SPAChannelMask and LONChannelMask
respectively. For each communication type these settings are available:
Off
Channel 1-8
Channel 9-16
Channel 1-16
For LON communication the events normally are sent to station level at change. It
is possibly also to set a time for cyclic sending of the events individually for each
input channel.
To protect the SA system from signals with a high change rate that can easily
saturate the event system or the communication subsystems behind it, a quota
limiter is implemented. If an input creates events at a rate that completely consume
the granted quota then further events from the channel will be blocked. This block
will be removed when the input calms down and the accumulated quota reach 66%
Monitoring
705
of the maximum burst quota. The maximum burst quota per input channel is 45
events per second.
EVENT
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
IEC05000697 V2 EN
Figure 385: EVENT function block
Table 469: EVENT Input signals
INPUT1 GROUP
SIGNAL
0 Input 1
INPUT2 GROUP
SIGNAL
0 Input 2
INPUT3 GROUP
SIGNAL
0 Input 3
INPUT4 GROUP
SIGNAL
0 Input 4
INPUT5 GROUP
SIGNAL
0 Input 5
INPUT6 GROUP
SIGNAL
0 Input 6
INPUT7 GROUP
SIGNAL
0 Input 7
INPUT8 GROUP
SIGNAL
0 Input 8
INPUT9 GROUP
SIGNAL
0 Input 9
INPUT10 GROUP
SIGNAL
0 Input 10
INPUT11 GROUP
SIGNAL
0 Input 11
Monitoring
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INPUT12 GROUP
SIGNAL
0 Input 12
INPUT13 GROUP
SIGNAL
0 Input 13
INPUT14 GROUP
SIGNAL
0 Input 14
INPUT15 GROUP
SIGNAL
0 Input 15
INPUT16 GROUP
SIGNAL
0 Input 16
Table 470: EVENT Non group settings (basic)
SPAChannelMask Off
Channel 1-8
Channel 9-16
Channel 1-16
- - Off SPA channel mask
LONChannelMask Off
Channel 1-8
Channel 9-16
Channel 1-16
- - Off LON channel mask
EventMask1 NoEvents
OnSet
OnReset
OnChange
AutoDetect
- - AutoDetect Reporting criteria for input 1
EventMask2 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask3 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask4 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask5 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask6 NoEvents
OnSet
OnReset
OnChange
AutoDetect
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EventMask7 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask8 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask9 NoEvents
OnSet
OnReset
OnChange
AutoDetect
EventMask10 NoEvents
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 s 1 2 Minimum reporting interval input 1
Monitoring
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15.4 Logical signal status report BINSTATREP
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Logical signal status report BINSTATREP - -
15.4.1 Introduction
The Logical signal status report (BINSTATREP) function makes it possible for a
SPA master to poll signals from various other functions.
The Logical signal status report (BINSTATREP) function has 16 inputs and 16
outputs. The output status follows the inputs and can be read from the local HMI or
via SPA communication.
When an input is set, the respective output is set for a user defined time. If the
input signal remains set for a longer period, the output will remain set until the
input signal resets.
Monitoring
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t t
INPUTn
OUTPUTn
IEC09000732 V1 EN
Figure 386: BINSTATREP logical diagram
BINSTATREP
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
IEC09000730 V1 EN
Figure 387: BINSTATREP function block
Table 471: BINSTATREP Input signals
INPUT1 BOOLEAN 0 Single status report input 1
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Table 472: BINSTATREP Output signals
OUTPUT1 BOOLEAN Logical status report output 1
Table 473: BINSTATREP Non group settings (basic)
t 0.000 - 60000.000 s 0.001 10.000 Time delay of function
15.5 Fault locator LMBRFLO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Fault locator LMBRFLO - -
Monitoring
711
15.5.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a
persistent fault and/or to pin-point a weak spot on the line.
The fault locator is an impedance measuring function giving the distance to the
fault in percent, km or miles. The main advantage is the high accuracy achieved by
compensating for load current and for the mutual zero-sequence effect on double
circuit lines.
The compensation includes setting of the remote and local sources and calculation
of the distribution of fault currents from each side. This distribution of fault
current, together with recorded load (pre-fault) currents, is used to exactly calculate
the fault position. The fault can be recalculated with new source data at the actual
fault to further increase the accuracy.
Especially on heavily loaded long lines (where the fault locator is most important)
where the source voltage angles can be up to 35-40 degrees apart the accuracy can
be still maintained with the advanced compensation included in fault locator.
The Fault locator (LMBRFLO) in the IED is an essential complement to other
monitoring functions, since it measures and indicates the distance to the fault with
great accuracy.
When calculating distance to fault, pre-fault and fault phasors of currents and
voltages are selected from the Trip value recorder data, thus the analog signals used
by the fault locator must be among those connected to the disturbance report
function. The analog configuration (channel selection) is performed using the
parameter setting tool within PCM600.
The calculation algorithm considers the effect of load currents, double-end infeed
and additional fault resistance.
Z
0m
=Z
0m
+jX
0m
R
1A
+jX
1A
R
0L
+jX
0L
R
1L
+jX
1L
R
0L
+jX
0L
R
1L
+jX
1L
R
1B
+jX
1B
LMBRFLO
DRPRDRE
IEC05000045 V2 EN
Figure 388: Simplified network configuration with network data, required for
settings of the fault location-measuring function
Monitoring
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If source impedance in the near and far end of the protected line have changed in a
significant manner relative to the set values at fault location calculation time (due
to exceptional switching state in the immediate network, power generation out of
order, and so on), new values can be entered via the local HMI and a recalculation
of the distance to the fault can be ordered using the algorithm described below. Its
also possible to change fault loop. In this way, a more accurate location of the fault
can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in
kilometers or miles as selected on the local HMI. The fault location is stored as a
part of the disturbance report information (ER, DR, IND, TVR and FL) and
managed via the local HMI or PCM600.
15.5.2.1 Measuring Principle
For transmission lines with voltage sources at both line ends, the effect of double-
end infeed and additional fault resistance must be considered when calculating the
distance to the fault from the currents and voltages at one line end. If this is not
done, the accuracy of the calculated figure will vary with the load flow and the
amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of
double-end infeed, additional fault resistance and load current.
15.5.2.2 Accurate algorithm for measurement of distance to fault
Figure 389 shows a single-line diagram of a single transmission line, that is fed
from both ends with source impedances Z
A
and Z
B
. Assume that the fault occurs at
a distance F from IED A on a line with the length L and impedance Z
L
. The fault
resistance is defined as R
F
. A single-line model is used for better clarification of
the algorithm.
Monitoring
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Z
A
pZ
L
A
U
A
I
F
R
F
(1-p).Z
L
B
Z
B
F
L
I
B
I
A
xx01000171.vsd
IEC01000171 V1 EN
Figure 389: Fault on transmission line fed from both ends
From figure 389 it is evident that:
U
A
I
A
p Z
L
I
F
R
F
+ =
Where:
I
A
is the line current after the fault, that is, pre-fault current plus current change due to the fault,
I
F
is the fault current and
p
is a relative distance to the fault
The fault current is expressed in measurable quantities by:
I
F
I
FA
D
A
--------
=
Where:
I
FA
is the change in current at the point of measurement, IED A and
D
A
is a fault current-distribution factor, that is, the ratio between the fault current at line end A
and the total fault current.
For a single line, the value is equal to:
D
A
1 p ( ) Z
L
Z
B
+
Z
A
Z
L
Z
B
+ +
----------------------------------------- =
Monitoring
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Thus, the general fault location equation for a single line is:
U
A
I
A
p Z
L
I
FA
D
A
-------- R
F
+ =
Table 474: Expressions for U
A
, I
A
and I
FA
for different types of faults
Fault type: U
A
I
A
I
FA
L1-N U
L1A
I
L1A
+ K
N
x I
NA 3
2
--- D I
L1A
I
0A
( )
EQUATION110 V1 EN
L2-N U
L2A
I
L2A
+ K
N
x I
NA
3
2
--- D I
L2A
I
0A
( )
EQUATION111 V1 EN
L3-N U
L3A
I
L3A
+ K
N
x I
NA
3
2
--- D I
L3A
I
0A
( )
EQUATION112 V1 EN
L1-L2-L3, L1-L2,L1-L2-
N
U
L1A
-U
L2A
I
L1A
- I
L2A
DI
L1L2A
EQUATION113 V1 EN
L2-L3, L2-L3-N U
L2A
-U
L3A
I
L2A
- I
L3A DI
L2L3A
EQUATION114 V1 EN
L3-L1, L3-L1-N U
L3A
-U
L1A
I
L3A
- I
L1A
DI
L3L1A
EQUATION115 V1 EN
The K
N
complex quantity for zero-sequence compensation for the single line is
equal to:
K
N
Z
0L
Z
1L
3 Z
1L
------------------------
=
DI is the change in current, that is the current after the fault minus the current
before the fault.
In the following, the positive sequence impedance for Z
A
, Z
B
and Z
L
is inserted
into the equations, because this is the value used in the algorithm.
For double lines, the fault equation is:
Monitoring
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U
A
I
A
p Z
1L
I
FA
D
A
-------- R
F
I
0P
Z
0M
+ + =
Where:
I
0P
is a zero sequence current of the parallel line,
Z
0M
is a mutual zero sequence impedance and
D
A
is the distribution factor of the parallel line, which is:
D
A
1 p ( ) Z
A
Z
AL
Z
B
+ + ( ) Z
B
+
2 Z
A
Z
L
2 Z
B
+ +
-----------------------------------------------------------------------------
=
EQUATION101 V1 EN
The K
N
compensation factor for the double line becomes:
K
N
Z
0L
Z
1L
3 Z
1L
------------------------
Z
0M
3 Z
1L
-----------------
I
0P
I
0A
------- + =
From these equations it can be seen, that, if Z
0m
= 0, then the general fault location
equation for a single line is obtained. Only the distribution factor differs in these
two cases.
Because the D
A
distribution factor according to equation 147 or 149 is a function
of p, the general equation 149 can be written in the form:
p
2
p K
1
K
2
K
3
R
F
+ 0 =
Where:
K
1
U
A
I
A
Z
L
----------------
Z
B
Z
L
Z
ADD
+
--------------------------- 1 + + =
K
2
U
A
I
A
Z
L
----------------
Z
B
Z
L
Z
ADD
+
--------------------------- 1 +

=
K
3
I
FA
I
A
Z
L
----------------
Z
A
Z
B
+
Z
1
Z
ADD
+
--------------------------- 1 +

=
and:
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Z
ADD
= Z
A
+ Z
B
for parallel lines.
I
A
, I
FA
and U
A
are given in the above table.
K
N
is calculated automatically according to equation 150.
Z
A
, Z
B
, Z
L
, Z
0L
and Z
0M
are setting parameters.
For a single line, Z
0M
= 0 and Z
ADD
= 0. Thus, equation 151 applies to both single
and parallel lines.
Equation 151 can be divided into real and imaginary parts:
p
2
p Re K
1
( ) Re K
2
( ) R
F
Re K
3
( ) 0 = +
p Im K
1
( ) Im K
2
( ) R
F
Im K
3
( ) 0 = +
If the imaginary part of K
3
is not zero, R
F
can be solved according to equation 156,
and then inserted to equation 155. According to equation 155, the relative distance
to the fault is solved as the root of a quadratic equation.
Equation 155 gives two different values for the relative distance to the fault as a
solution. A simplified load compensated algorithm, which gives an unequivocal
figure for the relative distance to the fault, is used to establish the value that should
be selected.
If the load compensated algorithms according to the above do not give a reliable
solution, a less accurate, non-compensated impedance model is used to calculate
the relative distance to the fault.
15.5.2.3 The non-compensated impedance model
In the non-compensated impedance model, I
A
line current is used instead of I
FA
fault current:
U
A
p Z
1L
I
A
R
F
I
A
+ =
Where:
I
A
is according to table 474.
The accuracy of the distance-to-fault calculation, using the non-compensated
impedance model, is influenced by the pre-fault load current. So, this method is
only used if the load compensated models do not function.
Monitoring
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15.5.2.4 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll fault location
information from the IED to a master (that is station HSI). There are two outputs
that must be connected to appropriate inputs on the function block I103StatFltDis,
FLTDISTX gives distance to fault (reactance, according the standard) and
CALCMADE gives a pulse (100 ms) when a result is obtainable on FLTDISTX
output.
LMBRFLO
PHSELL1*
PHSELL2*
PHSELL3*
CALCDIST*
FLTDISTX
CALCMADE
BCD_80
BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
IEC05000679 V3 EN
Figure 390: FLO function block
Table 475: LMBRFLO Input signals
PHSELL1 BOOLEAN 0 Phase selecton L1
CALCDIST BOOLEAN 0 Do calculate fault distance (release)
Table 476: LMBRFLO Output signals
FLTDISTX REAL Reactive distance to fault
CALCMADE BOOLEAN Fault calculation made
BCD_80 BOOLEAN Distance in binary coded data, bit represents 80%
Monitoring
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Table 477: LMBRFLO Group settings (basic)
R1A 0.001 - 1500.000 ohm/p 0.001 2.000 Source resistance A (near end)
X1A 0.001 - 1500.000 ohm/p 0.001 12.000 Source reactance A (near end)
R1B 0.001 - 1500.000 ohm/p 0.001 2.000 Source resistance B (far end)
X1B 0.001 - 1500.000 ohm/p 0.001 12.000 Source reactance B (far end)
R1L 0.001 - 1500.000 ohm/p 0.001 2.000 Positive sequence line resistance
X1L 0.001 - 1500.000 ohm/p 0.001 12.500 Positive sequence line reactance
R0L 0.001 - 1500.000 ohm/p 0.001 8.750 Zero sequence line resistance
X0L 0.001 - 1500.000 ohm/p 0.001 50.000 Zero sequence line reactance
R0M 0.000 - 1500.000 ohm/p 0.001 0.000 Zero sequence mutual resistance
X0M 0.000 - 1500.000 ohm/p 0.001 0.000 Zero sequence mutual reactance
LineLength 0.0 - 10000.0 - 0.1 40.0 Length of line
Table 478: LMBRFLO Non group settings (basic)
DrepChNoIL1 1 - 30 Ch 1 1 Recorder input number recording phase
current, IL1
current, IL2
current, IL3
DrepChNoIN 0 - 30 Ch 1 4 Recorder input number recording
residual current, IN
DrepChNoIP 0 - 30 Ch 1 0 Recorder input number recording 3I0 on
parallel line
DrepChNoUL1 1 - 30 Ch 1 5 Recorder input number recording phase
voltage, UL1
voltage, UL2
voltage, UL3
Monitoring
719
Table 479: LMBRFLO technical data
Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) /phase 2.0% static accuracy
2.0% degrees static
angular accuracy
Conditions:
r
r
Phase selection According to input signals -
Maximum number of fault
locations
100 -
15.6 Measured value expander block RANGE_XP
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Measured value expander block RANGE_XP - -
15.6.1 Introduction
The current and voltage measurements functions (CVMMXU, CMMXU, VMMXU
and VNMMXU), current and voltage sequence measurement functions (CMSQI
and VMSQI) and IEC 61850 generic communication I/O functions (MVGGIO) are
provided with measurement supervision functionality. All measured values can be
supervised with four settable limits that is low-low limit, low limit, high limit and
high-high limit. The measure value expander block (RANGE_XP) has been
introduced to be able to translate the integer output signal from the measuring
functions to 5 binary signals that is below low-low limit, below low limit, normal,
above high-high limit or above high limit. The output signals can be used as
conditions in the configurable logic.
The input signal must be connected to a range output of a measuring function block
(CVMMXU, CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGGIO).
The function block converts the input integer value to five binary output signals
according to table 480.
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Table 480: Input integer value converted to binary output signals
Measured supervised
value is:
below low-low
limit
between low
low and low
limit
between low
and high limit
between high-
high and high
limit
above high-
high limit
Output:
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High
RANGE_XP
RANGE* HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
IEC05000346 V2 EN
Figure 391: RANGE_XP function block
Table 481: RANGE_XP Input signals
RANGE INTEGER 0 Measured value range
Table 482: RANGE_XP Output signals
HIGHHIGH BOOLEAN Measured value is above high-high limit
HIGH BOOLEAN Measured value is between high and high-high limit
NORMAL BOOLEAN Measured value is between high and low limit
LOW BOOLEAN Measured value is between low and low-low limit
LOWLOW BOOLEAN Measured value is below low-low limit
15.7 Disturbance report DRPRDRE
Monitoring
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identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Analog input signals A41RADR - -
Disturbance report DRPRDRE - -
Disturbance report A1RADR - -
Disturbance report A4RADR - -
Disturbance report B1RBDR - -
15.7.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the
secondary system together with continuous event-logging is accomplished by the
disturbance report functionality.
Disturbance report DRPRDRE, always included in the IED, acquires sampled data
of all selected analog input and binary signals connected to the function block that
is, maximum 40 analog and 96 binary signals.
Disturbance report functionality is a common name for several functions:
Event list
Indications
Event recorder
Trip value recorder
Disturbance recorder
Fault locator
Disturbance report function is characterized by great flexibility regarding
configuration, starting conditions, recording times and large storage capacity.
A disturbance is defined as an activation of an input in the AxRADR or BxRBDR
function blocks, which is set to trigger the disturbance recorder. All signals from
start of pre-fault time to the end of post-fault time will be included in the recording.
Every disturbance report recording is saved in the IED in the standard Comtrade
format. The same applies to all events, which are continuously saved in a ring-
buffer. The local HMI is used to get information about the recordings, but the
disturbance report files may be uploaded to PCM600 and further analysis using the
disturbance handling tool.
Disturbance report DRPRDRE is a common name for several functions to supply
the operator, analysis engineer, and so on, with sufficient information about events
in the system.
The functions included in the disturbance report are:
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Event list (EL)
Indications (IND)
Event recorder (ER)
Trip value recorder(TVR)
Disturbance recorder (DR)
Figure 392 shows the relations between Disturbance Report, included functions
and function blocks. Event list (EL), Event recorder (ER) and Indications (IND)
uses information from the binary input function blocks (BxRBDR). Trip value
recorder (TVR) uses analog information from the analog input function blocks
(AxRADR). Disturbance recorder DRPRDRE acquires information from both
AxRADR and BxRBDR.
Trip value rec Fault locator
Event list
Event recorder
Indications
Disturbance
recorder
Disturbance Report
Binary signals
Analog signals
A4RADR
B6RBDR
DRPRDRE FL
A1-4RADR
B1-6RBDR
IEC09000336 V2 EN
Figure 392: Disturbance report functions and related function blocks
The whole disturbance report can contain information for a number of recordings,
each with the data coming from all the parts mentioned above. The event list
function is working continuously, independent of disturbance triggering, recording
time, and so on. All information in the disturbance report is stored in non-volatile
flash memories. This implies that no information is lost in case of loss of auxiliary
power. Each report will get an identification number in the interval from 0-999.
Monitoring
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en05000125.vsd
Disturbance report
Record no. N
Record no. N+1 Record no. N+100
General dist.
information
Indications
Trip
values
Event
recordings
Disturbance
recording
Fault locator Event list
IEC05000125 V1 EN
Figure 393: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded
when the memory is full, the oldest disturbance report is overwritten by the new
one. The total recording capacity for the disturbance recorder is depending of
sampling frequency, number of analog and binary channels and recording time.
Figure 394 shows the number of recordings versus the total recording time tested
for a typical configuration, that is, in a 50 Hz system it is possible to record 100
where the average recording time is 3.4 seconds. The memory limit does not affect
the rest of the disturbance report (Event list (EL), Event recorder (ER), Indications
(IND) and Trip value recorder (TVR)).
100
400 s 350 300
40
60
80
40 analog
96 binary
20 analog
96 binary
3,4 s
6,3 s
6,3 s
60 Hz
50 Hz
6,3 s
3,4 s
250
Total recording time
Number of recordings
en05000488.vsd
IEC05000488 V1 EN
Figure 394: Number of recordings
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip
values are available on the local HMI. To acquire a complete disturbance report the
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user must use a PC and - either the PCM600 Disturbance handling tool - or a FTP
or MMS (over 61850) client. The PC can be connected to the IED front, rear or
remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of
the disturbance (not time-tagged), see section "Indications" for more detailed
information.
Event recorder (ER)
The event recorder may contain a list of up to 150 time-tagged events, which have
occurred during the disturbance. The information is available via the local HMI or
PCM600, see section "Event recorder" for more detailed information.
Event list (EL)
The event list may contain a list of totally 1000 time-tagged events. The list
information is continuously updated when selected binary signals change state. The
oldest data is overwritten. The logged signals may be presented via local HMI or
PCM600, see section "Event list" for more detailed information.
Trip value recorder (TVR)
The recorded trip values include phasors of selected analog signals before the fault
and during the fault, see section "Trip value recorder" for more detailed information.
Disturbance recorder (DR)
Disturbance recorder records analog and binary signal data before, during and after
the fault, see section "Disturbance recorder" for more detailed information.
Fault locator (FL)
The fault location function calculates the distance to fault, see section "Fault
locator LMBRFLO" for more detailed information.
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all
time tagging within the disturbance report
Recording times
Disturbance report DRPRDRE records information about a disturbance during a
settable time frame. The recording times are valid for the whole disturbance report.
Disturbance recorder (DR), event recorder (ER) and indication function register
disturbance data and events during tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on
which criterion stops the current disturbance recording
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PreFaultRecT
TimeLimit
PostFaultRecT
en05000487.vsd
1 2 3
Trig point
IEC05000487 V1 EN
Figure 395: The recording times definition
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the
operate time of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as
any valid trigger condition, binary or analog, persists (unless limited by TimeLimit
the limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all
activated triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording
was triggered. The limit time is used to eliminate the consequences of a trigger
that does not reset within a reasonable time interval. It limits the maximum
recording time of a recording and prevents subsequent overwriting of already
stored disturbances. Use the setting TimeLimit to set this time.
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder
and triggering of the Disturbance report function. Out of these 40, 30 are reserved
for external analog signals from analog input modules (TRM) and line data
communication module (LDCM) via preprocessing function blocks (SMAI) and
summation block (3PHSUM). The last 10 channels may be connected to internally
calculated analog signals available as function block output signals (mA input
signals, phase differential currents, bias currents and so on).
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A3RADR
A2RADR
A1RADR SMAI
AI1
AI2
AI3
AI4
AI3P
^GRP2L1
^GRP2L2
^GRP2L3
Block
^GRP2N
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
...
A4RADR
INPUT31
INPUT32
INPUT33
INPUT34
INPUT35
INPUT36
...
INPUT40
Internal analogue signals
External
analogue
signals
AIN
Type
IEC10000029 V1 EN
Figure 396: Analog input function blocks
The external input signals will be acquired, filtered and skewed and (after
configuration) available as an input signal on the AxRADR function block via the
SMAI function block. The information is saved at the Disturbance report base
sampling rate (1000 or 1200 Hz). Internally calculated signals are updated
according to the cycle time of the specific function. If a function is running at
lower speed than the base sampling rate, Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the
Disturbance report is the Signal Matrix Tool (SMT, external signal configuration).
In case of modification of a preconfigured IED or general internal configuration the
Application Configuration tool within PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases
where only the three phases are connected (AI4-input not used).SMAI makes the
information available as a group signal output, phase outputs and calculated
residual output (AIN-output). In situations where AI4-input is used as an input
signal the corresponding information is available on the non-calculated output
(AI4) on the SMAI function block. Connect the signals to the AxRADR accordingly.
For each of the analog signals, Operation = On means that it is recorded by the
disturbance recorder. The trigger is independent of the setting of Operation, and
triggers even if operation is set to Off. Both undervoltage and overvoltage can be
used as trigger conditions. The same applies for the current signals.
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If Operation = Off, no waveform (samples) will be recorded and reported in graph.
However, Trip value, pre-fault and fault value will be recorded and reported. The
input channel can still be used to trig the disturbance recorder.
If Operation = On, waveform (samples) will also be recorded and reported in graph.
The analog signals are presented only in the disturbance recording, but they affect
the entire disturbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by disturbance report. The
signals can be selected from internal logical and binary input signals. A binary
signal is selected to be recorded when:
the corresponding function block is included in the configuration
the signal is connected to the input of the function block
Each of the 96 signals can be selected as a trigger of the disturbance report
(Operation = Off). A binary signal can be selected to activate the red LED on the
local HMI (SetLED = On/Off).
The selected signals are presented in the event recorder, event list and the
disturbance recording. But they affect the whole disturbance report when they are
used as triggers. The indications are also selected from these 96 signals with local
HMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list,
which runs continuously. As soon as at least one trigger condition is fulfilled, a
complete disturbance report is recorded. On the other hand, if no trigger condition
is fulfilled, there is no disturbance report, no indications, and so on. This implies
the importance of choosing the right signals as trigger conditions.
A trigger can be of type:
Manual trigger
Binary-signal trigger
Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, PCM600 or
via station bus (IEC 61850). When the trigger is activated, the manual trigger
signal is generated. This feature is especially useful for testing. Refer to the
operator's manual for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a
trigger (Triglevel = Trig on 0/Trig on 1). When a binary signal is selected to
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generate a trigger from a logic zero, the selected signal will not be listed in the
indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded
in the disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp,
OverTrigLe and UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is
found, the absolute average value of these two peak values is calculated. If the
average value is above the threshold level for an overvoltage or overcurrent trigger,
this trigger is indicated with a greater than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or
undercurrent trigger, this trigger is indicated with a less than (<) sign with its name.
The procedure is separately performed for each channel.
This method of checking the analog start conditions gives a function which is
insensitive to DC offset in the signal. The operate time for this start is typically in
the range of one cycle, 20 ms for a 50 Hz network.
All under/over trig signal information is available on the local HMI and PCM600.
Post Retrigger
Disturbance report function does not respond to any new trig condition, during a
recording. Under certain circumstances the fault condition may reoccur during the
post-fault recording, for instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering
(PostRetrig = On) during the post-fault time. In this case a new, complete
recording will start and, during a period, run in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not
start until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a
new trig occurs during the post-fault period and lasts longer than the proceeding
recording a new complete recording will be fetched.
Disturbance report function can handle maximum 3 simultaneous disturbance
recordings.
DRPRDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
IEC05000406 V3 EN
Figure 397: DRPRDRE function block
Monitoring
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A1RADR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
IEC05000430 V3 EN
Figure 398: A1RADR function block
A4RADR
ÎNPUT31
ÎNPUT32
ÎNPUT33
ÎNPUT34
ÎNPUT35
ÎNPUT36
ÎNPUT37
ÎNPUT38
ÎNPUT39
ÎNPUT40
IEC05000431 V3 EN
Figure 399: A4RADR function block, derived analog inputs
B1RBDR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
IEC05000432 V3 EN
Figure 400: B1RBDR function block, binary inputs, example for B1RBDR -
B6RBDR
Monitoring
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Table 483: RDRE Output signals
DRPOFF BOOLEAN Disturbance report function turned off
RECSTART BOOLEAN Disturbance recording started
RECMADE BOOLEAN Disturbance recording made
CLEARED BOOLEAN All disturbances in the disturbance report cleared
MEMUSED BOOLEAN More than 80% of memory used
Table 484: A1RADR Input signals
INPUT1 GROUP
SIGNAL
- Group signal for input 1
INPUT2 GROUP
SIGNAL
INPUT3 GROUP
SIGNAL
INPUT4 GROUP
SIGNAL
INPUT5 GROUP
SIGNAL
INPUT6 GROUP
SIGNAL
INPUT7 GROUP
SIGNAL
INPUT8 GROUP
SIGNAL
INPUT9 GROUP
SIGNAL
INPUT10 GROUP
SIGNAL
Table 485: A4RADR Input signals
INPUT31 REAL 0 Analogue channel 31
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Table 486: B1RBDR Input signals
INPUT1 BOOLEAN 0 Binary channel 1
Table 487: RDRE Non group settings (basic)
Operation Off
On
PreFaultRecT 0.05 - 1.00 s 0.01 0.10 Pre-fault recording time
PostFaultRecT 0.1 - 10.0 s 0.1 0.5 Post-fault recording time
TimeLimit 0.5 - 10.0 s 0.1 1.0 Fault recording time limit
PostRetrig Off
On
- - Off Post-fault retrig enabled (On) or not (Off)
ZeroAngleRef 1 - 30 Ch 1 1 Trip value recorder, phasor reference
channel
OpModeTest Off
On
- - Off Operation mode during test mode
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Table 488: A1RADR Non group settings (basic)
Operation01 Off
On
- - Off Operation On/Off
NomValue01 0.0 - 999999.9 - 0.1 0.0 Nominal value for analogue channel 1
UnderTrigOp01 Off
On
- - Off Use under level trig for analogue cha 1
(on) or not (off)
UnderTrigLe01 0 - 200 % 1 50 Under trigger level for analogue cha 1 in
% of signal
OverTrigOp01 Off
On
- - Off Use over level trig for analogue cha 1
(on) or not (off)
OverTrigLe01 0 - 5000 % 1 200 Over trigger level for analogue cha 1 in
% of signal
Operation02 Off
On
UnderTrigOp02 Off
On
(on) or not (off)
% of signal
OverTrigOp02 Off
On
(on) or not (off)
% of signal
Operation03 Off
On
UnderTrigOp03 Off
On
(on) or not (off)
% of signal
OverTrigOp03 Off
On
(on) or not (off)
OverTrigLe03 0 - 5000 % 1 200 Overtrigger level for analogue cha 3 in %
of signal
Operation04 Off
On
UnderTrigOp04 Off
On
(on) or not (off)
% of signal
OverTrigOp04 Off
On
(on) or not (off)
% of signal
Operation05 Off
On
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UnderTrigOp05 Off
On
(on) or not (off)
% of signal
OverTrigOp05 Off
On
(on) or not (off)
% of signal
Operation06 Off
On
UnderTrigOp06 Off
On
(on) or not (off)
% of signal
OverTrigOp06 Off
On
(on) or not (off)
% of signal
Operation07 Off
On
UnderTrigOp07 Off
On
(on) or not (off)
% of signal
OverTrigOp07 Off
On
(on) or not (off)
% of signal
Operation08 Off
On
UnderTrigOp08 Off
On
(on) or not (off)
% of signal
OverTrigOp08 Off
On
(on) or not (off)
% of signal
Operation09 Off
On
UnderTrigOp09 Off
On
(on) or not (off)
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% of signal
OverTrigOp09 Off
On
(on) or not (off)
% of signal
Operation10 Off
On
UnderTrigOp10 Off
On
(on) or not (off)
UnderTrigLe10 0 - 200 % 1 50 Under trigger level for analogue cha 10
in % of signal
OverTrigOp10 Off
On
(on) or not (off)
% of signal
Table 489: A4RADR Non group settings (basic)
Operation31 Off
On
- - Off Operation On/off
UnderTrigOp31 Off
On
(on) or not (off)
in % of signal
OverTrigOp31 Off
On
(on) or not (off)
% of signal
Operation32 Off
On
UnderTrigOp32 Off
On
(on) or not (off)
in % of signal
OverTrigOp32 Off
On
(on) or not (off)
% of signal
Operation33 Off
On
UnderTrigOp33 Off
On
(on) or not (off)
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in % of signal
OverTrigOp33 Off
On
(on) or not (off)
OverTrigLe33 0 - 5000 % 1 200 Overtrigger level for analogue cha 33 in
% of signal
Operation34 Off
On
UnderTrigOp34 Off
On
(on) or not (off)
in % of signal
OverTrigOp34 Off
On
(on) or not (off)
% of signal
Operation35 Off
On
UnderTrigOp35 Off
On
(on) or not (off)
in % of signal
OverTrigOp35 Off
On
(on) or not (off)
% of signal
Operation36 Off
On
UnderTrigOp36 Off
On
(on) or not (off)
in % of signal
OverTrigOp36 Off
On
(on) or not (off)
% of signal
Operation37 Off
On
UnderTrigOp37 Off
On
(on) or not (off)
in % of signal
OverTrigOp37 Off
On
(on) or not (off)
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% of signal
Operation38 Off
On
UnderTrigOp38 Off
On
(on) or not (off)
in % of signal
OverTrigOp38 Off
On
(on) or not (off)
% of signal
Operation39 Off
On
UnderTrigOp39 Off
On
(on) or not (off)
in % of signal
OverTrigOp39 Off
On
(on) or not (off)
% of signal
Operation40 Off
On
UnderTrigOp40 Off
On
(on) or not (off)
in % of signal
OverTrigOp40 Off
On
(on) or not (off)
% of signal
Table 490: B1RBDR Non group settings (basic)
Operation01 Off
On
- - Off Trigger operation On/Off
TrigLevel01 Trig on 0
Trig on 1
- - Trig on 1 Trig on positiv (1) or negative (0) slope
for binary inp 1
IndicationMa01 Hide
Show
- - Hide Indication mask for binary channel 1
SetLED01 Off
On
- - Off Set red-LED on HMI for binary channel 1
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Operation02 Off
On
Trig on 1
for binary inp 2
IndicationMa02 Hide
Show
SetLED02 Off
On
Operation03 Off
On
Trig on 1
for binary inp 3
IndicationMa03 Hide
Show
SetLED03 Off
On
Operation04 Off
On
Trig on 1
for binary inp 4
IndicationMa04 Hide
Show
SetLED04 Off
On
Operation05 Off
On
Trig on 1
for binary inp 5
IndicationMa05 Hide
Show
SetLED05 Off
On
Operation06 Off
On
Trig on 1
for binary inp 6
IndicationMa06 Hide
Show
SetLED06 Off
On
Operation07 Off
On
Trig on 1
for binary inp 7
IndicationMa07 Hide
Show
SetLED07 Off
On
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Operation08 Off
On
Trig on 1
for binary inp 8
IndicationMa08 Hide
Show
SetLED08 Off
On
Operation09 Off
On
Trig on 1
for binary inp 9
IndicationMa09 Hide
Show
SetLED09 Off
On
Operation10 Off
On
Trig on 1
for binary inp 10
IndicationMa10 Hide
Show
SetLED10 Off
On
Operation11 Off
On
Trig on 1
for binary inp 11
IndicationMa11 Hide
Show
SetLED11 Off
On
Operation12 Off
On
Trig on 1
for binary inp 12
IndicationMa12 Hide
Show
SetLED12 Off
On
- - Off Set red-LED on HMI for binary input 12
Operation13 Off
On
Trig on 1
for binary inp 13
IndicationMa13 Hide
Show
SetLED13 Off
On
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Operation14 Off
On
Trig on 1
for binary inp 14
IndicationMa14 Hide
Show
SetLED14 Off
On
Operation15 Off
On
Trig on 1
for binary inp 15
IndicationMa15 Hide
Show
SetLED15 Off
On
Operation16 Off
On
Trig on 1
for binary inp 16
IndicationMa16 Hide
Show
SetLED16 Off
On
FUNT1 0 - 255 FunT 1 0 Function type for binary channel 1 (IEC
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
Monitoring
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-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
INFNO1 0 - 255 InfNo 1 0 Information number for binary channel 1
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
INFNO10 0 - 255 InfNo 1 0 Information number for binary channel
10 (IEC -60870-5-103)
11 (IEC -60870-5-103)
12 (IEC -60870-5-103)
13 (IEC -60870-5-103)
14 (IEC -60870-5-103)
15 (IEC -60870-5-103)
16 (IEC -60870-5-103)
Monitoring
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Table 491: DRPRDRE technical data
Pre-fault time (0.051.00) s -
Post-fault time (0.110.0) s -
Limit time (0.510.0) s -
Maximum number of recordings 100 -
Time tagging resolution 1 ms See table 27
Maximum number of analog inputs 30 + 10 (external + internally
derived)
-
Maximum number of binary inputs 96 -
Maximum number of phasors in the
Trip Value recorder per recording
30 -
Maximum number of indications in a
disturbance report
96 -
Maximum number of events in the
Event recording per recording
150 -
Maximum number of events in the
Event list
1000, first in - first out -
Maximum total recording time (3.4 s
recording time and maximum
number of channels, typical value)
340 seconds (100 recordings) at
50 Hz, 280 seconds (80
recordings) at 60 Hz
-
Sampling rate 1 kHz at 50 Hz
1.2 kHz at 60 Hz
-
Recording bandwidth (5-300) Hz -
15.8 Event list
15.8.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview
perspective and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report
function. The list may contain of up to 1000 time-tagged events stored in a ring-buffer.
When a binary signal, connected to the disturbance report function, changes status,
the event list function stores input name, status and time in the event list in
chronological order. The list can contain up to 1000 events from both internal logic
signals and binary input channels. If the list is full, the oldest event is overwritten
when a new event arrives.
Monitoring
742
The list can be configured to show oldest or newest events first with a setting on
the local HMI.
The event list function runs continuously, in contrast to the event recorder function,
which is only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when the IED is configured. The same name is used in the
disturbance recorder function (DR), indications (IND)and the event recorder
function (ER).
The event list is stored and managed separate from the disturbance report
information (ER, DR, IND, TVR and FL).
The Event list has no function block of its own. It is included in the DRPRDRE
block and uses information from the BxRBDR block.
The Event list logs the same binary input signals as configured for the Disturbance
report function.
Table 492: technical data
Function Value
Buffer capacity Maximum number of events in the list 1000
Resolution 1 ms
Accuracy Depending on time
synchronizing
15.9 Indications
15.9.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary
and/or in the secondary system it is important to know, for example binary signals
that have changed status during a disturbance. This information is used in the short
perspective to get information via the local HMI in a straightforward way.
There are three LEDs on the local HMI (green, yellow and red), which will display
status information about the IED and the Disturbance report function (trigged).
Monitoring
743
The Indication list function shows all selected binary input signals connected to the
Disturbance report function that have changed status during a disturbance.
The LED indications display this information:
Green LED:
Steady light In Service
Flashing light Internal fail
Dark No power supply
Yellow LED:
Steady light A disturbance report is triggered
Flashing light The IED is in test mode or in configuration mode
Red LED:
Steady light Trigged on binary signal N with SetLEDN=On
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance
report function and disturbance recorder.
The indication function tracks 0 to 1 changes of binary signals during the recording
period of the collection window. This means that constant logic zero, constant logic
one or state changes from logic one to logic zero will not be visible in the list of
indications. Signals are not time tagged. In order to be recorded in the list of
indications the:
the signal must be connected to binary input(DRB1-6)
the DRPparameter Operation must be set On
the DRP must be trigged (binary or analog)
Indications are selected with the indication mask (IndicationMask) when
configuring the binary inputs.
The name of the binary input signal that appears in the Indication function is the user-
defined name assigned at configuration of the IED. The same name is used in
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).
Monitoring
744
The Indications function has no function block of its own. It is included in the
DRPRDRE block and uses information from the BxRBDR block.
The Indications function may log the same binary input signals as the Disturbance
report function.
Function Value
Buffer capacity Maximum number of indications
presented for single disturbance
96
Maximum number of recorded
disturbances
100
15.10 Event recorder
Quick, complete and reliable information about disturbances in the primary and/or
in the secondary system is vital, for example, time tagged events logged during
disturbances. This information is used for different purposes in the short term (for
example corrective actions) and in the long term (for example Functional Analysis).
The event recorder logs all selected binary input signals connected to the
Disturbance report function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The event recording information is an integrated part of the disturbance record
(Comtrade file).
When one of the trig conditions for the disturbance report is activated, the event
recorder logs every status change in the 96 selected binary signals. The events can
be generated by both internal logical signals and binary input channels. The
internal signals are time-tagged in the main processor module, while the binary
input channels are time-tagged directly in each I/O module. The events are
collected during the total recording time (pre-, post-fault and limit time), and are
stored in the disturbance report flash memory at the end of each recording.
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In case of overlapping recordings, due to PostRetrig = On and a new trig signal
appears during post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when configuring the IED. The same name is used in the
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).
The event record is stored as a part of the disturbance report information (ER, DR,
IND, TVR and FL) and managed via the local HMI or PCM600.
The Event recorder has no function block of its own. It is included in the
The Event recorder function logs the same binary input signals as the Disturbance
report function.
Function Value
Buffer capacity Maximum number of events in disturbance
report
150
Maximum number of disturbance reports 100
Resolution 1 ms
Accuracy Depending on time
synchronizing
15.11 Trip value recorder
Information about the pre-fault and fault values for currents and voltages are vital
for the disturbance evaluation.
The Trip value recorder calculates the values of all selected analog input signals
connected to the Disturbance report function. The result is magnitude and phase
angle before and during the fault for each analog input signal.
The trip value recorder information is available for the disturbances locally in the
IED.
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746
The trip value recorder information is an integrated part of the disturbance record
(Comtrade file).
Trip value recorder (TVR)calculates and presents both fault and pre-fault
amplitudes as well as the phase angles of all the selected analog input signals. The
parameter ZeroAngleRef points out which input signal is used as the angle
reference. The calculated data is input information to the fault locator (FL).
When the disturbance report function is triggered the sample for the fault
interception is searched for, by checking the non-periodic changes in the analog
input signals. The channel search order is consecutive, starting with the analog
input with the lowest number.
When a starting point is found, the Fourier estimation of the pre-fault values of the
complex values of the analog signals starts 1.5 cycle before the fault sample. The
estimation uses samples during one period. The post-fault values are calculated
using the Recursive Least Squares (RLS) method. The calculation starts a few
samples after the fault sample and uses samples during 1/2 - 2 cycles depending on
the shape of the signals.
If no starting point is found in the recording, the disturbance report trig sample is
used as the start sample for the Fourier estimation. The estimation uses samples
during one cycle before the trig sample. In this case the calculated values are used
both as pre-fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function
is the user-defined name assigned when the IED is configured. The same name is
used in the Disturbance recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER,
DR, IND, TVR and fault locator) and managed in via the local HMI or PCM600.
The Trip value recorder has no function block of its own. It is included in the
The trip value recorder function uses analog input signals connected to A1RADR
to A3RADR (not A4RADR).
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Function Value
Buffer capacity

Maximum number of analog inputs 30
15.12 Disturbance recorder
The Disturbance recorder function supplies fast, complete and reliable information
about disturbances in the power system. It facilitates understanding system
behavior and related primary and secondary equipment during and after a
disturbance. Recorded information is used for different purposes in the short
perspective (for example corrective actions) and long perspective (for example
Functional Analysis).
The Disturbance recorder acquires sampled data from all selected analog input and
binary signals connected to the Disturbance report function (maximum 40 analog
and 96 binary signals). The binary signals are the same signals as available under
the event recorder function.
The function is characterized by great flexibility and is not dependent on the
operation of protection functions. It can record disturbances not detected by
protection functions.
The disturbance recorder information for the last 100 disturbances are saved in the
IED and the local HMI is used to view the list of recordings.
Disturbance recording (DR) is based on the acquisition of binary and analog
signals. The binary signals can be either true binary input signals or internal logical
signals generated by the functions in the IED. The analog signals to be recorded are
input channels from the Transformer Input Module (TRM), Line Differential
communication Module (LDCM) through the Signal Matrix Analog Input (SMAI)
and possible summation (Sum3Ph) function blocks and some internally derived
analog signals. For details, refer to section "Disturbance report DRPRDRE".
Disturbance recorder collects analog values and binary signals continuously, in a
cyclic buffer. The pre-fault buffer operates according to the FIFO principle; old
data will continuously be overwritten as new data arrives when the buffer is full.
The size of this buffer is determined by the set pre-fault recording time.
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Upon detection of a fault condition (triggering), the disturbance is time tagged and
the data storage continues in a post-fault buffer. The storage process continues as
long as the fault condition prevails - plus a certain additional time. This is called
the post-fault time and it can be set in the disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory,
intended for disturbance recordings, acts as a cyclic buffer and when it is full, the
oldest recording is overwritten. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance
recording. A recording can be trigged by, manual start, binary input and/or from
analog inputs (over-/underlevel trig).
A user-defined name for each of the signals can be set. These names are common
for all functions within the disturbance report functionality.
15.12.2.1 Memory and storage
When a recording is completed, a post recording processing occurs.
This post-recording processing comprises:
Saving the data for analog channels with corresponding data for binary signals
Add relevant data to be used by the Disturbance handling tool (part of PCM 600)
Compression of the data, which is performed without losing any data accuracy
Storing the compressed data in a non-volatile memory (flash memory)
The recorded disturbance is now ready for retrieval and evaluation.
The recording files comply with the Comtrade standard IEC 60255-24 and are
divided into three files; a header file (HDR), a configuration file (CFG) and a data
file (DAT).
The header file (optional in the standard) contains basic information about the
disturbance, that is, information from the Disturbance report sub-functions (ER,
TVR and FL). The Disturbance handling tool use this information and present the
recording in a user-friendly way.
General:
Station name, object name and unit name
Date and time for the trig of the disturbance
Record number
Sampling rate
Time synchronization source
Recording times
Activated trig signal
Active setting group
Analog:
Monitoring
749
Signal names for selected analog channels
Information e.g. trig on analog inputs
Primary and secondary instrument transformer rating
Over- or Undertrig: level and operation
Over- or Undertrig status at time of trig
CT direction
Binary:
Signal names
Status of binary input signals
The configuration file is a mandatory file containing information needed to
interpret the data file. For example sampling rate, number of channels, system
frequency, channel info etc.
The data file, which also is mandatory, containing values for each input channel for
each sample in the record (scaled value). The data file also contains a sequence
number and time stamp for each set of samples.
15.12.2.2 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll disturbance
recordings from the IED to a master (station HSI). The standard describes how to
handle 8 disturbance recordings, 8 analog channels (4 currents and 4 voltages)
using the public range and binary signals.
The last 8 recordings, out of maximum 100, are available for transfer to the master.
When the last one is transferred and acknowledged new recordings in the IED will
appear, in the master points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the
first 8 channels are placed in the public range and the next 32 are placed in the
private range. To comply the standard the first 8 must be configured according to
table 496.
Table 496: Configuration of analog channels
Signal Disturbance recorder
IL1 A1RADR INPUT1
IL2 A1RADR INPUT2
IL3 A1RADR INPUT3
IN A1RADR INPUT4
UL1 A1RADR INPUT5
UL2 A1RADR INPUT6
UL3 A1RADR INPUT7
UN A1RADR INPUT8
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The binary signals connected to BxRBDR are reported by polling. The function
blocks include function type and information number.
The Disturbance recorder has no function block of its own. It is included in the
DRPRDRE, AxRADR and BxRBDR block.
For signals see section, in Disturbance report, "Input and output signals".
For Setting parameters see section "Disturbance report DRPRDRE".
Function Value
Buffer capacity Maximum number of analog inputs 40
Maximum number of binary inputs 96
Maximum total recording time (3.4 s recording time and maximum number
of channels, typical value)
340 seconds (100
280 seconds (80
Monitoring
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752
Section 16 Metering
About this chapter
This chapter describes among others, Pulse counter logic which is a function used
to meter externally generated binary pulses. The way the functions work, their
setting parameters, function blocks, input and output signals, and technical data are
16.1 Pulse-counter logic PCGGIO
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Pulse-counter logic PCGGIO
S00947 V1 EN
-
16.1.1 Introduction
Pulse counter (PCGGIO) function counts externally generated binary pulses, for
instance pulses coming from an external energy meter, for calculation of energy
consumption values. The pulses are captured by the binary input module and then
read by the pulse counter function. A scaled service value is available over the
station bus. The special Binary input module with enhanced pulse counting
capabilities must be ordered to achieve this functionality.
The registration of pulses is done for positive transitions (0->1) on one of the 16
binary input channels located on the Binary Input Module (BIM). Pulse counter
values are sent to the station HMI with predefined cyclicity without reset.
The reporting time period can be set in the range from 1 second to 60 minutes and
is synchronized with absolute system time. Interrogation of additional pulse
counter values can be done with a command (intermediate reading) for a single
counter. All active counters can also be read by the LON General Interrogation
command (GI) or IEC 61850.
Metering
753
Pulse counter (PCGGIO) function in the IED supports unidirectional incremental
counters. That means only positive values are possible. The counter uses a 32 bit
format, that is, the reported value is a 32-bit, signed integer with a range
0...+2147483647. The counter is reset at initialization of the IED.
The reported value to station HMI over the station bus contains Identity, Scaled
Value (pulse count x scale), Time, and Pulse Counter Quality. The Pulse Counter
Quality consists of:
Invalid (board hardware error or configuration error)
Wrapped around
Blocked
Adjusted
The transmission of the counter value by SPA can be done as a service value, that
is, the value frozen in the last integration cycle is read by the station HMI from the
database. PCGGIO updates the value in the database when an integration cycle is
finished and activates the NEW_VAL signal in the function block. This signal can
be connected to an Event function block, be time tagged, and transmitted to the
station HMI. This time corresponds to the time when the value was frozen by the
function.
The pulse counter function requires a binary input card, BIMp, that
is specially adapted to the pulse counter function.
Figure 401 shows the pulse counter function block with connections of the inputs
and outputs.
en05000744.vsd
PulseCounter
BLOCK
READ_VAL
BI_PULSE
Pulse
INPUT OUT
Database
Pulse counter value:
0...2147483647
SMS settings
1.Operation = Off/On
2.tReporting = 0s...60min
3.Event Mask = No Events/Report Events
SingleCmdFunc
OUTx
SingleCmdFunc
OUTx
I/O-module
Pulse length >1s
INVALID
RESTART
BLOCKED
NEW_VAL
INPUT1
INPUT2
INPUT3
INPUT4
EVENT
Reset counter RS_CNT
NAME
SCAL_VAL
4.Scale = 1-90000
IEC EVENT
IEC05000744 V1 EN
Figure 401: Overview of the pulse counter function
Metering
754
The BLOCK and READ_VAL inputs can be connected to Single Command
blocks, which are intended to be controlled either from the station HMI or/and the
local HMI. As long as the BLOCK signal is set, the pulse counter is blocked. The
signal connected to READ_VAL performs one additional reading per positive
flank. The signal must be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the
Binary Input Module (BIM).
The NAME input is used for a user-defined name with up to 13 characters.
The RS_CNT input is used for resetting the counter.
Each pulse counter function block has four binary output signals that can be
connected to an Event function block for event recording: INVALID, RESTART,
BLOCKED and NEW_VAL. The SCAL_VAL signal can be connected to the IEC
Event function block.
The INVALID signal is a steady signal and is set if the Binary Input Module,
where the pulse counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not
comprise a complete integration cycle. That is, in the first message after IED start-
up, in the first message after deblocking, and after the counter has wrapped around
during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked.
There are two reasons why the counter is blocked:
The BLOCK input is set, or
The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was
updated since last report.
The SCAL_VAL signal consists of scaled value (according to parameter Scale),
time and status information.
PCGGIO
BLOCK
READ_VAL
BI_PULSE*
RS_CNT
INVALID
RESTART
BLOCKED
NEW_VAL
SCAL_VAL
IEC05000709 V3 EN
Figure 402: PCGGIO function block
Metering
755
Table 498: PCGGIO Input signals
READ_VAL BOOLEAN 0 Initiates an additional pulse counter reading
BI_PULSE BOOLEAN 0 Connect binary input channel for metering
RS_CNT BOOLEAN 0 Resets pulse counter value
Table 499: PCGGIO Output signals
INVALID BOOLEAN The pulse counter value is invalid
RESTART BOOLEAN The reported value does not comprise a complete
integration cycle
BLOCKED BOOLEAN The pulse counter function is blocked
NEW_VAL BOOLEAN A new pulse counter value is generated
SCAL_VAL REAL Scaled value with time and status information
Table 500: PCGGIO Non group settings (basic)
Operation Off
On
EventMask NoEvents
ReportEvents
- - NoEvents Report mask for analog events from
pulse counter
CountCriteria Off
RisingEdge
Falling edge
OnChange
- - RisingEdge Pulse counter criteria
Scale 1.000 - 90000.000 - 0.001 1.000 Scaling value for SCAL_VAL output to
unit per counted value
Quantity Count
ActivePower
ApparentPower
ReactivePower
ActiveEnergy
ApparentEnergy
ReactiveEnergy
- - Count Measured quantity for SCAL_VAL output
tReporting 0 - 3600 s 1 60 Cycle time for reporting of counter value
Metering
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Table 501: PCGGIO technical data
Function Setting range Accuracy
Input frequency See Binary Input Module (BIM) -
Cycle time for report of
counter value
(13600) s -
16.2 Function for energy calculation and demand
handling ETPMMTR
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Energy calculation and demand
handling
ETPMMTR - -
16.2.1 Introduction
Outputs from Measurements (CVMMXU) function can be used to calculate
energy. Active as well as reactive values are calculated in import and export
direction. Values can be read or generated as pulses. Maximum demand power
values are also calculated by the function.
The instantaneous output values of active and reactive power from the
Measurements (CVMMXU) function block are used and integrated over a selected
time tEnergy to measure the integrated energy. The energy values (in MWh and
MVarh) are available as output signals and also as pulsed output which can be
connected to a pulse counter. Outputs are available for forward as well as reverse
direction. The accumulated energy values can be reset from the local HMI reset
menu or with input signal RSTACC.
The maximum demand values for active and reactive power are calculated for the
set time tEnergy and the maximum value is stored in a register available over
communication and from outputs MAXPAFD, MAXPARD, MAXPRFD,
MAXPRRD for the active and reactive power forward and reverse direction until
reset with input signal RSTDMD or from the local HMI reset menu.
Metering
757
PINST
QINST
CVMMXU
ETPMMTR
P
Q
STACC
RSTACC
RSTDMD
TRUE
FALSE
FALSE
IEC07000121 V2 EN
Figure 403: Connection of Energy calculation and demand handling function
(ETPMMTR) to the Measurements function (CVMMXU)
ETPMMTR
P
Q
STACC
RSTACC
RSTDMD
ACCST
EAFPULSE
EARPULSE
ERFPULSE
ERRPULSE
EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
IEC07000120 V2 EN
Figure 404: ETPMMTR function block
Table 502: ETPMMTR Input signals
P REAL 0 Measured active power
Q REAL 0 Measured reactive power
STACC BOOLEAN 0 Start to accumulate energy values
RSTACC BOOLEAN 0 Reset of accumulated enery reading
RSTDMD BOOLEAN 0 Reset of maximum demand reading
Table 503: ETPMMTR Output signals
ACCST BOOLEAN Start of accumulating energy values.
EAFPULSE BOOLEAN Accumulated forward active energy pulse
EARPULSE BOOLEAN Accumulated reverse active energy pulse
Metering
758
ERFPULSE BOOLEAN Accumulated forward reactive energy pulse
ERRPULSE BOOLEAN Accumulated reverse reactive energy pulse
EAFALM BOOLEAN Alarm for active forward energy exceed limit in
set interval
EARALM BOOLEAN Alarm for active reverse energy exceed limit in
set interval
ERFALM BOOLEAN Alarm for reactive forward energy exceed limit in
set interval
ERRALM BOOLEAN Alarm for reactive reverse energy exceed limit in
set interval
EAFACC REAL Accumulated forward active energy value in Ws
EARACC REAL Accumulated reverse active energy value in Ws
ERFACC REAL Accumulated forward reactive energy value in
VArS
ERRACC REAL Accumulated reverse reactive energy value in
VArS
MAXPAFD REAL Maximum forward active power demand value for
set interval
MAXPARD REAL Maximum reverse active power demand value for
set interval
MAXPRFD REAL Maximum forward reactive power demand value
for set interval
MAXPRRD REAL Maximum reactive power demand value in
reverse direction
Table 504: ETPMMTR Non group settings (basic)
Operation Off
On
StartAcc Off
On
- - Off Activate the accumulation of energy
values
tEnergy 1 Minute
5 Minutes
10 Minutes
15 Minutes
30 Minutes
60 Minutes
180 Minutes
- - 1 Minute Time interval for energy calculation
tEnergyOnPls 0.000 - 60.000 s 0.001 1.000 Energy accumulated pulse ON time in
secs
tEnergyOffPls 0.000 - 60.000 s 0.001 0.500 Energy accumulated pulse OFF time in
secs
EAFAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active forward
accumulated energy value
Metering
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EARAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active reverse
ERFAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive forward
ERVAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive reverse
Table 505: ETPMMTR Non group settings (advanced)
EALim 0.001 -
10000000000.000
MWh 0.001 1000000.000 Active energy limit
ERLim 0.001 -
10000000000.000
MVArh 0.001 1000.000 Reactive energy limit
DirEnergyAct Forward
Reverse
- - Forward Direction of active energy flow Forward/
Reverse
DirEnergyReac Forward
Reverse
- - Forward Direction of reactive energy flow Forward/
Reverse
EnZeroClamp Off
On
- - On Enable of zero point clamping detection
function
LevZeroClampP 0.001 - 10000.000 MW 0.001 10.000 Zero point clamping level at active Power
LevZeroClampQ 0.001 - 10000.000 MVAr 0.001 10.000 Zero point clamping level at reactive
Power
EAFPrestVal 0.000 - 10000.000 MWh 0.001 0.000 Preset Initial value for forward active
energy
EARPrestVal 0.000 - 10000.000 MWh 0.001 0.000 Preset Initial value for reverse active
energy
ERFPresetVal 0.000 - 10000.000 MVArh 0.001 0.000 Preset Initial value for forward reactive
energy
ERVPresetVal 0.000 - 10000.000 MVArh 0.001 0.000 Preset Initial value for reverse reactive
energy
Metering
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Section 17 Station communication
About this chapter
This chapter describes the functions and protocols used on the interfaces to the
substation automation and substation monitoring buses. The way these work, their
setting parameters, function blocks, input and output signals and technical data are
17.1 Overview
Each IED is provided with a communication interface, enabling it to connect to one
or many substation level systems or equipment, either on the Substation
Automation (SA) bus or Substation Monitoring (SM) bus.
Following communication protocols are available:
IEC 61850-8-1 communication protocol
IEC 61850-9-2LE communication protocol
LON communication protocol
SPA or IEC 60870-5-103 communication protocol
DNP3.0 communication protocol
Theoretically, several protocols can be combined in the same IED.
17.2 IEC 61850-8-1 communication protocol
17.2.1 Introduction
The IED is equipped with single or double optical Ethernet rear ports (order
dependent) for IEC 61850-8-1 station bus communication. IEC 61850-8-1
communication is also possible from the optical Ethernet front port. IEC 61850-8-1
protocol allows intelligent electrical devices (IEDs) from different vendors to
exchange information and simplifies system engineering. Peer-to-peer
communication according to GOOSE is part of the standard. Disturbance files
uploading is provided.
17.2.2 IEC 61850 generic communication I/O functions SPGGIO,
SP16GGIO
Station communication
761
IEC61850 generic communication I/O functions (SPGGIO) is used to send one
single logical signal to other systems or equipment in the substation.
Upon receiving a signal at its input, IEC61850 generic communication I/O
functions (SPGGIO) function sends the signal over IEC 61850-8-1 to the
equipment or system that requests this signal. To get the signal, PCM600 must be
used to define which function block in which equipment or system should receive
this information.
SPGGIO
BLOCK
ÎN
IEC07000124 V2 EN
Figure 405: SPGGIO function block
SP16GGIO
BLOCK
ÎN1
ÎN2
ÎN3
ÎN4
ÎN5
ÎN6
ÎN7
ÎN8
ÎN9
ÎN10
ÎN11
ÎN12
ÎN13
ÎN14
ÎN15
ÎN16
IEC07000125 V2 EN
Figure 406: SP16GGIO function block
Table 506: SPGGIO Input signals
IN BOOLEAN 0 Input status
762
Table 507: SP16GGIO Input signals
IN1 BOOLEAN 0 Input 1 status
17.2.3 IEC 61850 generic communication I/O functions MVGGIO
IEC61850 generic communication I/O functions (MVGGIO) function is used to
send the instantaneous value of an analog output to other systems or equipment in
the substation. It can also be used inside the same IED, to attach a RANGE aspect
to an analog value and to permit measurement supervision on that value.
Upon receiving an analog signal at its input, IEC61850 generic communication I/O
functions (MVGGIO) will give the instantaneous value of the signal and the range,
as output values. In the same time, it will send over IEC 61850-8-1 the value, to
other IEC 61850 clients in the substation.
763
MVGGIO
BLOCK
ÎN
^VALUE
RANGE
IEC05000408 V2 EN
Figure 407: MVGGIO function block
Table 508: MVGGIO Input signals
IN REAL 0 Analogue input value
Table 509: MVGGIO Output signals
VALUE REAL Magnitude of deadband value
RANGE INTEGER Range
Table 510: MVGGIO Non group settings (basic)
MV db 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
MV zeroDb 0 - 100000 m% 1 500 Zero point clamping in 0,001% of range
MV hhLim -10000000000.000
- 10000000000.000
- 0.001 90.000 High High limit
MV hLim -10000000000.000
- 10000000000.000
- 0.001 80.000 High limit
MV lLim -10000000000.000
- 10000000000.000
- 0.001 -80.000 Low limit
MV llLim -10000000000.000
- 10000000000.000
- 0.001 -90.000 Low Low limit
MV min -10000000000.000
- 10000000000.000
- 0.001 -100.000 Minimum value
MV max -10000000000.000
- 10000000000.000
- 0.001 100.000 Maximum value
MV dbType Cyclic
Dead band
Int deadband
- - Dead band Reporting type
MV limHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
764
Table 511: IEC61850-8-1 Non group settings (basic)
Operation Off
On
GOOSE Front
OEM311_AB
OEM311_CD
- - OEM311_AB Port for GOOSE communication
Table 512: IEC 61850-8-1 communication protocol
Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
17.3 IEC 61850-9-2LE communication protocol
17.3.1 Introduction
The IEC 61850-9-2LE process bus communication protocol enables an IED to
communicate with devices providing measured values in digital format, commonly
known as Merging Units (MU). The physical interface in the IED that is used for
the communication is the OEM modules (the two port module version) "CD" port.
The ABB merging units (MUs) are situated close to primary equipment, like circuit
breakers, isolators, etc. The MUs have the capability to gather measured values
from measuring transformers, non-conventional transducers or both. The gathered
data are then transmitted to subscribers over the process bus, utilizing the IEC
61850-9-2LE protocol.
ABB "physical MU" contains up to 3 logical MUs, each capable of sampling 4
currents and 4 voltages.
The IED communicates with the MUs over the process bus via the OEM module
port "CD". For the user, the MU appears in the IED as a normal analogue input
module and is engineered in the very same way.
765
CT CT
Combi
Sensor
ABB
Merging
Unit
ABB
Merging
Unit
Ethernet Switch
Combi
Sensor
Conventional VT
IEC61850-9-2LE
IEC61850-9-2LE
IEC61850-9-2LE
Splitter
Electrical-to-
Optical Converter
1PPS
1PPS
1PPS
110 V 1 A
Station Wide
GPS Clock
en08000072-2.vsd
OEM Module
Preprocessing blocks
SMAI
Application
MU1 MU2
1 A
TRM module
Preprocessing blocks
SMAI
IED
CD
IEC08000072 V2 EN
Figure 408: Example of signal path for sampled analogue values from MU and
conventional CT/VT
The function has the following alarm signals:
766
MUDATA: Indicates when sample sequence needs to be realigned. that is the
application soon needs to be restarted. The signal is raised to 2 s before the
application is restarted.
SYNCH: Indicates that the time quality of the hardware is out of the set value
from parameter synchAccLevel (1 s, 4 s or unspecified) and the parameter
AppSynch is set to Synch. In case of AppSynch is set to NoSynch the SYNCH
output will never go high.
SMPLLOST: Indicates that more than one sample has been lost/been marked
invalid/ overflow/ been marked failed, and the sample has thereafter been
substituted. When SMPLLOST is high, protection is blocked.
MUSYNCH: Indicates that the MU connected is not synchronized. Received
from quality flag in datastream. No IED setting affects this signal.
TESTMODE: Indicates that the MU connected is in TestMode. Received from
quality flag in datastream. No IED setting affects this signal.
Timeout
TSYNCERR Indicates that there is some timeout on any configured time source or
the time quality is worse than specified in SynchAccLevel. The timeout is
individually specified per time source (PPS, IRIG-B, SNTP etc.) See section
"Time synchronization"
Blocking condition
Blocking of protection functions is indicated by (SAMPLOST is high) or
(MUSYNCH is high and AppSynch is set to Synch) or (SYNCH is high)
Application synch is not required for differential protection based on ECHO mode.
A missing PPS however will lead to a drift between MU and IED. Therefore
protection functions in this case will be blocked.
The function blocks are not represented in the configuration tool.
The signals appear only in the SMT tool when merging units (MU)
are included in the configuration with the function selector tool. In
the SMT tool they can be mapped to the desired virtual input
(SMAI) of the IED and used internally in the configuration.
767
Table 513: MU_4I_4U Output signals
I1 STRING Analogue input I1
U1 STRING Analogue input U1
MUDATA BOOLEAN Fatal error, serious data loss
SYNCH BOOLEAN Protection functions block due to loss of internal
time synchronisation in IED
SMPLLOST BOOLEAN Sample lost
MUSYNCH BOOLEAN Synchronization lost in MU
TESTMODE BOOLEAN MU in test mode
Table 514: MU_4I_4U Non group settings (basic)
SVId 0 - 40 - 1 ABB_MU0101 MU identifier
SmplGrp 0 - 65535 - 1 0 Sampling group
ToObject
ToObject
ToObject
ToObject
Table 515: MU_4I_4U Non group settings (advanced)
SynchMode NoSynch
Init
Operation
- - Init Synchronization mode
768
Table 516: IEC 61850-9-2LE communication protocol
Functions Value
Protocol IEC 61850-9-2LE
Communication speed for the IEDs 100BASE-FX
17.4 LON communication protocol
17.4.1 Introduction
An optical network can be used within the substation automation system. This
enables communication with the IED through the LON bus from the operators
workplace, from the control center and also from other terminals.
LON communication protocol is specified in LonTalkProtocol Specification
Version 3 from Echelon Corporation and is designed for communication in control
networks. These networks are characterized by high speed for data transfer, short
messages (few bytes), peer-to-peer communication, multiple communication
media, low maintenance, multivendor equipment, and low support costs. LonTalk
supports the needs of applications that cover a range of requirements. The protocol
follows the reference model for open system interconnection (OSI) designed by the
International Standardization Organization (ISO).
In this document the most common addresses for commands and events are
available. For other addresses, refer to section "Related documents".
It is assumed that the reader is familiar with LON communication protocol in general.
The speed of the network depends on the medium and transceiver design. With
protection and control devices, fibre optic media is used, which enables the use of
the maximum speed of 1.25 Mbits/s. The protocol is a peer-to-peer protocol where
all the devices connected to the network can communicate with each other. The
own subnet and node number are identifying the nodes (max. 255 subnets, 127
nodes per one subnet).
The LON bus links the different parts of the protection and control system. The
measured values, status information, and event information are spontaneously sent
to the higher-level devices. The higher-level devices can read and write memorized
values, setting values, and other parameter data when required. The LON bus also
enables the bay level devices to communicate with each other to deliver, for
example, interlocking information among the terminals without the need of a bus
master.
769
The LonTalk protocol supports two types of application layer objects: network
variables and explicit messages. Network variables are used to deliver short
messages, such as measuring values, status information, and interlocking/blocking
signals. Explicit messages are used to transfer longer pieces of information, such as
events and explicit read and write messages to access device data.
The benefits achieved from using the LON bus in protection and control systems
include direct communication among all terminals in the system and support for
multi-master implementations. The LON bus also has an open concept, so that the
terminals can communicate with external devices using the same standard of
network variables.
Introduction of LON protocol
For more information, refer to LON bus, LonWorks Network in Protection and
Control, Users manual and Technical description.
LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network
configuration. All the functions required for setting up and configuring a
LonWorks network, is easily accessible on a single tool program. For more
information, refer to the operator's manual.
Activate LON Communication
Activate LON communication in the Parameter Setting tool under Main menu/
Communication/ SLM configuration/ Rear optical LON port/ Horizontal
communication, where Operation must be set to ON.
Add LON Device Types LNT
A new device is added to LON Network Tool from the Device menu or by
installing the device from the ABB LON Device Types package for LNT 505, with
the SLDT 670 series package version 1p2 r03.
LON net address
To establish a LON connection with the 670 series IEDs, the IED has to be given a
unique net address. The net address consists of a subnet and node number. This is
accomplished with the LON Network Tool by creating one device for each IED.
Vertical communication
Vertical communication describes communication between the monitoring devices
and protection and control IEDs. This communication includes sending of changed
process data to monitoring devices as events and transfer of commands, parameter
data and disturbance recorder files. This communication is implemented using
explicit messages.
Events and indications
Events sent to the monitoring devices are using explicit messages (message code
44H) with unacknowledged transport service of the LonTalk protocol. When a
770
signal is changed in the IED, one message with the value, quality and time is
transmitted from terminal.
Binary events
Binary events are generated in event function blocks EVENT:1 to EVENT:20 in
the 670 series IEDs. The event function blocks have predefined LON addresses.
table 517 shows the LON addresses to the first input on the event function blocks.
The addresses to the other inputs on the event function block are consecutive after
the first input. For example, input 15 on event block EVENT:17 has the address
1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 18 must be used. Inputs 916 can
be used for other type of events at the same event block.
As basic, three event function blocks EVENT:1 to EVENT:3 running with a fast
loop time (3 ms) is available in the 670 series IEDs. The remaining event function
blocks EVENT:4 to EVENT:9 runs with a loop time on 8 ms and EVENT:10 to
EVENT:20 runs with a loop time on 100 ms. The event blocks are used to send
binary signals, integers, real time values like analogue data from measuring
functions and mA input modules as well as pulse counter signals.
16 pulse counter value function blocks PCGGIO:1 to PCGGIO:16 and 24 mA input
service values function blocks SMMI1_In1 to 6 SMMI4_In1 to 6 are available in
the 670 series IEDs.
The first LON address in every event function block is found in table 517
Table 517: LON adresses for Event functions
Function block First LON address in
function block
EVENT:1 1024
EVENT:2 1040
EVENT:3 1056
EVENT:4 1072
EVENT:5 1088
EVENT:6 1104
EVENT:7 1120
EVENT:8 1136
EVENT:9 1152
EVENT:10 1168
EVENT:11 1184
EVENT:12 1200
EVENT:13 1216
EVENT:14 1232
EVENT:15 1248
EVENT:16 1264
771
Function block First LON address in
function block
EVENT:17 1280
EVENT:18 1296
EVENT:19 1312
EVENT:20 1328
Event masks
The event mask for each input can be set individually from Parameter Setting Tool
(PST) under: Settings/ General Settings/ Monitoring / EventFunction as follows:
No events
OnSet, at pick-up of the signal
OnReset, at drop-out of the signal
OnChange, at both pick-up and drop-out of the signal
AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the
event function block.
Single indication
Directly connected binary IO signal via binary input function block (SMBI) is
always reported on change, no changed detection is done in the event function
block. Other Boolean signals, for example a start or a trip signal from a protection
function is event masked in the event function block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the
event reporting is based on information from switch-control, no change detection is
done in the event function block.
Directly connected binary IO signal via binary input function block (SMBI) is not
possible to handle as double indication. Double indications can only be reported for
the first 8 inputs on an event function block.
00 generates an intermediate event with the read status 0
01 generates an open event with the read status 1
10 generates a close event with the read status 2
11 generates an undefined event with the read status 3
Analog value
All analog values are reported cyclic, the reporting interval is taken from the
connected function if there is a limit supervised signal, otherwise it is taken from
the event function block.
Command handling
772
Commands are transferred using transparent SPA-bus messages. The transparent
SPA-bus message is an explicit LON message, which contains an ASCII character
message following the coding rules of the SPA-bus protocol. The message is sent
using explicit messages with message code 41H and using acknowledged transport
service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or
N) are sent using the same message code. It is mandatory that one device sends out
only one SPA-bus message at a time to one node and waits for the reply before
sending the next message.
For commands from the operator workplace to the IED for apparatus control, That
is, the function blocks type SCSWI 1 to 32, SXCBR 1 to 18 and SXSWI 1 to 28;
the SPA addresses are according to table 518.
Horizontal communication
Network variables are used for communication between 500 series and 670 series
IEDs. The supported network variable type is SNVT_state (NV type 83).
SNVT_state is used to communicate the state of a set of 1 to 16 Boolean values.
Multiple command send function block (MULTICMDSND) is used to pack the
information to one value. This value is transmitted to the receiving node and
presented for the application by a multiple command function block
(MULTICMDRCV). At horizontal communication the input BOUND on the event
function block (MULTICMDSND) must be set to 1. There are 10
MULTICMDSND and 60 MULTICMDRCV function blocks available. The
MULTICMDSND and MULTICMDRCV function blocks are connected using Lon
Network Tool (LNT 505). This tool also defines the service and addressing on LON.
This is an overview for configuring the network variables for 670 series IEDs.
Configuration of LON network variables
Configure the Network variables according to the specific application using the
LON network Tool. For more information, refer to LNT 505 in Operation manual.
The following is an example of how to configure network variables concerning, for
example, interlocking between two IEDs.
773

MULTICMDSND: 7
BAY E1
MULTICMDSND: 9
BAY E3
LON
BAY E4
MULTICMDSND: 9
en05000718.vsd
IEC05000718 V2 EN
Figure 409: Examples connections between MULTICMDSND and
MULTICMDRCV function blocks in three IEDs
The network variable connections are done from the NV Connection window.
From LNT window select Connections/ NVConnections/ New.
en05000719.vsd
IEC05000719 V1 EN
Figure 410: The network variables window in LNT
There are two ways of downloading NV connections. Either the users can use the
drag-and-drop method where they can select all nodes in the device window, drag
them to the Download area in the bottom of the program window and drop them
774
there; or, they can perform it by selecting the traditional menu, Configuration/
Download.
en05000720.vsd
IEC05000720 V1 EN
Figure 411: The download configuration window in LNT
Communication ports
The serial communication module (SLM) is used for SPA or IEC60870-5-103 and
LON communication. This module is a mezzanine module, and can be placed on
the Main Processing Module (NUM). The serial communication module can have
connectors for two plastic fibre cables (snap-in) or two glass fibre cables (ST,
bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre. The incoming optical fibre is connected to the
RX receiver input, and the outgoing optical fibre to the TX transmitter output.
When the fibre optic cables are laid out, pay special attention to the instructions
concerning the handling and connection of the optical fibres. The module is
identified with a number on the label on the module.
Table 518: SPA addresses for commands from the operator workplace to the IED for apparatus
control
Name Function
block
SPA
address
Description
BL_CMD SCSWI01 1 I 5115 SPA parameters for block
command
command
command
command
775
Name Function
block
SPA
address
Description
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
776
Name Function
block
SPA
address
Description
command
command
command
command
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
777
Name Function
block
SPA
address
Description
command
command
command
command
command
command
command
command
command
command
command
command
SELECTOpen=00,
SELECTClose=01,
SELOpen+ILO=10,
SELClose+ILO=11,
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SCSWI01 1 I 5105 SPA parameters for select (Open/
Close) command
Note: Send select command
before operate command
SELECTOpen=00,
SELECTClose=01, so on.
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
778
Name Function
block
SPA
address
Description
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
SELECTOpen=00,
Close) command
779
Name Function
block
SPA
address
Description
ExcOpen=00,
ExcClose=01,
ExcOpen+ILO=10,
ExcClose+ILO=11,
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
SCSWI01 1 I 5106 SPA parameters for operate (Open/
Close) command
Note: Send select command
before operate command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
780
Name Function
block
SPA
address
Description
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
ExcOpen=00,
ExcClose=01, so on.
Close) command
Sub Value SXCBR01 2 I 7854 SPA parameter for position to be
substituted
Note: Send the value before Enable
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
781
Name Function
block
SPA
address
Description
substituted
substituted
substituted
substituted
Sub Value SXSWI01 3 I 196 SPA parameter for position to be
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
782
Name Function
block
SPA
address
Description
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute
enable command
Note: Send the Value before
Enable
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
783
Name Function
block
SPA
address
Description
enable command
enable command
enable command
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXSWI11 3I 379 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
784
Name Function
block
SPA
address
Description
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Update Block SXCBR01 2 I 7853 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
785
Name Function
block
SPA
address
Description
command
Update Block SXSWI01 3 I 198 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
786
Name Function
block
SPA
address
Description
command
command
command
command
command
Table 519: HORZCOMM Non group settings (basic)
Operation Off
On
- - Off Operation
Table 520: ADE Non group settings (basic)
Operation Off
On
- - Off Operation
TimerClass Slow
Normal
Fast
- - Slow Timer class
Table 521: LON communication protocol
Function Value
Protocol LON
Communication speed 1.25 Mbit/s
17.5 SPA communication protocol
17.5.1 Introduction
In this section the most common addresses for commands and events are available.
For other addresses, refer to section "Related documents".
787
It is assumed that the reader is familiar with the SPA communication protocol in
general.
The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7
data bits + even parity, 1 stop bit) with data transfer rate up to 38400 bit/s. For
more information on recommended baud rate for each type of IED, refer to
Technical reference manual. Messages on the bus consist of ASCII characters.
Introduction of SPA protocol
The basic construction of the protocol assumes that the slave has no self-initiated
need to talk to the master but the master is aware of the data contained in the slaves
and, consequently, can request required data. In addition, the master can send data
to the slave. Requesting by the master can be performed either by sequenced
polling (for example, for event information) or only on demand.
The master requests slave information using request messages and sends
information to the slave in write messages. Furthermore, the master can send all
slaves in common a broadcast message containing time or other data. The inactive
state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data
to an IED with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MIM3 to MIM16) are found
in table 522.
Table 522: SPA addresses for the MIM function
Function block SPA address
MIM3-CH1 4-O-6508
MIM3-CH2 4-O-6511
MIM3-CH3 4-O-6512
MIM3-CH4 4-O-6515
MIM3-CH5 4-O-6516
MIM3-CH6 4-O-6519
MIM4-CH1 4-O-6527
MIM4-CH2 4-O-6530
MIM4-CH3 4-O-6531
MIM4-CH4 4-O-6534
MIM4-CH5 4-O-6535
MIM4-CH6 4-O-6538
MIM5-CH1 4-O-6546
MIM5-CH2 4-O-6549
788
MIM5-CH3 4-O-6550
MIM5-CH4 4-O-6553
MIM5-CH5 4-O-6554
MIM5-CH6 4-O-6557
MIM6-CH1 4-O-6565
MIM6-CH2 4-O-6568
MIM6-CH3 4-O-6569
MIM6-CH4 4-O-6572
MIM6-CH5 4-O-6573
MIM6-CH6 4-O-6576
MIM7-CH1 4-O-6584
MIM7-CH2 4-O-6587
MIM7-CH3 4-O-6588
MIM7-CH4 4-O-6591
MIM7-CH5 4-O-6592
MIM7-CH6 4-O-6595
MIM8-CH1 4-O-6603
MIM8-CH2 4-O-6606
MIM8-CH3 4-O-6607
MIM8-CH4 4-O-6610
MIM8-CH5 4-O-6611
MIM8-CH6 4-O-6614
MIM9-CH1 4-O-6622
MIM9-CH2 4-O-6625
MIM9-CH3 4-O-6626
MIM9-CH4 4-O-6629
MIM9-CH5 4-O-6630
MIM9-CH6 4-O-6633
MIM10-CH1 4-O-6641
MIM10-CH2 4-O-6644
MIM10-CH3 4-O-6645
MIM10-CH4 4-O-6648
MIM10-CH5 4-O-6649
MIM10-CH6 4-O-6652
MIM11-CH1 4-O-6660
MIM11-CH2 4-O-6663
MIM11-CH3 4-O-6664
MIM11-CH4 4-O-6667
MIM11-CH5 4-O-6668
789
MIM11-CH6 4-O-6671
MIM12-CH1 4-O-6679
MIM12-CH2 4-O-6682
MIM12-CH3 4-O-6683
MIM12-CH4 4-O-6686
MIM12-CH5 4-O-6687
MIM12-CH6 4-O-6690
MIM13-CH1 4-O-6698
MIM13-CH2 4-O-6701
MIM13-CH3 4-O-6702
MIM13-CH4 4-O-6705
MIM13-CH5 4-O-6706
MIM13-CH6 4-O-6709
MIM14-CH1 4-O-6717
MIM14-CH2 4-O-6720
MIM14-CH3 4-O-6721
MIM14-CH4 4-O-6724
MIM14-CH5 4-O-6725
MIM14-CH6 4-O-6728
MIM15-CH1 4-O-6736
MIM15-CH2 4-O-6739
MIM15-CH3 4-O-6740
MIM15-CH4 4-O-6743
MIM15-CH5 4-O-6744
MIM15-CH6 4-O-6747
MIM16-CH1 4-O-6755
MIM16-CH2 4-O-6758
MIM16-CH3 4-O-6759
MIM16-CH4 4-O-6762
MIM16-CH5 4-O-6763
MIM16-CH6 4-O-6766
The SPA addresses for the pulse counter values PCGGIO:1 to PCGGIO:16 are
found in table 523.
Table 523: SPA addresses for the PCGGIO function
Function block SPA address CNT_VAL SPA address NEW_VAL
PCGGIO:1 3-O-5834 3-O-5833
PCGGIO:2 3-O-5840 3-O-5839
PCGGIO:3 3-O-5846 3-O-5845
790
Function block SPA address CNT_VAL SPA address NEW_VAL
PCGGIO:4 3-O-5852 3-O-5851
PCGGIO:5 3-O-5858 3-O-5857
PCGGIO:6 3-O-5864 3-O-5863
PCGGIO:7 3-O-5870 3-O-5869
PCGGIO:8 3-O-5876 3-O-5875
PCGGIO:9 3-O-5882 3-O-5881
PCGGIO:10 3-O-5888 3-O-5887
PCGGIO:11 3-O-5894 3-O-5893
PCGGIO:12 3-O-5900 3-O-5899
PCGGIO:13 3-O-5906 3-O-5905
PCGGIO:14 3-O-5912 3-O-5911
PCGGIO:15 3-O-5918 3-O-5917
PCGGIO:16 3-O-5924 3-O-5923
I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module
function block are used, that is, the addresses for BI1 BI16. For SPA addresses,
refer to section "Related documents".
Single command, 16 signals
The IEDs can be provided with a function to receive signals either from a
substation automation system or from the local HMI. That receiving function block
has 16 outputs that can be used, for example, to control high voltage apparatuses in
switchyards. For local control functions, the local HMI can also be used.
Single command, 16 signals function consists of three function blocks;
SINGLECMD:1 to SINGLECMD:3 for 16 binary output signals each.
The signals can be individually controlled from the operator station, remote-control
gateway, or from the local HMI on the IED. For Single command, 16 signals
function block, SINGLECMD:1 to SINGLECMD:3, the address is for the first
output. The other outputs follow consecutively after the first one. For example,
output 7 on the SINGLECMD:2 function block has the 5O533 address.
The SPA addresses for Single command, 16 signals functions SINGLECMD:1 to
SINGLECMD:3 are found in table 524.
Table 524: SPA addresses for SINGLECMD function
Function block SPA address CMD Input SPA address CMD output
SINGLECMD1-Cmd1 4-S-4639 5-O-511
791
SINGLECMD1-Cmdt13 4-S-4651 5-O-523
SINGLECMD2-Cmdt3 4-S-4674 5-O-529
792
Figure 412 shows an application example of how the user can, in a simplified way,
connect the command function via the configuration logic circuit in a protection
IED for control of a circuit breaker.
A pulse via the binary outputs of the IED normally performs this type of command
control. The SPA addresses to control the outputs OUT1 OUT16 in SINGLECMD:
1 are shown in table 524.
To output board, CLOSE
SINGLECMD
BLOCK ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
ÔUT9
ÔUT10
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
AND
INPUT1
INPUT2
INPUT3
INPUT4N
OUT
NOUT
PULSETIMER
INPUT
T
OUT
SYNCH OK
PULSETIMER
INPUT
T
OUT
#1.000
#1.000
To output board, OPEN
IEC05000717 V2 EN
Figure 412: Application example showing a simplified logic diagram for control
of a circuit breaker
The MODE input defines if the output signals from SINGLECMD:1 is off, steady
or pulsed signals. This is set in Parameter Setting Tool (PST) under: Setting /
General Settings / Control / Commands / Single Command.
Event function
Event function is intended to send time-tagged events to the station level (for
example, operator workplace) over the station bus. The events are there presented
in an event list. The events can be created from both internal logical signals and
binary input channels. All the internal signals are time tagged in the main
processing module, while the binary input channels are time tagged directly on
each I/O module. The events are produced according to the set event masks. The
event masks are treated commonly for both the LON and SPA channels. All events
according to the event mask are stored in a buffer, which contains up to 1000
events. If new events appear before the oldest event in the buffer is read, the oldest
event is overwritten and an overflow alarm appears.
793
Two special signals for event registration purposes are available in the IED,
Terminal Restarted (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool
(PST) under: Setting / General Setting / Monitoring / Event Function as follows:
No events
OnSet, at pick-up of the signal
OnReset, at drop-out of the signal
OnChange, at both pick-up and drop-out of the signal
AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The Status and event codes for the Event functions are found in table 525.
Table 525: Status and event codes
Single indication
1)
Double indication
Event block Status Set event Reset
event
Intermedi
ate 00
Closed 10 Open 01 Undefined
11
EVENT:1
Input 1
Input 2
Input 3
Input 4
Input 5
Input 6
Input 7
Input 8
Input 9
Input 10
Input 11
Input 12
Input 13
Input 14
Input 15
Input 16

22O1
22O2
22O3
22O4
22O5
22O6
22O7
22O8
22O9
22O10
22O11
22O12
22O13
22O14
22O15
22O16

22E33
22E35
22E37
22E39
22E41
22E43
22E45
22E47
22E49
22E51
22E53
22E55
22E57
22E59
22E61
22E63

22E32
22E34
22E36
22E38
22E40
22E42
22E44
22E46
22E48
22E50
22E52
22E54
22E56
22E58
22E60
22E62

22E0
22E4
22E8
22E12
22E16
22E20
22E24
22E28
-
-
-
-
-
-
-
-

22E1
22E5
22E9
22E13
22E17
22E21
22E25
22E29
-
-
-
-
-
-
-
-

22E2
22E6
22E10
22E14
22E18
22E22
22E26
22E30
-
-
-
-
-
-
-
-

22E3
22E7
22E11
22E15
22E19
22E23
22E27
22E31
-
-
-
-
-
-
-
-

EVENT:2
EVENT:3
-
-
-
EVENT:20
230..
240..
-
-
-
410..
23E..
24E..
-
-
-
41E..
23E..
24E..
-
-
-
41E..
23E..
24E..
-
-
-
41E..
23E..
23E..
-
-
-
41E..
23E..
24E..
-
-
-
41E..
23E..
24E..
-
-
-
41E..
These values are only applicable if the Event mask is masked OFF.
Connection of signals as events
Signals coming from different protection and control functions and must be sent as
events to the station level over the SPA-bus (or LON-bus) are connected to the
Event function block according to figure 413.
794
EVENT
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Block
ILRANG
PSTO
UL12RANG
UL31RANG
UL23RANG
3I0RANG
3U0RANG
FALSE
IEC07000065 V2 EN
Figure 413: Connection of protection signals for event handling
17.5.2.1 Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and
the Analog/Digital conversion module (ADM). The serial communication module
can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables
(ST, bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre.
The incoming optical fibre is connected to the RX receiver input, and the outgoing
optical fibre to the TX transmitter output. When the fibre optic cables are laid out,
pay special attention to the instructions concerning the handling and connection of
the optical fibres. The module is identified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the
Installation and commissioning manual for respective IEDs.
17.5.3 Design
When communicating locally with a computer (PC) in the station, using the rear
SPA port, the only hardware needed for a station monitoring system is:
Optical fibres
Opto/electrical converter for the PC
PC
When communicating remotely with a PC using the rear SPA port, the same
hardware and telephone modems are needed.
The software needed in the PC, either local or remote, is PCM600.
When communicating between the local HMI and a PC, the only hardware required
is a front-connection cable.
795
Table 526: SPA Non group settings (basic)
BaudRate 300 Bd
1200 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
- - 9600 Bd Baudrate on serial line
Table 527: LONSPA Non group settings (basic)
Operation Off
On
- - Off Operation
Table 528: SPA communication protocol
Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or 38400
Bd
Slave number 1 to 899
17.6 IEC 60870-5-103 communication protocol
17.6.1 Introduction
IEC 60870-5-103 communication protocol is mainly used when a protection IED
communicates with a third party control or monitoring system. This system must
have software that can interpret the IEC 60870-5-103 communication messages.
17.6.2.1 General
IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial
communication exchanging information with a control system, and with a data
transfer rate up to 38400 bit/s. In IEC terminology, a primary station is a master
and a secondary station is a slave. The communication is based on a point-to-point
796
principle. The master must have software that can interpret IEC 60870-5-103
communication messages.
Introduction to IEC 608705103 protocol
IEC 60870-5-103 protocol functionality consists of the following functions:
Event handling
Report of analog service values (measurements)
Fault location
Command handling
Autorecloser ON/OFF
Teleprotection ON/OFF
Protection ON/OFF
LED reset
Characteristics 1 - 4 (Setting groups)
File transfer (disturbance files)
Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC 60870 standard
part 5: Transmission protocols, and to the section 103: Companion standard for the
informative interface of protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the
IEDs with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the
protection and control IED.
Commands in control direction
Commands in control direction, I103IEDCMD
Command block in control direction with defined output signals.
Number of instances: 1
Command block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each output signals.
Info. no Message Supported
19 LED Reset Yes
23 Activate setting group 1 Yes
Function commands in control direction, pre-defined I103CMD
797
Function command block in control direction with defined output signals.
FUNCTION TYPE parameter for each block.
INFORMATION NUMBER is defined for each output signals.
Info. no. Message Supported
16 Auto-recloser on/off Yes
17 Teleprotection on/off Yes
18 Protection on/off Yes
Function commands in control direction, user-defined, I103UserCMD
Function command blocks in control direction with user-defined output signals.
FUNCTION TYPE parameter for each block in private range. Default values are
defined in private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1
- 8.
1 Output signal 01 Yes
Status
Terminal status indications in monitor direction, I103IED
Indication block for status in monitor direction with defined IED functions.
Indication block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each input signals.
798
19 LED reset Yes
23 Setting group 1 active Yes
21 Test mode active Yes
Function status indications in monitor direction, user-defined, I103UserDef
Function indication blocks in monitor direction with user-defined input signals.
defined in private range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are
defined in range 1 - 8.
1 Input signal 01 Yes
Supervision indications in monitor direction, I103Superv
Indication block for supervision in monitor direction with defined functions.
INFORMATION NUMBER is defined for output signals.
32 Measurand supervision I Yes
33 Measurand supervision U Yes
37 I>>back-up operation Yes
38 VT fuse failure Yes
46 Group warning Yes
47 Group alarm Yes
799
Earth fault indications in monitor direction, I103EF
Indication block for earth fault in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.
51 Earth fault forward Yes
52 Earth fault reverse Yes
Fault indications in monitor direction, type 1, I103FltDis
Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for distance protection function.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
78 Zone 1 Yes
79 Zone 2 Yes
80 Zone 3 Yes
81 Zone 4 Yes
82 Zone 5 Yes
76 Signal transmitted Yes
77 Signal received Yes
73 SCL, Fault location in ohm Yes
800
Fault indications in monitor direction, type 2, I103FltStd
Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for line differential, transformer differential,
overcurrent and earth fault protection functions.
FUNCTION TYPE setting for each block.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
85 Breaker failure Yes
86 Trip measuring system L1 Yes
89 Trip measuring system N Yes
90 Over current trip I> Yes
91 Over current trip I>> Yes
92 Earth fault trip IN> Yes
93 Earth fault trip IN>> Yes
Autorecloser indications in monitor direction, I103AR
Indication block for autorecloser in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.
801
16 Autorecloser active Yes
128 CB on by Autorecloser Yes
130 Autorecloser blocked Yes
Measurands
Function blocks in monitor direction for input measurands. Typically connected to
monitoring function, for example to power measurement .
Measurands in public range, I103Meas
The IED reports all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
148 IL1 Yes
144, 145,
148
IL2 Yes
148 IL3 Yes
147 IN, Neutral current Yes
148 UL1 Yes
148 UL2 Yes
148 UL3 Yes
145, 146 UL1-UL2 Yes
147 UN, Neutral voltage Yes
146, 148 P, active power Yes
146, 148 Q, reactive power Yes
148 f, frequency Yes
Measurands in private range, I103MeasUsr
defined in private range 25 27. One for each instance.
INFORMATION NUMBER parameter for each block. Default value 1.
- Meas1 Yes
- Meas2 Yes
- Meas3 Yes
802
- Meas4 Yes
- Meas5 Yes
- Meas6 Yes
- Meas7 Yes
- Meas8 Yes
- Meas9 Yes
Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units)
defined in the standard.
Analog signals, 40-channels: the channel number for each channel has to be
specified. Channels used in the public range are 1 to 8 and with:
I
L1
connected to channel 1 on disturbance function block A1RADR
I
L2
I
L3
I
N
V
L1E
V
L2E
V
L3E
V
EN
Channel number used for the remaining 32 analog signals are numbers in the
private range 64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION
TYPE and an INFORMATION NUMBER.
Disturbance upload
All analog and binary signals that are recorded with disturbance recorder can be
reported to the master. The last eight disturbances that are recorded are available
for transfer to the master. A successfully transferred disturbance (acknowledged by
the master) will not be reported to the master again.
When a new disturbance is recorded by the IED a list of available recorded
disturbances will be sent to the master, an updated list of available disturbances can
be sent whenever something has happened to disturbances in this list. For example,
when a disturbance is deteceted (by other client, for example, SPA) or when a new
disturbance has been recorded or when the master has uploaded a disturbance.
Deviations from the standard
803
Information sent in the disturbance upload is specified by the standard; however,
some of the information are adapted to information available in disturbance
recorder in 670 series.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In list of recorded disturbances (ASDU23) an information element named SOF
(status of fault) exists. This information element consists of 4 bits and indicates
whether:
Bit TP: the protection equipment has tripped during the fault
Bit TM: the disturbance data are currently being transmitted
Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
Bit OTEV: the disturbance data recording has been initiated by another event
than start
The only information that is easily available is test-mode status. The other
information is always set (hard coded) to:
TP Recorded fault with trip. [1]
TM Disturbance data waiting for transmission [0]
OTEV Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to
the standard this is a number that is incremented when a protection function takes
action. In 670 series FAN is equal to disturbance number, which is incremented for
each disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the
protection equipment answers by sending ASDU26, which contains an information
element named NOF (number of grid faults). This number must indicate fault
number in the power system,that is, a fault in the power system with several trip
and auto-reclosing has the same NOF (while the FAN must be incremented). NOF
is in 670 series, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the
disturbance recorder for each input. The user must set these parameters to whatever
he connects to the corresponding input.
804
Interoperability, physical layer
Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Interoperability, application layer
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
805
Supported
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
17.6.2.2 Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and
the Analog/Digital conversion module (ADM). The serial communication module
can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables
(ST, bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre.
The incoming optical fibre is connected to the RX receiver input, and the outgoing
optical fibre to the TX transmitter output. When the fibre optic cables are laid out,
pay special attention to the instructions concerning the handling and connection of
the optical fibres. The module is identified with a number on the label on the module.
I103IEDCMD
BLOCK
FUNTYPE
19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
IEC05000689 V2 EN
I103CMD
BLOCK
FUNTYPE
16-AR
17-DIFF
18-PROT
IEC05000684 V2 EN
806
I103USRCMD
BLOCK
PULSEMOD
T
FUNTYPE
INFNO_1
INFNO_2
INFNO_3
INFNO_4
INFNO_5
INFNO_6
INFNO_7
INFNO_8
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
IEC05000693 V2 EN
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
FUNTYPE
IEC05000688 V2 EN
I103USRDEF
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
FUNTYPE
INFNO_1
INFNO_2
INFNO_3
INFNO_4
INFNO_5
INFNO_6
INFNO_7
INFNO_8
IEC05000694 V2 EN
I103SUPERV
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
FUNTYPE
IEC05000692 V2 EN
I103EF
BLOCK
51_EFFW
52_EFREV
FUNTYPE
IEC05000685 V2 EN
807
I103FLTDIS
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
FUNTYPE
IEC05000686 V2 EN
I103FLTSTD
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
FUNTYPE
IEC05000687 V2 EN
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
FUNTYPE
IEC05000683 V2 EN
808
I103MEAS
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
FUNTYPE
IEC05000690 V2 EN
I103MEASUSR
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
FUNTYPE
INFNO
IEC05000691 V2 EN
Table 529: I103IEDCMD Input signals
BLOCK BOOLEAN 0 Block of commands
Table 530: I103IEDCMD Output signals
19-LEDRS BOOLEAN Information number 19, reset LEDs
23-GRP1 BOOLEAN Information number 23, activate setting group 1
Table 531: I103CMD Input signals
809
Table 532: I103CMD Output signals
16-AR BOOLEAN Information number 16, block of autorecloser
17-DIFF BOOLEAN Information number 17, block of differential
protection
18-PROT BOOLEAN Information number 18, block of protection
Table 533: I103USRCMD Input signals
Table 534: I103USRCMD Output signals
OUTPUT1 BOOLEAN Command output 1
Table 535: I103IED Input signals
BLOCK BOOLEAN 0 Block of status reporting
19_LEDRS BOOLEAN 0 Information number 19, reset LEDs
23_GRP1 BOOLEAN 0 Information number 23, setting group 1 is active
21_TESTM BOOLEAN 0 Information number 21, test mode is active
Table 536: I103USRDEF Input signals
INPUT1 BOOLEAN 0 Binary signal Input 1
INPUT2 BOOLEAN 0 Binary signal input 2
810
Table 537: I103SUPERV Input signals
32_MEASI BOOLEAN 0 Information number 32, measurand supervision of
I
33_MEASU BOOLEAN 0 Information number 33, measurand supervision of
U
37_IBKUP BOOLEAN 0 Information number 37, I high-high back-up
protection
38_VTFF BOOLEAN 0 Information number 38, fuse failure VT
46_GRWA BOOLEAN 0 Information number 46, group warning
47_GRAL BOOLEAN 0 Information number 47, group alarm
Table 538: I103EF Input signals
51_EFFW BOOLEAN 0 Information number 51, earth-fault forward
52_EFREV BOOLEAN 0 Information number 52, earth-fault reverse
Table 539: I103FLTDIS Input signals
64_STL1 BOOLEAN 0 Information number 64, start phase L1
67_STIN BOOLEAN 0 Information number 67, start residual current IN
84_STGEN BOOLEAN 0 Information number 84, start general
69_TRL1 BOOLEAN 0 Information number 69, trip phase L1
68_TRGEN BOOLEAN 0 Information number 68, trip general
74_FW BOOLEAN 0 Information number 74, forward/line
75_REV BOOLEAN 0 Information number 75, reverse/bus
811
78_ZONE1 BOOLEAN 0 Information number 78, zone 1
76_TRANS BOOLEAN 0 Information number 76, signal transmitted
77_RECEV BOOLEAN 0 Information number 77, signal recevied
73_SCL REAL 0 Information number 73, fault location in ohm
FLTLOC BOOLEAN 0 Faultlocator faultlocation valid (LMBRFLO-
CALCMADE)
ARINPROG BOOLEAN 0 Autorecloser in progress (SMBRREC- INPROGR)
Table 540: I103FLTSTD Input signals
67_STIN BOOLEAN 0 Information number 67, start residual curent IN
84_STGEN BOOLEAN 0 Information number 84, start general
68_TRGEN BOOLEAN 0 Information number 68, trip general
74_FW BOOLEAN 0 Information number 74, forward/line
75_REV BOOLEAN 0 Information number 75, reverse/bus
85_BFP BOOLEAN 0 Information number 85, breaker failure
86_MTRL1 BOOLEAN 0 Information number 86, trip measuring system
phase L1
phase L2
phase L3
89_MTRN BOOLEAN 0 Information number 89, trip measuring system
neutral N
90_IOC BOOLEAN 0 Information number 90, over current trip, stage low
91_IOC BOOLEAN 0 Information number 91, over current trip, stage high
92_IEF BOOLEAN 0 Information number 92, earth-fault trip, stage low
93_IEF BOOLEAN 0 Information number 93, earth-fault trip, stage high
ARINPROG BOOLEAN 0 Autorecloser in progress (SMBRREC- INPROGR)
812
Table 541: I103AR Input signals
16_ARACT BOOLEAN 0 Information number 16, auto-recloser active
128_CBON BOOLEAN 0 Information number 128, circuit breaker on by auto-
recloser
130_UNSU BOOLEAN 0 Information number 130, unsuccessful reclosing
Table 542: I103MEAS Input signals
BLOCK BOOLEAN 0 Block of service value reporting
IL1 REAL 0.0 Service value for current phase L1
IN REAL 0.0 Service value for residual current IN
UL1 REAL 0.0 Service value for voltage phase L1
UL1L2 REAL 0.0 Service value for voltage phase-phase L1-L2
UN REAL 0.0 Service value for residual voltage UN
P REAL 0.0 Service value for active power
Q REAL 0.0 Service value for reactive power
F REAL 0.0 Service value for system frequency
Table 543: I103MEASUSR Input signals
BLOCK BOOLEAN 0 Block of service value reporting
INPUT1 REAL 0.0 Service value for measurement on input 1
813
Table 544: I103IEDCMD Non group settings (basic)
FUNTYPE 1 - 255 FunT 1 255 Function type (1-255)
Table 545: I103CMD Non group settings (basic)
Table 546: I103USRCMD Non group settings (basic)
PULSEMOD 0 - 1 Mode 1 1 Pulse mode 0=Steady, 1=Pulsed
T 0.200 - 60.000 s 0.001 0.400 Pulse length
INFNO_1 1 - 255 InfNo 1 1 Information number for output 1 (1-255)
Table 547: I103IED Non group settings (basic)
Table 548: I103USRDEF Non group settings (basic)
INFNO_1 1 - 255 InfNo 1 1 Information number for binary input 1
(1-255)
(1-255)
(1-255)
(1-255)
814
(1-255)
(1-255)
(1-255)
(1-255)
Table 549: I103SUPERV Non group settings (basic)
Table 550: I103EF Non group settings (basic)
Table 551: I103FLTDIS Non group settings (basic)
Table 552: I103FLTSTD Non group settings (basic)
Table 553: I103AR Non group settings (basic)
Table 554: I103MEAS Non group settings (basic)
RatedIL1 1 - 99999 A 1 3000 Rated current phase L1
RatedIN 1 - 99999 A 1 3000 Rated residual current IN
RatedUL1 0.05 - 2000.00 kV 0.05 230.00 Rated voltage for phase L1
815
RatedUL1-UL2 0.05 - 2000.00 kV 0.05 400.00 Rated voltage for phase-phase L1-L2
RatedUN 0.05 - 2000.00 kV 0.05 230.00 Rated residual voltage UN
RatedP 0.00 - 2000.00 MW 0.05 1200.00 Rated value for active power
RatedQ 0.00 - 2000.00 MVA 0.05 1200.00 Rated value for reactive power
RatedF 50.0 - 60.0 Hz 10.0 50.0 Rated system frequency
Table 555: I103MEASUSR Non group settings (basic)
INFNO 1 - 255 InfNo 1 1 Information number for measurands
(1-255)
RatedMeasur1 0.05 -
10000000000.00
- 0.05 1000.00 Rated value for measurement on input 1
RatedMeasur2 0.05 -
10000000000.00
RatedMeasur3 0.05 -
10000000000.00
RatedMeasur4 0.05 -
10000000000.00
RatedMeasur5 0.05 -
10000000000.00
RatedMeasur6 0.05 -
10000000000.00
RatedMeasur7 0.05 -
10000000000.00
RatedMeasur8 0.05 -
10000000000.00
RatedMeasur9 0.05 -
10000000000.00
Table 556: IEC60870-5-103 communication protocol
Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
816
17.7 Horizontal communication via GOOSE for
interlocking GOOSEINTLKRCV
GOOSEINTLKRCV
BLOCK ^RESREQ
^RESGRANT
ÂPP1_OP
ÂPP1_CL
APP1VAL
ÂPP2_OP
ÂPP2_CL
APP2VAL
ÂPP3_OP
ÂPP3_CL
APP3VAL
ÂPP4_OP
ÂPP4_CL
APP4VAL
ÂPP5_OP
ÂPP5_CL
APP5VAL
ÂPP6_OP
ÂPP6_CL
APP6VAL
ÂPP7_OP
ÂPP7_CL
APP7VAL
ÂPP8_OP
ÂPP8_CL
APP8VAL
ÂPP9_OP
ÂPP9_CL
APP9VAL
ÂPP10_OP
ÂPP10_CL
APP10VAL
ÂPP11_OP
ÂPP11_CL
APP11VAL
ÂPP12_OP
ÂPP12_CL
APP12VAL
ÂPP13_OP
ÂPP13_CL
APP13VAL
ÂPP14_OP
ÂPP14_CL
APP14VAL
ÂPP15_OP
ÂPP15_CL
APP15VAL
COM_VAL
IEC07000048 V2 EN
Figure 414: GOOSEINTLKRCV function block
Table 557: GOOSEINTLKRCV Input signals
BLOCK BOOLEAN 0 Block of output signals
817
Table 558: GOOSEINTLKRCV Output signals
RESREQ BOOLEAN Reservation request
RESGRANT BOOLEAN Reservation granted
APP1_OP BOOLEAN Apparatus 1 position is open
APP1_CL BOOLEAN Apparatus 1 position is closed
APP1VAL BOOLEAN Apparatus 1 position is valid
818
COM_VAL BOOLEAN Receive communication status is valid
Table 559: GOOSEINTLKRCV Non group settings (basic)
Operation Off
On
819
17.8 Goose binary receive GOOSEBINRCV
GOOSEBINRCV
BLOCK ÔUT1
OUT1VAL
ÔUT2
OUT2VAL
ÔUT3
OUT3VAL
ÔUT4
OUT4VAL
ÔUT5
OUT5VAL
ÔUT6
OUT6VAL
ÔUT7
OUT7VAL
ÔUT8
OUT8VAL
ÔUT9
OUT9VAL
ÔUT10
OUT10VAL
ÔUT11
OUT11VAL
ÔUT12
OUT12VAL
ÔUT13
OUT13VAL
ÔUT14
OUT14VAL
ÔUT15
OUT15VAL
ÔUT16
OUT16VAL
IEC07000047 V2 EN
Figure 415: GOOSEBINRCV function block
Table 560: GOOSEBINRCV Input signals
BLOCK BOOLEAN 0 Block of output signals
Table 561: GOOSEBINRCV Output signals
OUT1 BOOLEAN Binary output 1
OUT1VAL BOOLEAN Valid data on binary output 1
820
Table 562: GOOSEBINRCV Non group settings (basic)
Operation Off
On
17.9 Multiple command and transmit MULTICMDRCV,
MULTICMDSND
821
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Multiple command and transmit MULTICMDRCV - -
Multiple command and transmit MULTICMDSND - -
17.9.1 Introduction
The IED can be provided with a function to send and receive signals to and from
other IEDs via the interbay bus. The send and receive function blocks has 16 outputs/
inputs that can be used, together with the configuration logic circuits, for control
purposes within the IED or via binary outputs. When it is used to communicate
with other IEDs, these IEDs have a corresponding Multiple transmit function block
with 16 outputs to send the information received by the command block.
Two multiple transmit function blocks MULTICMDSND:1 and MULTICMDSND:
2 and 8 slow multiple transmit function blocks MULTICMDSND:3 to
MULTICMDSND:10 are available in the IED.
Sixteen signals can be connected and they will then be sent to the multiple
command block in the other IED. The connections are set with the LON Network
Tool (LNT).
Twelve multiple command function blocks MULTICMDRCV:1 to
MULTICMDRCV:12 with fast execution time and 48 multiple command function
blocks MULTICMDRCV:13 to MULTICMDRCV:60 with slower execution time
are available in the IED.
Multiple command function block MULTICMDRCV has 16 outputs combined in
one block, which can be controlled from other IEDs.
The output signals, here OUTPUT1 to OUTPUT16, are then available for
configuration to built-in functions or via the configuration logic circuits to the
binary outputs of the IED.
MULTICMDRCV also has a supervision function, which sets the output VALID to
0 if the block does not receive data within set maximum time.
17.9.3 Design
17.9.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on
the MODE settings, common for the whole block, from PCM600.
822
0 = Off sets all outputs to 0, independent of the values sent from the station
level, that is, the operator station or remote-control gateway.
1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values
sent from the station level.
2 = Pulse gives a pulse with one execution cycle duration, if a value sent from
the station level is changed from 0 to 1. That means that the configured logic
connected to the command function blocks may not have a cycle time longer
than the execution cycle time for the command function block.
MULTICMDRCV
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
IEC06000007 V2 EN
Figure 416: MULTICMDRCV function block
MULTICMDSND
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
ERROR
IEC06000008 V2 EN
Figure 417: MULTICMDSND function block
823
Table 563: MULTICMDRCV Input signals
Table 564: MULTICMDSND Input signals
Table 565: MULTICMDRCV Output signals
ERROR BOOLEAN MultiReceive error
NEWDATA BOOLEAN New data is received
OUTPUT1 BOOLEAN Output 1
824
VALID BOOLEAN Output data is valid
Table 566: MULTICMDSND Output signals
ERROR BOOLEAN MultiSend error
Table 567: MULTICMDRCV Non group settings (basic)
tMaxCycleTime 0.050 - 200.000 s 0.001 11.000 Maximum cycle time between receptions
of input data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum cycle time between receptions
of input data
Mode Steady
Pulsed
- - Steady Mode for output signals
tPulseTime 0.000 - 60.000 s 0.001 0.200 Pulse length for multi command outputs
Table 568: MULTICMDSND Non group settings (basic)
tMaxCycleTime 0.000 - 200.000 s 0.001 5.000 Maximum time interval between
transmission of output data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum time interval between
transmission of output data
825
826
Section 18 Remote communication
About this chapter
This chapter describes the Binary signal transfer function and associated hardware
functionality. The way the functions work, their setting parameters, function
blocks, input and output signals, and technical data are included for each function.
18.1 Binary signal transfer
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Binary signal transfer BinSignReceive - -
Binary signal transfer BinSignTransm - -
18.1.1 Introduction
The remote end data communication is used either for the transmission of current
values together with maximum 8 binary signals in the line differential protection,
or for transmission of only binary signals, up to 192 signals, in the other 670 series
IEDs. The binary signals are freely configurable and can, thus, be used for any
purpose, for example, communication scheme related signals, transfer trip and/or
other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an
LDCM (Line Data Communication Module). The LDCMs are then interfaces to a
64 kbit/s communication channel for duplex communication between the IEDs.
The IED can be equipped with up to two short range, medium range or long range
LDCM.
The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s
channels. It is a two-way communication where telegrams are sent every 5 ms
(same in 50 Hz and 60 Hz), exchanging information between two IEDs. The format
used is C37.94 and one telegram consists of start and stop flags, address, data to be
transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which is associated
with C37.94).
Remote communication
827
en01000134.vsd
Start
flag
Information CRC
Stop
flag
8 bits n x 16 bits 8 bits 16 bits
IEC01000134 V1 EN
Figure 418: Data message structure
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in
the HDLC standard. The CRC is designed according to the standard CRC16
definition. The optional address field in the HDLC frame is not used instead a
separate addressing is included in the data field.
The address field is used for checking that the received message originates from
the correct equipment. There is always a risk that multiplexers occasionally mix the
messages up. Each terminal in the system is given a number. The terminal is then
programmed to accept messages from a specific terminal number. If the CRC
function detects a faulty message, the message is thrown away and not used in the
evaluation.
When the communication is used for line differential purpose, the transmitted data
consists of three currents, clock information, trip-, block- and alarm-signals and
eight binary signals which can be used for any purpose. The three currents are
represented as sampled values.
When the communication is used exclusively for binary signals, the full data
capacity of the communication channel is used for the binary signal purpose which
gives the capacity of 192 signals.
828
LDCMRecBinStat1
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
REMCOMF
LOWLEVEL
IEC07000043 V2 EN
LDCMRecBinStat2
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
IEC07000044 V2 EN
Figure 419: LDCMRecBinStat function blocks
LDCMRecBinStat3
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
IEC05000451 V2 EN
Figure 420: LDCMRecBinStat function block
Table 569: LDCMRecBinStat1 Output signals
COMFAIL BOOLEAN Detected error in the differential communication
YBIT BOOLEAN Detected error in remote end with incoming
message
NOCARR BOOLEAN No carrier is detected in the incoming message
829
NOMESS BOOLEAN No start and stop flags identified for the incoming
message
ADDRERR BOOLEAN Incoming message from a wrong terminal
LNGTHERR BOOLEAN Wrong length of the incoming message
CRCERROR BOOLEAN Identified error by CRC check in incoming message
REMCOMF BOOLEAN Remote terminal indicates problem with received
message
LOWLEVEL BOOLEAN Low signal level on the receive link
message
message
TRDELERR BOOLEAN Transmission time is longer than permitted
SYNCERR BOOLEAN Indicates when echo synchronication is used
message
REMGPSER BOOLEAN Remote terminal indicates problem with GPS
synchronization
SUBSTITU BOOLEAN Link error, values are substituted
message
message
TRDELERR BOOLEAN Transmission time is longer than permitted
830
SYNCERR BOOLEAN Indicates when echo synchronication is used
message
REMGPSER BOOLEAN Remote terminal indicates problem with GPS
synchronization
SUBSTITU BOOLEAN Link error, values are substituted
Table 572: LDCMRecBinStat1 Non group settings (basic)
ChannelMode Off
On
OutOfService
- - On Channel mode of LDCM, 0=OFF, 1=ON,
2=OutOfService
TerminalNo 0 - 255 - 1 0 Terminal number used for line differential
communication
RemoteTermNo 0 - 255 - 1 0 Terminal number on remote terminal
CommSync Slave
Master
- - Slave Com Synchronization mode of LDCM,
0=Slave, 1=Master
OptoPower LowPower
HighPower
- - LowPower Transmission power for LDCM, 0=Low,
1=High
ComFailAlrmDel 5 - 500 ms 5 100 Time delay before communication error
signal is activated
ComFailResDel 5 - 500 ms 5 100 Reset delay before communication error
signal is reset
InvertPolX21 Off
On
- - Off Invert polarization for X21 communication
ChannelMode Off
On
OutOfService
2=OutOfService
communication
DiffSync Echo
GPS
- - Echo Diff Synchronization mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block
Echo
- - Block Operation mode when GPS
synchroniation signal is lost
CommSync Slave
Master
0=Slave, 1=Master
OptoPower LowPower
HighPower
1=High
831
TransmCurr CT-GRP1
CT-GRP2
CT-SUM
CT-DIFF1
CT-DIFF2
- - CT-GRP1 Summation mode for transmitted current
values
signal is activated
signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in
redundant channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA
0-25kA
0-50kA
0-150kA
- - 0-25kA Compression range
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
InvertPolX21 Off
On
ChannelMode Off
On
OutOfService
2=OutOfService
communication
DiffSync Echo
GPS
- - Echo Diff Synchronization mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block
Echo
- - Block Operation mode when GPS
synchroniation signal is lost
CommSync Slave
Master
0=Slave, 1=Master
OptoPower LowPower
HighPower
1=High
TransmCurr CT-GRP1
CT-GRP2
CT-SUM
CT-DIFF1
CT-DIFF2
RedundantChannel
- - CT-GRP1 Summation mode for transmitted current
values
signal is activated
832
signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in
redundant channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA
0-25kA
0-50kA
0-150kA
- - 0-25kA Compression range
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
InvertPolX21 Off
On
18.2 Transmission of analog data from LDCM
LDCMTransmit
LDCMTRN
^CT1L1
^CT1L2
^CT1L3
^CT1N
^CT2L1
^CT2L2
^CT2L3
^CT2N
IEC10000017 V1 EN
Figure 421: LDCMTransmit function block
The function blocks are not represented in the Application
Configuration tool except for the LDCMTRN function block that is
visible in ACT. The signals appear only in the Signal Matrix tool
when a LDCM is included in the configuration with the function
selector tool.
833
Table 575: LDCMTRN Input signals
CT1L1 STRING 0 Input to be used for transmit CT-group1 line L1 to
remote end
remote end
remote end
CT1N STRING 0 Input to be used for transmit CT-group1 neutral N
to remote end
remote end
remote end
remote end
CT2N STRING 0 Input to be used for transmit CT-group2 neutral N
to remote end
834
Section 19 Hardware
About this chapter
This chapter includes descriptions of the different hardware modules. It includes
diagrams from different elevations indicating the location of connection terminals
and modules.
19.1 Overview
19.1.1 Variants of case and local HMI display size
xx04000458.eps
IEC04000458 V1 EN
Figure 422: 1/2 19 case with medium local HMI display.
Hardware
835
xx04000459.eps
IEC04000459 V1 EN
Figure 423: 1/2 19 case with small local HMI display.
IEC05000762 V1 EN
xx05000763.eps
IEC05000763 V1 EN
Hardware
836
xx04000460.eps
IEC04000460 V1 EN
xx04000461.eps
IEC04000461 V1 EN
Hardware
837
19.1.2 Case from the rear side
Table 576: Designations for 1/2 x 19 casing with 1 TRM slot
IEC08000471 BG V1 EN

Module Rear Positions
PSM X11
BIM, BOM, SOM or IOM X31 and X32 etc. to X51
and X52

BIM, BOM, SOM, IOM or
GSM
X51, X52
SLM X301:A, B, C, D
IRIG-B 1) X302
OEM X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401

1) IRIG-B installation, when included in seat P30:2
2) LDCM installation sequence: P31:2 or P31:3
3) RS485 installation, when included in seat P31:2
Note!
1 One LDCM can be included depending of availability of
IRIG-B respective RS485 modules.

Hardware
838

PSM X11
MIM
X31 and X32 etc. to
X101 and X102

BIM, BOM, SOM, IOM,
MIM or GSM
X101, X102
SLM X301:A, B, C, D
IRIG-B or LDCM 1) 2) X302
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401

2) LDCM installation sequence: P31:2, P31:3,
P30:2 and P30:3
3) RS485 installation, when included in seat P31:2
or P31:3
4) OEM X311:A, B (IEC 61850-8-1). X311:C, D
(IEC 61850-8-1 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of availability
of IRIG-B respective RS485 modules.

Hardware
839

PSM X11
MIM
X31 and X32 etc. to X71 and
X72

BIM, BOM, SOM, IOM,
MIM or GSM
X71, X72
SLM X301:A, B, C, D
IRIG-B or LDCM 1,2) X302
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3, P32:2,
P32:3, P30:2 and P30:3
3) RS485 installation, when included in seat P31:2, P31:3,
P32:2 or P32:3
4) OEM X311:A, B (IEC 61850-8-1). (X311:C, D IEC
61850-8-1 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of availability of IRIG-
B respective RS485 modules.
When IRIG-B, RS485 and 4 pc of LDCM are in use, needs
a second ADM.

Hardware
840

PSM X11
BIM, BOM,
SOM, IOM or
MIM
X31 and X32 etc. to X161
and X162

BIM, BOM,
SOM, IOM, MIM
or GSM
X161 and X162
SLM X301:A, B, C, D
IRIG-B X302
LDCM
1)
X313 and X303
OEM
2)
X311:A, B, C, D
RS485 X312, X313
TRM X401

Note!
1) 2 LDCM can be included. First LDCM always
in position X313, second LDCM always in
position X303.
2) OEM X311:A, B (IEC 61850-8-1). OEM
X311:C, D (IEC 61850-8-1)(IEC 61850-9-2LE)

Hardware
841
Table 580: Designations for 1/1 x 19 casing with 2 TRM slots

PSM X11
BIM, BOM,
SOM, IOM or
MIM
X31 and X32 etc. to X131
and X132

BIM, BOM,
SOM, IOM, MIM
or GSM
X131, X132
SLM X301:A, B, C, D
IRIG-B or LDCM
1,2)
X302
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM
2) 3)
X312
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3,
P32:2, P32:3, P30:2 and P30:3
3) RS485 installation, when included in seat
P31:2, P31:3, P32:2 or P32:4
4) OEM X311:A, B (IEC 61850-8-1). OEM
X311:C, D (IEC 61850-9-2 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of
availability of IRIG-B respective RS485 modules.
When IRIG-B, RS485 and 4 pc of LDCM are in
use, needs a second ADM.

Hardware
842
19.2 Hardware modules
19.2.1 Overview
Table 581: Basic modules
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM (when
included) is not connected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED
backplane with connectors for TRM (when
included), ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that
supplies auxiliary voltage to all static circuits.
An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All
information is processed or passed through this
module, such as configuration, settings and
communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push
button keyboard and an ethernet connector used
to connect a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates
the internal circuits from the VT and CT circuits. It
has 12 analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
Table 582: Application specific modules
Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole
command outputs including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10
outputs and 2 fast signalling outputs.
Line data communication modules (LDCM),
short range, medium range, long range, X21
Modules used for digital communication to remote
terminal.
Serial SPA/LON/IEC 60870-5-103
communication modules (SLM)
Used for SPA/LON/IEC 608705103
communication
Optical ethernet module (OEM) PMC board for IEC 61850 based communication.
mA input module (MIM) Analog input module with 6 independent,
galvanically separated channels.
Hardware
843
Module Description
GPS time synchronization module (GSM) Used to provide the IED with GPS time
synchronization.
Static output module (SOM) Module with 6 fast static outputs and 6 change
over output relays.
IRIG-B Time synchronization module (IRIG-B) Module with 2 inputs. One is used for handling
both pulse-width modulated signals and
amplitude modulated signals and one is used for
optical input type ST for PPS time synchronization.
19.2.2 Combined backplane module (CBM)
The combined backplane module (CBM) carries signals between modules in an IED.
19.2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The
CBM backplane and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able
to communicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal
Fail signal IRF.
19.2.2.3 Design
There are two basic versions of the CBM:
with 3 Compact PCI connectors and a number of euro connectors depending
on the IED case size. One Compact PCI connector is used by NUM and two
are used by other PCI modules, for example two ADMs in IEDs with two
TRMs. See figure 429
with 2 Compact PCI connectors and a number of euro connectors depending
on the IED case size. One Compact PCI connector is used by NUM and one is
used by for example an ADM in IEDs with one TRM. See figure 428
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors
are connected to the CAN bus and used for I/O modules and power supply.
Hardware
844
en05000516.vsd
1 2
IEC05000516 V1 EN
Figure 428: CBM for 1 TRM.
Pos Description
1 CAN slots
2 CPCI slots
1 2
en05000755.vsd
IEC05000755 V1 EN
Figure 429: CBM for 2 TRM.
Pos Description
1 CAN slots
2 CPCI slots
Hardware
845
1
en05000756.vsd
IEC05000756 V1 EN
Figure 430: CBM position, rear view.
Pos Description
1 CBM
19.2.3 Universal backplane module (UBM)
The Universal Backplane Module (UBM) is part of the IED backplane and is
mounted above the CBM. It connects the Transformer input module (TRM) to the
Analog digital conversion module (ADM) and the Numerical module (NUM).
The Universal Backplane Module connects the CT and VT analog signals from the
transformer input module to the analog digital converter module. The Numerical
processing module (NUM) is also connected to the UBM. The ethernet contact on
the front panel as well as the internal ethernet contacts are connected to the UBM
which provides the signal path to the NUM board.
19.2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion
module (ADM) and the Numerical module (NUM).
The UBM exists in 2 versions.
Hardware
846
for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 432
for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and
one 96 pin euro connector, see figure 433.
The 96 pin euro connector is used to connect the NUM board to the backplane. The
48 pin connectors are used to connect the TRM and ADM.
en05000489.vsd
TRM
X1
X3
LHMI
Front
connection
port
X10
NUM
RS485
Ethernet
Ethernet X5
ADM
X2
X4
AD Data
X10
IEC05000489 V1 EN
Figure 431: UBM block diagram.
en05000757.vsd
IEC05000757 V1 EN
Figure 432: UBM for 1 TRM.
Hardware
847
en05000758.vsd
IEC05000758 V1 EN
Figure 433: UBM for 2 TRM.
1
en05000759.vsd
IEC05000759 V1 EN
Figure 434: UBM position, rear view.
Pos Description
1 UBM
19.2.4 Numeric processing module (NUM)
The Numeric processing module (NUM), is a CPU-module that handles all
protection functions and logic.
Hardware
848
For communication with high speed modules, e.g. analog input modules and high
speed serial interfaces, the NUM is equipped with a Compact PCI bus. The NUM
is the compact PCI system card i.e. it controls bus mastering, clock distribution and
receives interrupts.
The NUM, Numeric processing module is a high performance, standard off-the-
shelf compact-PCI CPU module. It is 6U high and occupies one slot. Contact with
the backplane is via two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP
slots onto which mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one
internal PCI bus for internal resources and the PMC/PC-MIP slots and external PCI
accesses through the backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a
flash file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup
of the real time clock.
No forced cooling is used on this standard module because of the low power
dissipation.
Hardware
849
19.2.4.3 Block diagram
en04000473.vsd
Logic
Compact
Flash
North
bridge
CPU
Memory
PC-MIP
PMC
connector
U
B
M

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PCI-PCI-
bridge
IEC04000473 V1 EN
Figure 435: Numeric processing module block diagram
19.2.5 Power supply module (PSM)
The power supply module is used to provide the correct internal voltages and full
isolation between the terminal and the battery system. An internal fail alarm output
is available.
19.2.5.2 Design
There are two types of the power supply module. They are designed for different
DC input voltage ranges see table 583. The power supply module contains a built-
Hardware
850
in, self-regulated DC/DC converter that provides full isolation between the
terminal and the external battery system.
Block diagram
99000516.vsd
B
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Power
supply
Filter
Supervision
IEC99000516 V1 EN
Figure 436: PSM Block diagram.
Table 583: PSM - Power supply module
Quantity Rated value Nominal range
Auxiliary dc voltage, EL (input) EL = (24 - 60) V
EL = (90 - 250) V
EL 20%
EL 20%
Power consumption 50 W typically -
Auxiliary DC power in-rush < 5 A during 0.1 s -
19.2.6 Local human-machine interface (Local HMI)
Refer to section "Local HMI" for information.
19.2.7 Transformer input module (TRM)
Hardware
851
The transformer input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers. The
module has twelve inputs in different combinations of currents and voltage inputs.
Alternative connectors of Ring lug or Compression type can be ordered.
19.2.7.2 Design
The transformer module has 12 input transformers. There are several versions of
the module, each with a different combination of voltage and current input
transformers.
Basic versions:
6 current channels and 6 voltage channels
12 current channels
6 current channels
The rated values of the current inputs are selected at order.
The TRM is connected to the ADM and NUM via the UBM.
For configuration of the input and output signals, refer to section "Signal matrix
for analog inputs SMAI".
Table 584: TRM - Energizing quantities, rated values and limits for protection transformer
modules
Current I
r
= 1 or 5 A (0.2-40) I
r
Operative range (0-100) x I
r

Permissive overload 4 I
r
cont.
100 I
r
for 1 s
*)

Burden < 150 mVA at I
r
= 5 A
< 20 mVA at I
r
= 1 A

Ac voltage U
r
= 110 V 0.5288 V
Operative range (0340) V
Permissive overload 420 V cont.
450 V 10 s

Burden < 20 mVA at 110 V
Frequency f
r
= 50/60 Hz 5%
*)
max. 350 A for 1 s when COMBITEST test switch is included.
Hardware
852
19.2.8 Analog digital conversion module, with time
synchronization (ADM)
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC
slot. The PC-MIP slot is used for PC-MIP cards and the PMC slot for PMC cards
according to table 585. The OEM card should always be mounted on the ADM
board. The UBM connects the ADM to the transformer input module (TRM).
Table 585: PC-MIP cards and PMC cards
PC-MIP cards PMC cards
LDCM SLM
LR-LDCM OEM 1 ch
MR-LDCM OEM 2 ch
X21-LDCM
IRIG-B
RS485
19.2.8.2 Design
The Analog digital conversion module input signals are voltage and current from
the transformer module. Shunts are used to adapt the current signals to the
electronic voltage level. To gain dynamic range for the current inputs, two shunts
with separate A\D channels are used for each input current. In this way a 20 bit
dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system
frequency and 6 kHz at 60 Hz system frequency.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz
and are reported to the numerical module (NUM) with 1 kHz at 50 Hz system
frequency and 1,2 kHz at 60 Hz system frequency.
Hardware
853
PMC
PCI to PCI
PC-MIP
PC-MIP
AD3
AD1
AD2
AD4
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
Channel 9
Channel 10
Channel 11
Channel 12
1.2v
2.5v
level shift
en05000474.vsd
IEC05000474 V1 EN
Figure 437: The ADM layout
Hardware
854
19.2.9 Binary input module (BIM)
The binary input module has 16 optically isolated inputs and is available in two
versions, one standard and one with enhanced pulse counting capabilities on the
inputs to be used with the pulse counter function. The binary inputs are freely
programmable and can be used for the input of logical signals to any of the
functions. They can also be included in the disturbance recording and event-
recording functions. This enables extensive monitoring and evaluation of operation
of the IED and for all associated electrical circuits.
19.2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage
level of the binary input is selected at order.
For configuration of the input signals, refer to section "Signal matrix for binary
inputs SMBI".
A signal discriminator detects and blocks oscillating signals. When blocked, a
hysteresis function may be set to release the input at a chosen frequency, making it
possible to use the input for pulse counting. The blocking frequency may also be set.
Figure 438 shows the operating characteristics of the binary inputs of the four
voltage levels.
The standard version of binary inputs gives an improved capability to withstand
disturbances and should generally be used when pulse counting is not required.
Hardware
855
300
176
144
88
72
38
32
19
18
24/30V 48/60V 110/125V 220/250V
[V]
xx06000391.vsd
IEC06000391 V1 EN
Figure 438: Voltage dependence for the binary inputs
IEC99000517-ABC V1 EN

Guaranteed operation

Operation uncertain

No operation
This binary input module communicates with the Numerical module (NUM) via
the CAN-bus on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact
connected to the input, despite the low, steady-state power consumption, which is
shown in figure 439 and 440.
Hardware
856
en07000104-2.vsd
30 / 50
1
35 70
[ms]
[mA]
IEC07000104 V2 EN
Figure 439: Approximate binary input inrush current for the two standard
versions of BIM.
en07000105.vsd
30
1
3.5 7.0
[ms]
[mA]
IEC07000105 V1 EN
Figure 440: Approximate binary input inrush current for the BIM version with
enhanced pulse counting capabilities.
Hardware
857
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Micro-
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Memory
C
A
N
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
99000503.vsd
IEC99000503 V1 EN
Figure 441: Block diagram of the Binary input module.
Hardware
858
Table 586: BIM - Binary input module
Binary inputs 16 -
DC voltage, RL 24/30 V
48/60 V
110/125 V
220/250 V
RL 20%
RL 20%
RL 20%
RL 20%
Power consumption
24/30 V
48/60 V
110/125 V
220/250 V

max. 0.05 W/input
max. 0.1 W/input
max. 0.2 W/input
max. 0.4 W/input

-
Counter input frequency 10 pulses/s max -
Oscillating signal discriminator Blocking settable 140 Hz
Release settable 130 Hz
Table 587: BIM - Binary input module with enhanced pulse counting capabilities
Binary inputs 16 -
48/60 V
110/125 V
220/250 V
RL 20%
RL 20%
RL 20%
RL 20%
Power consumption
24/30 V
48/60 V
110/125 V
220/250 V

max. 0.05 W/input
max. 0.1 W/input
max. 0.2 W/input
max. 0.4 W/input

-
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 140 Hz
Release settable 130 Hz
19.2.10 Binary output modules (BOM)
The binary output module has 24 independent output relays and is used for trip
output or any signaling purpose.
19.2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each
pair of relays have a common power source input to the contacts, see figure 442.
Hardware
859
This should be considered when connecting the wiring to the connection terminal
on the back of the IED.
The high closing and carrying current capability allows connection directly to
breaker trip and closing coils. If breaking capability is required to manage fail of
the breaker auxiliary contacts normally breaking the trip coil current, a parallel
reinforcement is required.
For configuration of the output signals, refer to section "Signal matrix for binary
outputs SMBO".
xx00000299.vsd
2
1
3
Output module
IEC00000299 V1 EN
Figure 442: Relay pair example
1 Output connection from relay 1
2 Output signal power source connection
3 Output connection from relay 2
Hardware
860
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Micro-
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Memory
C
A
N
R
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Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
R
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R
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R
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99000505.vsd
IEC99000505 V1 EN
Figure 443: Block diagram of the Binary Output Module
Table 588: BOM - Binary output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and Signal relays
Binary outputs 24
Max system voltage 250 V AC, DC
Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity
Continuous
1 s

8 A
10 A
Hardware
861
Function or quantity Trip and Signal relays
Making capacity at inductive load with L/R>10 ms
0.2 s
1.0 s

30 A
10 A
Breaking capacity for AC, cos j>0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
19.2.11 Static binary output module (SOM)
The static binary output module has six fast static outputs and six change over
output relays for use in applications with high speed requirements.
19.2.11.2 Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6
electromechanical relay outputs with change over contacts.
The SOM consists mainly of:
An MCU
A CAN-driver
6 static relays outputs
6 electromechanical relay outputs
A DC/DC converter
Connectors interfacing
CAN-bus to backplane CBM
IO-connectors to binary outputs (2 pcs.)
The following parts are supervised:
Interruption in relay coil
Short circuit of relay coil
Driver failure
Hardware
862
M
C
U
Reset
CAN-
driver
Code-
flash
P
r
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DC/DC
Internal_fail_n
AC_fail_n
RCAN_ID
Sync
Drive &
Read back
Drive &
Read back
Drive &
Read back
en07000115.vsd
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
Drive &
Read back
IEC07000115 V1 EN
Figure 444: Block diagram of the static output module
Hardware
863
Z
IEC09000974 V1 EN
Figure 445: SOM Static output principle
IEC09000975 V1 EN
Figure 446: Connection diagram of the static output module
Table 589: SOM - Static Output Module (reference standard: IEC 61810-2): Static binary outputs
Function of quantity Static binary output trip
Rated voltage 48 - 60 VDC 110 - 250 VDC
Number of outputs 6 6
Impedance open state ~300 k ~810 k
Test voltage across open contact,
1 min
No galvanic separation No galvanic separation
Current carrying capacity:
Hardware
864
Function of quantity Static binary output trip
Continuous 5A 5A
1.0s 10A 10A
Making capacity at capacitive load
with the maximum capacitance of
0.2 F :

0.2s 30A 30A
1.0s 10A 10A
Breaking capacity for DC with L/R
40ms
48V / 1A 110V / 0.4A
60V / 0,75A 125V / 0.35A
220V / 0.2A
250V / 0.15A
Operating time <1ms <1ms
Table 590: SOM - Static Output module data (reference standard: IEC 61810-2):
Electromechanical relay outputs
Function of quantity Trip and signal relays
Max system voltage 250V AC/DC
Number of outputs 6
Test voltage across open contact, 1 min 1000V rms
Current carrying capacity:
Continuous 8A
1.0s 10A
Making capacity at capacitive load with the
maximum capacitance of 0.2 F:

0.2s 30A
1.0s 10A
Breaking capacity for DC with L/R 40ms 48V / 1A
110V / 0.4A
125V / 0,35A
220V / 0,2A
250V / 0.15A
19.2.12 Binary input/output module (IOM)
The binary input/output module is used when only a few input and output channels
are needed. The ten standard output channels are used for trip output or any
signaling purpose. The two high speed signal output channels are used for
applications where short operating time is essential. Eight optically isolated binary
inputs cater for required binary input information.
Hardware
865
19.2.12.2 Design
The binary input/output module is available in two basic versions, one with
unprotected contacts and one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase
the disturbance immunity during normal protection operate times. This is achieved
with a high peak inrush current while having a low steady-state current, see figure
439. Inputs are debounced by software.
Well defined input high and input low voltages ensures normal operation at battery
supply earth faults, see figure 438.
The voltage level of the inputs is selected when ordering.
I/O events are time stamped locally on each module for minimum time deviance
and stored by the event recorder if present.
The binary I/O module, IOM, has eight optically isolated inputs and ten output
relays. One of the outputs has a change-over contact. The nine remaining output
contacts are connected in two groups. One group has five contacts with a common
and the other group has four contacts with a common, to be used as single-output
channels, see figure 447.
The binary I/O module also has two high speed output channels where a reed relay
is connected in parallel to the standard output relay.
For configuration of the input and output signals, refer to sections "Signal matrix
for binary inputs SMBI" and "Signal matrix for binary outputs SMBO".
The making capacity of the reed relays are limited.
Hardware
866
IEC1MRK002801-AA11-UTAN-RAM V1 EN
Figure 447: Binary in/out module (IOM), input contacts named XA corresponds
to rear position X31, X41, and so on, and output contacts named
XB to rear position X32, X42, and so on
The binary input/output module version with MOV protected contacts can for
example be used in applications where breaking high inductive load would cause
excessive wear of the contacts.
The test voltage across open contact is lower for this version of the
binary input/output module.
Hardware
867
xx04000069.vsd
IEC04000069 V1 EN
Figure 448: IOM with MOV protection, relay example
Table 591: IOM - Binary input/output module
Binary inputs 8 -
48/60 V
110/125 V
220/250 V
RL 20%
RL 20%
RL 20%
RL 20%
Power consumption
24/30 V
48/60 V
110/125 V
220/250 V

max. 0.05 W/input
max. 0.1 W/input
max. 0.2 W/input
max. 0.4 W/input
-
Table 592: IOM - Binary input/output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Binary outputs 10 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact,
1 min
1000 V rms 800 V DC
Continuous
1 s

8 A
10 A

8 A
10 A
Making capacity at inductive load
with L/R>10 ms
0.2 s
1.0 s

30 A
10 A

0.4 A
0.4 A
Breaking capacity for AC, cos >
0.4
250 V/8.0 A 250 V/8.0 A
Breaking capacity for DC with L/R
< 40 ms
48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
Maximum capacitive load - 10 nF
Hardware
868
Table 593: IOM with MOV - contact data (reference standard: IEC 60255-23)
Function or quantity Trip and Signal relays Fast signal relays (parallel
reed relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open
contact, 1 min
250 V rms 250 V DC
Continuous
1 s

8 A
10 A

8 A
10 A
Making capacity at inductive
loadwith L/R>10 ms
0.2 s
1.0 s

30 A
10 A

0.4 A
0.4 A
Breaking capacity for AC, cos
j>0.4
250 V/8.0 A 250 V/8.0 A
Breaking capacity for DC with L/
R < 40 ms
48 V/1 A
110 V/0.4 A
220 V/0.2 A
250 V/0.15 A
48 V/1 A
110 V/0.4 A
220 V/0.2 A
250 V/0.15 A
Maximum capacitive load - 10 nF
19.2.13 mA input module (MIM)
The milli-ampere input module is used to interface transducer signals in the 20 to
+20 mA range from for example OLTC position, temperature or pressure
transducers. The module has six independent, galvanically separated channels.
19.2.13.2 Design
The Milliampere Input Module has six independent analog channels with separated
protection, filtering, reference, A/D-conversion and optical isolation for each input
making them galvanically isolated from each other and from the rest of the module.
For configuration of the input signals, refer to section "Signal matrix for mA
inputs SMMI".
The analog inputs measure DC current in the range of +/- 20 mA. The A/D
converter has a digital filter with selectable filter frequency. All inputs are
calibrated separately The filter parameters and the calibration factors are stored in a
non-volatile memory on the module.
The calibration circuitry monitors the module temperature and starts an automatical
calibration procedure if the temperature drift is outside the allowed range. The
module communicates, like the other I/O-modules on the serial CAN-bus.
Hardware
869
B
a
c
k
p
l
a
n
e

c
o
n
n
e
c
t
o
r
P
r
o
c
e
s
s

c
o
n
n
e
c
t
o
r
Micro-
controller
Memory
C
A
N
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
Protection
& filter
A/D Converter
Volt-ref
Opto-
isolation
DC/DC
99000504.vsd
IEC99000504 V1 EN
Figure 449: MIM block diagram
Table 594: MIM - mA input module
Quantity: Rated value: Nominal range:
Input resistance R
in
= 194 Ohm -
Input range 5, 10, 20mA
0-5, 0-10, 0-20, 4-20mA
-
Power consumption
each mA-board
each mA input

2 W
0.1 W
-
Hardware
870
19.2.14 Serial and LON communication module (SLM)
The serial and LON communication module (SLM) is used for SPA, IEC
60870-5-103 and LON communication. The module has two optical
communication ports for plastic/plastic, plastic/glass or glass/glass. One port is
used for serial communication (SPA and IEC 60870-5-103) and one port is
dedicated for LON communication.
19.2.14.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the
NUM module. Three variants of the SLM is available with different combinations
of optical fiber connectors, see figure 450. The plastic fiber connectors are of snap-
in type and the glass fiber connectors are of ST type.
IEC05000760 V1 EN
Figure 450: The SLM variants
A Snap in connector for plastic fiber
B ST connector for glass fiber
1 LON port
2 SPA/IEC 60870-5-103 port
Hardware
871
IEC05000761 V1 EN
Figure 451: The SLM layout overview
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103
Observe that when the SLM is mounted on the NUM module, then
contact 4 above will be in the uppermost and contact 1 in the lowest
position.
Table 595: SLM LON port
Quantity Range or value
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (1000 m typically *)
Plastic fibre: 7 dB (10 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
*) depending on optical budget calculation
Hardware
872
Table 596: SLM SPA/IEC 60870-5-103 port
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (3000ft/1000 m typically *)
Plastic fibre: 7 dB (80ft/25 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
19.2.15 Galvanic RS485 communication module
The Galvanic RS485 communication module (RS485) is used for DNP3.0
communication. The module has one RS485 communication port. The RS485 is a
balanced serial communication that can be used either in 2-wire or 4-wire
connections. A 2-wire connection uses the same signal for RX and TX and is a
multidrop communication with no dedicated Master or slave. This variant requires
however a control of the output. The 4-wire connection has separated signals for
RX and TX multidrop communication with a dedicated Master and the rest are
slaves. No special control signal is needed in this case.
19.2.15.2 Design
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the
NUM module. The internal structure of the RS485 can be seen in figure 452:
P
C
I
-
c
o
n
32 MHz
UART
Tx
Rx
Isolation
Isolation
Isolation
Isolated
DC/DC
RS485
tranceiver
PCI-bus
ID-chip
FPGA
PCI-
Controller
Local bus
to
wishbone
Status
Register
Termination
Control
Register
Info
Register
Soft
ground
Internal
bus
P
C
I
-
c
o
n
2
-
p
o
l
e
c
o
n
n
e
c
t
o
r
W
i
s
h
b
o
n
e

i
n
t
e
r
c
o
n
n
e
c
t

s
w
i
t
c
h
6
-
p
o
l
e
-
c
o
n
n
e
c
t
o
r
IEC06000516 V1 EN
Figure 452: The internal structure of the RS485 card
RS485 connector pinouts
The arrangement for the pins in the RS485 connector (figure 453) are presented in
table 597:
Hardware
873
Table 597: The arrangement for the pins
Pin Name 2-wire Name 4-wire Description
1 RS485+ TX+ Receive/transmit high or transmit high
2 RS485 TX Receive/transmit
3 Term T-Term Termination resistor for transmitter (and receiver
in 2wir case) (connect to TX+)
4 N.A. R-Term Termination resistor for receiver (connect to RX
+)
5 N.A. RX Receive low
6 N.A. RX+ Receive high
Screw
terminal
X3
1
2
1
2
3
4
5
6
Screw
terminal
X1
Backplane
Angle
bracket
RS485
PWB
IEC06000517 V1 EN
Figure 453: RS485 connector
2-wire: Connect pin 1 to pin 6 and pin 2 to pin 5
Termination (2-wire): Connect pin 1 to pin 3
Termination (4-wire): Connect pin 1 to pin 3 and pin 4 to pin 6
Soft ground connector pinouts
A second 2-pole screw connector is used for the connection of IO-ground. It can be
used in two combinations like:
Unconnected: No ground of the IO-part .
Soft grounded: The IO is connected to the GND with an RC net parallel with a
MOV
Hardware
874
Table 598: Galvanic RS485 communication module
Communication speed 240019200 bauds
External connectors RS-485 6-pole connector
Soft ground 2-pole connector
19.2.16 Optical ethernet module (OEM)
The optical fast-ethernet module is used to connect an IED to the communication
buses (like the station bus) that use the IEC 61850-8-1 protocol (OEM rear port A,
B). The process bus use the IEC 61850-9-2LE protocol (OEM rear port C, D). The
module has one or two optical ports with ST connectors.
The Optical Ethernet module (OEM) is used when communication systems
according to IEC6185081 have been implemented.
19.2.16.3 Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine
card on the ADM. The OEM is a 100base Fx module and available as a single
channel or double channel unit.
en04000472.vsd
PCI - PCI Bridge
Ethernet Controller
Ethernet Controller
100Base-FX
Transmitter
PCI - bus Connector
ST fiber optic
connectors
ST fiber optic
connectors
EEPROM
EEPROM
ID chip
IO - bus Connector
100Base-FX
Receiver
100Base-FX
Transmitter
100Base-FX
Receiver
IEC04000472 V1 EN
Figure 454: OEM block diagram.
Hardware
875
P
C
I

b
u
s
I
O

b
u
s
PCI to PCI
bridge
Ethernet cont.
Ethernet cont.
ID chip
25MHz oscillator
25MHz oscillator
LED
LED
Receiver
Transmitter
Receiver
Transmitter
en05000472.vsd
IEC05000472 V1 EN
Figure 455: OEM layout, standard PMC format 2 channels
Table 599: OEM - Optical ethernet module
Quantity Rated value
Number of channels 1 or 2 (port A, B for IEC61850-8-1 and port C, D
for IEC 61850-9-2LE)
Standard IEEE 802.3u 100BASE-FX
Type of fiber 62.5/125 mm multimode fibre
Wave length 1300 nm
Optical connector Type ST
Communication speed Fast Ethernet 100 MB
19.2.17 Line data communication module (LDCM)
The line data communication module (LDCM) is used for communication between
the IEDs situated at distances <110 km or from the IED to optical to electrical
converter with G.703 interface located on a distances <3 km away. The LDCM
module sends and rereceives data, to and from another LDCM module. The IEEE/
ANSI standard format is used.
The line data communication module is used for binary signal transfer. The module
has one optical port with ST connectors see figure 456.
Line data communication module LDCM
Each module has one optical port, one for each remote end to which the IED
communicates.
Hardware
876
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm
single mode) and Short range (850 nm multi mode) are available.
Class 1 laser product. Take adequate measures to protect the eyes.
Never look into the laser beam.
19.2.17.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be
mounted on:
the ADM
the NUM
ST
1
6
.
0
0
0
M
H
z
ID
ST
3
2
,
7
6
8
M
H
z
I
O
-
c
o
n
n
e
c
t
o
r
en07000087.vsd
IEC07000087 V1 EN
Figure 456: The SR-LDCM layout. PCMIP type II single width format with two
PCI connectors and one I/O ST type connector
Hardware
877
3
2
X1
C
PCI9054
TQ176
FPGA
256 FBGA
ADN
2841
DS
3904
M
A
X
3
6
4
5
2.5V
ID
DS
3904
en06000393.vsd
IEC06000393 V1 EN
Figure 457: The MR-LDCM and LR-LDCM layout. PCMIP type II single width
format with two PCI connectors and one I/O FC/PC type connector
Table 600: Line data communication module
Characteristic Range or value
Type of LDCM Short range (SR) Medium range (MR) Long range (LR)
Type of fibre Graded-index
multimode
62.5/125 m or
50/125 m
Singlemode 9/125
m
Singlemode 9/125 m
Wave length 850 nm 1310 nm 1550 nm
Optical budget
Graded-index
multimode 62.5/125
mm,

Graded-index
multimode 50/125
mm

13 dB (typical
distance about 3
km *)
9 dB (typical
distance about 2
km *)
22 dB (typical
distance 80 km *)
26 dB (typical distance 110 km *)
Optical connector Type ST Type FC/PC Type FC/PC
Protocol C37.94 C37.94
implementation **)
C37.94 implementation **)
Data transmission Synchronous Synchronous Synchronous
Transmission rate /
Data rate
2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s
Clock source Internal or
derived from
received signal
Internal or derived
from received signal
Internal or derived from received
signal
**) C37.94 originally defined just for multimode; using same header, configuration and data format as
C37.94
Hardware
878
19.2.18 Galvanic X.21 line data communication (X.21-LDCM)
The galvanic X.21 line data communication module is used for connection to
telecommunication equipment, for example leased telephone lines. The module
supports 64 kbit/s data communication between IEDs.
Examples of applications:
Line differential protection
Binary signal transfer
19.2.18.2 Design
The galvanic X.21 line data communication module uses a ABB specific PC*MIP
Type II format.
C
en07000196.vsd
IEC07000196 V1 EN
Figure 458: Overview of the X.21 LDCM module
Hardware
879
1
2 3
4
en07000239.wmf
1 8
9 15
IEC07000239 V1 EN
Figure 459: The X.21 LDCM module external connectors
1. Ground selection connector for IO, screw terminals, 2-pole
2. Ground pin
3. Soft ground pin, see figure 460
4. X.21 Micro D-sub 15 pole male connector according to the V11 (X:27)
balanced version
I/O
100kW
100nF
Soft ground
en07000242.vsd
IEC07000242 V1 EN
Figure 460: Schematic view of soft ground
Grounding
At special problems with ground loops, the soft ground connection for the IO-
ground can be tested.
Three different kinds of grounding principles can be set (used for fault tracing):
1. Direct ground - The normal grounding is direct ground, connect terminal 2
direct to the chassi.
2. No ground - Leave the connector without any connection.
3. Soft ground - Connect soft ground pin (3), see figure 459
Hardware
880
X.21 connector
Table 601: Pinout for the X.21 communication connector
Pin number Signal
1 Shield (ground)
2 TXD A
3 Control A
4 RXD A
6 Signal timing A
8 Ground
9 TXD B
10 Control B
11 RXD B
13 Signal timing B
5,7,12,14,15 Not used
The data format is HDLC. The speed for the transmission of the messages used is
64 kbit/s.
A maximum of 100 meter of cable is allowed to ensure the quality of the data
(deviation from X.21 standard cable length).
Synchronization
The X.21 LDCM works like a DTE (Data Terminal Equipment) and is normally
expecting synchronization from the DCE (Data Circuit Equipment). The
transmission is normally synchronized to the Signal Element Timing signal when a
device is a DTE. When the signal is high it will read the data at the receiver and
when the signal is low it will write data to the transmitter. This behaviour can be
inverted in the control register.
Normally an external multiplexer is used and it should act like the master.
When two X.21 LDCM is directly communicating with each other one must be set
as a master generating the synchronization for the other (the slave). The DTE
Signal Element Timing is created from the internal 64 kHz clock.
The Byte Timing signal is not used in ABB devices.
Hardware
881
Table 602: Galvanic X.21 line data communication module (X.21-LDCM)
Connector, X.21 Micro D-sub, 15-pole male, 1.27 mm (0.050") pitch
Connector, ground selection 2 pole screw terminal
Standard CCITT X21
Communication speed 64 kbit/s
Insulation 1 kV
Maximum cable length 100 m
19.2.19 GPS time synchronization module (GSM)
This module includes the GPS receiver used for time synchronization. The GPS
has one SMA contact for connection to an antenna.
19.2.19.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot
closest to the NUM shall always be used.
The GSM consists of
CAN carrier module (CCM)
GPS clock module (GCM)
GPS receiver unit
The CCM is a carrier board for the GCM mezzanine PMC card and GPS unit, see
figure 462. There is a cable between the external antenna input on the back of the
GCM and the GPS-receiver. This is a galvanic connection vulnerable to electro-
magnetic interference. The connector is shielded and directly attached to a
grounded plate to reduce the risk. The second cable is a flat cable that connects the
GPS and the GCM. It is used for communication between the GCM and the GPS-
receiver. All communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide
1s accuracy at sampling level.
Hardware
882
en05000675.vsd
GPS clock
module
GPS
receiver
PMC
GPS antenna
B
a
c
k
p
l
a
n
e

C
A
N
c
o
n
n
e
c
t
o
r
CAN
controller
CAN
CMPPS
IEC05000675 V1 EN
Figure 461: GSM block diagram
Hardware
883
1
4
2
3
en07000086.vsd
IEC07000086 V1 EN
Figure 462: A CCM with the GCM and GPS mounted with cables
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector
Table 603: GPS time synchronization module (GSM)
Receiver 1s relative UTC
Time to reliable time reference with antenna in new
position or after power loss longer than 1 month
<30 minutes
Time to reliable time reference after a power loss
longer than 48 hours
<15 minutes
Time to reliable time reference after a power loss
shorter than 48 hours
<5 minutes
Hardware
884
19.2.20 GPS antenna
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna
with applicable cable must be used.
19.2.20.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or
on an antenna mast. See figure 463
xx04000155.vsd
1
2
4
3
5
6
7
IEC04000155 V1 EN
Figure 463: Antenna with console
where:
1 GPS antenna
2 TNC connector
3 Console, 78x150 mm
4 Mounting holes 5.5 mm
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position

Always position the antenna and its console so that a continuous clear line-of-sight
visibility to all directions is obtained, preferably more than 75%. A minimum of
50% clear line-of-sight visibility is required for un-interrupted operation.
Hardware
885
A
99001046.vsd
IEC99001046 V1 EN
Figure 464: Antenna line-of-sight
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a
male SMA connector in the receiver end to connect the antenna to GSM. Choose
cable type and length so that the total attenuation is max. 26 dB at 1.6 GHz.
Make sure that the antenna cable is not charged when connected to
the antenna or to the receiver. Short-circuit the end of the antenna
cable with some metal device, when first connected to the antenna.
When the antenna is connected to the cable, connect the cable to the
receiver. REx670 must be switched off when the antenna cable is
connected.
Table 604: GPS Antenna and cable
Function Value
Max antenna cable attenuation 26 db @ 1.6 GHz
Antenna cable impedance 50 ohm
Lightning protection Must be provided externally
Antenna cable connector SMA in receiver end
TNC in antenna end
Hardware
886
19.2.21 IRIG-B time synchronization module IRIG-B
The IRIG-B time synchronizing module is used for accurate time synchronizing of
the IED from a station clock.
The Pulse Per Second (PPS) input shall be used for synchronizing when IEC
61850-9-2LE is used.
Electrical (BNC) and optical connection (ST) for 0XX and 12X IRIG-B support.
19.2.21.2 Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle
both a pulse-width modulated signal (also called unmodulated) and an amplitude
modulated signal (also called sine wave modulated). The other is an optical input
type ST for PPS to synchronize the time between several protections.
TSU
PCI-Controller
ID-chip
MPPS
PPS
FPGA
PCI-bus
P
C
I
-
c
o
n
P
C
I
-
c
o
n
I
O
-
c
o
n
32 MHz
Registers
IRIG-
Decoder
Isolated
DC/DC
5 to +- 12V
S
T
-
c
o
n
n
e
c
t
o
r
Isolated
receiver
4 mm barrier
ZXING
IRIG_INPUT
OPTO_INPUT
Zero-cross
detector
Amplitude
modulator
B
N
C
-
c
o
n
n
e
c
t
o
r
CMPPS
Capture1
Capture2
en06000303.vsd
IEC06000303 V1 EN
Figure 465: IRIG-B block diagram
Hardware
887
3
2
C
ST
A
1
Y2
D
C
/
/
D
C
D
C
/
/
D
C
O
O
C
T
A
1
C
C
en06000304.vsd
IEC06000304 V1 EN
Figure 466: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm
multimode fibre optic signal input and lower left BNC connector for
IRIG-B signal input
Table 605: IRIG-B
Quantity Rated value
Number of channels IRIG-B 1
Number of channels PPS 1
Electrical connector IRIG-B BNC
Optical connector PPS and IRIG-B Type ST
Type of fibre 62.5/125 m multimode fibre
Hardware
888
19.3 Dimensions
19.3.1 Case without rear cover
xx08000164.vsd
C
B
D
E
A
IEC08000164 V1 EN
Figure 467: Case without rear cover
Hardware
889
xx08000166.vsd
J
G
F
K
H
IEC08000166 V1 EN
Figure 468: Case without rear cover with 19 rack mounting kit
Case size (mm) A B C D E F G H J K
6U, 1/2 x 19 265.9 223.7 201.1 252.9 205.7 190.5 203.7 - 187.6 -
6U, 3/4 x 19 265.9 336.0 201.1 252.9 318.0 190.5 316.0 - 187.6 -
6U, 1/1 x 19 265.9 448.3 201.1 252.9 430.3 190.5 428.3 465.1 187.6 482.6
The H and K dimensions are defined by the 19 rack mounting kit
Hardware
890
19.3.2 Case with rear cover
xx08000163.vsd
C
B
D
E
A
IEC08000163 V1 EN
Figure 469: Case with rear cover
Hardware
891
xx08000165.vsd
J
G
F
K
H
IEC08000165 V1 EN
Figure 470: Case with rear cover and 19 rack mounting kit
xx05000503.vsd
IEC05000503 V1 EN
Figure 471: Rear cover case with details
Case size (mm) A B C D E F G H J K
6U, 1/2 x 19 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19 rack mounting kit.
Hardware
892
19.3.3 Flush mounting dimensions
C
A
B
E
D
xx08000162.vsd
IEC08000162 V1 EN
Figure 472: Flush mounting

Case size
Tolerance
Cut-out dimensions (mm)
A
+/-1
B
+/-1
C D
6U, 1/2 x 19" 210.1 254.3 4.0-10.0 12.5
6U, 3/4 x 19" 322.4 254.3 4.0-10.0 12.5
6U, 1/1 x 19" 434.7 254.3 4.0-10.0 12.5
E = 188.6 mm without rear protection cover, 229.6 mm with rear protection cover
Hardware
893
19.3.4 Side-by-side flush mounting dimensions
xx06000182.vsd
IEC06000182 V1 EN
Figure 473: A 1/2 x 19 size 670 series IED side-by-side with RHGS6.
xx05000505.vsd
B
A
C
G
D
E
F
IEC05000505 V1 EN
Figure 474: Panel-cut out dimensions for side-by-side flush mounting
Hardware
894
19.3.5 Wall mounting dimensions
en04000471.vsd
E
A
B
C
D
IEC04000471 V1 EN
Figure 475: Wall mounting
Case size (mm) A B C D E
6U, 1/2 x 19 292.0 267.1 272.8 390.0 243.0
6U, 3/4 x 19 404.3 379.4 272.8 390.0 243.0
6U, 1/1 x 19 516.0 491.1 272.8 390.0 243.0
19.3.6 External resistor unit for high impedance differential
protection
WARNING! - USE EXTREME CAUTION!Dangerously high
voltages might be present on this equipment, especially on the plate
with resistors. Do any maintenance ONLY if the primary object
protected with this equipment is de-energized. If required by
national low/standard enclose the plate with resistors with a
protective cover or in a separate box!
Hardware
895
xx06000232.eps
Dimension
mm [inches]
[18.98]
[18.31] [0.33]
[
6
.
9
7
]
[
4
.
0
2
]
[
1
.
4
8
]
[0.79] [7.68]
IEC06000232 V1 EN
Figure 476: Dimension drawing of a one phase impedance resistor unit
en06000234.eps
[inches]
[18.98]
[18.31] [0.33]
[
7
.
5
0
]
[
1
0
.
4
7
]
[7.68] [0.79]
[
1
.
5
0
]
IEC06000234 V1 EN
Figure 477: Dimension drawing of a three phase high impedance resistor unit
19.4 Mounting alternatives
19.4.1 Flush mounting
19.4.1.1 Overview
The flush mounting kit are utilized for case sizes:
1/2 x 19
3/4 x 19
1/1 x 19
1/4 x 19 (RHGS6 6U)
Hardware
896
Only a single case can be mounted in each cut-out on the cubicle panel, for class
IP54 protection.
Flush mounting cannot be used for side-by-side mounted IEDs
when IP54 class must be fulfilled. Only IP20 class can be obtained
when mounting two cases side-by-side in one (1) cut-out.
To obtain IP54 class protection, an additional factory mounted
sealing must be ordered when ordering the IED.
Hardware
897
19.4.1.2 Mounting procedure for flush mounting

1
3
5
xx08000161.vsd
4
2
6
IEC08000161 V1 EN
Figure 478: Flush mounting details.
PosNo Description Quantity Type
1 Sealing strip, used to obtain IP54 class. The sealing strip is factory
mounted between the case and front plate.
- -
2 Fastener 4 -
3 Groove - -
4 Screw, self tapping 4 2.9x9.5 mm
5 Joining point of sealing strip - -
6 Panel - -
Hardware
898
19.4.2 19 panel rack mounting
19.4.2.1 Overview
All IED sizes can be mounted in a standard 19 cubicle rack by using the for each
size suited mounting kit which consists of two mounting angles and fastening
screws for the angles.
The mounting angles are reversible which enables mounting of IED size 1/2 x 19
or 3/4 x 19 either to the left or right side of the cubicle.
Please note that the separately ordered rack mounting kit for side-by-
side mounted IEDs, or IEDs together with RHGS cases, is to be
selected so that the total size equals 19.
When mounting the mounting angles, be sure to use screws that
follows the recommended dimensions. Using screws with other
dimensions than the original may damage the PCBs inside the IED.
Hardware
899
19.4.2.2 Mounting procedure for 19 panel rack mounting
xx08000160.vsd
1a
2
1b
IEC08000160 V1 EN
Figure 479: 19 panel rack mounting details
Pos Description Quantity Type
1a, 1b Mounting angels, which can be mounted, either to
the left or right side of the case.
2 -
2 Screw 8 M4x6
19.4.3 Wall mounting
19.4.3.1 Overview
All case sizes, 1/2 x 19, 3/4 x 19 and 1/1 x 19, can be wall mounted. It is also
possible to mount the IED on a panel or in a cubicle.
Hardware
900
When mounting the side plates, be sure to use screws that follows
the recommended dimensions. Using screws with other dimensions
than the original may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall
mounting is therefore not recommended for communication
modules with fiber connection; Serial SPA/IEC 60870-5-103 and
LON communication module (SLM), Optical Ethernet module
(OEM) and Line data communication module (LDCM).
19.4.3.2 Mounting procedure for wall mounting
xx04000453.vs d
1
2
3
4
5
6
DOCUMENT127716-IMG2265 V1 EN
Figure 480: Wall mounting details.
1 Bushing 4 -
2 Screw 8 M4x10
3 Screw 4 M6x12 or
corresponding
Hardware
901
4 Mounting bar 2 -
5 Screw 6 M5x8
6 Side plate 2 -
19.4.3.3 How to reach the rear side of the IED
The IED can be equipped with a rear protection cover, which is recommended to
use with this type of mounting. See figure 481.
To reach the rear side of the IED, a free space of 80 mmis required on the unhinged
side.
80 mm
View from above
1
en06000135.vsd
3
2
IEC06000135 V1 EN
Figure 481: How to reach the connectors on the rear side of the IED.
PosNo Description Type
1 Screw M4x10
2 Screw M5x8
3 Rear protection cover -
19.4.4 Side-by-side 19 rack mounting
19.4.4.1 Overview
IED case sizes, 1/2 x 19 or 3/4 x 19 and RHGS cases, can be mounted side-by-
side up to a maximum size of 19. For side-by-side rack mounting, the side-by-side
mounting kit together with the 19 rack panel mounting kit must be used. The
mounting kit has to be ordered separately.
Hardware
902
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws
with other dimensions than the original may damage the PCBs
inside the IED.
19.4.4.2 Mounting procedure for side-by-side rack mounting
xx04000456.vsd
3
4
1
2
IEC04000456 V1 EN
Figure 482: Side-by-side rack mounting details.
1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
19.4.4.3 IED in the 670 series mounted with a RHGS6 case
An 1/2 x 19 or 3/4 x 19 size IED can be mounted with a RHGS (6 or 12
depending on IED size) case. The RHGS case can be used for mounting a test
switch of type RTXP 24. It also has enough space for a terminal base of RX 2 type
for mounting of, for example, a DC-switch or two trip IEDs.
Hardware
903
xx06000180.vsd
8 8 8
7
5
6
3
4
2
7
5
6
7
5
6
3
4
2
3
4
2
1
1
1
2
1 1
1
8
7
5
6
3
4
2
2
2
1
IEC06000180 V1 EN
Figure 483: IED in the 670 series (1/2 x 19) mounted with a RHGS6 case
containing a test switch module equipped with only a test switch
and a RX2 terminal base
19.4.5 Side-by-side flush mounting
19.4.5.1 Overview
It is not recommended to flush mount side by side mounted cases if IP54 is
required. If your application demands side-by-side flush mounting, the side-by-side
mounting details kit and the 19 panel rack mounting kit must be used. The
mounting kit has to be ordered separately. The maximum size of the panel cut out
is 19.
With side-by-side flush mounting installation, only IP class 20 is
obtained. To reach IP class 54, it is recommended to mount the
IEDs separately. For cut out dimensions of separately mounted
IEDs, see section "Flush mounting".
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws
with other dimensions than the original may damage the PCBs
inside the IED.
Hardware
904
Please contact factory for special add on plates for mounting FT
switches on the side (for 1/2 19" case) or bottom of the relay.
19.4.5.2 Mounting procedure for side-by-side flush mounting
xx06000181.vsd
1
2
3
4
IEC06000181 V1 EN
Figure 484: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x
19 IED).
1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
19.5 Technical data
19.5.1 Enclosure
Table 606: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
Hardware
905
Table 607: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)
Rear, sides, top and
bottom
IP20
Table 608: Weight
Case size Weight
6U, 1/2 x 19 10 kg
6U, 3/4 x 19 15 kg
6U, 1/1 x 19 18 kg
19.5.2 Connection system
Table 609: CT and VT circuit connectors
Connector type Rated voltage and current Maximum conductor area
Screw compression type 250 V AC, 20 A 4 mm
2
(AWG12)
2 x 2.5 mm
2
(2 x AWG14)
Terminal blocks suitable for
ring lug terminals
250 V AC, 20 A 4 mm
2
(AWG12)
Table 610: Binary I/O connection system
Connector type Rated voltage Maximum conductor area
Screw compression type 250 V AC 2.5 mm
2
2 1 mm
2
Terminal blocks suitable for
ring lug terminals
300 V AC 3 mm
2
Because of limitations of space, when ring lug terminal is ordered
for Binary I/O connections, one blank slot is necessary between two
adjacent IO cards. Please refer to the ordering particulars for details.
19.5.3 Influencing factors
Table 611: Temperature and humidity influence
Parameter Reference value Nominal range Influence
Ambient temperature,
operate value
+20 C -10 C to +55 C 0.02% /C
Relative humidity
Operative range
10%-90%
0%-95%
10%-90% -
Storage temperature -40 C to +70 C - -
Hardware
906
Table 612: Auxiliary DC supply voltage influence on functionality during operation
Dependence on Reference value Within nominal range Influence
Ripple, in DC auxiliary voltage
Operative range
max. 2%
Full wave rectified
12% of EL 0.01% /%
Auxiliary voltage dependence, operate
value
20% of EL 0.01% /%
Interrupted auxiliary DC voltage

24-60 V DC 20%
90-250 V DC 20%

Interruption
interval
050 ms

No restart
0 s Correct
behaviour at
power down
Restart time <180 s
Table 613: Frequency influence (reference standard: IEC 602556)
Dependence on Within nominal range Influence
Frequency dependence,
operate value
f
r
2.5 Hz for 50 Hz
f
r
3.0 Hz for 60 Hz
1.0% / Hz
Harmonic frequency
dependence (20%
content)
2nd, 3rd and 5th harmonic of f
r
1.0%
Harmonic frequency
dependence for distance
protection (10% content)
r
6.0%
Harmonic frequency
dependence for high
impedance differential
protection (10% content)
r
5.0%
19.5.4 Type tests according to standard
Table 614: Electromagnetic compatibility
Test Type test values Reference standards
1 MHz burst disturbance 2.5 kV IEC 60255-22-1, Class III
Ring wave immunity test 2-4 kV IEC 61000-4-12, Class III
Surge withstand capability
test
2.5 kV, oscillatory
4.0 kV, fast transient
IEEE/ANSI C37.90.1
Electrostatic discharge
Direct application
Indirect application
15 kV air discharge
8 kV contact discharge
IEC 60255-22-2, Class IV

IEC 61000-4-2, Class IV
Electrostatic discharge
Direct application
Indirect application
15 kV air discharge
IEEE/ANSI C37.90.1
Fast transient disturbance 4 kV IEC 60255-22-4, Class A
Hardware
907
Surge immunity test 1-2 kV, 1.2/50 ms
high energy
IEC 60255-22-5
Power frequency immunity
test
150-300 V,
50 Hz
IEC 60255-22-7, Class A
Conducted common mode
immunity test
15 Hz-150 kHz IEC 61000-4-16, Class IV
Power frequency magnetic
field test
1000 A/m, 3 s IEC 61000-4-8, Class V
Damped oscillatory magnetic
field test
100 A/m IEC 61000-4-10, Class V
Radiated electromagnetic
field disturbance
20 V/m, 80-1000 MHz IEC 60255-22-3
field disturbance
20 V/m, 80-2500 MHz EN 61000-4-3
field disturbance
35 V/m
26-1000 MHz
IEEE/ANSI C37.90.2
Conducted electromagnetic
field disturbance
10 V, 0.15-80 MHz IEC 60255-22-6
Radiated emission 30-1000 MHz IEC 60255-25
Conducted emission 0.15-30 MHz IEC 60255-25
Table 615: Insulation
Test Type test values Reference standard
Dielectric test 2.0 kV AC, 1 min. IEC 60255-5
Impulse voltage test 5 kV, 1.2/50 ms, 0.5 J
Insulation resistance >100 MW at 500 VDC
Table 616: Environmental tests
Test Type test value Reference standard
Cold test Test Ad for 16 h at -25C IEC 60068-2-1
Storage test Test Ad for 16 h at -40C IEC 60068-2-1
Dry heat test Test Bd for 16 h at +70C IEC 60068-2-2
Damp heat test, steady state Test Ca for 4 days at +40 C
and humidity 93%
IEC 60068-2-78
Damp heat test, cyclic Test Db for 6 cycles at +25
to +55 C and humidity 93 to
95% (1 cycle = 24 hours)
IEC 60068-2-30
Table 617: CE compliance
Test According to
Immunity EN 50263
Emissivity EN 50263
Low voltage directive EN 50178
Hardware
908
Table 618: Mechanical tests
Vibration response test Class II IEC 60255-21-1
Vibration endurance test Class I IEC 60255-21-1
Shock response test Class II IEC 60255-21-2
Shock withstand test Class I IEC 60255-21-2
Bump test Class I IEC 60255-21-2
Seismic test Class II IEC 60255-21-3
Hardware
909
910
Section 20 Labels
About this chapter
This chapter includes descriptions of the different labels and where to find them on
the IED.
20.1 Different labels
1
2
3
4
5
6
5
6
7
xx06000574.eps
IEC06000574 V1 EN
Labels
911
IEC06000577-CUSTOMER-SPECIFIC V1 EN

1

Product type, description and serial number
2 Order number, dc supply voltage and rated
frequency
3 Optional, customer specific information
4 Manufacturer
5 Transformer input module, rated currents
and voltages
6 Transformer designations
IEC06000576-POS-NO V1 EN

7

Ordering and serial number
Labels
912
1
2
3
4
en06000573.eps
IEC06000573 V1 EN
1 Warning label
2 Caution label
3 Class 1 laser product label

IEC06000575 V1 EN

4 Warning label
Labels
913
914
Section 21 Connection diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical
connector designations. It is a necessary guide when making electrical and optical
connections to the IED.
Connection diagrams
915
IEC08000470 V1 EN
Connection diagrams
916
IEC08000471 V1 EN
Connection diagrams
917
IEC08000472 V1 EN
Connection diagrams
918
IEC08000473 V1 EN
Connection diagrams
919
IEC08000474 V1 EN
Connection diagrams
920
IEC08000475 V1 EN
Connection diagrams
921
IEC08000476 V1 EN
Connection diagrams
922
IEC08000477 V1 EN
Connection diagrams
923
IEC08000478 V1 EN
Connection diagrams
924
IEC08000479 V1 EN
Connection diagrams
925
IEC08000480 V1 EN
Connection diagrams
926
IEC08000481 V1 EN
Connection diagrams
927
IEC08000482 V1 EN
Connection diagrams
928
IEC08000483 V1 EN
Connection diagrams
929
IEC08000484 V1 EN
Connection diagrams
930
Section 22 Inverse time characteristics
About this chapter
This chapter describes current and voltage dependant time functionality. Both
ANSI and IEC Inverse time curves and tables are included.
22.1 Application
In order to assure time selectivity between different overcurrent protections at
different points in the network different time delays for the different protections are
normally used. The simplest way to do this is to use definite time-lag. In more
sophisticated applications current dependent time characteristics are used. Both
alternatives are shown in a simple application with three overcurrent protections
operating in series.
xx05000129.vsd
I> I> I>
IEC05000129 V1 EN
Figure 485: Three overcurrent protections operating in series
en05000130.vsd
Time
Fault point
position
Stage 1
Stage 2
Stage 3
Stage 1
Stage 2
Stage 1
IEC05000130 V1 EN
Figure 486: Definite time overcurrent characteristics
Inverse time characteristics
931
en05000131.vsd
Time
Fault point
position
IEC05000131 V1 EN
Figure 487: Inverse time overcurrent characteristics with inst. function
The inverse time characteristic makes it possible to minimize the fault clearance
time and still assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the
operation time of the protections. This required time margin is dependent of
following factors, in a simple case with two protections in series:
Difference between pickup time of the protections to be co-ordinated
Opening time of the breaker closest to the studied fault
Reset times of the protections
Margin dependent of the time delay inaccuracy of the protections
Assume we have the following network case.
932
en05000132.vsd
I> I>
A1 B1
Feeder
Time axis
t=0 t=t
1
t=t
2
t=t
3
IEC05000132 V1 EN
Figure 488: Selectivity steps for a fault on feeder B1
where:
t=0 is The fault occurs
t=t
1
is Protection B1 trips
t=t
2
is Breaker at B1 opens
t=t
3
is Protection A1 resets
In the case protection B1 shall operate without any intentional delay
(instantaneous). When the fault occurs the protections start to detect the fault
current. After the time t
1
the protection B1 send a trip signal to the circuit breaker.
The protection A1 starts its delay timer at the same time, with some deviation in
time due to differences between the two protections. There is a possibility that A1
will start before the trip is sent to the B1 circuit breaker. At the time t
2
the circuit
breaker B1 has opened its primary contacts and thus the fault current is interrupted.
The breaker time (t2 - t1) can differ between different faults. The maximum
opening time can be given from manuals and test protocols. Still at t
2
the timer of
protection A1 is active. At time t
3
the protection A1 is reset, that is the timer is stopped.
In most applications it is required that the times shall reset as fast as possible when
the current fed to the protection drops below the set current level, the reset time
shall be minimized. In some applications it is however beneficial to have some type
of delayed reset time of the overcurrent function. This can be the case in the
following applications:
933
If there is a risk of intermittent faults. If the current IED, close to the faults,
starts and resets there is a risk of unselective trip from other protections in the
system.
Delayed resetting could give accelerated fault clearance in case of automatic
reclosing to a permanent fault.
Overcurrent protection functions are sometimes used as release criterion for
other protection functions. It can often be valuable to have a reset delay to
assure the release function.
22.2 Principle of operation
22.2.1 Mode of operation
The function can operate in a definite time-lag mode or in a current definite inverse
time mode. For the inverse time characteristic both ANSI and IEC based standard
curves are available. Also programmable curve types are supported via the
component inputs: p, A, B, C pr, tr, and cr.
Different characteristics for reset delay can also be chosen.
If current in any phase exceeds the set start current value (here internal signal
startValue), a timer, according to the selected operating mode, is started. The
component always uses the maximum of the three phase current values as the
current level used in timing calculations.
In case of definite time-lag mode the timer will run constantly until the time is
reached or until the current drops below the reset value (start value minus the
hysteresis) and the reset time has elapsed.
For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are
chosen.
The general expression for inverse time curves is according to equation 158.
[ ] = +
-
>

p
A
t s B k
i
C
in
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
934
For inverse time characteristics a time will be initiated when the current reaches the
set start level. From the general expression of the characteristic the following can
be seen:
( ) - - =
>

p
op
i
t B k C A k
in
where:
t
op
is the operating time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils
according to equation 160, in addition to the constant time delay:
0
-
>

p
t
i
C dt A k
in
For the numerical protection the sum below must fulfil the equation for trip.
1
( )
=
D -
>

p
n
j
i j
t C A k
in
where:
j = 1 is the first protection execution cycle when a fault has been
detected, that is, when
1
i
in
>
>
EQUATION1193 V1 EN
Dt is the time interval between two consecutive executions of the
protection algorithm,
n is the number of the execution of the algorithm when the trip
time equation is fulfilled, that is, when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse time characteristic is selectable. Both the
IEC and ANSI/IEEE standardized inverse time characteristics are supported.
For the IEC curves there is also a setting of the minimum time-lag of operation, see
figure 489.
935
tMin
Current
Operate
time
IMin
IEC05000133 V2 EN
Figure 489: Minimum time-lag operation for the IEC curves
In order to fully comply with IEC curves definition setting parameter tMin shall be
set to the value which is equal to the operating time of the selected IEC inverse
time curve for measured current of twenty times the set current pickup value. Note
that the operating time value is dependent on the selected setting value for time
multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two
additional inverse curves available; the RI curve and the RD curve.
The RI inverse time curve emulates the characteristic of the electromechanical
ASEA relay RI. The curve is described by equation 163:
[ ]
0.339 0.235
=
>
-

k
t s
in
i
where:
in> is the set start current for step n
k is set time multiplier for step n
i is the measured current
936
The RD inverse curve gives a logarithmic delay, as used in the Combiflex
protection RXIDG. The curve enables a high degree of selectivity required for
sensitive residual earth-fault current protection, with ability to detect high-resistive
earth faults. The curve is described by equation 164:
[ ] 5.8 1.35 ln = -
>

i
t s
k in
where:
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse
time curve according to the general equation 165.
[ ] = +
-
>

p
A
t s B k
i
C
in
Also the reset time of the delayed function can be controlled. There is the
possibility to choose between three different reset time-lags.
Instantaneous Reset
IEC Reset
ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current
drops below the set start current level minus the hysteresis.
If IEC reset is chosen the timer will be reset after a set constant time when the
current drops below the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after
fault clearance (when the current drops below the start current level minus the
hysteresis). The timer will reset according to equation 166.
937
[ ]
2
1
r
t
t s k
i
in
=
-
>

where:
The set value t
r
is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the
choice of time delay characteristic.
For the definite time delay characteristics the possible reset time settings are
instantaneous and IEC constant time reset.
For ANSI inverse time delay characteristics all three types of reset time
characteristics are available; instantaneous, IEC constant time reset and ANSI
current dependent reset time.
For IEC inverse time delay characteristics the possible delay time settings are
instantaneous and IEC set constant time reset).
For the programmable inverse time delay characteristics all three types of reset
time characteristics are available; instantaneous, IEC constant time reset and ANSI
current dependent reset time. If the current dependent type is used settings pr, tr
and cr must be given, see equation 167:
[ ]
r
pr
t
t s k
i
cr
in
=
-
>

For RI and RD inverse time delay characteristics the possible delay time settings
are instantaneous and IEC constant time reset.
938
22.3 Inverse characteristics
Table 619: ANSI Inverse time characteristics
Operating characteristic:
( )
1
= +
-

P
A
t B k
I
EQUATION1249-SMALL V1 EN
Reset characteristic:
( )
2
1
=
-
t
r
t k
I
I = I
measured
/I
set
k = (0.05-999) in steps of
0.01 unless otherwise stated
-
ANSI Extremely Inverse A=28.2, B=0.1217, P=2.0 ,
tr=29.1
ANSI/IEEE C37.112,
class 5 + 30 ms

ANSI Very inverse A=19.61, B=0.491, P=2.0 ,
tr=21.6
ANSI Normal Inverse A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse k=(0.05-999) in steps of 0.01
A=0.086, B=0.185, P=0.02,
tr=4.6
939
Table 620: IEC Inverse time characteristics
Operating characteristic:
( )
1
=
-

P
A
t k
I
I = I
measured
/I
set
k = (0.05-999) in steps of 0.01 -
Time delay to reset, IEC inverse time (0.000-60.000) s 0.5% of set time 10
ms
IEC Normal Inverse A=0.14, P=0.02 IEC 60255-3, class 5 +
40 ms

IEC Very inverse A=13.5, P=1.0
IEC Inverse A=0.14, P=0.02
IEC Extremely inverse A=80.0, P=2.0
IEC Short time inverse A=0.05, P=0.04
IEC Long time inverse A=120, P=1.0
Programmable characteristic
Operate characteristic:
( )
= +
-

P
A
t B k
I C
Reset characteristic:
( )
=
-
PR
TR
t k
I CR
I = I
measured
/I
set
k = (0.05-999) in steps of 0.01
A=(0.005-200.000) in steps
of 0.001
B=(0.00-20.00) in steps of
0.01
C=(0.1-10.0) in steps of 0.1
P=(0.005-3.000) in steps of
0.001
TR=(0.005-100.000) in steps
of 0.001
CR=(0.1-10.0) in steps of 0.1
PR=(0.005-3.000) in steps of
0.001
IEC 60255, class 5 + 40
ms
Table 621: RI and RD type inverse time characteristics
RI type inverse characteristic
1
0.236
0.339
=
-
t k
I
I = I
measured
/I
set
k = (0.05-999) in steps of 0.01 IEC 60255-3, class 5 +
40 ms
RD type logarithmic inverse characteristic
5.8 1.35 = -

t
I
In
k
I = I
measured
/I
set
k = (0.05-999) in steps of 0.01 IEC 60255-3, class 5 +
40 ms
940
Table 622: Inverse time characteristics for overvoltage protection
Type A curve:
=
- >
>

t
k
U U
U
U> = U
set
U = U
measured
k = (0.05-1.10) in
steps of 0.01 unless
otherwise stated
Class 5 +40 ms
Type B curve:
2.0
480
32 0.5 0.035
=

- >
- -
>

t
k
U U
U
k = (0.05-1.10) in
otherwise stated
Type C curve:
3.0
480
32 0.5 0.035
=

- >
- -
>

t
k
U U
U
k = (0.05-1.10) in
otherwise stated
Programmable curve:
= +
- >
-
>

P
k A
t D
U U
B C
U
k = (0.05-1.10) in
otherwise stated
A = (0.005-200.000)
in steps of 0.001
B = (0.50-100.00) in
steps of 0.01
C = (0.0-1.0) in
steps of 0.1
D = (0.000-60.000)
in steps of 0.001
P = (0.000-3.000) in
steps of 0.001
941
Table 623: Inverse time characteristics for undervoltage protection
Type A curve:
=
< -
<

k
t
U U
U
U< = U
set
U = UV
measured
k = (0.05-1.10) in
otherwise stated
Class 5 +40 ms
Type B curve:
2.0
480
0.055
32 0.5
= +
< -
-
<

k
t
U U
U
U< = U
set
U = U
measured
k = (0.05-1.10) in
otherwise stated
Programmable curve:
= +
< -
-
<

P
k A
t D
U U
B C
U
U< = U
set
U = U
measured
k = (0.05-1.10) in
otherwise stated
A = (0.005-200.000)
in steps of 0.001
B = (0.50-100.00) in
steps of 0.01
C = (0.0-1.0) in
steps of 0.1
D = (0.000-60.000)
in steps of 0.001
P = (0.000-3.000) in
steps of 0.001
942
Table 624: Inverse time characteristics for residual overvoltage protection
Type A curve:
=
- >
>

t
k
U U
U
U> = U
set
U = U
measured
k = (0.05-1.10) in steps of
0.01
Class 5 +40 ms
Type B curve:
2.0
480
32 0.5 0.035
=

- >
- -
>

t
k
U U
U
k = (0.05-1.10) in steps of
0.01
Type C curve:
3.0
480
32 0.5 0.035
=

- >
- -
>

t
k
U U
U
k = (0.05-1.10) in steps of
0.01
Programmable curve:
= +
- >
-
>

P
k A
t D
U U
B C
U
k = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
steps of 0.001
B = (0.50-100.00) in
steps of 0.01
C = (0.0-1.0) in steps of
0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in
steps of 0.001
943
A070750 V2 EN
Figure 490: ANSI Extremely inverse time characteristics
944
A070751 V2 EN
Figure 491: ANSI Very inverse time characteristics
945
A070752 V2 EN
Figure 492: ANSI Normal inverse time characteristics
946
A070753 V2 EN
Figure 493: ANSI Moderately inverse time characteristics
947
A070817 V2 EN
Figure 494: ANSI Long time extremely inverse time characteristics
948
A070818 V2 EN
Figure 495: ANSI Long time very inverse time characteristics
949
A070819 V2 EN
Figure 496: ANSI Long time inverse time characteristics
950
A070820 V2 EN
Figure 497: IEC Normal inverse time characteristics
951
A070821 V2 EN
Figure 498: IEC Very inverse time characteristics
952
A070822 V2 EN
Figure 499: IEC Inverse time characteristics
953
A070823 V2 EN
Figure 500: IEC Extremely inverse time characteristics
954
A070824 V2 EN
Figure 501: IEC Short time inverse time characteristics
955
A070825 V2 EN
Figure 502: IEC Long time inverse time characteristics
956
A070826 V2 EN
Figure 503: RI-type inverse time characteristics
957
A070827 V2 EN
Figure 504: RD-type inverse time characteristics
958
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN
Figure 505: Inverse curve A characteristic of overvoltage protection
959
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN
Figure 506: Inverse curve B characteristic of overvoltage protection
960
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN
Figure 507: Inverse curve C characteristic of overvoltage protection
961
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN
Figure 508: Inverse curve A characteristic of undervoltage protection
962
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN
Figure 509: Inverse curve B characteristic of undervoltage protection
963
964
Section 23 Glossary
About this chapter
This chapter contains a glossary with terms, acronyms and abbreviations used in
ABB technical documentation.
AC Alternating current
ACT Application configuration tool within PCM600
A/D converter Analog to digital converter
ADBS Amplitude dead-band supervision
ADM Analog digital conversion module, with time synchronization
ANSI American National Standards Institute
AR Autoreclosing
ArgNegRes Setting parameter/ZD/
ArgDir Setting parameter/ZD/
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
AWG American Wire Gauge standard
BBP Busbar protection
BFP Breaker failure protection
BIM Binary input module
BOM Binary output module
BR External bi-stable relay
BS British standard
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals
between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for
serial communication
CB Circuit breaker
CBM Combined backplane module
Glossary
965
CCITT Consultative Committee for International Telegraph and
Telephony. A United Nations sponsored standards body
within the International Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI
CMPPS Combined mega pulses per second
CO cycle Close-open cycle
Co-directional Way of transmitting G.703 over a balanced line. Involves
two twisted pairs making it possible to transmit information
in both directions
COMTRADE Standard format according to IEC 60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves
four twisted pairs of with two are used for transmitting data
in both directions, and two pairs for transmitting clock signals
CPU Central processor unit
CR Carrier receive
CRC Cyclic redundancy check
CS Carrier send
CT Current transformer
CVT Capacitive voltage transformer
DAR Delayed auto-reclosing
DARPA Defense Advanced Research Projects Agency (The US
developer of the TCP/IP protocol etc.)
DBDL Dead bus dead line
DBLL Dead bus live line
DC Direct current
DFT Discrete Fourier transform
DIP-switch Small switch mounted on a printed circuit board
DLLB Dead line live bus
DNP Distributed Network Protocol as per IEEE/ANSI Std.
1379-2000
DR Disturbance recorder
DRAM Dynamic random access memory
DRH Disturbance report handler
DSP Digital signal processor
DTT Direct transfer trip scheme
Glossary
966
EHV network Extra high voltage network
EIA Electronic Industries Association
EMC Electro magnetic compatibility
EMF Electro motive force
EMI Electro magnetic interference
EnFP End fault protection
ESD Electrostatic discharge
FOX 20 Modular 20 channel telecommunication system for speech,
data and protection signals
FOX 512/515 Access multiplexer
FOX 6Plus Compact, time-division multiplexer for the transmission of
up to seven duplex channels of digital data over optical fibers
G.703 Electrical and functional description for digital lines used by
local telephone companies. Can be transported over balanced
and unbalanced lines
GCM Communication interface module with carrier of GPS
receiver module
GDE Graphical display editor within PCM600
GI General interrogation command
GIS Gas insulated switchgear
GOOSE Generic object oriented substation event
GPS Global positioning system
GSM GPS time synchronization module
HDLC protocol High level data link control, protocol based on the HDLC
standard
HFBR connector
type
Plastic fiber connector
HMI Human machine interface
HSAR High speed auto reclosing
HV High voltage
HVDC High voltage direct current
IDBS Integrating dead band supervision
IEC International Electrical Committee
IEC 60044-6 IEC Standard, Instrument transformers Part 6:
Requirements for protective current transformers for
transient performance
Glossary
967
IEC 60870-5-103 Communication standard for protective equipment. A serial
master/slave protocol for point-to-point communication
IEC 61850 Substation Automation communication standard
IEEE Institute of Electrical and Electronics Engineers
IEEE 802.12 A network technology standard that provides 100 Mbits/s on
twisted-pair or optical fiber cable
IEEE P1386.1 PCI Mezzanine card (PMC) standard for local bus modules.
References the CMC (IEEE P1386, also known as Common
mezzanine card) standard for the mechanics and the PCI
specifications from the PCI SIG (Special Interest Group) for
the electrical EMF Electro Motive Force.
IED Intelligent electronic device
I-GIS Intelligent gas insulated switchgear
IOM Binary input/output module
Instance When several occurrences of the same function are available
in the IED they are referred to as instances of that function.
One instance of a function is identical to another of the same
kind but will have a different number in the IED user
interfaces. The word instance is sometimes defined as an
item of information that is representative of a type. In the
same way an instance of a function in the IED is
representative of a type of function.
IP 1. Internet protocol. The network layer for the TCP/IP
protocol suite widely used on Ethernet networks. IP is a
connectionless, best-effort packet switching protocol. It
provides packet routing, fragmentation and re-assembly
through the data link layer.
2. Ingression protection according to IEC standard
IP 20 Ingression protection, according to IEC standard, level 20
IRF Internal fail signal
IRIG-B: InterRange Instrumentation Group Time code format B,
standard 200
ITU International Telecommunications Union
LAN Local area network
LIB 520 High voltage software module
LCD Liquid crystal display
LDCM Line differential communication module
LDD Local detection device
Glossary
968
LED Light emitting diode
LNT LON network tool
LON Local operating network
MCB Miniature circuit breaker
MCM Mezzanine carrier module
MIM Milli-ampere module
MPM Main processing module
MVB Multifunction vehicle bus. Standardized serial bus originally
developed for use in trains.
NCC National Control Centre
NUM Numerical module
OCO cycle Open-close-open cycle
OCP Overcurrent protection
OEM Optical ethernet module
OLTC On load tap changer
OV Over voltage
Overreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is over-reaching
when the impedance presented to it is smaller than the
apparent impedance to the fault applied to the balance point,
i.e. the set reach. The relay sees the fault but perhaps it
should not have seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
PCM600 Protection and control IED manager
PC-MIP Mezzanine card standard
PISA Process interface for sensors & actuators
PMC PCI Mezzanine card
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near
proximity to the measured and/or controlled components
PSM Power supply module
PST Parameter setting tool within PCM600
PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX
Glossary
969
RCA Relay characteristic angle
REVAL Evaluation software
RFPP Resistance for phase-to-phase faults
RFPE Resistance for phase-to-earth faults
RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital
data in point-to-point connections
RS485 Serial link according to EIA standard RS485
RTC Real time clock
RTU Remote terminal unit
SA Substation Automation
SC Switch or push-button to close
SCS Station control system
SCT System configuration tool according to standard IEC 61850
SLM Serial communication module. Used for SPA/LON/IEC
communication.
SMA connector Subminiature version A, A threaded connector with constant
impedance.
SMT Signal matrix tool within PCM600
SMS Station monitoring system
SNTP Simple network time protocol is used to synchronize
computer clocks on local area networks. This reduces the
requirement to have accurate hardware clocks in every
embedded system in a network. Each embedded node can
instead synchronize with a remote clock, providing the
required accuracy.
SPA Strmberg protection acquisition, a serial master/slave
protocol for point-to-point communication
SRY Switch for CB ready condition
ST Switch or push-button to trip
Starpoint Neutral point of transformer or generator
SVC Static VAr compensation
TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport
layer protocol used on Ethernet and the Internet.
Glossary
970
TCP/IP Transmission control protocol over Internet Protocol. The de
facto standard Ethernet protocols incorporated into 4.2BSD
Unix. TCP/IP was developed by DARPA for internet
working and encompasses both network layer and transport
layer protocols. While TCP and IP specify two protocols at
specific protocol layers, TCP/IP is often used to refer to the
entire US Department of Defense protocol suite based upon
these, including Telnet, FTP, UDP and RDP.
TEF Time delayed earth-fault protection function
TNC connector Threaded Neill Concelman, A threaded constant impedance
version of a BNC connector
TPZ, TPY, TPX,
TPS
Current transformer class according to IEC
Underreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is under-reaching
when the impedance presented to it is greater than the
apparent impedance to the fault applied to the balance point,
i.e. the set reach. The relay does not see the fault but
perhaps it should have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage
and current values
UTC Coordinated universal time. A coordinated time scale,
maintained by the Bureau International des Poids et Mesures
(BIPM), which forms the basis of a coordinated
dissemination of standard frequencies and time signals. UTC
is derived from International Atomic Time (TAI) by the
addition of a whole number of "leap seconds" to synchronize
it with Universal Time 1 (UT1), thus allowing for the
eccentricity of the Earth"s orbit, the rotational axis tilt (23.5
degrees), but still showing the Earth"s irregular rotation, on
which UT1 is based. The Coordinated Universal Time is
expressed using a 24-hour clock and uses the Gregorian
calendar. It is used for aeroplane and ship navigation, where
it also sometimes known by the military name, "Zulu time".
"Zulu" in the phonetic alphabet stands for "Z" which stands
for longitude zero.
UV Undervoltage
WEI Weak end infeed logic
VT Voltage transformer
X.21 A digital signalling interface primarily used for telecom
equipment
3I
O
Three times zero-sequence current. Often referred to as the
residual or the earth-fault current
Glossary
971
3U
O
Three times the zero sequence voltage. Often referred to as
the residual voltage or the neutral point voltage
Glossary
972
973
Contact us
ABB AB
Substation Automation Products
SE-721 59 Vsters, Sweden
Phone +46 (0) 21 32 50 00
Fax +46 (0) 21 14 69 18
www.abb.com/substationautomation
1
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EQUATION1579 V1 EN (Equation 29)

EQUATION1580 V1 EN (Equation 30)

EQUATION1183 V2 EN (Equation 51)

EQUATION1184 V2 EN (Equation 52)

IECEQUATION2297 V1 EN (Equation 113)

IECEQUATION2300 V1 EN (Equation 116)

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